Implementation method of efficient general digital down-conversion module

Abstract

The invention relates to an implementation method of an efficient general digital down-conversion module, and belongs to the technical field of digital signal processing. According to the method, the center frequency of the digital intermediate frequency signal is reasonably configured, so that the center frequency of the digital intermediate frequency signal is close to fs / 4, error-free frequency conversion processing can be achieved by only carrying out negation operation on the input signal, resources are saved, and frequency conversion errors do not exist. Therefore, the digital intermediate frequency signal can be expanded into a real signal and a complex signal, and the digital local frequency can be expanded into fs / 4 and 3fs / 4. Compared with a traditional scheme, the scheme has no frequency conversion error, does not need to consume resources such as an adder, a block RAM (Random Access Memory) and a multiplier, saves the power consumption of the FPGA, and reduces the occupied area of the FPGA resources.

Description

Technical Field

[0001] This invention belongs to the field of digital signal processing technology, specifically relating to a method for implementing a high-efficiency and universal digital down-conversion module. Background Technology

[0002] Digital signal processing systems typically require down-conversion of digital intermediate frequency (IF) signals. Traditional digital down-conversion schemes generate digital local oscillator (LOS) signals using a DDS module, and then multiply the LOS signals with the LIF signals using a mixer to achieve the digital down-conversion function.

[0003] Traditional digital downconversion processing methods, such as Figure 1 As shown.

[0004] Below, we will analyze each part in detail: Functional descriptions of each module. 1. Phase accumulator Function: Generates linearly increasing phase values Input: Frequency Control Word (FCW) Output: Phase address (usually the high-order bits are used as the lookup table address) Operating mode: Accumulate FCW once per clock cycle. The formula for calculating the frequency control word (FCW) is as follows: FCW = (fc × 2^N) / fs, Where fs is the digital clock frequency, fc is the local oscillator signal frequency to be generated, and N is the bit width of the accumulator. In order to obtain a more accurate local oscillator frequency fc, the bit width of the accumulator N needs to be as large as possible, and N=32 is generally chosen.

[0005] 2. Lookup table Function: Stores sine / cosine function values Input: The phase address output by the phase accumulator Output: Local oscillator signal, two channels: sine sin(wt) and cosine cos(wt). Contents: Table of pre-calculated sin / cos function values The contents of the lookup table are usually calculated using MATLAB and saved in two's complement form. 3. Mixer Function: Multiplies the input signal with the local oscillator signal. Input: Intermediate frequency input signal and quadrature local oscillator signal from lookup table Output: The signal after mixing Problems with this method: 1. Consumes a large amount of resources: Using an FPGA implementation, the resources required for a downconversion module with one signal are as follows: the phase accumulator requires one 32-bit adder, the lookup table requires two blocks of RAM, and the mixer requires two multipliers. If the system is a multi-element phased array system, the resources consumed will increase exponentially.

[0006] 2. The local oscillator frequency has an error. Although frequency errors can be reduced by using high-bit-width accumulators, they cannot be reduced to zero. These errors can be considered as noise and affect signal quality. Summary of the Invention

[0007] (a) Technical problems to be solved The technical problem to be solved by this invention is how to provide an efficient and universal digital downconversion module implementation method to solve the problems of high resource consumption and local oscillator frequency error in traditional digital downconversion processing methods.

[0008] (II) Technical Solution To address the aforementioned technical problems, this invention proposes a method for implementing a high-efficiency, universal digital down-conversion module, which includes the following steps: S11. Obtain the digital intermediate frequency real input signal as: s=a; S12. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of 1 / 4 sampling rate, i.e., fs / 4:

[0009] in, pi is the mathematical constant π. fs is the sampling rate of the digital signal; f is the local oscillator frequency; n is the sampling time of the digital signal; j is the imaginary unit; The local oscillator frequency of the digital quadrature local oscillator signal is fs / 4. Therefore, one sampling period of the digital quadrature local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, pi / 2, pi, and 3pi / 2, respectively. The corresponding local oscillator signals at the four sampling points are... {1,j,-1,-j} The real input signals S13 and S11, along with the local oscillator input of S12, are fed into the mixer to obtain the complex signal after quadrature down-conversion. .

[0010] This invention also provides a method for implementing a high-efficiency, universal digital down-conversion module, the method comprising the following steps: S21. Obtain the digital intermediate frequency real input signal as: s=a; S22. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of -fs / 4:

[0011] in, pi is the mathematical constant π. fs is the sampling rate of the digital signal; f is the local oscillator frequency; n is the sampling time of the digital signal; j is the imaginary unit; Since the local oscillator frequency -fs / 4 is 1 / 4 of the sampling rate fs, we know that one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, -pi / 2, -pi, and -3pi / 2, respectively. The local oscillator signal corresponding to these four sampling points is... {1,-j,-1,j} The real input signals S23 and S21, along with the local oscillator input of S22, are fed into the mixer to obtain the complex signal after quadrature down-conversion. .

[0012] This invention also provides a method for implementing a high-efficiency, universal digital down-conversion module, the method comprising the following steps: S31. Obtain the digital intermediate frequency complex input signal as follows: ; S32. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of fs / 4:

[0013] in, pi is the mathematical constant π. fs is the sampling rate of the digital signal; f is the local oscillator frequency; n is the sampling time of the digital signal; j is the imaginary unit; Since the local oscillator frequency fs / 4 is 1 / 4 of the sampling rate, one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the 4 sampling phases within one period are 0, pi / 2, pi, and 3pi / 2, respectively. The local oscillator signal corresponding to these 4 sampling points is... {1,j,-1,-j} The complex input signals S33 and S31, along with the local oscillator signal from S32, are input to the mixer to obtain the complex signal after quadrature down-conversion. After taking the real part, it becomes {a,-b,-a,b}.

[0014] This invention provides a method for implementing a high-efficiency, universal digital down-conversion module, the method comprising the following steps: S41. Obtain the digital intermediate frequency complex input signal as follows: ; S42. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of -fs / 4:

[0015] Since the local oscillator frequency -fs / 4 is 1 / 4 of the sampling rate, one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, -pi / 2, -pi, and -3pi / 2, respectively. The local oscillator signal corresponding to these four sampling points is... {1,-j,-1,j} The complex input signals S43 and S41, along with the local oscillator signal S42, are input to the mixer to obtain the complex signal after quadrature down-conversion. After taking the real part, we get {a, b, -a, -b}.

[0016] (III) Beneficial Effects This invention proposes a method for implementing a high-efficiency and universal digital downconverter module. By reasonably configuring the center frequency of the digital intermediate frequency signal, the center frequency of the digital intermediate frequency signal is made close to fs / 4. In this way, error-free frequency conversion can be achieved by simply inverting the input signal, which saves resources and eliminates frequency conversion error. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a traditional digital down-conversion processing method; Figure 2 This is a block diagram illustrating the implementation of the present invention. Detailed Implementation

[0018] To make the objectives, contents, and advantages of the present invention clearer, the specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0019] This invention relates to the fields of software-defined radio and digital signal processing technology, and can be applied to baseband signal processing fields that require digital frequency conversion, such as radar, communication, and navigation.

[0020] For most applications, the center frequency of the radio frequency signal These frequencies are all far higher than the signal bandwidth. In such scenarios, a common approach is to sample the digital intermediate frequency (IF), i.e., the radio frequency (RF) signal and the RF local oscillator signal. Multiplication transforms the center frequency of the signal to the intermediate frequency. The following frequency relationship can be obtained:

[0021] By properly configuring the radio frequency local oscillator signal The center frequency of the digital intermediate frequency signal equal fs / 4, of which fs The sampling rate of the digital signal, i.e.

[0022] Thus, after multiplying the RF signal and the RF local oscillator signal, the center frequency of the resulting digital intermediate frequency signal is: fs / 4. After digitizing the signal, it is necessary to further convert the center frequency of the signal to zero intermediate frequency in the digital domain. The digital frequency conversion method proposed in this invention can achieve error-free frequency conversion processing simply by inverting the input signal, which saves resources and eliminates frequency conversion errors.

[0023] To further expand the application scenarios of digital frequency converters, the digital intermediate frequency signal can be extended to both real and complex signals, and the digital local oscillator frequency can be extended to... fs / 4 and 3 fs / 4 Two scenarios.

[0024] The specific implementation plan is as follows: 1. Multiply the real input signal by a digital quadrature local oscillator signal with a local oscillator frequency of 1 / 4 sampling rate (fs / 4). S11. Obtain the digital intermediate frequency real input signal as: s=a; S12. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of 1 / 4 sampling rate (fs / 4):

[0025] The explanations of the variables and operators are as follows: cos—cosine operation; sin — sine operation; pi — Pi (the mathematical constant of a circle); fs — the sampling rate of the digital signal; f—Local oscillator frequency; n—the sampling time of the digital signal, which is 0, 1, 2…N; j—Imaginary unit; Since the local oscillator frequency (fs / 4) of the digital quadrature local oscillator signal is 1 / 4 of the sampling rate fs, it can be known that one sampling period of the digital quadrature local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, then the 4 sampling phases within one period are 0, pi / 2, pi, and 3pi / 2, respectively. The local oscillator signal at the corresponding 4 sampling points is... {1,j,-1,-j} The real input signals S13 and S11, along with the local oscillator input of S12, are fed into the mixer to obtain the complex signal after quadrature down-conversion.

[0026] 2. Multiply the real input signal by a digital quadrature local oscillator signal with a negative local oscillator frequency and a sampling rate of 1 / 4 (3fs / 4). S21. Obtain the digital intermediate frequency real input signal as: s=a; S22. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of -1 / 4 sampling rate (3fs / 4):

[0027] Since the local oscillator frequency (-fs / 4) is 1 / 4 of the sampling rate fs, it can be known that one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, The four sampling phases within one period are 0, -pi / 2, -pi, -3pi / 2, and the corresponding local oscillator signals at the four sampling points are: {1,-j,-1,j} The real input signals S23 and S21, along with the local oscillator input of S22, are fed into the mixer to obtain the complex signal after quadrature down-conversion.

[0028] 3. Multiply the complex input signal with a digital quadrature local oscillator signal at a local oscillator frequency of 1 / 4 sampling rate (fs / 4). S31. Obtain the digital intermediate frequency complex input signal as follows: (j is the imaginary unit) S32. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of 1 / 4 sampling rate (fs / 4):

[0029] Since the local oscillator frequency (fs / 4) is 1 / 4 of the sampling rate fs, it can be known that one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, Then the four sampling phases within one period are 0, pi / 2, pi, 3pi / 2, and the local oscillator signal corresponding to the four sampling points is... {1,j,-1,-j} The complex input signals S33 and S31, along with the local oscillator signal from S32, are input to the mixer to obtain the complex signal after quadrature down-conversion. After taking the real part, it becomes {a, -b, -a, b} 4. Multiply the complex input signal with a digital quadrature local oscillator signal at a negative 1 / 4 sampling rate (3fs / 4). S41. Obtain the digital intermediate frequency complex input signal as follows: (j is the imaginary unit) S42. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of -1 / 4 sampling rate (3fs / 4):

[0030] Since the local oscillator frequency (-fs / 4) is 1 / 4 of the sampling rate fs, one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, -pi / 2, -pi, and -3pi / 2, respectively. The local oscillator signal at the corresponding four sampling points is... {1,-j,-1,j} The complex input signals S43 and S41, along with the local oscillator signal S42, are input to the mixer to obtain the complex signal after quadrature down-conversion. After taking the real part, the result is {a, b, -a, -b}. Beneficial effects: This invention optimizes the center frequency of the digital intermediate frequency signal by reasonably configuring it to be close to fs / 4. This allows for error-free frequency conversion by simply inverting the input signal, saving resources and eliminating frequency conversion errors.

[0031] To further expand the application scenarios, the digital intermediate frequency signal can be extended to two cases: real signal and complex signal, and the digital local oscillator frequency can be extended to two cases: fs / 4 and 3fs / 4.

[0032] Implementation diagram as follows Figure 2 The IQ signal after frequency conversion can be obtained by simply inverting the input signal and then recombining the original signal and the inverted signal.

[0033] Compared with traditional solutions, this solution does not require resources such as adders, block RAM, and multipliers, thus saving FPGA power consumption and reducing the FPGA resource footprint, making it a practical solution.

[0034] In order to make the center frequency of the digital intermediate frequency signal fs / 4, a suitable RF local oscillator can be designed according to the center frequency of the RF signal, so that the center frequency of the RF signal after downconversion is close to fs / 4. At the same time, a suitable intermediate frequency filter is configured for intermediate frequency filtering. In this way, the digital downconversion process can use this scheme to achieve efficient digital downconversion, thereby saving resources and eliminating conversion errors.

[0035] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for implementing a high-efficiency, universal digital down-conversion module, characterized in that, The method includes the following steps: S11. Obtain the digital intermediate frequency real input signal as: s=a; S12. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of 1 / 4 sampling rate, i.e., fs / 4: in, pi is the mathematical constant π. fs is the sampling rate of the digital signal; f is the local oscillator frequency; n is the sampling time of the digital signal; j is the imaginary unit; The local oscillator frequency of the digital quadrature local oscillator signal is fs / 4. Therefore, one sampling period of the digital quadrature local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, pi / 2, pi, and 3pi / 2, respectively. The corresponding local oscillator signals at the four sampling points are... {1,j,-1,-j} The real input signals S13 and S11, along with the local oscillator input of S12, are fed into the mixer to obtain the complex signal after quadrature down-conversion. 。 2. The implementation method of the high-efficiency universal digital down-conversion module as described in claim 1, characterized in that, The center frequency of the radio frequency signal is Radio frequency signals and radio frequency local oscillator signals Multiplication transforms the center frequency of the signal to the intermediate frequency. The following frequency relationship is obtained: By properly configuring the radio frequency local oscillator signal The center frequency of the digital intermediate frequency signal equal fs / 4, of which fs The sampling rate of the digital signal, i.e., the frequency of the radio frequency local oscillator signal, is: Thus, after multiplying the RF signal and the RF local oscillator signal, the center frequency of the resulting digital intermediate frequency signal is: fs / 4.

3. The implementation method of the high-efficiency universal digital down-conversion module as described in claim 1, characterized in that, Configure a suitable intermediate frequency filter for intermediate frequency filtering.

4. A method for implementing a high-efficiency, universal digital down-conversion module, characterized in that, The method includes the following steps: S21. Obtain the digital intermediate frequency real input signal as: s=a; S22. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of -fs / 4: in, pi is the mathematical constant π. fs is the sampling rate of the digital signal; f is the local oscillator frequency; n is the sampling time of the digital signal; j is the imaginary unit; Since the local oscillator frequency -fs / 4 is 1 / 4 of the sampling rate fs, we know that one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, -pi / 2, -pi, and -3pi / 2, respectively. The local oscillator signal corresponding to these four sampling points is... {1,-j,-1,j} The real input signals S23 and S21, along with the local oscillator input of S22, are fed into the mixer to obtain the complex signal after quadrature down-conversion. 。 5. The implementation method of the high-efficiency universal digital down-conversion module as described in claim 4, characterized in that, The center frequency of the radio frequency signal is Radio frequency signals and radio frequency local oscillator signals Multiplication transforms the center frequency of the signal to the intermediate frequency. The following frequency relationship is obtained: By properly configuring the radio frequency local oscillator signal The center frequency of the digital intermediate frequency signal equal fs / 4, of which fs The sampling rate of the digital signal, i.e., the frequency of the radio frequency local oscillator signal, is: Thus, after multiplying the RF signal and the RF local oscillator signal, the center frequency of the resulting digital intermediate frequency signal is: fs / 4.

6. The implementation method of the high-efficiency universal digital down-conversion module as described in claim 4, characterized in that, Configure a suitable intermediate frequency filter for intermediate frequency filtering.

7. A method for implementing a high-efficiency, universal digital down-conversion module, characterized in that, The method includes the following steps: S31. Obtain the digital intermediate frequency complex input signal as follows: ; S32. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of fs / 4: in, pi is the mathematical constant π. fs is the sampling rate of the digital signal; f is the local oscillator frequency; n is the sampling time of the digital signal; j is the imaginary unit; Since the local oscillator frequency fs / 4 is 1 / 4 of the sampling rate, one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the 4 sampling phases within one period are 0, pi / 2, pi, and 3pi / 2, respectively. The local oscillator signal corresponding to these 4 sampling points is... {1,j,-1,-j} The complex input signals S33 and S31, along with the local oscillator signal from S32, are input to the mixer to obtain the complex signal after quadrature down-conversion. After taking the real part, it becomes {a,-b,-a,b}.

8. The implementation method of the high-efficiency universal digital down-conversion module as described in claim 7, characterized in that, The center frequency of the radio frequency signal is Radio frequency signals and radio frequency local oscillator signals Multiplication transforms the center frequency of the signal to the intermediate frequency. The following frequency relationship is obtained: By properly configuring the radio frequency local oscillator signal The center frequency of the digital intermediate frequency signal equal fs / 4, of which fs The sampling rate of the digital signal, i.e., the frequency of the radio frequency local oscillator signal, is: Thus, after multiplying the RF signal and the RF local oscillator signal, the center frequency of the resulting digital intermediate frequency signal is: fs / 4.

9. A method for implementing a high-efficiency, universal digital down-conversion module, characterized in that, The method includes the following steps: S41. Obtain the digital intermediate frequency complex input signal as follows: ; S42. Obtain the digital quadrature local oscillator signal with a local oscillator frequency of -fs / 4: Since the local oscillator frequency -fs / 4 is 1 / 4 of the sampling rate, one sampling period of the local oscillator signal consists of 4 sampling points. Assuming the initial sampling phase is 0, the four sampling phases within one period are 0, -pi / 2, -pi, and -3pi / 2, respectively. The local oscillator signal corresponding to these four sampling points is... {1,-j,-1,j} The complex input signals S43 and S41, along with the local oscillator signal S42, are input to the mixer to obtain the complex signal after quadrature down-conversion. After taking the real part, we get {a, b, -a, -b}.

10. The implementation method of the high-efficiency universal digital down-conversion module as described in claim 9, characterized in that, The center frequency of the radio frequency signal is Radio frequency signals and radio frequency local oscillator signals Multiplication transforms the center frequency of the signal to the intermediate frequency. The following frequency relationship is obtained: By properly configuring the radio frequency local oscillator signal The center frequency of the digital intermediate frequency signal equal fs / 4, of which fs The sampling rate of the digital signal, i.e., the frequency of the radio frequency local oscillator signal, is: Thus, after multiplying the RF signal and the RF local oscillator signal, the center frequency of the resulting digital intermediate frequency signal is: fs / 4.

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