Chip, display device, electronic equipment, mother board, preparation method of mother board and light-emitting device

Abstract

The embodiment of the invention provides a chip, a display device, electronic equipment, a mother board, a preparation method of the mother board and a light-emitting device, relates to the technical field of semiconductors, and is used for reducing optical crosstalk between LED devices in the display device. By arranging the reflective retaining walls in one or more light-emitting devices in the chip, light radiated from the side surfaces of the light-emitting devices can be reflected and radiated in the direction perpendicular to the substrate, so that the overall light-emitting efficiency (photoelectric conversion efficiency) of the chip is improved. Moreover, the light radiated by the light-emitting device can be reflected and blocked by the reflective retaining wall, so that the light is prevented from entering the area where the adjacent light-emitting device is located, the interference to the visual brightness of the adjacent light-emitting device is reduced, and the resolution of the chip is improved. Besides, a light collimator is arranged on the light emitting side of the epitaxial lamination layer used for emitting light, and the light collimator optimizes multi-angle light received by the light collimator into light perpendicular to the substrate and emits the light, so that side light which cannot be utilized originally can be utilized, and the light emitting efficiency of the chip is further improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a chip, display device, electronic device, motherboard and its preparation method, and light-emitting device. Background Technology

[0002] With the development of microfabrication technology, light-emitting diode (LED) devices, with their advantages of high brightness and high stability, have been increasingly widely used in lighting and display fields. The advantages of LED devices are particularly evident in applications requiring small size and high resolution.

[0003] However, LED devices are typically Lambertian light emitters, with an emission angle distribution reaching 120°. This larger emission angle is suitable for large flat panel displays, improving their viewing angle. However, when LED devices are applied to the field of micro-displays, each micro-display consists of tens of thousands to hundreds of thousands of micrometer-sized LED devices. The small spacing between these LED devices (micrometer-level) leads to severe optical crosstalk between adjacent LED devices, thereby reducing display resolution and affecting the final imaging effect. Summary of the Invention

[0004] This application provides a chip, a display device, an electronic device, a motherboard, a method for fabricating the same, and a light-emitting device, for reducing optical crosstalk between LED devices in a display device.

[0005] A first aspect of this application provides a chip, comprising: a substrate and a plurality of pixels disposed on the substrate. Each pixel includes a first primary color light-emitting device, a second primary color light-emitting device, and a third primary color light-emitting device. The first primary color light-emitting device includes a first driving electrode substrate, a first epitaxial stack, a first transparent electrode, a first reflective barrier, and a first collimator. The first epitaxial stack is disposed on one side of the first driving electrode substrate, and the first transparent electrode covers the first epitaxial stack and a portion of the first driving electrode substrate. The first reflective barrier is disposed on the side of the first transparent electrode away from the first driving electrode substrate, located around the first epitaxial stack. The first collimator is disposed on the side of the first transparent electrode away from the first driving electrode substrate, for collimating the light emitted by the first epitaxial stack.

[0006] The chip provided in this application embodiment, by setting a first reflective barrier in the first primary color light-emitting device of the chip, can reflect the light radiated from the side of the first primary color light-emitting device and then radiate it in a direction perpendicular to the substrate. This allows the light radiated from the side of the first primary color light-emitting device to be utilized, avoiding waste caused by side radiation and improving the overall light extraction efficiency (photoelectric conversion efficiency) of the chip. Moreover, after setting the first reflective barrier around the first primary color light-emitting device, the light radiated by the first primary color light-emitting device will be reflected and blocked by the first reflective barrier, reducing the light emission angle and preventing light from entering the area where adjacent light-emitting devices are located, reducing interference with the visual brightness of adjacent light-emitting devices (reducing optical crosstalk between light-emitting devices), which helps to improve the resolution of the chip. In addition, a first optical collimator is set on the light emission side of the first epitaxial stack used for light emission. The first optical collimator optimizes the multi-angle light received by itself into light emitted perpendicular to the substrate, so that the side light that was originally unusable can be utilized, further improving the light extraction efficiency (photoelectric conversion efficiency) of the chip.

[0007] In one possible implementation, the first optical collimator is fixedly connected to the first reflective barrier, and there is a gap between the first optical collimator and the first transparent electrode. By fixing the first optical collimator to the first reflective barrier, a mounting bracket is not required in the first primary color light-emitting device, which helps to reduce the weight of the chip and meet the needs of different application scenarios.

[0008] In one possible implementation, the projection of the first optical collimator onto the substrate overlaps the projection of the first epitaxial layer onto the substrate. This ensures that the first optical collimator can collimate light rays emitted from the first epitaxial layer at various angles, further improving the light extraction efficiency (photoelectric conversion efficiency) of the first primary color light-emitting device.

[0009] In one possible implementation, the first primary color light-emitting device further includes a filling portion that fills the gap between the first reflective barrier and the first optical collimator and the first transparent electrode; the refractive index of the filling portion is less than the refractive index of the first reflective barrier and the first epitaxial layer. By providing a filling portion inside the light-emitting device, the optical collimator can be directly formed on the filling portion, which simplifies the fabrication process and reduces the requirements for the optical collimator material.

[0010] In one possible implementation, the first optical collimator includes an opening located above the first epitaxial layer. Photons radiated from the first epitaxial layer exit in a direction perpendicular to the substrate from the front side of the first epitaxial layer. Therefore, when the opening in the first optical collimator is located above the first epitaxial layer—that is, when no first optical collimator is provided above the first epitaxial layer—photons from the front side of the first epitaxial layer still exit in a direction perpendicular to the substrate, without affecting the light extraction efficiency of the first primary color light-emitting device. However, providing an opening in the first optical collimator can reduce the manufacturing complexity.

[0011] In one possible implementation, a first optical collimator is disposed on the surface of the first transparent electrode, covering the portion of the first transparent electrode that overlaps with the first epitaxial layer. Forming the first optical collimator only above a localized area of ​​the first transparent electrode can reduce the weight of the first optical collimator, further making the first primary color light-emitting device thinner and lighter, and can also simplify the manufacturing process.

[0012] In one possible implementation, the first reflective barrier is made of metal and is coupled to the first transparent electrode. The first transparent electrode is made of a transparent conductive material, while the first reflective barrier is made of metal. The conductivity of metal is greater than that of transparent conductive material. During the driving process of the first primary color light-emitting device, the current is transmitted through the first reflective barrier, which can alleviate the voltage drop phenomenon in the light-emitting area.

[0013] In one possible implementation, the top surface of the first reflective barrier is higher than the plane where the first optical collimator is located. This allows the first reflective barrier to reflect and isolate the light collimated by the first optical collimator, resulting in more effective beam angle reduction for the first primary color light-emitting device, further improving light extraction efficiency and reducing optical crosstalk between adjacent light-emitting devices.

[0014] In one possible implementation, the first epitaxial layer includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked on the first driving electrode substrate; the bottom surface of the first reflective barrier is located near the active layer on the side facing the first semiconductor layer. This ensures that light emitted from the bottom of the first active layer is not missed, allowing the first reflective barrier to reflect as much light emitted from the side of the first active layer as possible to the light-emitting side, thereby improving light extraction efficiency.

[0015] In one possible implementation, the second primary color light-emitting device includes a second driving electrode substrate, a second epitaxial stack, a second transparent electrode, a second reflective barrier, and a second collimator. The second epitaxial stack is disposed on one side of the second driving electrode substrate, and the second transparent electrode covers the second epitaxial stack and part of the second driving electrode substrate. The second reflective barrier is disposed on the side of the second transparent electrode away from the second driving electrode substrate, located around the second epitaxial stack. The second collimator is disposed on the side of the second transparent electrode away from the second driving electrode substrate and is used to collimate the light emitted from the second epitaxial stack. By providing a second reflective barrier in the second primary color light-emitting device in the chip, the light radiated from the side of the second primary color light-emitting device can be reflected and radiated in a direction perpendicular to the substrate, improving the overall light extraction efficiency (photoelectric conversion efficiency) of the chip. Moreover, the second reflective barrier surrounding the second primary color light-emitting device can reduce interference with the visual brightness of adjacent light-emitting devices (reducing optical crosstalk between light-emitting devices), which helps to improve the chip's resolution. In addition, a second light collimator is provided on the light-emitting side of the second epitaxial stack used for light emission. The second light collimator optimizes the multi-angle light received by itself into light that is perpendicular to the substrate and emits it, so that the side light that was originally unusable can be utilized, thereby further improving the light emission efficiency (photoelectric conversion efficiency) of the chip.

[0016] In one possible implementation, the third primary color light-emitting device includes a third driving electrode substrate, a third epitaxial layer, a third transparent electrode, a third reflective barrier, and a third collimator. The third epitaxial layer is disposed on one side of the third driving electrode substrate, and the third transparent electrode covers the third epitaxial layer and part of the third driving electrode substrate. The third reflective barrier is disposed on the side of the third transparent electrode away from the third driving electrode substrate, located around the third epitaxial layer. The third collimator is disposed on the side of the third transparent electrode away from the third driving electrode substrate and is used to collimate the light emitted from the third epitaxial layer. By setting a third reflective barrier in the third primary color light-emitting device in the chip, the light radiated from the side of the third primary color light-emitting device can be reflected and radiated in a direction perpendicular to the substrate, improving the overall light extraction efficiency (photoelectric conversion efficiency) of the chip. Moreover, the presence of a third reflective barrier around the third primary color light-emitting device can reduce interference with the visual brightness of adjacent light-emitting devices (reducing optical crosstalk between light-emitting devices), which helps to improve the chip's resolution. In addition, a third light collimator is provided on the light-emitting side of the third epitaxial stack used for light emission. The third light collimator optimizes the multi-angle light received by itself into light that is perpendicular to the substrate and emits it, so that the side light that was originally unusable can be utilized, thereby further improving the light emission efficiency (photoelectric conversion efficiency) of the chip.

[0017] A second aspect of the present application provides a display device, including a chip and a lens, wherein the lens is disposed on the light-emitting side of the chip; the chip includes any of the chips in the first aspect.

[0018] A third aspect of this application provides an electronic device, including an optical waveguide sheet and a display device, wherein the optical waveguide sheet is used to receive image light emitted by the display device; the display device includes the display device of the second aspect.

[0019] A fourth aspect of this application provides a motherboard, comprising: a driving electrode substrate including a plurality of first electrodes arranged in an array; a light-emitting stack disposed on one side of the driving electrode substrate; the light-emitting stack including a second electrode and a plurality of epitaxial stacks, the plurality of epitaxial stacks being disposed corresponding to the plurality of first electrodes; the second electrode covering the plurality of epitaxial stacks and a portion of the driving electrode substrate; a reflective barrier mesh disposed on the side of the second electrode away from the driving electrode substrate, forming a plurality of grids; the epitaxial stacks being located within the grids; and a plurality of optical collimators disposed on the side of the second electrode away from the driving electrode substrate, for collimating the light emitted by the epitaxial stacks. The motherboard provided in this application embodiment can be used to fabricate light-emitting devices applied in the chips provided in this application embodiment.

[0020] In one possible implementation, the reflective barrier is made of a conductive material and is coupled to a second electrode.

[0021] In one possible implementation, the mother plate also includes multiple filling portions located within the grid, filling the gap between the optical collimator and the second electrode; the refractive index of the filling portions is less than that of the reflective barrier grid and the epitaxial stack.

[0022] In one possible implementation, the optical collimator includes an opening located above the epitaxial stack.

[0023] In one possible implementation, an optical collimator is disposed on the surface of the second electrode, covering the portion of the second electrode that overlaps with the epitaxial layer.

[0024] A fifth aspect of the embodiments of this application provides a light-emitting device, which is obtained by pixelating a mother plate according to any one of the fourth aspects.

[0025] A sixth aspect of this application provides a method for preparing a motherboard. The method includes: forming a light-emitting stack located on one side of a driving electrode substrate; the driving electrode substrate includes a plurality of first electrodes arranged in an array, the light-emitting stack includes a second electrode and a plurality of epitaxial stacks, the plurality of epitaxial stacks being disposed corresponding to the plurality of first electrodes; the second electrode covers the plurality of epitaxial stacks and a portion of the driving electrode substrate; a reflective barrier and a plurality of collimators are formed on the side of the second electrode away from the driving electrode substrate; the reflective barrier surrounds a plurality of grids, the epitaxial stacks being located within the grids; the collimators are disposed on the side of the second electrode away from the driving electrode substrate, for collimating the light emitted by the epitaxial stacks.

[0026] In one possible implementation, a reflective barrier mesh and multiple optical collimators are formed on the side of the second electrode away from the driving electrode substrate, including: forming multiple first reflective barrier strips extending along a first direction; forming a sacrificial layer that fills the spaces between adjacent first reflective barrier strips and covers the second electrode; forming an optical collimator layer that covers the sacrificial layer and at least part of the first reflective barrier strips; removing the sacrificial layer; forming multiple second reflective barrier strips extending along the first direction, the second reflective barrier strips being disposed on the side of the first reflective barrier strips away from the optical collimator layer; forming a third reflective barrier strip extending along a second direction; the second direction intersects the first direction, the third reflective barrier strip is connected to the second reflective barrier strips, and passes through the optical collimator layer to connect with the first reflective barrier strips, forming a reflective barrier mesh and multiple optical collimators. This method can be used to fabricate a light-emitting device applied in the chip provided in the embodiments of this application.

[0027] In one possible implementation, a reflective barrier and multiple collimators are formed on the side of the second electrode away from the driving electrode substrate, including: forming a first sub-reflective barrier; the first sub-reflective barrier enclosing multiple first sub-grids, with an epitaxial stack located within the first sub-grids; forming a sacrificial layer that fills the first sub-grids and covers the second electrode; forming an optical collimator layer that covers the sacrificial layer and at least part of the first sub-reflective barrier; forming multiple openings on the collimator layer to form multiple optical collimators; the openings being located above the epitaxial stack; removing the sacrificial layer; forming a second sub-reflective barrier; the second sub-reflective barrier enclosing multiple second sub-grids, the second sub-reflective barrier being disposed on the side of the first sub-reflective barrier away from the optical collimators, with the first and second sub-grids overlapping to form the reflective barrier. During the fabrication of the motherboard, by forming openings in the optical collimators, the etchant can directly enter through the openings to remove the sacrificial layer. Therefore, the first sub-reflective barrier can be formed in a single process, without requiring two separate operations. It simplifies the process steps and does not limit the shape of the first sub-mesh formed. It has lower process costs and is applicable to a wider range of scenarios.

[0028] In one possible implementation, a reflective barrier and multiple collimators are formed on the side of the second electrode away from the driving electrode substrate, including: forming a first sub-reflective barrier; the first sub-reflective barrier enclosing multiple first sub-grids, with an epitaxial stack located within the first sub-grids; forming a filling portion that fills the first sub-grids and covers the second electrode; the refractive index of the filling portion is less than the refractive index of the first sub-reflective barrier and the epitaxial stack; forming multiple optical collimators that cover the filling portion and at least a portion of the first sub-reflective barrier; forming a second sub-reflective barrier; the second sub-reflective barrier enclosing multiple second sub-grids, the second sub-reflective barrier being disposed on the side of the first sub-reflective barrier away from the optical collimators, the first and second sub-grids overlapping to form a grid, thereby forming the reflective barrier. During the fabrication of the motherboard, a sacrificial layer is not formed; instead, the retained filling portion is formed. Therefore, there is no need to perform an etching process to remove the sacrificial layer. Moreover, the first sub-reflective barrier can be formed in a single process, eliminating the need for two separate processes. It simplifies the process steps and does not limit the shape of the first sub-mesh formed. It has lower process costs and is applicable to a wider range of scenarios.

[0029] In one possible implementation, a reflective barrier and multiple collimators are formed on the side of the second electrode away from the driving electrode substrate, including:

[0030] Multiple optical collimators are formed, covering the portion of the second electrode that overlaps with the epitaxial layer; a reflective barrier mesh is also formed. During the fabrication of the mother plate, the optical collimators are formed directly on the surface of the second electrode, eliminating the need for the step of preparing a sacrificial layer to form a cavity structure. Furthermore, the reflective barrier mesh can be formed directly in a single process, simplifying the manufacturing process. Attached Figure Description

[0031] Figure 1A A schematic diagram of an AR glasses embodiment provided in this application;

[0032] Figure 1B A schematic diagram of a chip layout provided for an embodiment of this application;

[0033] Figure 1C This is a schematic diagram of the emission angle of a light-emitting device provided in an embodiment of this application;

[0034] Figure 1D This is a schematic diagram of the light emission range of a light-emitting device provided in an embodiment of this application;

[0035] Figure 2A This is a top view schematic diagram illustrating a light source according to an embodiment of this application;

[0036] Figure 2B This is a side view schematic diagram illustrating a light source according to an embodiment of this application;

[0037] Figure 3 A top view schematic diagram of a chip provided in an embodiment of this application;

[0038] Figure 4 for Figure 3 A sectional view along the A1-A2 direction;

[0039] Figure 5 A top view schematic diagram of another chip provided in an embodiment of this application;

[0040] Figure 6 for Figure 5 A sectional view along the B1-B2 direction;

[0041] Figure 7 A top view schematic diagram of another chip provided in an embodiment of this application;

[0042] Figure 8 for Figure 7 A sectional view along the C1-C2 direction;

[0043] Figure 9 A top view schematic diagram of another chip provided in an embodiment of this application;

[0044] Figure 10 for Figure 9 A sectional view along the D1-D2 direction;

[0045] Figure 11 A top view schematic diagram of another chip provided in an embodiment of this application;

[0046] Figure 12 for Figure 11 A sectional view along the E1-E2 direction;

[0047] Figure 13 A flowchart illustrating a method for preparing a motherboard according to an embodiment of this application;

[0048] Figures 14A-14G A schematic diagram illustrating the fabrication process of a motherboard provided in an embodiment of this application;

[0049] Figure 15 A flowchart illustrating another method for preparing a motherboard according to an embodiment of this application;

[0050] Figures 16A-16D A schematic diagram illustrating the fabrication process of a motherboard provided in an embodiment of this application;

[0051] Figure 17 A flowchart illustrating another method for preparing a motherboard according to an embodiment of this application;

[0052] Figures 18A-18F A schematic diagram illustrating the fabrication process of a motherboard provided in an embodiment of this application;

[0053] Figure 19 A flowchart illustrating another method for preparing a motherboard according to an embodiment of this application;

[0054] Figure 20A and Figure 20B This is a schematic diagram illustrating the preparation process of a motherboard provided in an embodiment of this application. Detailed Implementation

[0055] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0056] Hereinafter, the terms "second," "first," etc., are used for descriptive convenience only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "second," "first," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0057] Furthermore, in the embodiments of this application, directional terms such as "upper," "lower," "left," and "right" may be defined relative to the orientation in which the components are schematically placed in the accompanying drawings. It should be understood that these directional terms can be relative concepts, used for relative description and clarification, and can change accordingly based on the orientation of the components in the accompanying drawings.

[0058] In the embodiments of this application, unless otherwise explicitly specified and limited, the term "connection" should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral part; it can be a direct connection or an indirect connection through an intermediate medium. Furthermore, the term "coupled connection" can be a direct electrical connection or an indirect electrical connection through an intermediate medium. The term "contact" can be direct contact or indirect contact through an intermediate medium.

[0059] In this embodiment of the application, "and / or" describes the relationship between associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following associated objects have an "or" relationship.

[0060] This application provides an electronic device, such as a virtual reality (VR) electronic device, an augmented reality (AR) electronic device, a mixed reality (MR) device, a watch, a wristband, a mobile phone, a tablet, a television, a projector, a micro-projector, a car pixel headlight, an augmented reality head-up display (AR-HUD) for the windshield, and other electronic devices with pixel display functions.

[0061] Taking an electronic device as an AR head-mounted display device as an example, an AR head-mounted display device may include AR glasses or AR helmets, etc. For ease of explanation, we will use an electronic device as an example of AR glasses.

[0062] Figure 1A This is a schematic diagram of an AR glasses provided in an embodiment of this application.

[0063] like Figure 1A As shown, the AR glasses include a frame 101, temples 102, and lenses 103. The lenses 103 are mounted on the frame 101, and the temples 102 are connected to the frame 101. The temples 102 and the frame 101 allow the AR glasses to be worn in front of the user's eyes. A display device 200 is provided in the temples 102, which can display images or other content.

[0064] Lens 103 can be a prism-shaped spectacle lens based on an aspherical surface, a freeform surface, or its corresponding Fresnel surface. Lens 103 may include a lens body and an optical waveguide. The optical waveguide is disposed on the lens body. The lens body receives image light (optical signal) emitted by the display device 200 and transmits the received image light to the optical waveguide. The optical waveguide reflects the received effective image light to a preset position to form a virtual image, thereby creating an image in front of the user's eyes. For example, the light signal emitted by the display device 200 enters the lens body from near the temple 102, propagates through total internal reflection within the lens body, is reflected by the optical waveguide, and then coupled out to enter the user's retina, forming a virtual image on the retina, thus allowing the user to view the virtual image.

[0065] Micro-displays, including micro light-emitting diodes (Micro LEDs), mini light-emitting diodes (Mini LEDs), and light-emitting diodes (LEDs) for communication and display, have shown great potential in the display market due to their advantages of high brightness and high stability, and can meet the needs of small-size and high-resolution scenarios.

[0066] The display device 200 in the temple 102 can display images or other content, for example, through a Micro LED chip, a Mini LED chip, or an LED chip.

[0067] In some embodiments, the display device 200 includes a chip and a lens. The chip includes a microdisplay chip and a lens, with the lens disposed on the light-emitting side of the chip. The lens includes optical elements such as convex lenses (groups), Fresnel lenses (groups), and superlenses (groups). The lens projects and magnifies the image on the chip and outputs it to the optical waveguide.

[0068] Figure 1B This is a schematic diagram of a chip layout provided in an embodiment of this application. Figure 1C This is a schematic diagram of the light emission angle of a light-emitting device provided in an embodiment of this application. Figure 1D This is a schematic diagram of the light emission range of a light-emitting device provided in an embodiment of this application.

[0069] In some embodiments, such as Figure 1B As shown, the chip (or microdisplay chip) includes a substrate 2 and a plurality of pixels P disposed on the substrate 2. The plurality of pixels P can be arranged in an array on the substrate 2, for example. Pixel P includes a red light-emitting device R for emitting red light, a green light-emitting device B for emitting green light, and a blue light-emitting device G for emitting blue light, so as to realize the three-primary-color display of the display device 200.

[0070] The light emission angle of a light-emitting device is an important parameter for evaluating its performance. Currently, a single microdisplay chip contains tens of thousands of light-emitting pixels (light-emitting devices). For example... Figure 1C As shown, typical individual light-emitting devices are Lambertian emitters, with a light angle distribution reaching 120°. However, the pixel pitch of small-sized microdisplay chips is very small (micrometer level), therefore... Figure 1D As shown, there is severe optical crosstalk between adjacent light-emitting devices, which reduces the display resolution and affects the final imaging effect.

[0071] Figure 2A This is a top view schematic diagram illustrating a light source according to an embodiment of this application. Figure 2BThis is a side view schematic diagram illustrating a light source according to an embodiment of this application.

[0072] In some embodiments, such as Figure 2A As shown, the light source includes a column formed by red light-emitting devices R, a column formed by green light-emitting devices G, and a column formed by blue light-emitting devices B. Each column of light-emitting devices is surrounded by a reflector cup, and a light collimator and a fixing frame are set inside the reflector cup. The light collimator is fixed on the fixing frame.

[0073] like Figure 2B As shown, the reflector cup is located around the red light-emitting device R column, reflecting light from the side of the planar light source into perpendicular light. The optical collimator is located above the red light-emitting device R, and is supported and fixed by a bracket. The optical collimator optimizes light rays that are off-center from the front of the light source into perpendicular parallel light.

[0074] By combining a reflector cup with a collimator, the emission angle of the light-emitting device can be reduced, and the side light can be converted into front light, thus improving the light extraction efficiency.

[0075] However, this setup only optimizes the light emission direction of the light-emitting devices in the light source, which is suitable for structures without imaging requirements, such as illumination. For microdisplays with multi-pixel structures, the current structure cannot resolve the optical crosstalk between different pixels, failing to meet the demands of high-resolution displays. Furthermore, lenses with mounting brackets are typically large and heavy. The user experience of AR, VR, and MR display devices is highly sensitive to the size and weight of microdisplays, making the aforementioned structure unsuitable for such devices.

[0076] This application provides a chip that is used in high-resolution AR, VR, and MR display devices.

[0077] Figure 3 This is a top view schematic diagram of a chip provided in an embodiment of this application. Figure 4 for Figure 3 A sectional view along the A1-A2 direction.

[0078] This application provides a chip, such as... Figure 3 As shown, the chip includes a substrate 2 and a plurality of pixels P disposed on the substrate 2. The plurality of pixels P may be arranged in an array on the substrate 2, for example.

[0079] Each pixel P includes a first primary color light-emitting device p1, a second primary color light-emitting device p2, and a third primary color light-emitting device p3. The first primary color, the second primary color, and the third primary color are the three primary colors of each sub-pixel. The first primary color light-emitting device p1, the second primary color light-emitting device p2, and the third primary color light-emitting device p3 are respectively a red light-emitting device R, a green light-emitting device G, and a blue light-emitting device B.

[0080] For example, the first primary color light-emitting device p1 is one of a red light-emitting device R, a green light-emitting device G, and a blue light-emitting device B; the second primary color light-emitting device p2 is another one of a red light-emitting device R, a green light-emitting device G, and a blue light-emitting device B; and the third primary color light-emitting device p3 is the remaining one of a red light-emitting device R, a green light-emitting device G, and a blue light-emitting device B. This embodiment of the application uses a red light-emitting device R as the first primary color light-emitting device p1, a blue light-emitting device B as the second primary color light-emitting device p2, and a green light-emitting device G as the third primary color light-emitting device p3 as an example for illustration, but this does not constitute a limitation on the embodiments of this application.

[0081] The number of the first primary color light-emitting device p1, the second primary color light-emitting device p2, and the third primary color light-emitting device p3 included in pixel P can be flexibly set according to the structure of pixel P, and this application embodiment does not limit this.

[0082] In some embodiments, each pixel P further includes a white light-emitting device. The layout of pixel P in related technologies is applicable to the embodiments of this application.

[0083] In some embodiments, such as Figure 3 As shown, the first primary color light-emitting device p1 includes a first light-emitting unit 31 and a first reflective barrier 32.

[0084] like Figure 4 As shown, the first light-emitting unit 31 includes a first driving electrode substrate 311 and a first stacked structure, the first stacked structure being disposed on the driving electrode substrate 311.

[0085] The first driving electrode substrate 311 includes, for example, a substrate, a plurality of driving circuits disposed on the substrate, and a plurality of first electrodes, wherein the plurality of first electrodes are correspondingly coupled to the plurality of driving circuits. The substrate material can be a semiconductor material such as silicon, silicon carbide, gallium nitride, germanium, gallium arsenide, or indium phosphide, or a non-conductive material such as glass, plastic, or sapphire wafer.

[0086] The first stacked structure includes a first epitaxial stack 317 and a first transparent electrode 316, the first transparent electrode 316 covering the first epitaxial stack 317. For example, the first epitaxial stack 317 includes a first semiconductor layer 312, a first active layer 313, and a second semiconductor layer 314 disposed on one side of the first driving electrode substrate 311, and the first transparent electrode 316 covers the first epitaxial stack 317 and a portion of the first driving electrode substrate 311.

[0087] In the first semiconductor layer 312 and the second semiconductor layer 314, one is an N-type semiconductor layer and the other is a P-type semiconductor layer. For example, the first semiconductor layer 312 is an N-type semiconductor layer and the second semiconductor layer 314 is a P-type semiconductor layer. Alternatively, for example, the first semiconductor layer 312 is a P-type semiconductor layer and the second semiconductor layer 314 is an N-type semiconductor layer.

[0088] For example, the first semiconductor layer 312 can be p-type doped or n-type doped in a group III-V semiconductor material (such as gallium nitride) to enable it to provide holes or electrons. The first active layer 313 can employ a multiple quantum well (MQW) layer to generate photons and improve luminous efficiency. The second semiconductor layer 314 can be n-type doped or p-type doped in a semiconductor material (such as gallium nitride) to enable it to provide electrons or holes. For example, the substrates of the first semiconductor layer 312 and the second semiconductor layer 314 include gallium nitride (GaN), aluminum gallium indium phosphide (AlGaInP), etc.

[0089] The material of the first transparent electrode 316 includes a transparent conductive material. For example, the material of the first transparent electrode 316 includes a metal oxide. For example, the material of the first transparent electrode 316 includes indium tin oxide (ITO), indium zinc oxide (IZO), aluminum-doped zinc oxide (ZnO:Al, AZO), fluorine-doped tin oxide (SnO2:F, FTO), etc.

[0090] In some embodiments, the first stacked structure further includes a first dielectric layer 315, which is disposed between the first transparent electrode 316 and the first epitaxial stack 317, covering the side surface of the first epitaxial stack 317 and exposing the top surface of the first epitaxial stack 317 away from the first driving electrode substrate 311.

[0091] Of course, the first stacked structure may also include other film layers, and the stacked structures in related technologies are applicable to the embodiments of this application.

[0092] The first reflective barrier 32 is disposed on the side of the first transparent electrode 314 away from the first driving electrode substrate 311, and is located on the periphery of the first epitaxial stack 317. Alternatively, it can be understood that the first reflective barrier 32 is located on the periphery of the protruding portion in the first stack structure, and the portion of the first transparent electrode 316 covering the first epitaxial stack 317 is also located within the area enclosed by the first reflective barrier 32.

[0093] The first reflective barrier 32 is disposed around the first epitaxial layer 317. In some embodiments, the first reflective barrier 32 is disposed on one or more sides of the first epitaxial layer 317.

[0094] In other embodiments, such as Figure 3 As shown, the first reflective barrier 32 is arranged around the first epitaxial layer 317. The first reflective barrier 32 is arranged around the first epitaxial layer 317 to reflect the light emitted from each side of the first epitaxial layer 317, thereby improving the light emission efficiency.

[0095] The shape of the projection of the first reflective barrier 32 onto the substrate 2 is not limited in this embodiment. It can be any closed shape such as a rectangle, circle, or hexagon. This embodiment is only an illustration.

[0096] In some embodiments, such as Figure 4 As shown, the bottom surface of the first reflective barrier 32 near the substrate 2 is located on the side of the first active layer 313 facing the first semiconductor layer 312. Alternatively, it can be understood that the bottom surface of the first reflective barrier 32 is lower than the bottom surface of the first active layer 313. This ensures that light emitted from the bottom of the first active layer 313 is not missed, allowing the first reflective barrier 32 to reflect as much light emitted from the side of the first active layer 313 as possible to the light-emitting side, thus improving light extraction efficiency.

[0097] In some embodiments, such as Figure 4 As shown, the top surface of the first reflective barrier 32 away from the substrate 2 is higher than the top surface of the portion of the first transparent electrode 316 stacked with the first epitaxial layer 317. Alternatively, it can be understood that the top surface of the first reflective barrier 32 away from the substrate 2 is higher than the top surface of the highest point of the first transparent electrode 316. This ensures that light emitted from the top of the first active layer 313 is not missed, allowing the first reflective barrier 32 to reflect as much light emitted from the side of the first active layer 313 as possible to the light-emitting side. This results in more sufficient light angle reduction for the first primary color light-emitting device p1, improving light extraction efficiency and reducing optical crosstalk between adjacent light-emitting devices.

[0098] This application does not limit the material and structure of the first reflective barrier 32, as long as it can reflect the light emitted by the first active layer 313. In some embodiments, the material of the first reflective barrier 32 is an opaque and non-light-absorbing material. For example, the material of the first reflective barrier 32 includes a metal with a high reflectivity in the visible light band, so as to improve the reflective effect of the first reflective barrier 32.

[0099] In some embodiments, the first reflective barrier 32 is made of metal and is coupled to the first transparent electrode 316. For example, the material of the first reflective barrier 32 includes aluminum (Al), silver (Ag), platinum (Pt), gold (Au), or copper (Cu).

[0100] The first transparent electrode 316 is made of a transparent conductive material, and the first reflective barrier 32 is made of a metal. The conductivity of the metal is greater than that of the transparent conductive material. During the driving process of the first primary color light-emitting device p1, the current is transmitted through the first reflective barrier 32, which can alleviate the voltage drop phenomenon in the light-emitting area.

[0101] In some embodiments, the first primary color light-emitting device p1 further includes a first light collimator 33, which is disposed on the side of the first transparent electrode 316 away from the first driving electrode substrate 311, for collimating the light emitted by the first epitaxial stack 317.

[0102] The structure of the first optical collimator 33 includes, for example, collimating lens structures such as Fresnel lenses and convex lenses. The first optical collimator 33 is used to optimize the light emitted from the surface of the first epitaxial stack 317 into parallel light rays by utilizing the principle of light diffraction, so as to further reduce crosstalk.

[0103] In some embodiments, the top surface of the first reflective barrier 32, away from the substrate 2, is higher than the plane where the first collimator 33 is located. Alternatively, the first collimator 33 is located above the plane of the first light-emitting unit 31, but the height of the first collimator 33 does not exceed that of the first reflective barrier 32. In this way, the first reflective barrier 32 can reflect and isolate the light collimated by the first collimator 33, resulting in more sufficient light angle reduction for the first primary color light-emitting device p1, further improving light extraction efficiency and reducing optical crosstalk between adjacent light-emitting devices.

[0104] In some embodiments, such as Figure 3 As shown, no reflective barrier is provided around the second primary color light-emitting device p2. The second primary color light-emitting device p2 includes a second light-emitting unit. The second light-emitting unit includes a second driving electrode substrate and a second stacked structure located on the same side as the first stacked structure. The second stacked structure includes a second epitaxial stack and a second transparent electrode, with the second transparent electrode covering the second epitaxial stack. For example, the second epitaxial stack includes a third semiconductor layer, a second active layer, and a fourth semiconductor layer disposed on one side of the second driving electrode substrate, and the second transparent electrode covers the second epitaxial stack and part of the second driving electrode substrate.

[0105] In some embodiments, such as Figure 3 As shown, no reflective barrier is installed around the third primary color light-emitting device p3. Figure 4As shown, the third primary color light-emitting device p3 includes a third light-emitting unit 51. The third light-emitting unit 51 includes a third driving electrode substrate 511 and a third stacked structure located on the same side as the first stacked structure. The third stacked structure includes a third epitaxial stack 517 and a third transparent electrode 516, with the third transparent electrode 516 covering the third epitaxial stack 517. For example, the third epitaxial stack 517 includes a fifth semiconductor layer 512, a third active layer 513, and a sixth semiconductor layer 514 disposed on one side of the third driving electrode substrate 511, and the third transparent electrode 516 covers the third epitaxial stack 517 and a portion of the third driving electrode substrate 511.

[0106] Figure 5 This is a top view schematic diagram of another chip provided in an embodiment of this application. Figure 6 for Figure 5 Sectional view along line B1-B2.

[0107] In other embodiments, such as Figure 5 As shown, the second primary color light-emitting device p2 includes a second light-emitting unit 41, a second reflective barrier 42, and a second collimator 43. The structure and relationship of the second light-emitting unit 41, the second reflective barrier 42, and the second collimator 43 can be referred to the above description of the structure and relationship of the first light-emitting unit 31, the first reflective barrier 32, and the first collimator 33.

[0108] For example, such as Figure 6 As shown, the second light-emitting unit 41 includes a second driving electrode substrate 411, a second epitaxial stack 417, and a second transparent electrode 416. For example, the second epitaxial stack 417 includes a third semiconductor layer 412, a second active layer 413, and a fourth semiconductor layer 414 disposed on one side of the second driving electrode substrate 411. The second transparent electrode 416 covers the second epitaxial stack 417 and a portion of the second driving electrode substrate 411.

[0109] In some embodiments, the second primary color light-emitting device p2 further includes a second dielectric layer 415, which is disposed between the second transparent electrode 416 and the second epitaxial stack 417, covering the side surface of the second epitaxial stack 417 and exposing the top surface of the second epitaxial stack 417 away from the second driving electrode substrate 411.

[0110] The second reflective barrier 42 is disposed on the side of the second transparent electrode 416 away from the second driving electrode substrate 411, and is located around the second epitaxial stack 417. The second optical collimator 43 is disposed on the side of the second transparent electrode 416 away from the second driving electrode substrate 411, and is used to collimate the light emitted from the second epitaxial stack 417.

[0111] In some other embodiments, such as Figure 5As shown, the third primary color light-emitting device p3 includes a third light-emitting unit 51, a third reflective barrier 52, and a third optical collimator 53. The structure and relationship of the third light-emitting unit 51, the third reflective barrier 52, and the third optical collimator 53 can be referred to the above description of the structure and relationship of the first light-emitting unit 31, the first reflective barrier 32, and the first optical collimator 33.

[0112] For example, such as Figure 6 As shown, the third light-emitting unit 51 includes a third driving electrode substrate 511, a third epitaxial stack 517, and a third transparent electrode 516. For example, the third epitaxial stack 517 includes a fifth semiconductor layer 512, a third active layer 513, and a sixth semiconductor layer 514 disposed on one side of the third driving electrode substrate 511, and the third transparent electrode 516 covers the third epitaxial stack 517 and a portion of the third driving electrode substrate 511.

[0113] In some embodiments, the third primary color light-emitting device p3 further includes a third dielectric layer 515, which is disposed between the third transparent electrode 516 and the third epitaxial stack 517, covering the side surface of the third epitaxial stack 517 and exposing the top surface of the third epitaxial stack 517 away from the third driving electrode substrate 511.

[0114] The third reflective barrier 52 is disposed on the side of the third transparent electrode 516 away from the third driving electrode substrate 511, and is located around the third epitaxial stack 517. The third optical collimator 53 is disposed on the side of the third transparent electrode 516 away from the third driving electrode substrate 511, and is used to collimate the light emitted from the third epitaxial stack 517.

[0115] When the chip is operational, the quantum wells located in the first active layer 313, the second active layer 413, and the third active layer 513 generate photons, which are then radiated outwards. Some of these photons radiate through the sidewalls of the light-emitting devices in a direction not perpendicular to the substrate 2. This non-perpendicular radiation interferes with the visual brightness of adjacent light-emitting devices. Especially when two adjacent light-emitting devices are displaying different states, this crosstalk averages their brightness, reducing the chip's resolution. Furthermore, since the optical waveguide in the electronic device only receives perpendicular light from the front, the non-perpendicular light radiated from the sidewalls cannot be received by the user.

[0116] The chip provided in this application embodiment, by setting a reflective barrier in one or more light-emitting devices, can reflect the light radiated from the side of the light-emitting device and radiate it in a direction perpendicular to the substrate 2. This allows the light radiated from the side of the light-emitting device to be utilized, avoiding waste caused by side radiation and improving the overall light extraction efficiency (photoelectric conversion efficiency) of the chip. Moreover, after setting a reflective barrier around the light-emitting device, the light radiated by the light-emitting device is reflected and blocked by the reflective barrier, reducing the light emission angle and preventing light from entering the area where adjacent light-emitting devices are located, reducing interference with the visual brightness of adjacent light-emitting devices (reducing optical crosstalk between light-emitting devices), which helps to improve the resolution of the chip. In addition, an optical collimator is set on the light emission side of the epitaxial stack used for light emission. The optical collimator optimizes the multi-angle light it receives into light perpendicular to the substrate 2, so that the multi-angle light that cannot be received by the optical waveguide in the electronic device can be received by the optical waveguide, further improving the light extraction efficiency (photoelectric conversion efficiency) of the chip.

[0117] When a first reflective barrier 32 and a first collimator 33 are provided in the first primary color light-emitting device p1, the light extraction efficiency (photoelectric conversion efficiency) of the first primary color light-emitting device p1 can be improved, and the interference of the first primary color light-emitting device p1 to adjacent light-emitting devices can be reduced. When a second reflective barrier 42 and a second collimator 43 are provided in the second primary color light-emitting device p2, the light extraction efficiency (photoelectric conversion efficiency) of the second primary color light-emitting device p2 can be improved, and the interference of the second primary color light-emitting device p2 to adjacent light-emitting devices can be reduced. When a third reflective barrier 52 and a third collimator 53 are provided in the third primary color light-emitting device p3, the light extraction efficiency (photoelectric conversion efficiency) of the third primary color light-emitting device p3 can be improved, and the interference of the third primary color light-emitting device p3 to adjacent light-emitting devices can be reduced.

[0118] In some embodiments, such as Figure 4 As shown, the first optical collimator 33 is fixedly connected to the first reflective barrier 32.

[0119] For example, the entire perimeter of the first optical collimator 33 is fixedly connected to the first reflective barrier 32. Alternatively, for example, a portion of the first optical collimator 33 is fixedly connected to the first reflective barrier 32. For example, the first optical collimator 33 extends into the first reflective barrier 32 and is then fixedly connected to it. Alternatively, for example, the first optical collimator 33 is fixedly connected to the surface of the first reflective barrier 32. This application does not limit the specific implementation of these embodiments; any implementation that achieves a fixed connection between the first optical collimator 33 and the first reflective barrier 32 is acceptable.

[0120] By fixing the first light collimator 33 with the first reflective barrier 32, there is no need to set up a fixing frame in the first primary color light-emitting device p1, which helps to reduce the weight of the chip and meet the needs of different application scenarios.

[0121] In the first implementation, such as Figure 4 As shown, there is a gap between the first optical collimator 33 and the first transparent electrode 316 to collimate the light emitted from the first active layer 313.

[0122] In some embodiments, such as Figure 6 As shown, the second optical collimator 43 is fixedly connected to the second reflective barrier 42, and there is a gap between the second optical collimator 43 and the second transparent electrode 416.

[0123] In some embodiments, such as Figure 6 As shown, the third optical collimator 53 is fixedly connected to the third reflective barrier 52, and there is a gap between the third optical collimator 53 and the third transparent electrode 516.

[0124] In some embodiments, such as Figure 4 As shown, the projection of the first optical collimator 33 onto the substrate 2 overlaps the projection of the first epitaxial layer 317 onto the substrate 2. This ensures that the first optical collimator 33 can collimate light rays emitted from the first epitaxial layer 317 at various angles, further improving the light extraction efficiency (photoelectric conversion efficiency) of the first primary color light-emitting device p1.

[0125] In some embodiments, such as Figure 6 As shown, the projection of the second optical collimator 43 onto the substrate 2 overlaps the projection of the second epitaxial layer 417 onto the substrate 2. This ensures that the second optical collimator 43 can collimate light rays emitted from the second epitaxial layer 417 at various angles, further improving the light extraction efficiency (photoelectric conversion efficiency) of the second primary color light-emitting device p2.

[0126] In some embodiments, such as Figure 6 As shown, the projection of the third optical collimator 53 onto the substrate 2 overlaps the projection of the third epitaxial layer 517 onto the substrate 2. This ensures that the third optical collimator 53 can collimate light rays emitted from the third epitaxial layer 517 at various angles, further improving the light extraction efficiency (photoelectric conversion efficiency) of the third primary color light-emitting device p3.

[0127] Figure 7 This is a top view schematic diagram of another chip provided in an embodiment of this application. Figure 8 for Figure 7 A sectional view along the C1-C2 direction.

[0128] In the second implementation, such as Figure 7 As shown, the first primary color light-emitting device p1 also includes a first filling portion 34, such as... Figure 8As shown, the first filling part 34 fills the gap between the first reflective barrier 32, the first optical collimator 33, and the first transparent electrode 316.

[0129] For example, the refractive index of the first filling portion 34 is less than the refractive index of the first epitaxial stack 317, so that the first filling portion 34 will not reflect the photons radiated from the first active layer 313, allowing the photons radiated from the first active layer 313 to be emitted smoothly. The refractive index of the first epitaxial stack 317 can be understood as the refractive index of the group III-V semiconductor material in the first epitaxial stack 317.

[0130] For example, the refractive index of the first filling part 34 is less than that of the first reflective barrier 32, so that the photons radiated from the first active layer 313 can pass smoothly through the first filling part 34 to the first reflective barrier 32 and be reflected at the first reflective barrier 32, thereby improving the light extraction efficiency of the first primary color light-emitting device p1.

[0131] The material of the first filling portion 34 is not limited in this embodiment; a material with a low refractive index can be selected. The closer the refractive index of the material is to 1, the better the effect. For example, the material of the first filling portion 34 includes dielectric materials, porous materials (the first filling portion 34 has honeycomb pores), etc.

[0132] In some embodiments, such as Figure 7 As shown, the second primary color light-emitting device p2 also includes a second filling portion 44, such as... Figure 8 As shown, the second filling part 44 fills the gap between the second reflective barrier 42, the second optical collimator 43 and the second transparent electrode 416.

[0133] For example, the refractive index of the second filling portion 44 is less than the refractive index of the second epitaxial stack 417, so that the second filling portion 44 will not reflect the photons radiated from the second active layer 413, allowing the photons radiated from the second active layer 413 to be emitted smoothly. The refractive index of the second epitaxial stack 417 can be understood as the refractive index of the group III-V semiconductor material in the second epitaxial stack 417.

[0134] For example, the refractive index of the second filling part 44 is less than that of the second reflective barrier 42, so that the photons radiated from the second active layer 413 can pass smoothly through the second filling part 44 to the second reflective barrier 42 and be reflected at the second reflective barrier 42, thereby improving the light extraction efficiency of the second primary color light-emitting device p2.

[0135] In some embodiments, such as Figure 7 As shown, the third primary color light-emitting device p3 also includes a third filling portion 54, such as... Figure 8 As shown, the third filling part 54 fills the gap between the third reflective barrier 52, the third optical collimator 53, and the third transparent electrode 516.

[0136] For example, the refractive index of the third filling portion 54 is less than that of the third epitaxial layer 517, so that the third filling portion 54 will not reflect the photons radiated from the third active layer 513, allowing the photons radiated from the third active layer 513 to be emitted smoothly. The refractive index of the third epitaxial layer 517 can be understood as the refractive index of the group III-V semiconductor material in the third epitaxial layer 517.

[0137] For example, the refractive index of the third filling part 54 is less than that of the third reflective barrier 52, so that the photons radiated from the third active layer 513 can pass smoothly through the third filling part 54 to the third reflective barrier 52 and be reflected at the third reflective barrier 52, thereby improving the light extraction efficiency of the third primary color light-emitting device p3.

[0138] By setting a filling portion inside the light-emitting device, the optical collimator can be directly formed on the filling portion, which simplifies the fabrication process and reduces the requirements for the optical collimator material.

[0139] Figure 9 This is a top view schematic diagram of another chip provided in an embodiment of this application. Figure 10 for Figure 9 A sectional view along the D1-D2 direction.

[0140] In the third implementation, such as Figure 9 As shown, the first optical collimator 33 includes a first opening 331 located above the first epitaxial stack 317. For example, the first opening 331 exposes a portion of the first transparent electrode 316 that covers the first epitaxial stack 317. Alternatively, for example, the projection of the first opening 331 onto the substrate 2 overlaps with the projection of the first active layer 313 onto the substrate 2.

[0141] Optionally, the projection of the first opening 331 on the substrate 2 is located within the projection of the first active layer 313 on the substrate 2. Alternatively, it can be understood that the first opening 331 is located above the first active layer 313, and the opening area of ​​the first opening 331 is smaller than the light-emitting area of ​​the first active layer 313.

[0142] In some embodiments, such as Figure 9 As shown, the second optical collimator 43 includes a second opening 431, which is located above the second epitaxial stack 417. For example, as... Figure 10 As shown, the second opening 431 exposes a portion of the second transparent electrode 416 that covers the second epitaxial layer 417. Alternatively, as an example, the projection of the second opening 431 onto the substrate 2 overlaps with the projection of the second active layer 413 onto the substrate 2.

[0143] Optionally, the projection of the second opening 431 onto the substrate 2 is located within the projection of the second active layer 413 onto the substrate 2. Alternatively, it can be understood that the second opening 431 is located above the second active layer 413, and the opening area of ​​the second opening 431 is smaller than the light-emitting area of ​​the second active layer 413.

[0144] In some embodiments, such as Figure 9 As shown, the third optical collimator 53 includes a third opening 531 located above the third epitaxial stack 517. For example, the third opening 531 exposes a portion of the third transparent electrode 516 that covers the third epitaxial stack 517. Alternatively, for example, the projection of the third opening 531 onto the substrate 2 overlaps with the projection of the third active layer 513 onto the substrate 2.

[0145] Optionally, the projection of the third opening 531 onto the substrate 2 is located within the projection of the third active layer 513 onto the substrate 2. Alternatively, it can be understood that the third opening 531 is located above the third active layer 513, and the opening area of ​​the third opening 531 is smaller than the light-emitting area of ​​the third active layer 513.

[0146] Photons emitted from the epitaxial stack exit in a direction perpendicular to substrate 2 on the front side of the epitaxial stack. Therefore, when the opening on the optical collimator is located above the epitaxial stack—that is, when no optical collimator is placed above the epitaxial stack—photons on the front side of the epitaxial stack still exit in a direction perpendicular to substrate 2, and this does not affect the light extraction efficiency of the light-emitting device. However, setting an opening on the optical collimator can reduce the fabrication complexity.

[0147] Figure 11 This is a top view schematic diagram of another chip provided in an embodiment of this application. Figure 12 for Figure 11 Sectional view along the E1-E2 direction.

[0148] In the fourth implementation, such as Figure 11 As shown, the first optical collimator 33 is disposed on the surface of the first light-emitting unit 31. Figure 12 As shown, the first optical collimator 33 covers the portion of the first transparent electrode 316 that is stacked with the first epitaxial layer 317.

[0149] For example, the first optical collimator 33 includes a hemispherical convex lens structure, and the lens material includes, but is not limited to, silicon carbonitride (SiCN), silicon nitride (SiN), aluminum oxide (Al2O3), titanium oxide (TiO2), niobium pentoxide (Nb2O5), tantalum pentoxide (Ta2O5), aluminum nitride (AlN), yttrium trioxide (Y2O3), hafnium dioxide (HfO2), silicon oxide (SiO2), polyester fiber (polyster resin, PR), polyacrylic acid, etc.

[0150] In some embodiments, such as Figure 11 As shown, the second optical collimator 43 is disposed on the surface of the second light-emitting unit 41. Figure 12 As shown, the second optical collimator 43 covers the portion of the second transparent electrode 416 that is stacked with the second epitaxial layer 417.

[0151] In some embodiments, such as Figure 11 As shown, the third optical collimator 53 is disposed on the surface of the third light-emitting unit 51. Figure 12 As shown, the third optical collimator 53 covers the portion of the third transparent electrode 516 that is stacked with the third epitaxial layer 517.

[0152] By forming the collimator only on the surface of the light-emitting unit, the weight of the collimator can be reduced, making the light-emitting device thinner and lighter, and the manufacturing process can be simplified.

[0153] In the chips provided in this application embodiment, the structures of the light-emitting devices can be the same or different. The above example is only used to illustrate that the multiple light-emitting devices included in the chip have the same structure, but emit different light. In fact, the multiple light-emitting devices in the chip provided in this application embodiment can be any combination of the structures of any of the above-mentioned light-emitting devices, and this application embodiment does not limit this.

[0154] When the chip described in this application embodiment is applied to the display device provided in this application embodiment, the light emitted from the chip's light-emitting side is magnified by a lens in the display device before being emitted. When the display device is applied to the electronic device provided in this application embodiment, the effective image light emitted from the display device is transmitted to an optical waveguide in the electronic device. The optical waveguide is used to reflect the received effective image light to a preset position to form a virtual image, thereby creating an image in front of the user.

[0155] Figure 13 This is a flowchart illustrating a method for preparing a motherboard according to an embodiment of this application. Figures 14A-14G This is a schematic diagram illustrating the preparation process of a motherboard provided in an embodiment of this application.

[0156] This application also provides a method for preparing a motherboard, such as... Figure 13 As shown, the method for preparing the mother plate includes:

[0157] S10, such as Figure 14A As shown, a light-emitting stack 18 is formed on one side of the driving electrode substrate 11. The driving electrode substrate 11 includes a plurality of first electrodes 111 arranged in an array, and the light-emitting stack 18 includes a second electrode 16 and a plurality of epitaxial stacks 17, with the plurality of epitaxial stacks 17 corresponding to the plurality of first electrodes 111. The second electrode 16 covers the plurality of epitaxial stacks 17 and a portion of the driving electrode substrate 11.

[0158] Figure 14A Figure (a) shows a side view of the structure obtained after performing step S10, and Figure (b) shows a top view of the structure obtained after performing step S10. In the schematic diagrams referred to in the preparation process below, Figure (a) shows a side view of the obtained structure, and Figure (b) shows a top view of the obtained structure.

[0159] In some embodiments, the light-emitting stack 18 further includes a dielectric layer 15, which is disposed between the second electrode 16 and the epitaxial stack 17, covering the side surface of the epitaxial stack 17 and exposing the top surface of the epitaxial stack 17 away from the driving electrode substrate 11.

[0160] For example, step S10 includes:

[0161] S11, providing a driving electrode substrate 11 including a plurality of first electrodes 111 and an epitaxial wafer formed of a group III-V semiconductor material.

[0162] S12, Bond the driving electrode substrate 11 to the epitaxial wafer.

[0163] S13. Multiple epitaxial layers are formed using photolithography and etching techniques. 17.

[0164] For example, the region containing multiple epitaxial stacks 17 serves as the light-emitting region, and the multiple epitaxial stacks 17 are arranged in an array. For instance, the epitaxial stack 17 includes a lower semiconductor layer 12, an active layer 13, and an upper semiconductor layer 14 stacked together, with the lower semiconductor layer 12 connected to the first electrode 111.

[0165] S14, forming a dielectric layer 15 and a second electrode 16.

[0166] The dielectric layer 15 serves as a conductive isolation layer to prevent electrical crosstalk. The second electrode 16 is located on top of the light-emitting stack 18 and is a transparent electrode. The dielectric layer 15 exposes the upper semiconductor layer 14 located on the top layer of the epitaxial stack 17, and the upper semiconductor layer 14 is connected to the second electrode 16.

[0167] S20, such as Figure 14G As shown, a reflective barrier 20 and multiple optical collimators 30 are formed on the side of the second electrode 16 away from the driving electrode substrate 11. The reflective barrier 20 surrounds multiple grids 201, and the epitaxial stack 17 is located within the grids 201. The optical collimators 30 are disposed on the side of the second electrode 16 away from the driving electrode substrate 11 and are used to collimate the light emitted by the epitaxial stack 17.

[0168] For example, step S20 includes:

[0169] S21, such as Figure 14B As shown, a plurality of first reflective barrier strips 21 are formed extending along the first direction X.

[0170] For example, the first reflective barrier strip 21 is prepared by dry etching, wet etching, or photolithography lift-off process. The first reflective barrier strip 21 is located between adjacent epitaxial layers 17, and multiple first reflective barrier strips 21 are arranged in parallel and at intervals. For example, the bottom surface of the first reflective barrier strip 21 is lower than the bottom surface of the active layer 13, and the top surface of the first reflective barrier strip 21 is higher than the top surface of the upper semiconductor layer 14.

[0171] For example, a first reflective barrier strip 21 is disposed on the surface of the second electrode 16, and the material of the first reflective barrier strip 21 is metal.

[0172] S22, such as Figure 14C As shown, a sacrificial layer 6 is formed, which fills the space between adjacent first reflective barrier strips 21 and covers the second electrode 16.

[0173] For example, a sacrificial layer 6 is formed by filling a sacrificial material through processes such as vapor deposition, sputtering, or spin coating. Sacrificial materials include, for example, polysilicon, polymethyl methacrylate (PMMA), photoresist, etc.

[0174] In some embodiments, after forming the sacrificial layer 6, the preparation method further includes planarizing the surface sacrificial material with the first reflective barrier strip 21 using a chemical mechanical polishing (CMP) process.

[0175] S23, such as Figure 14D As shown, an optical collimator layer 3 is formed, which covers the sacrificial layer 6 and at least part of the first reflective barrier strip 21.

[0176] For example, a Fresnel lens (optical collimator layer 3) is fabricated by etching or nanoimprinting. The Fresnel lens needs to cover multiple epitaxial layers 17 (the entire light-emitting area).

[0177] The material selected for the optical collimator layer 3 must avoid reacting with the etching solvent of the sacrificial material. For example, when the sacrificial material includes polysilicon, and the etching solvent is an alkaline etchant, the material of the optical collimator layer 3 should avoid being an oxide. Alternatively, for example, when the sacrificial material includes PMMA and photoresist, and the etching solvent is an organic solvent, the material of the optical collimator layer 3 should avoid being PR or polyacrylate.

[0178] S24, such as Figure 14E As shown, sacrificial layer 6 is removed.

[0179] For example, when removing sacrificial materials through an etching process, the etching solution must be selected according to the sacrificial material, such as hydrofluoric acid (HF), potassium hydroxide (KOH), acetone, or a desmearing solution.

[0180] S25, such as Figure 14F As shown, a plurality of second reflective barrier strips 22 extending along the first direction X are formed, and the second reflective barrier strips 22 are disposed on the side of the first reflective barrier strip 21 away from the collimator layer 3.

[0181] For example, the second reflective barrier strip 22 is formed by processes such as dry etching, wet etching, and photolithography lift-off.

[0182] S26, such as Figure 14G As shown, a third reflective barrier strip 23 extending along the second direction Y is formed. The second direction Y intersects with the first direction X. The third reflective barrier strip 23 is connected to the second reflective barrier strip 22, and passes through the optical collimator layer 3 to connect with the first reflective barrier strip 21, forming a reflective barrier net 20 and multiple optical collimators 30.

[0183] For example, a third reflective barrier strip 23, perpendicular to the first reflective barrier strip 21 and the second reflective barrier strip 22, is prepared using dry etching, wet etching, and photolithography lift-off processes to form a square structure surrounding the epitaxial stack 17 as a reflective barrier mesh 20. The portion located within the grid 201 of the reflective barrier mesh 20 serves as a collimator 30 for a light-emitting device. After cutting the reflective barrier mesh 20 along the cutting line, the reflective barrier 20 in the light-emitting device is formed.

[0184] This application also provides a motherboard, which can be prepared, for example, by the motherboard preparation method provided in this application. Figure 14G As shown, the motherboard includes a driving electrode substrate 11, a light-emitting stack 18, a reflective barrier mesh 20, and multiple light collimators 30.

[0185] The driving electrode substrate 11 includes a plurality of first electrodes 111 arranged in an array. A light-emitting stack 18 is disposed on one side of the driving electrode substrate 11. The light-emitting stack 18 includes a second electrode 16 and a plurality of epitaxial stacks 17. The plurality of epitaxial stacks 17 are disposed corresponding to the plurality of first electrodes 111. The second electrode 16 covers the plurality of epitaxial stacks 17 and part of the driving electrode substrate 11.

[0186] The reflective barrier 20 is disposed on the side of the second electrode 16 away from the driving electrode substrate 11. The reflective barrier 20 surrounds multiple grids 201, and the epitaxial stack 17 is located within the grids 201.

[0187] The optical collimator 30 is disposed on the side of the second electrode 16 away from the driving electrode substrate 11. The optical collimator 30 is disposed corresponding to the epitaxial stack 17. The optical collimator 30 is used to collimate the light emitted by the epitaxial stack 17 located below the optical collimator 30.

[0188] In some embodiments, the reflective barrier 20 is made of a conductive material and is coupled to the second electrode 16. For example, the reflective barrier 20 is disposed on the surface of the second electrode 16.

[0189] This application also provides a light-emitting device, for... Figure 14G The motherboard shown is obtained by pixelation processing. The light-emitting device provided in this embodiment can, for example, be applied to… Figure 6 In the chip shown.

[0190] Figure 15 A flowchart illustrating another method for preparing a motherboard according to an embodiment of this application. Figures 16A-16D This is a schematic diagram illustrating the preparation process of a motherboard provided in an embodiment of this application.

[0191] This application also provides a method for preparing a motherboard, such as... Figure 15 As shown, the method for preparing the mother plate includes:

[0192] S100: A light-emitting stack 18 is formed on one side of the driving electrode substrate 11. The driving electrode substrate 11 includes a plurality of first electrodes 111 arranged in an array, and the light-emitting stack 18 includes a second electrode 16 and a plurality of epitaxial stacks 17, with the plurality of epitaxial stacks 17 corresponding to the plurality of first electrodes 111. The second electrode 16 covers the plurality of epitaxial stacks 17 and a portion of the driving electrode substrate 11.

[0193] The preparation process of step S100 can be referred to the above description of the preparation process of step S10, and will not be repeated here.

[0194] S200, such as Figure 16D As shown, a reflective barrier 20 and multiple optical collimators 30 are formed on the side of the second electrode 16 away from the driving electrode substrate 11. The reflective barrier 20 surrounds multiple grids 201, and the epitaxial stack 17 is located within the grids 201. The optical collimators 30 are disposed on the side of the second electrode 16 away from the driving electrode substrate 11 and are used to collimate the light emitted by the epitaxial stack 17.

[0195] For example, step S200 includes:

[0196] S210, such as Figure 16A As shown, a first sub-reflective barrier net 24 is formed, and the first sub-reflective barrier net 24 encloses a plurality of first sub-grids 2001, with the outer extension layer 17 located within the first sub-grids 2001.

[0197] For example, the first sub-reflective barrier 24 is prepared by dry etching, wet etching, or photolithography lift-off process, and the first sub-reflective barrier 24 divides into first sub-grids 2001. For example, the bottom surface of the first sub-reflective barrier 24 is lower than the bottom surface of the active layer 13, and the top surface of the first sub-reflective barrier 24 is higher than the top surface of the upper semiconductor layer 14.

[0198] For example, a first sub-reflective barrier 24 is disposed on the surface of the second electrode 16, and the material of the first sub-reflective barrier 24 is a metal with high reflectivity in the visible light band.

[0199] S220, such as Figure 16B As shown, a filling portion 4 is formed, which fills the first sub-grid 2001 and covers the second electrode 17.

[0200] S230, such as Figure 16C As shown, a plurality of optical collimators 30 are formed, and the plurality of optical collimators 30 cover the filling part 4 and at least part of the first sub-reflective barrier net 24.

[0201] 2002, the second sub-reflective barrier 25 is set on the side of the first sub-reflective barrier 24 away from the light collimator 30, and the first sub-grid 2001 and the second sub-grid 2002 overlap to form a grid 201 to form the reflective barrier 20.

[0202] During the preparation of the mother plate, the sacrificial layer is no longer formed; instead, the remaining filler portion 4 is formed. Therefore, there is no need to perform an etching process to remove the sacrificial layer. Moreover, the first sub-reflective barrier mesh 24 can be formed in a single process, without the need for two separate processes. This simplifies the process steps and does not limit the shape of the formed first sub-mesh 2001. The process cost is lower, and the application scenarios are wider.

[0203] This application also provides a motherboard, which can be prepared, for example, by the motherboard preparation method provided in this application. Figure 16D As shown, the motherboard includes a driving electrode substrate 11, a light-emitting stack 18, a reflective barrier mesh 20, and multiple light collimators 30.

[0204] The mother plate also includes multiple filling parts 4, which are located within the grid 201 and fill the gap between the optical collimator 30 and the second electrode 176. The refractive index of the filling parts 4 is less than that of the reflective barrier grid 20 and the epitaxial stack 17.

[0205] This application embodiment also provides a light-emitting device, which, through the... Figure 16D The motherboard shown is obtained by pixelation processing. The light-emitting device provided in this embodiment can, for example, be applied to… Figure 8 In the chip shown.

[0206] Figure 17 A flowchart illustrating another method for preparing a motherboard according to an embodiment of this application. Figures 18A-18F This is a schematic diagram illustrating the preparation process of a motherboard provided in an embodiment of this application.

[0207] This application also provides a method for preparing a motherboard, such as... Figure 17 As shown, the method for preparing the mother plate includes:

[0208] S1000: A light-emitting stack 18 is formed on one side of the driving electrode substrate 11. The driving electrode substrate 11 includes a plurality of first electrodes 111 arranged in an array, and the light-emitting stack 18 includes a second electrode 16 and a plurality of epitaxial stacks 17, with the plurality of epitaxial stacks 17 corresponding to the plurality of first electrodes 111. The second electrode 16 covers the plurality of epitaxial stacks 17 and a portion of the driving electrode substrate 11.

[0209] The preparation process of step S1000 can be referred to the above description of the preparation process of step S10, and will not be repeated here.

[0210] S2000, such as Figure 18F As shown, a reflective barrier 20 and multiple optical collimators 30 are formed on the side of the second electrode 16 away from the driving electrode substrate 11. The reflective barrier 20 surrounds multiple grids 201, and the epitaxial stack 17 is located within the grids 201. The optical collimators 30 are disposed on the side of the second electrode 16 away from the driving electrode substrate 11 and are used to collimate the light emitted by the epitaxial stack 17.

[0211] For example, step S200 includes:

[0212] S2100, such as Figure 18A As shown, a first sub-reflective barrier net 24 is formed, and the first sub-reflective barrier net 24 encloses a plurality of first sub-grids 2001, with the outer extension layer 17 located within the first sub-grids 2001.

[0213] S2200, such as Figure 18B As shown, a sacrificial layer 6 is formed, which fills the first subgrid 2001 and covers the second electrode 16.

[0214] S2300, such as Figure 18C As shown, an optical collimator layer 3 is formed, which covers the sacrificial layer 6 and at least part of the first sub-reflective barrier mesh 24.

[0215] S2400, such as Figure 18D As shown, multiple openings are formed on the collimator layer 3 to form multiple optical collimators 30, and the openings are located above the epitaxial stack 17.

[0216] S2500, such as Figure 18E As shown, sacrificial layer 6 is removed.

[0217] S2600, such as Figure 18F As shown, a second sub-reflective barrier net 25 is formed, and the second sub-reflective barrier net 25 encloses a plurality of second sub-grids 2002. The second sub-reflective barrier net 25 is located on the side of the first sub-reflective barrier net 24 away from the light collimator 30. The first sub-grid 2001 and the second sub-grid 2002 overlap to form a grid 201, thereby forming a reflective barrier net 20.

[0218] The execution order of steps S2400 and S2600 is not limited in this embodiment. Step S2600 can be executed first, followed by step S2400.

[0219] During the fabrication of the master substrate, an opening is formed in the optical collimator 30, allowing the etchant to directly enter and remove the sacrificial layer 6. Therefore, the first sub-reflective barrier mesh 24 can be formed in a single process, eliminating the need for two separate operations. This simplifies the process and allows for flexibility in the shape of the formed first sub-mesh 2001. It also results in lower processing costs and wider applicability.

[0220] This application also provides a motherboard, which can be prepared, for example, by the motherboard preparation method provided in this application. Figure 18F As shown, the motherboard includes a driving electrode substrate 11, a light-emitting stack 18, a reflective barrier mesh 20, and multiple optical collimators 30. Each optical collimator 30 includes an opening located above the epitaxial stack 17. The shape of the opening is not limited in this embodiment. Figure 18D This is just an illustration.

[0221] This application also provides a light-emitting device, which is obtained by pixelating a motherboard. For example, for Figure 18F The motherboard shown is obtained by pixelation processing. The light-emitting device provided in the embodiments of this application can be applied to, for example... Figure 10 In the chip shown.

[0222] Figure 19 A flowchart illustrating another method for preparing a motherboard according to an embodiment of this application. Figure 20A and Figure 20B This is a schematic diagram illustrating the preparation process of a motherboard provided in an embodiment of this application.

[0223] This application also provides a method for preparing a motherboard, such as... Figure 19 As shown, the method for preparing the mother plate includes:

[0224] S10000: A light-emitting stack 18 is formed on one side of the driving electrode substrate 11. The driving electrode substrate 11 includes a plurality of first electrodes 111 arranged in an array, and the light-emitting stack 18 includes a second electrode 16 and a plurality of epitaxial stacks 17, with the plurality of epitaxial stacks 17 corresponding to the plurality of first electrodes 111. The second electrode 16 covers the plurality of epitaxial stacks 17 and a portion of the driving electrode substrate 11.

[0225] The preparation process of step S100 can be referred to the above description of the preparation process of step S10, and will not be repeated here.

[0226] S20000, such as Figure 20B As shown, a reflective barrier 20 and multiple optical collimators 30 are formed on the side of the second electrode 16 away from the driving electrode substrate 11. The reflective barrier 20 surrounds multiple grids 201, and the epitaxial stack 17 is located within the grids 201. The optical collimators 30 are disposed on the side of the second electrode 16 away from the driving electrode substrate 11 and are used to collimate the light emitted by the epitaxial stack 17.

[0227] For example, step S20000 includes:

[0228] S21000, such as Figure 20A As shown, multiple optical collimators 30 are formed, and the optical collimators 30 cover the portion of the second electrode 16 that is stacked with the epitaxial layer 17.

[0229] For example, a hemispherical convex lens structure is formed on the surface of the second electrode 16 through steps such as coating, photolithography, reflow, and etching, which serves as an optical collimator 30.

[0230] S22000, such as Figure 20B As shown, a reflective barrier net 20 is formed.

[0231] For example, the reflective barrier mesh 20 is prepared by dry etching, wet etching, or photolithography lift-off process, and the reflective barrier mesh 20 is divided into grids 201. For example, the bottom surface of the reflective barrier mesh 20 is lower than the bottom surface of the active layer 13, and the top surface of the reflective barrier mesh 20 is higher than the top surface of the optical collimator 30.

[0232] For example, a reflective barrier 20 is disposed on the surface of the second electrode 16, and the material of the reflective barrier 20 is a metal with high reflectivity in the visible light band.

[0233] The order of steps S21000 and S22000 is not limited in this embodiment. Step S22000 can be executed first, followed by step S21000.

[0234] During the fabrication of the mother plate, the optical collimator 30 is directly formed on the surface of the second electrode 16, eliminating the need for the step of preparing a sacrificial layer to form a cavity structure. Furthermore, the reflective barrier mesh 20 can be formed directly in a single process, simplifying the manufacturing process.

[0235] This application also provides a motherboard, which can be prepared, for example, by the motherboard preparation method provided in this application. Figure 20B As shown, the motherboard includes a driving electrode substrate 11, a light-emitting stack 18, a reflective barrier mesh 20, and multiple light collimators 30. The light collimators 30 are disposed on the surface of the second electrode 16, covering the portion of the second electrode 16 that is stacked with the epitaxial stack 17.

[0236] This application also provides a light-emitting device, for... Figure 20B The motherboard shown is obtained by pixelation processing. The light-emitting device provided in this embodiment can, for example, be applied to… Figure 12 In the chip shown.

[0237] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A chip, characterized in that, include: substrate; Multiple pixels are disposed on the substrate; each pixel includes a first primary color light-emitting device, a second primary color light-emitting device, and a third primary color light-emitting device; The first primary color light-emitting device includes a first driving electrode substrate, a first epitaxial stack, a first transparent electrode, a first reflective barrier, and a first collimator; the first epitaxial stack is disposed on one side of the first driving electrode substrate, and the first transparent electrode covers the first epitaxial stack and part of the first driving electrode substrate; The first reflective barrier is disposed on the side of the first transparent electrode away from the substrate of the first driving electrode, and is located on the periphery of the first epitaxial stack; The first optical collimator is disposed on the side of the first transparent electrode away from the substrate of the first driving electrode, and is used to collimate the light emitted by the first epitaxial stack.

2. The chip according to claim 1, characterized in that, The first optical collimator is fixedly connected to the first reflective barrier, and there is a gap between the first optical collimator and the first transparent electrode.

3. The chip according to claim 1 or 2, characterized in that, The projection of the first optical collimator on the substrate overlaps the projection of the first epitaxial layer on the substrate.

4. The chip according to claim 3, characterized in that, The first primary color light-emitting device further includes a filling portion, which fills the gap between the first reflective barrier and the first collimator and the first transparent electrode; the refractive index of the filling portion is less than the refractive index of the first reflective barrier and the first epitaxial layer.

5. The chip according to claim 1 or 2, characterized in that, The first optical collimator includes an opening located above the first epitaxial stack.

6. The chip according to claim 1, characterized in that, The first optical collimator is disposed on the surface of the first transparent electrode, covering the portion of the first transparent electrode that overlaps with the first epitaxial layer.

7. The chip according to any one of claims 1-6, characterized in that, The first reflective barrier is made of metal; the first reflective barrier is coupled to the first transparent electrode.

8. The chip according to any one of claims 1-7, characterized in that, The top surface of the first reflective barrier, away from the substrate, is higher than the plane where the first optical collimator is located.

9. The chip according to any one of claims 1-8, characterized in that, The first epitaxial layer includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked on the first driving electrode substrate; the bottom surface of the first reflective barrier near the substrate is located on the side of the active layer facing the first semiconductor layer.

10. The chip according to any one of claims 1-9, characterized in that, The second primary color light-emitting device includes a second driving electrode substrate, a second epitaxial stack, a second transparent electrode, a second reflective barrier, and a second collimator; the second epitaxial stack is disposed on one side of the second driving electrode substrate, and the second transparent electrode covers the second epitaxial stack and part of the second driving electrode substrate; The second reflective barrier is disposed on the side of the second transparent electrode away from the substrate of the second driving electrode, and is located on the periphery of the second epitaxial stack; The second optical collimator is disposed on the side of the second transparent electrode away from the substrate of the second driving electrode, and is used to collimate the light emitted by the second epitaxial stack.

11. The chip according to any one of claims 1-10, characterized in that, The third primary color light-emitting device includes a third driving electrode substrate, a third epitaxial stack, a third transparent electrode, a third reflective barrier, and a third collimator; the third epitaxial stack is disposed on one side of the third driving electrode substrate, and the third transparent electrode covers the third epitaxial stack and part of the third driving electrode substrate; The third reflective barrier is disposed on the side of the third transparent electrode away from the substrate of the third driving electrode, and is located on the periphery of the third epitaxial stack. The third optical collimator is disposed on the side of the third transparent electrode away from the substrate of the third driving electrode, and is used to collimate the light emitted by the third epitaxial stack.

12. A display device, characterized in that, It includes a chip and a lens, the lens being disposed on the light-emitting side of the chip; the chip includes the chip according to any one of claims 1-11.

13. An electronic device, characterized in that, The device includes an optical waveguide and a display device, wherein the optical waveguide is used to receive image light emitted by the display device; the display device includes the display device according to claim 12.

14. A mother plate, characterized in that, include: A driving electrode substrate includes a plurality of first electrodes arranged in an array; A light-emitting stack is disposed on one side of the driving electrode substrate; the light-emitting stack includes a second electrode and a plurality of epitaxial stacks, the plurality of epitaxial stacks being disposed corresponding to the plurality of first electrodes; The second electrode covers the plurality of epitaxial layers and a portion of the driving electrode substrate; A reflective barrier net is disposed on the side of the second electrode away from the driving electrode substrate, forming multiple grids; the epitaxial stack is located within the grids; Multiple optical collimators are disposed on the side of the second electrode away from the driving electrode substrate, for collimating the light emitted by the epitaxial stack.

15. The mother plate according to claim 14, characterized in that, The reflective barrier is made of a conductive material; the reflective barrier is coupled to the second electrode.

16. The mother plate according to claim 14 or 15, characterized in that, The mother plate also includes multiple filling portions located within the grid, which fill the gap between the optical collimator and the second electrode; the refractive index of the filling portions is less than that of the reflective barrier mesh and the epitaxial stack.

17. The mother plate according to claim 14 or 15, characterized in that, The optical collimator includes an opening located above the epitaxial stack; or, The optical collimator is disposed on the surface of the second electrode, covering the portion of the second electrode that overlaps with the epitaxial layer.

18. A light-emitting device, characterized in that, The light-emitting device is obtained by pixelating the mother plate according to any one of claims 14-17.

19. A method for preparing a mother plate, characterized in that, The preparation method includes: A light-emitting stack is formed on one side of a driving electrode substrate; the driving electrode substrate includes a plurality of first electrodes arranged in an array, the light-emitting stack includes a second electrode and a plurality of epitaxial stacks, the plurality of epitaxial stacks being disposed corresponding to the plurality of first electrodes; the second electrode covers the plurality of epitaxial stacks and a portion of the driving electrode substrate; A reflective barrier and multiple optical collimators are formed on the side of the second electrode away from the driving electrode substrate; the reflective barrier surrounds multiple grids, and the epitaxial stack is located within the grids; the optical collimators are disposed on the side of the second electrode away from the driving electrode substrate, and are used to collimate the light emitted by the epitaxial stack.

20. The preparation method according to claim 19, characterized in that, The reflective barrier and the plurality of collimators are formed on the side of the second electrode away from the driving electrode substrate, including: Multiple first reflective barrier strips extending along the first direction are formed; A sacrificial layer is formed, which fills the space between adjacent first reflective barrier strips and covers the second electrode; A collimator layer is formed, the collimator layer covering the sacrificial layer and at least a portion of the first reflective barrier strip; Remove the sacrificial layer; A plurality of second reflective barrier strips are formed extending along the first direction, and the second reflective barrier strips are disposed on the side of the first reflective barrier strip away from the optical collimator layer; A third reflective barrier strip is formed extending along a second direction; the second direction intersects with the first direction, the third reflective barrier strip is connected to the second reflective barrier strip, and passes through the optical collimator layer to connect with the first reflective barrier strip, forming the reflective barrier net and the plurality of optical collimators.

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