Display device and electronic apparatus

Abstract

The invention relates to a display device and electronic equipment. The display device includes a substrate. The first electrode is on the substrate. The second electrode is disposed to face the first electrode. The first emission layer is disposed between the first electrode and the second electrode. The second emissive layer is arranged to have a first region overlapping at least the first emissive layer. The charge generation layer is disposed between the first emission layer and the second emission layer. The charge generation layer includes a charge connection region that does not overlap with the first emission layer in a thickness direction of the substrate and overlaps with the second emission layer in the thickness direction of the substrate.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0144264, filed on October 21, 2024, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments of this disclosure relate to display devices. Background Technology

[0004] With the advancement of the information society, display devices have been applied to an increasing number of electronic devices. In addition, to increase portability and user convenience, display devices have become thinner and lighter.

[0005] Furthermore, with the increasing number of fields using display devices and the development of technologies utilizing display devices, the demand for high image quality and high resolution characteristics is increasing.

[0006] Furthermore, because display devices are developed to have high resolution, there are limitations in improving image quality and precisely controlling optical properties. Summary of the Invention

[0007] One or more embodiments of this disclosure provide a display device capable of improving image quality and precisely controlling optical properties.

[0008] According to embodiments of this disclosure, a display device includes a substrate. A first electrode is on the substrate. A second electrode is arranged facing the first electrode. A first emitting layer is disposed between the first and second electrodes. The second emitting layer is arranged to have a first region overlapping at least the first emitting layer. A charge generating layer is disposed between the first and second emitting layers. The charge generating layer includes a charge connection region that does not overlap with the first emitting layer in the thickness direction of the substrate and overlaps with the second emitting layer in the thickness direction of the substrate.

[0009] In one embodiment, the second emission layer may extend beyond at least the edge of the first emission layer and include a second region that does not overlap with the first emission layer in the thickness direction of the substrate.

[0010] In an implementation, the area of ​​the second emission layer in the plan view may be larger than the area of ​​the first emission layer in the plan view.

[0011] In one embodiment, one or more insulating layers with contact holes may be disposed on the substrate, and the charge connection region of the charge generation layer may correspond to the contact holes.

[0012] In one embodiment, the contact hole may be arranged to be spaced apart from the first electrode in a plan view.

[0013] In one implementation, the charge connection region of the charge generation layer can be electrically connected to one or more conductive layers.

[0014] In one implementation, the charge connection region of the charge generation layer can be electrically connected to one or more transistors.

[0015] According to an embodiment of this disclosure, a display device includes a substrate. A first electrode is on the substrate. A second electrode is arranged facing the first electrode. A first emitting layer is disposed between the first electrode and the second electrode. The second emitting layer is arranged to have a first region overlapping at least the first emitting layer. An intermediate electrode is disposed between the first emitting layer and the second emitting layer. The intermediate electrode includes a connection region that does not overlap with the first emitting layer in the thickness direction of the substrate but overlaps with the second emitting layer in the thickness direction of the substrate.

[0016] In one embodiment, the second emission layer may extend beyond at least the edge of the first emission layer and include a second region of the second emission layer that does not overlap with the first emission layer in the thickness direction of the substrate.

[0017] In an implementation, the area of ​​the second emission layer in the plan view may be larger than the area of ​​the first emission layer in the plan view.

[0018] In one embodiment, one or more insulating layers with contact holes may be disposed on the substrate, and the connection area of ​​the intermediate electrode may correspond to the contact holes.

[0019] In one embodiment, the contact hole may be arranged to be spaced apart from the first electrode in a plan view.

[0020] In one embodiment, the connection area of ​​the intermediate electrode can be electrically connected to one or more conductive layers in the area corresponding to the contact hole.

[0021] In an implementation, the connection region of the intermediate electrode can be arranged to be electrically connected to one or more transistors.

[0022] In one implementation, the intermediate electrode can control one of the first and second emitting layers to selectively emit light.

[0023] According to an embodiment of this disclosure, a display device includes a substrate. A first electrode is on the substrate. A second electrode is arranged facing the first electrode. A first emitting layer is disposed between the first electrode and the second electrode. The second emitting layer is arranged to have a first region overlapping at least the first emitting layer. An insulating layer has contact holes that do not overlap with the first emitting layer in the thickness direction of the substrate but overlap with the second emitting layer in the thickness direction of the substrate.

[0024] In one embodiment, the display device may include a charge generation layer disposed between a first emitting layer and a second emitting layer, and a region of the charge generation layer may be arranged to correspond to a contact hole.

[0025] In one implementation, the charge-generating layer can be electrically connected to the conductive layer or transistor via a contact hole.

[0026] In one embodiment, the display device may include an intermediate electrode disposed between a first emitting layer and a second emitting layer, and a region of the intermediate electrode may be arranged to correspond to a contact hole.

[0027] In one embodiment, the intermediate electrode can be electrically connected to the conductive layer or transistor via a contact hole.

[0028] According to embodiments of the present disclosure, an electronic device includes a display device. The display device includes a substrate. A first electrode is on the substrate. A second electrode is arranged facing the first electrode. A first emitting layer is disposed between the first and second electrodes. The second emitting layer is arranged to have a region overlapping at least the first emitting layer. A charge generating layer is disposed between the first and second emitting layers. The charge generating layer includes a charge connection region that does not overlap with the first emitting layer in the thickness direction of the substrate but overlaps with the second emitting layer in the thickness direction of the substrate.

[0029] According to embodiments of the present disclosure, an electronic device includes a display device. The display device includes a substrate. A first electrode is on the substrate. A second electrode is arranged facing the first electrode. A first emitter layer is disposed between the first electrode and the second electrode. The second emitter layer is arranged to have a region overlapping at least the first emitter layer. An intermediate electrode is disposed between the first emitter layer and the second emitter layer. The intermediate electrode includes a connection region that does not overlap with the first emitter layer in the thickness direction of the substrate but overlaps with the second emitter layer in the thickness direction of the substrate.

[0030] According to embodiments of the present disclosure, an electronic device includes a display device. The display device includes a substrate. A first electrode is on the substrate. A second electrode is arranged facing the first electrode. A first emitter layer is disposed between the first electrode and the second electrode. The second emitter layer is arranged to have a region overlapping at least the first emitter layer. An insulating layer has contact holes that do not overlap with the first emitter layer in the thickness direction of the substrate but overlap with the second emitter layer in the thickness direction of the substrate.

[0031] Other aspects, features, and advantages, in addition to those described above, will become apparent from the following detailed description of the accompanying drawings, claims, and disclosure. Attached Figure Description

[0032] These and / or other aspects will become apparent and more readily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which: Figure 1 This is a cross-sectional view of a display device according to an embodiment of the present disclosure; Figure 2 It is based on the embodiments of this disclosure. Figure 1 A magnified view of an example of region L in the image; Figure 3 It is based on the embodiments of this disclosure. Figure 1 A magnified view of an example of region M in the image; Figure 4 This is a cross-sectional view of a display device according to an embodiment of the present disclosure; Figure 5 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure; Figure 6 This is an illustration from one direction according to an embodiment of the present disclosure. Figure 5 A schematic plan view of the display device; Figure 7 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure; Figure 8 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure; Figure 9 This illustrates an embodiment according to the present disclosure. Figure 8 A schematic diagram illustrating an example of a charge generation layer and transistors in a display device; Figure 10 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure; Figure 11 This illustrates an embodiment according to the present disclosure. Figure 10 A schematic diagram illustrating an example of a charge generation layer and transistors in a display device; Figure 12 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure; Figures 13 to 17 This is a diagram schematically illustrating a method of manufacturing a display device according to an embodiment of the present disclosure; Figure 18 This is a schematic cross-sectional view of a display device according to embodiments of the present disclosure; and Figure 19 This illustrates an embodiment according to the present disclosure. Figure 18 A schematic diagram of an example of a charge generation layer and transistors in a display device. Detailed Implementation

[0033] Because this disclosure allows for various variations and multiple implementations, specific non-limiting embodiments will be shown in the accompanying drawings and described in detail in the written description. The drawings, used to illustrate one or more embodiments, are referenced to provide a full understanding of their advantages and the objectives achieved by the embodiments. However, embodiments of this disclosure may take different forms and should not be construed as limited to the description set forth herein.

[0034] While terms such as "first" and "second" can be used to describe various components, such components are not limited to these terms. These terms are only used to distinguish one component from another.

[0035] Unless they have a distinctly different meaning in the context, the singular form of a statement covers the plural form.

[0036] In this specification, it should be understood that the terms “including,” “having,” and “comprising” are intended to indicate the presence of features, quantities, steps, actions, components, parts, or combinations thereof disclosed in this specification, and are not intended to exclude the possibility that one or more other features, quantities, steps, actions, components, parts, or combinations thereof may be present or added.

[0037] It will be understood that when a layer, region, or component is referred to as being "formed" on another layer, region, or component, it can be formed directly or indirectly on that other layer, region, or component. That is, for example, an intermediary layer, region, or component may exist. When a layer, region, or component is referred to as being "directly formed" on another layer, region, or component, an intermediary element may not exist.

[0038] For ease of explanation, the dimensions of the components in the accompanying drawings may be exaggerated. In some embodiments, since the dimensions and thicknesses of the components in the drawings may be arbitrarily shown for ease of explanation, the following embodiments are not necessarily limited thereto.

[0039] The X, Y, and Z axes are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the X, Y, and Z axes can be perpendicular to each other, or they can represent different directions that intersect each other but are not perpendicular.

[0040] When a particular implementation is carried out differently, a specific process sequence may be performed in a different order than that described. For example, two consecutively described processes may be performed substantially simultaneously, or in the reverse order of their description.

[0041] The embodiments will now be described in more detail with reference to the accompanying drawings. Regardless of the figure numbers, the same or corresponding components are given the same reference numerals, and for the sake of brevity, unnecessary explanations may be omitted.

[0042] This disclosure relates to a display device including a charge generating layer disposed between a first emitting layer and a second emitting layer. The charge generating layer includes charge connection regions that do not overlap with the first emitting layer in the thickness direction of the substrate but overlap with the second emitting layer in the thickness direction of the substrate. The charge generating layer releases charge accumulated in the charge generating layer through the charge connection regions. Therefore, the color of the emitted light when the display device is driven can be precisely controlled, and the display device can have improved image quality. In some embodiments, the charge accumulated in the charge generating layer can be selectively discharged by at least one transistor. In some embodiments, the charge generating layer may correspond to a contact hole defined in an insulating layer.

[0043] Figure 1 This is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0044] refer to Figures 1 to 3 The display device 100 may include a substrate 101, a first electrode 110, a second electrode 130, a first emission layer 121, a second emission layer 122, and a charge generation layer (CGL) 140.

[0045] The display device 100 can be of various types, such as an organic light-emitting diode (OLED) display device. The display device 100 according to embodiments of this disclosure can be used as a portable electronic device, such as a mobile phone, smartphone, tablet PC, mobile communication terminal, e-notebook, e-reader, portable multimedia player (PMP), navigation terminal, ultra-mobile PC (UMPC), etc., and can also be used in various products, such as televisions, laptops, monitors, billboards, Internet of Things (IoT) devices, etc. In another example, the display device 100 can be applied to wearable devices, such as smartwatches, watch phones, glasses-type displays, and head-mounted displays (HMDs). In some embodiments, the display device 100 according to embodiments can be applied to a vehicle's dashboard, a central information display (CID) in a vehicle's central instrument panel or dashboard, a rearview mirror display replacing a vehicle's side mirrors, or a display screen on the rear side of the front seat serving as entertainment for the rear seats in a vehicle. However, embodiments of this disclosure are not necessarily limited to these, and the electronic devices to which the display device 100 can be applied can be a variety of different small, medium, or large electronic devices.

[0046] The substrate 101 may include various materials. In embodiments, the substrate 101 may include glass, metal, organic materials, or other materials.

[0047] In an embodiment, substrate 101 may include a flexible material. For example, to increase portability and user convenience, substrate 101 may be formed to be easily bent, flexible, foldable, rollable, or otherwise deformable.

[0048] In embodiments, substrate 101 may include ultrathin glass, metal, or plastic. For example, in embodiments using plastic, substrate 101 may include polyimide (PI), and in some examples, substrate 101 may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0049] In some embodiments, substrate 101 may include one or more layers, such as a multilayer structure. For example, substrate 101 may include an organic layer (e.g., a resin-based material) and an inorganic layer, and more specifically, substrate 101 may include a structure in which an inorganic layer is disposed between two organic layers.

[0050] In one embodiment, one or more insulating layers may be disposed on the substrate 101.

[0051] In one embodiment, one or more thin-film transistors may be arranged on the substrate 101.

[0052] The first electrode 110 can have various shapes, for example, it can be patterned into an island shape. However, the embodiments of this disclosure are not necessarily limited to this.

[0053] The first electrode 110 may include various conductive materials. For example, in one embodiment, the first electrode 110 may include at least one selected from the group consisting of transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and zinc aluminum oxide (AZO). In some embodiments, the first electrode 110 may include a metal with high reflectivity, such as silver (Ag).

[0054] In an embodiment, the first electrode 110 may have a multilayer structure, for example, a multilayer structure comprising the materials described above, such as at least one layer comprising a transparent conductive oxide (such as ITO, IZO, ZnO, In2O3, IGO and AZO) and at least one layer comprising a metal (such as Ag).

[0055] In an embodiment, the first electrode 110 may include three or more layers, such as two transparent conductive oxide layers and a metal layer between the two transparent conductive oxide layers, for example, a three-layer structure of ITO / Ag / ITO.

[0056] The second electrode 130 may be arranged facing the first electrode 110. The second electrode 130 may include various conductive materials. For example, in an embodiment, the second electrode 130 may include lithium (Li), calcium (Ca), lithium fluoride (LiF), aluminum (Al), magnesium (Mg), or silver (Ag), wherein at least one is formed as a single layer or multiple layers, and the second electrode 130 may include an alloy material comprising at least two of the above materials.

[0057] The first emission layer 121 may be disposed (e.g., in the Z direction) between the first electrode 110 and the second electrode 130. In embodiments, the first emission layer 121 may include, for example, an organic emission layer, and may include low molecular weight organic materials or high molecular weight organic materials.

[0058] In one embodiment, the pixel defining layer 190 may be disposed on the first electrode 110.

[0059] The pixel defining layer 190 is arranged not to cover a specific area of ​​the first electrode 110, and the first emitting layer 121 may be arranged to overlap with areas of the first electrode 110 not covered by the pixel defining layer 190 (e.g., exposed by the pixel defining layer 190) (e.g., openings 190a of the pixel defining layer 190). For example, in one embodiment, opening 190a may expose the central portion of the first electrode 110 and the pixel defining layer 190 may cover the lateral ends of the first electrode 110.

[0060] The pixel defining layer 190 may include various insulating materials. For example, in one embodiment, the pixel defining layer 190 may include an organic material, such as one or more organic insulating materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene and phenol resin, and may be formed by a method such as spin coating.

[0061] The second emission layer 122 may be arranged (e.g., in the Z direction) between the first electrode 110 and the second electrode 130.

[0062] In some implementations, the second emission layer 122 may be arranged (e.g., in the Z direction) to at least partially overlap with the first emission layer 121.

[0063] For example, in one embodiment, the display device 100 has a structure in which two or more emission layers (e.g., in the Z direction) overlap each other, such as a tandem structure in which the first emission layer 121 and the second emission layer 122 (e.g., in the Z direction) overlap each other. The display device 100 of the embodiment can increase brightness and lifespan by applying a structure in which the first emission layer 121 and the second emission layer 122 (e.g., in the Z direction) overlap each other.

[0064] In some embodiments, the second emission layer 122 may be arranged such that a region of the second emission layer 122 may (e.g., in the Z direction) not overlap with the first emission layer 121. For example, the second emission layer 122 may extend at least through the edge of the first emission layer 121 to include a region of the second emission layer 122 that does not overlap with the first emission layer 121.

[0065] In an embodiment, the second emission layer 122 may include, for example, an organic emission layer, and may include low molecular weight organic materials or high molecular weight organic materials.

[0066] Various types of first emission layer 121 and second emission layer 122 can be selected.

[0067] For example, in one embodiment, the color of the light emitted from the second emitting layer 122 may be the same as the color of the light emitted from the first emitting layer 121.

[0068] In some embodiments, the color of the light emitted from the second emitting layer 122 may be different from the color of the light emitted from the first emitting layer 121.

[0069] CGL140 may be disposed (e.g., in the Z direction) between the first emitter layer 121 and the second emitter layer 122. In some embodiments, CGL140 may include a charge-connection region 140A that does not overlap with the first emitter layer 121 and (e.g., overlaps with the second emitter layer 122 in the thickness direction (such as the Z direction) of the substrate 101. A detailed description will be provided later.

[0070] CGL140 is disposed between the first emitter layer 121 and the second emitter layer 122 to control the generation or movement of charges in the first emitter layer 121 and the second emitter layer 122. For example, CGL140 can control the balance of charges.

[0071] In an implementation, CGL140 includes an N-type or P-type charge generation layer, such as an N-type charge generation layer and a P-type charge generation layer.

[0072] In this implementation, two devices can be implemented based on the CGL140.

[0073] In a more detailed example, the first electrode 110, the first emitter layer 121, and CGL140 can be implemented as a single device, and the first electrode 110 and CGL140 can be used as electrodes opposite each other, for example, the first electrode 110 can be used as an anode and the CGL140 can be used as a cathode.

[0074] In some embodiments, the second electrode 130, the second emitter layer 122, and CGL 140 can be implemented as a single device, and the second electrode 130 and CGL 140 can be used as electrodes opposite to each other. For example, the second electrode 130 can be used as a cathode, and CGL 140 can be used as an anode.

[0075] The charge-connected region 140A of CGL140 may include at least one region that does not overlap with the first emitter layer 121 but overlaps with the second emitter layer 122.

[0076] At least some of the charge accumulated in CGL140 can be discharged at at least one time point through the charge connection region 140A of CGL140.

[0077] In some embodiments, the charge connection region 140A of CGL140 may be connected to the conductive layer via at least one region and may be connected to the connection electrode region. In some embodiments, the charge connection region 140A of CGL140 may be connected to a transistor (such as a thin-film transistor), and the discharge of charge from CGL140 at a desired time may be controlled by control from the thin-film transistor.

[0078] As described above, the display device 100 according to the embodiment includes a structure in which a first emitting layer 121 and a second emitting layer 122 (e.g., in the Z direction) overlap each other. When controlling light emission from the first emitting layer 121 and the second emitting layer 122, unwanted residual light emission may occur. For example, when a color (e.g., black) is achieved by the display device 100, the generation and accumulation of charge in the CGL 140 increases, and when the color achieved by the display device 100 changes to white, unwanted brightness generation (e.g., flash) may occur due to the remaining charge in the CGL 140. In some embodiments, the remaining charge in the CGL 140 may restrict the precise control of charge flow to the first emitting layer 121 and the second emitting layer 122.

[0079] In this implementation, the charge accumulated in CGL140 can be discharged through the charge connection region 140A of CGL140, and therefore, the accuracy of the color of the emitted light when the display device 100 is driven can be increased and the image quality can be improved.

[0080] Figure 2It is shown Figure 1 Example diagram of a magnified view of region L in the image. Figure 3 It is shown Figure 1 Example diagram of a magnified view of region M in the image.

[0081] refer to Figure 2 One or more layers, together with the second emitter layer 122, may be further (e.g., in the Z direction) included between the CGL 140 and the second electrode 130, such as an electron transport layer 128, a hole transport layer 126, and a hole injection layer 125. However, this is just an example; one or more of the electron transport layer 128, hole transport layer 126, and hole injection layer 125 may be arranged. In an embodiment, the electron injection layer may be (e.g., in the Z direction) arranged between the second electrode 130 and the electron transport layer 128.

[0082] In some implementations, reference Figure 3 One or more layers, together with the first emitter layer 121, may be further included (e.g., in the Z direction) between the CGL 140 and the first electrode 110, such as an electron transport layer 128, a hole transport layer 126, and a hole injection layer 125. However, this is just an example, and one or more of the electron transport layer 128, hole transport layer 126, and hole injection layer 125 may be arranged. In an embodiment, the electron injection layer may be arranged (e.g., in the Z direction) between the CGL 140 and the electron transport layer 128.

[0083] In some embodiments, the display device 100 may further include an encapsulation portion arranged to partially or completely cover the second electrode 130. The encapsulation portion may include a glass material or a plastic material.

[0084] In some implementations, the encapsulation portion may include one or more encapsulation layers. In implementations, the encapsulation portion may include one or more inorganic layers or one or more organic layers, and in examples, the encapsulation portion may include a structure in which inorganic and organic layers are alternately stacked once or multiple times, such as a structure in which inorganic and organic layers are alternately stacked multiple times.

[0085] In some implementations, the encapsulation portion may be selectively applied to the implementations described later.

[0086] Figure 4 This is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0087] refer to Figure 4In one embodiment, the display device 200 may include a substrate 201, a first electrode 210, a second electrode 230, a first emission layer 221, a second emission layer 222, and a CGL 240. Hereinafter, for ease of description, the differences from the embodiments described above are described in detail.

[0088] Substrate 201 may include various materials. In embodiments, substrate 201 may include glass, metal, organic materials, or other materials, and may be in contact with... Figure 1 The embodiments shown are modified and applied within substantially the same or similar scope. Therefore, detailed descriptions are omitted.

[0089] The first electrode 210 can have various shapes; for example, it can be patterned into an island shape. For example, the first electrode 210 can be... Figure 1 The descriptions provided in the above embodiments shown are modified and applied within a substantially the same or similar scope, and therefore detailed descriptions are omitted.

[0090] The second electrode 230 can be arranged to face the first electrode 210. The second electrode 230 can include various conductive materials. For example, the second electrode 230 can be positioned in relation to... Figure 1 The descriptions provided in the embodiments shown are modified and applied within a substantially identical or similar scope, and therefore detailed descriptions are omitted.

[0091] In some embodiments, the second electrode 230 may be arranged to correspond to and (e.g., in the Z direction) overlap with the contact hole 290CH, which will be described later.

[0092] The first emission layer 221 may be disposed (e.g., in the Z direction) between the first electrode 210 and the second electrode 230. In embodiments, the first emission layer 221 may include, for example, an organic emission layer, and may include low molecular weight organic materials or high molecular weight organic materials.

[0093] In some embodiments, the first emission layer 221 may be arranged not to correspond to the contact hole 290CH described later and (e.g., in the Z direction) not to overlap with the contact hole 290CH.

[0094] The pixel limiting layer 290 can be disposed on the first electrode 210.

[0095] The pixel defining layer 290 is arranged not to cover a specific area of ​​the first electrode 210, and the first emitting layer 221 may be arranged (e.g., in the Z direction) to overlap with the area of ​​the first electrode 210 not covered by the pixel defining layer 290 (e.g., the opening 290a of the pixel defining layer 290).

[0096] The pixel defining layer 290 may include various insulating materials. For example, in one embodiment, the pixel defining layer 290 may include an organic material, such as one or more organic insulating materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenol resin, and may be formed by a method such as spin coating.

[0097] In some embodiments, the pixel defining layer 290 may include a contact hole 290CH having a depth corresponding to at least a portion or the total thickness of the pixel defining layer 290. The contact hole 290CH may be spaced apart from the opening 290a in a planar view (e.g., in the -X direction) and may not overlap with the opening 290a in a planar view (e.g., in the Z direction). In some embodiments, the contact hole 290CH may thus be formed to be spaced apart from the first electrode 210 in a planar view (e.g., in the -X direction).

[0098] The second emission layer 222 may be arranged (e.g., in the Z direction) between the first electrode 210 and the second electrode 230.

[0099] In some implementations, the second emission layer 222 may be arranged (e.g., in the Z direction) to at least partially overlap with the first emission layer 221.

[0100] For example, Figure 4 The display device 200 of the embodiment shown has a columnar structure in which two or more emission layers (e.g., in the Z direction) overlap each other (e.g., the first emission layer 221 and the second emission layer 222 (e.g., in the Z direction) overlap each other).

[0101] The second emission layer 222 can be arranged such that the second emission layer 222 does not overlap with the first emission layer 221 in a region (e.g., in the Z direction).

[0102] In an embodiment, the second emission layer 222 may include, for example, an organic emission layer, and may include low molecular weight organic materials or high molecular weight organic materials.

[0103] The first emitting layer 221 and the second emitting layer 222 can be of different types. For example, in one embodiment, the color of the light emitted from the second emitting layer 222 can be different from the color of the light emitted from the first emitting layer 221.

[0104] In some embodiments, the color of the light emitted from the second emitting layer 222 may be the same as the color of the light emitted from the first emitting layer 221.

[0105] In some embodiments, the second emission layer 222 may be arranged to correspond to and (e.g., in the Z direction) overlap with the contact hole 290CH.

[0106] CGL240 may be disposed (e.g., in the Z direction) between the first emitter layer 221 and the second emitter layer 222. In some embodiments, CGL240 may include (e.g., in the Z direction) a charge connection region 240A that does not overlap with the first emitter layer 221 and (e.g., in the Z direction) overlaps with the second emitter layer 222. A detailed description will be provided later.

[0107] CGL240 (e.g., in the Z direction) is arranged between the first emitter layer 221 and the second emitter layer 222 to control the generation or movement of charge between the first emitter layer 221 and the second emitter layer 222, for example, to control the balance of charge.

[0108] In an implementation, CGL240 includes an N-type or P-type charge generation layer, such as an N-type charge generation layer and a P-type charge generation layer.

[0109] In some implementations, two devices can be implemented based on CGL240. For example, the first electrode 210, the first emitter layer 221, and CGL240 can be implemented as a single device, and the first electrode 210 and CGL240 can be used as electrodes opposite to each other. For example, the first electrode 210 can be used as an anode, and CGL240 can be used as a cathode. In some implementations, the second electrode 230, the second emitter layer 222, and CGL240 can be implemented as a single device, and the second electrode 230 and CGL240 can be used as electrodes opposite to each other. For example, the second electrode 230 can be used as a cathode, and CGL240 can be used as an anode.

[0110] The charge-connected region 240A of CGL240 may include at least one region that (e.g., in the Z direction) does not overlap with the first emitter layer 221 and (e.g., in the Z direction) overlaps with the second emitter layer 222.

[0111] The charge accumulated in CGL240 can be discharged at least at one point in time through the charge connection region 240A of CGL240.

[0112] In some embodiments, the charge connection region 240A of the CGL240 may be connected to a conductive layer in at least one region. In other embodiments, the charge connection region 240A may be connected to a connection electrode region. In some embodiments, the charge connection region 240A of the CGL240 may be connected to a transistor (such as a thin-film transistor), and the discharge of charge from the CGL240 at a desired time can be controlled by controlling the thin-film transistor.

[0113] In some embodiments, the charge connection region 240A may at least correspond to the contact hole 290CH, for example, it may (e.g., in the Z direction) overlap with the contact hole 290CH. In embodiments where the charge connection region 240A corresponds to the contact hole 290CH, the charge discharge structure of CGL240 can be easily implemented while reducing or preventing interference from the first electrode 210 or the second electrode 230. For example, charge discharge can be easily achieved through the region in the charge connection region 240A of CGL240 that corresponds to the contact hole 290CH.

[0114] Since the charge accumulated in CGL240 can be discharged through the charge connection region 240A of CGL240 in the display device 200 according to the embodiment (such as the region corresponding to the contact hole 290CH), the accuracy of the color of the light emitted during driving the display device 200 can be improved, and the image quality characteristics can be improved.

[0115] In the implementation method, such as Figure 2 and Figure 3 As shown, one or more layers together with the second emitter layer 222 may (e.g., in the Z direction) be further included between CGL 240 and the second electrode 230, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer. In some embodiments, one or more layers together with the first emitter layer 221 may (e.g., in the Z direction) be further included between CGL 240 and the first electrode 210, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer.

[0116] Figure 5 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure.

[0117] refer to Figure 5 In one embodiment, the display device 300 may include a substrate 301, a first electrode 310, a second electrode 330, a first emitting layer 321, a second emitting layer 322, a CGL 340, and a conductive layer 380. Hereinafter, for ease of description, the differences from the embodiments described above are described in detail.

[0118] Conductive layer 380 and Figure 4 The examples are different, and will be described below.

[0119] One or more conductive layers 380 may be arranged to correspond to the contact holes 390CH of the pixel defining layer 390. The conductive layers 380 may include various types of conductive materials, such as metallic materials. The pixel defining layer 390 may include an opening 390a.

[0120] CGL340 may be disposed (e.g., in the Z direction) between the first emitter layer 321 and the second emitter layer 322. In some embodiments, CGL340 may include (e.g., in the Z direction) a charge connection region 340A that does not overlap with the first emitter layer 321 and (e.g., in the Z direction) overlaps with the second emitter layer 322.

[0121] The charge connection region 340A of CGL340 may include (e.g., in the Z direction) a region that at least does not overlap with the first emitter layer 321 and (e.g., in the Z direction) overlaps with the second emitter layer 322.

[0122] The charge accumulated in CGL340 can be discharged at least at one point in time through the charge connection region 340A of CGL340.

[0123] The charge connection region 340A of CGL340 can be connected (e.g., electrically connected) to the conductive layer 380 in at least one region. For example, as Figure 5 As shown, the charge connection region 340A can be electrically connected to the conductive layer 380 through direct contact with the conductive layer 380. In an embodiment, the charge connection region 340A may at least correspond to the contact hole 390CH and may (e.g., in the Z direction) overlap with the contact hole 390CH, and may be connected to (e.g., electrically connected to) the conductive layer 380 via the contact hole 390CH.

[0124] Since the charge connection region 340A is connected (e.g., electrically connected) to the conductive layer 380 via the contact hole 390CH, the charge discharge structure of CGL340 can be easily implemented while reducing or preventing interference from the first electrode 310 or the second electrode 330. For example, since the charge connection region 340A of CGL340 is connected (e.g., electrically connected) to the conductive layer 380 via the contact hole 390CH, the discharge of charge from CGL340 to the conductive layer 380 can be easily achieved.

[0125] Since the charge accumulated in CGL340 can be discharged to the conductive layer 380 through the charge connection region 340A of CGL340 in the display device 300 according to the embodiment (such as the region corresponding to the contact hole 390CH), the accuracy of the color of the light emitted during driving the display device 300 can be improved, and the image quality characteristics can be improved.

[0126] In alternative implementations, such as Figure 2 and Figure 3As shown, one or more layers together with the second emitter layer 322 may (e.g., in the Z direction) be further included between the CGL 340 and the second electrode 330, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer. In some embodiments, one or more layers together with the first emitter layer 321 may (e.g., in the Z direction) be further included between the CGL 340 and the first electrode 310, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer.

[0127] Figure 6 It shows the view from one direction. Figure 5 A schematic plan view of an example display device.

[0128] For example, Figure 6 It shows the basis Figure 5 An example viewed from above (e.g., a floor plan).

[0129] refer to Figure 6 In an embodiment, the second emission layer 322 (instead of at least the first emission layer 321) may be formed to have an extended region in at least one area. For example, the second emission layer 322 may (e.g., in a plan view) be formed to have an area larger than the first emission layer 321. The CGL340 may (e.g., in a plan view) be formed to have an area larger than at least the first emission layer 321.

[0130] With the above structure, the contact hole 390CH is formed at a position spaced apart from the first emitter layer 321 and the first electrode 310 (e.g., in the -X direction), so that the charge discharge from CGL340 can be precisely controlled via the contact hole 390CH. For example, the electrical connection between the conductive layer 380 and CGL340 can be easily achieved through the contact hole 390CH.

[0131] In some implementations... Figure 6 The above structure can also be applied to the implementation methods described later.

[0132] Figure 7 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure.

[0133] refer to Figure 7 In an embodiment, the display device 400 may include a substrate 401, a first electrode 410, a second electrode 430, a first emission layer 421, a second emission layer 422, and a CGL 440. Hereinafter, for ease of description, details related to... Figure 5 The differences between the embodiments shown are as follows.

[0134] For example, transistors TRA and TRB with Figure 5The examples are different, and will be described below.

[0135] One or more transistors TRB may be arranged to correspond to the contact hole 490CH of the pixel defining layer 490. For example, the transistor TRB may be a thin-film transistor (TFT). The pixel defining layer 490 may include an opening 490a.

[0136] In one embodiment, the transistor TRA may be arranged to be connected to the first electrode 410, and the transistor TRA may be a TFT.

[0137] The transistor TRB corresponding to the contact hole 490CH and the transistor TRA connected to the first electrode 410 can be driven separately. With the above structure, the charge discharge process from CGL440 can be precisely executed at the desired time point according to the control from the transistor TRB, without interfering with the light emission of the emission layers 421 and 422 between the first electrode 410 and the second electrode 430.

[0138] CGL440 may be disposed (e.g., in the Z direction) between the first emitter layer 421 and the second emitter layer 422. In some embodiments, CGL440 may include (e.g., in the Z direction) a charge connection region 440A that does not overlap with the first emitter layer 421 and (e.g., in the Z direction) overlaps with the second emitter layer 422.

[0139] The charge connection region 440A of CGL440 can be connected to (e.g., electrically connected to) transistor TRB in at least one region. For example, charge connection region 440A can be connected to (e.g., electrically connected to) transistor TRB by direct contact with transistor TRB. In an embodiment, charge connection region 440A can at least correspond to contact hole 490CH, for example, can overlap with contact hole 490CH (e.g., in the Z direction), and can be connected to (e.g., electrically connected to) transistor TRB via contact hole 490CH.

[0140] Since the charge connection region 440A is connected (e.g., electrically connected) to the transistor TRB via the contact hole 490CH, charge discharge from the CGL440 can be easily achieved while reducing or preventing interference from the first electrode 410 or the second electrode 430. For example, since the charge connection region 440A of the CGL440 can be connected (e.g., electrically connected) to the transistor TRB via the contact hole 490CH, and therefore, residual charge in the CGL440 can be easily discharged at a desired time point and for a desired time period according to control from the transistor TRB.

[0141] In an embodiment, one or more insulating layers 470 may be further arranged (e.g., in the Z direction) between the substrate 401 and the pixel defining layer 490.

[0142] In some embodiments, contact hole 470CH may be formed in insulating layer 470, and contact hole 470CH may be formed to correspond to and (e.g., in the Z direction) overlap with contact hole 490CH of pixel defining layer 490.

[0143] In some embodiments, the first electrode 410 may be disposed on the insulating layer 470 (e.g., directly disposed on the insulating layer 470 in the Z direction), and this may increase the convenience of forming contact holes 490CH and 470CH for discharging from CGL440 and arranging the transistor TRB corresponding to the contact holes 490CH and 470CH.

[0144] The charge accumulated in CGL440 can be discharged through the charge connection region 440A of CGL440 in the display device 400 of the embodiment (such as the region corresponding to the contact hole 490CH), and the charge can be selectively discharged through the transistor TRB at a desired time point and for a desired time period. By precisely controlling the discharge of charge from CGL440, the accuracy of the color of the light emitted during driving the display device 400 can be improved, and therefore, image quality characteristics can be improved.

[0145] In the implementation method, such as Figure 2 and Figure 3 As shown, one or more layers together with the second emitter layer 422 may (e.g., in the Z direction) be further included between CGL 440 and the second electrode 430, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer. In some embodiments, one or more layers together with the first emitter layer 421 may (e.g., in the Z direction) be further included between CGL 440 and the first electrode 410, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer.

[0146] In some implementations... Figure 6 The example of the planar shape shown can be applied to Figure 7 The implementation shown is illustrated.

[0147] Figure 8 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure.

[0148] refer to Figure 8In an embodiment, the display device 500 may include a substrate 501, a first electrode 510, a second electrode 530, a first emission layer 521, a second emission layer 522, and a CGL 540. Hereinafter, for ease of description, details related to... Figure 7 The differences between the embodiments shown are as follows.

[0149] Connecting electrodes CSD1 and CSD2 with Figure 7 The implementation methods differ, and they are described below.

[0150] One or more connection electrodes CSD2 are arranged to correspond to contact holes 590CH of pixel defining layer 590, and the connection electrodes CSD2 may be connected to (e.g., electrically connected to) transistor TRB. For example, transistor TRB may be a TFT. Pixel defining layer 590 may include opening 590a.

[0151] In one embodiment, the connection electrode CSD1 may be arranged to be connected to (e.g., electrically connected to) the first electrode 510, and the connection electrode CSD1 may be connected to (e.g., electrically connected to) the transistor TRA.

[0152] The positions of transistors TRA and TRB can be precisely selected at the desired locations by arranging connection electrodes CSD1 and CSD2.

[0153] In some implementations, transistors TRB and TRA are arranged to reduce interference, and thus, the characteristics of controlling each drive can be enhanced. In this way, charge discharge from CGL540 can be precisely achieved at the desired time point without interfering with light emission from the first emitter layer 521 and the second emitter layer 522 between the first electrode 510 and the second electrode 530.

[0154] CGL540 may be arranged (e.g., in the Z direction) between the first emitter layer 521 and the second emitter layer 522. In some embodiments, CGL540 may include (e.g., in the Z direction) a charge connection region 540A that does not overlap with the first emitter layer 521 and (e.g., in the Z direction) overlaps with the second emitter layer 522.

[0155] The charge connection region 540A of CGL540 can be connected to (e.g., electrically connected to) transistor TRB in at least one region, for example, via connection electrode CSD2. In an embodiment, the charge connection region 540A can at least correspond to contact hole 590CH, for example, it can overlap with contact hole 590CH (e.g., in the Z direction), and can be connected to (e.g., electrically connected to) connection electrode CSD2 in contact hole 590CH, and can be connected to transistor TRB via connection electrode CSD2.

[0156] Since the charge connection region 540A is electrically connected to the transistor TRB via the contact hole 590CH, charge discharge from CGL540 can be easily achieved while reducing or preventing interference from the first electrode 510 or the second electrode 530. For example, the charge connection region 540A of CGL540 can be connected (e.g., electrically connected) to the transistor TRB via the contact hole 590CH, and therefore, residual charge in CGL540 can be easily discharged at a desired time point and for a desired time period according to control from the transistor TRB.

[0157] In an embodiment, one or more insulating layers may be further arranged (e.g., in the Z direction) between the substrate 501 and the pixel defining layer 590.

[0158] For example, in one embodiment, the first insulating layer 571 and the second insulating layer 572 may be disposed on the substrate 501.

[0159] In one embodiment, transistors TRA and TRB are disposed between substrate 501 and first insulating layer 571 (e.g., directly between substrate 501 and first insulating layer 571), and connecting electrodes CSD1 and CSD2 may be disposed between first insulating layer 571 and second insulating layer 572.

[0160] In some embodiments, contact hole 572CH may be formed in the second insulating layer 572, and contact hole 572CH may be formed to correspond to and (e.g., in the Z direction) overlap with contact hole 590CH of pixel defining layer 590.

[0161] In some embodiments, the first electrode 510 may be disposed between the second insulating layer 572 and the pixel defining layer 590, thereby increasing the convenience of forming contact holes 590CH and 572CH for discharging from CGL 540 and arranging transistor TRBs corresponding to the contact holes 590CH and 572CH.

[0162] The charge accumulated in CGL540 can be discharged through the charge connection region 540A of CGL540 in the display device 500 of the embodiment (such as the region corresponding to the contact hole 590CH), and the charge can be selectively discharged through the transistor TRB at a desired time point and for a desired time period. By precisely controlling the discharge of charge from CGL540, the accuracy of the color of the light emitted during driving the display device 500 can be improved, and therefore, image quality characteristics can be improved.

[0163] In the implementation method, such as Figure 2 and Figure 3As shown, one or more layers together with the second emitter layer 522 may (e.g., in the Z direction) be further included between CGL 540 and the second electrode 530, for example, one or more of an electron transport layer, a hole transport layer, and a hole injection layer may be arranged. In some embodiments, one or more layers together with the first emitter layer 521 may (e.g., in the Z direction) be further included between CGL 540 and the first electrode 510, for example, one or more of an electron transport layer, a hole transport layer, and a hole injection layer may be arranged.

[0164] In some implementations... Figure 6 The example of the planar shape shown can be applied to Figure 8 The implementation shown is illustrated.

[0165] Figure 9 It is shown Figure 8 A schematic diagram illustrating an example of a CGL and transistor in a display device.

[0166] refer to Figure 9 The diagram illustrates two organic light-emitting devices. For example, a first organic light-emitting device 521EL and a second organic light-emitting device 522EL are shown. In an embodiment, the first organic light-emitting device 521EL may include a first electrode 510 (see [link to documentation]). Figure 8 ), First launch layer 521 (see Figure 8 The second organic light-emitting device 522EL may include, for example, CGL540, a second emitting layer 522 (see CGL540), and CGL540, and the ... Figure 8 ) and the second electrode 530 (see Figure 8 In some embodiments, the first electrode 510 may be connected to the anode AND, and the second electrode 530 may be connected to the cathode CAT.

[0167] The CGL540 can be, for example, via the connection electrode CSD2 (see...). Figure 8 It is electrically connected to transistor TRB.

[0168] Abnormal residual charge in CGL540 can be removed via transistor TRB. For example, residual charge in CGL540 can be discharged by controlling transistor TRB at a desired time point for a desired time period, and more specifically, the process of discharging or removing charge from CGL540 can be performed at a time that does not affect light emission from the first organic light-emitting device 521EL and the second organic light-emitting device 522EL.

[0169] Figure 10 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure.

[0170] Figure 11 It is shown Figure 10A schematic diagram illustrating an example of a CGL and transistor in a display device.

[0171] refer to Figure 10 In an embodiment, the display device 600 may include a substrate 601, a first electrode 610, a second electrode 630, a first emitting layer 621, a second emitting layer 622, a CGL 640, and a conductive layer 680. Hereinafter, for ease of description, details related to... Figure 8 The differences between the embodiments shown are as follows.

[0172] and Figure 8 compared to, Figure 10 The structure, which includes multiple sub-pixels, is shown.

[0173] For example, in one embodiment, the display device 600 may include at least three sub-pixels: BSP, RSP, and GSP.

[0174] In one implementation, the three sub-pixels BSP, RSP, and GSP may be sub-pixels that achieve the same color. However, the implementations of this disclosure are not necessarily limited to this. For example, in one implementation, the plurality of sub-pixels may include at least one sub-pixel that achieves a different color from the other sub-pixels.

[0175] In the implementation, the three sub-pixels BSP, RSP and GSP can be different colors from each other, such as blue, red and green.

[0176] In some implementations, the first emission layer 621 and the second emission layer 622 can be selectively controlled to correspond to the colors implemented by the three sub-pixels BSP, RSP, and GSP. In some implementations, the sub-pixel BSP may include a blue-based first emission layer 621 and a second emission layer 622, the sub-pixel RSP may include a red-based first emission layer 621 and a second emission layer 622, and the sub-pixel GSP may include a green-based first emission layer 621 and a second emission layer 622.

[0177] In some implementations, at least one of the three sub-pixels BSP, RSP, and GSP may include a transistor BTRB electrically connected to the CGL640.

[0178] In some implementations, the transistor BTRB can be electrically connected to the conductive layer 680 of another pixel. Thus, the three sub-pixels BSP, RSP, and GSP can be electrically connected via the transistor BTRB and commonly connected to CGL640 corresponding to the three sub-pixels BSP, RSP, and GSP.

[0179] In some implementations, transistors BTRA, RTRA, and GTRA electrically connected to the first electrode 610 may be arranged in the three sub-pixels BSP, RSP, and GSP, respectively.

[0180] In some implementations, as described above Figure 8 As shown in the display device 500, one or more connection electrodes may be arranged to connect to a transistor.

[0181] CGL640 may be disposed (e.g., in the Z direction) between the first emitter layer 621 and the second emitter layer 622. In some embodiments, CGL640 may include (e.g., in the Z direction) a charge connection region that does not overlap with the first emitter layer 621 and (e.g., in the Z direction) overlaps with the second emitter layer 622.

[0182] The CGL640 can be arranged to distinguish each sub-pixel.

[0183] In an implementation, the CGL640 can be extended to correspond to multiple sub-pixels.

[0184] In an embodiment, one or more insulating layers 670 may be further arranged (e.g., in the Z direction) between the substrate 601 and the pixel defining layer 690.

[0185] In the implementation method, such as Figure 2 and Figure 3 As shown, one or more layers together with the second emitter layer 622 may (e.g., in the Z direction) be further included between CGL 640 and the second electrode 630, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer. In some embodiments, one or more layers together with the first emitter layer 621 may (e.g., in the Z direction) be further included between CGL 640 and the first electrode 610, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer.

[0186] In some implementations... Figure 6 The example of the planar shape shown can be applied to Figure 10 The implementation shown is illustrated.

[0187] Figure 11 It is shown Figure 10 A schematic diagram illustrating an example of a CGL and transistor in a display device.

[0188] refer to Figure 11In this embodiment, the plurality of sub-pixels includes three sub-pixels: BSP, RSP, and GSP, and two organic light-emitting devices are shown in each sub-pixel. For example, first organic light-emitting devices 621BEL, 621REL, and 621GEL and second organic light-emitting devices 622BEL, 622REL, and 622GEL are shown respectively. The first organic light-emitting devices 621BEL, 621REL, and 621GEL may each include, for example, a first electrode 610 (see...). Figure 10 ), First launch layer 621 (see Figure 10 ) and CGL640, and the second organic light-emitting devices 622BEL, 622REL and 622GEL may each include, for example, CGL640, a second emitting layer 622 (see Figure 10 ) and the second electrode 630 (see Figure 10 In some embodiments, the first electrode 610 may be connected (e.g., electrically connected) to the anode AND, and the second electrode 630 may be connected (e.g., electrically connected) to the cathode CAT.

[0189] The CGL640 can be electrically connected to the transistor BTRB.

[0190] For a CGL640 corresponding to multiple sub-pixels (such as three sub-pixels BSP, RSP, and GSP), abnormally remaining charge in the CGL640 can be removed by using the transistor BTRB. For example, the remaining charge in the CGL640 can be removed by controlling the transistor BTRB to discharge at a desired time point for a desired time period.

[0191] In some implementations, multiple transistors can be arranged to correspond to the three sub-pixels BSP, RSP, and GSP, respectively, and these transistors can be controlled independently. In some implementations, the charge discharge process of the CGL640 can be easily controlled for each sub-pixel as needed.

[0192] Figure 12 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure.

[0193] refer to Figure 12 In one embodiment, the display device 700 may include a substrate 701, a first electrode 710, a second electrode 730, a first emitter layer 721, a second emitter layer 722, a CGL 740, and a transistor TRB. Hereinafter, for ease of description, the differences from the embodiments described above are described in detail.

[0194] In addition to the detailed shapes of transistors TRA and TRB, the display device 700 of the embodiment and Figure 8The display device 500 shown in the embodiments is similar, and therefore, the differences will be described in detail below.

[0195] Transistors TRA and TRB can be disposed on substrate 701. Transistors TRA and TRB can have various shapes, for example, they may include TFTs. Transistors TRA and TRB may each include an active layer 703, a gate electrode 705, a source electrode 708a, and a drain electrode 708b. According to embodiments, the active layer 703, gate electrode 705, source electrode 708a, and drain electrode 708b in each of transistors TRA and TRB are disposed in the same layer, but they may also be disposed in different layers. In some embodiments, hereinafter, an example is described where the TFT is a top-gate type in which the active layer 703, gate electrode 705, source electrode 708a, and drain electrode 708b are formed sequentially.

[0196] However, the embodiments disclosed herein are not necessarily limited to this, and various types of TFTs, such as bottom gate type, can be used.

[0197] In an embodiment, one or more buffer layers 702 may be disposed on the substrate 701.

[0198] The buffer layer 702 can be disposed on the substrate 701 (e.g., directly disposed on the substrate 701 in the Z direction). The buffer layer 702 can reduce or prevent impurities from being dispersed into the TFT to be disposed on the buffer layer 702.

[0199] The buffer layer 702 may comprise various materials, such as inorganic materials. In one embodiment, it may comprise a silicon-based material. In another embodiment, the buffer layer 702 may comprise silicon nitride (SiN). x ), silicon dioxide (SiO) x ) and silicon oxynitride (SiO) x N y At least one of the following.

[0200] In an embodiment, the buffer layer 702 may include an oxide material, such as aluminum oxide (Al₂O₃). x At least one of the metal oxides of ).

[0201] In an implementation, the buffer layer 702 may include multiple layers, such as at least two layers.

[0202] An active layer 703 is formed on a buffer layer 702 (e.g., directly disposed on the buffer layer 702 in the Z direction). The active layer 703 may comprise a semiconductor material, such as amorphous silicon or polycrystalline silicon. However, embodiments of this disclosure are not necessarily limited to the above examples, and the active layer 703 may comprise various materials. In some embodiments, the active layer 703 may comprise an organic semiconductor material.

[0203] In an embodiment, the active layer 703 may include an oxide semiconductor material. For example, the active layer 703 may include an oxide of a material selected from Group 12, Group 13 and Group 14 metals, such as zinc (Zn), indium (In), gallium (Ga), tin (Sn), cadmium (Cd), germanium (Ge) or hafnium (Hf) and combinations thereof.

[0204] A gate insulating layer 704 is formed on the active layer 703 (e.g., directly disposed on the active layer 703). In embodiments, the gate insulating layer 704 may comprise a multilayer or monolayer structure containing inorganic materials such as silicon oxide and / or silicon nitride. The gate insulating layer 704 can insulate the active layer 703 and the gate electrode 705 from each other.

[0205] The gate electrode 705 is formed on the gate insulating layer 704 (e.g., directly disposed on the gate insulating layer 704 in the Z direction). In an embodiment, the gate electrode 705 may be connected to a gate line that transmits one or more electrical signals.

[0206] In an embodiment, the gate electrode 705 may include a low-resistance metallic material, such as a multilayer or single layer of conductive material, including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc.

[0207] An intermediate insulating layer 706 is formed on the gate electrode 705 (e.g., directly disposed on the gate electrode 705). The intermediate insulating layer 706 can insulate the source electrode 708a and the drain electrode 708b from the gate electrode 705.

[0208] In an embodiment, the upper electrode 707 may be arranged (e.g., in the Z direction) to overlap with the gate electrode 705, and the intermediate insulating layer 706 may be arranged (e.g., in the Z direction) between the gate electrode 705 and the upper electrode 707.

[0209] The source electrode 708a and the drain electrode 708b are formed on the interlayer insulating layer 760 (e.g., directly disposed on the interlayer insulating layer 760 in the Z direction). The source electrode 708a and the drain electrode 708b can be formed as a single layer or multiple layers comprising a material having excellent conductivity.

[0210] The source electrode 708a and the drain electrode 708b can be formed to be in direct contact with the region of the active layer 703.

[0211] The source 708a or drain 708b (e.g., drain 708b) can be connected to the connection electrode CSD1 or CSD2.

[0212] In this embodiment, one or more insulating layers may be further disposed. For example, a first insulating layer 771 and a second insulating layer 772 may be disposed on transistors TRA and TRB, and may be disposed (e.g., in the Z direction) between interlayer insulating layer 760 and pixel defining layer 790. Pixel defining layer 790 may include an opening 790a.

[0213] In some embodiments, contact hole 772CH may be formed in the second insulating layer 772, and contact hole 772CH may be formed to correspond to and (e.g., in the Z direction) overlap with contact hole 790CH of pixel defining layer 790.

[0214] CGL740 may be arranged (e.g., in the Z direction) between the first emitter layer 721 and the second emitter layer 722. In some embodiments, CGL740 may include (e.g., in the Z direction) a charge connection region 740A that does not overlap with the first emitter layer 721 and (e.g., in the Z direction) overlaps with the second emitter layer 722.

[0215] Other components and the above references Figure 8 The above description of the provided display device 500 is the same, and detailed descriptions have been omitted for brevity.

[0216] In the implementation method, such as Figure 2 and Figure 3 As shown, one or more layers together with the second emitter layer 722 may (e.g., in the Z direction) be further included between the CGL 740 and the second electrode 730, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer. In some embodiments, one or more layers together with the first emitter layer 721 may (e.g., in the Z direction) be further included between the CGL 740 and the first electrode 710, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer.

[0217] In some implementations... Figure 6 The example of the planar shape shown in the implementation can be applied to Figure 12 The implementation shown is illustrated.

[0218] Figures 13 to 17 This is a diagram schematically illustrating a method for manufacturing a display device according to an embodiment of the present disclosure.

[0219] For example, Figures 13 to 17 Manufacturing can be shown Figure 8 An example of a method for display device 500.

[0220] In some implementations... Figures 13 to 17The method can be applied as is, or modified within a similar scope and then applied to the display device described above or later.

[0221] refer to Figure 13 Transistors TRA and TRB are arranged on substrate 501, and connecting electrodes CSD1 and CSD2 are arranged above transistors TRA and TRB.

[0222] In some embodiments, a first insulating layer 571 and a second insulating layer 572 are disposed on a substrate 501, and then a pixel defining layer 590 may be disposed on the second insulating layer 572 (e.g., directly disposed on the second insulating layer 572 in the Z direction).

[0223] Contact hole 572CH can be formed in the second insulating layer 572, and contact hole 572CH can be formed to correspond to and (e.g., in the Z direction) overlap with contact hole 590CH of pixel defining layer 590.

[0224] The opening 590a of the pixel defining layer 590 can be formed to be spaced apart from the contact hole 590CH in a planar view (e.g., in the X direction) and overlapped with the first electrode 510 in a planar view (e.g., in the Z direction).

[0225] refer to Figure 14 The first emitter layer 521 is formed to overlap with the first electrode 510 (e.g., in the Z direction). The first emitter layer 521 may be formed not to correspond to the contact hole 590CH and (e.g., in the Z direction) not to overlap with the contact hole 590CH.

[0226] refer to Figure 15 CGL540 is disposed on the first emitting layer 521. For example, CGL540 may be formed to extend through at least one edge of the first emitting layer 521 to a portion of CGL540 that does not overlap with the first emitting layer 521. In embodiments, CGL540 may be formed (e.g., in a plan view) to have an area larger than the first emitting layer 521. In some embodiments, CGL540 may be arranged corresponding to contact hole 590CH and may be electrically connected to connection electrode CSD2, such as by direct contact with connection electrode CSD2.

[0227] refer to Figure 16The second emission layer 522 may be formed on CGL 540 (e.g., directly on CGL 540). The second emission layer 522 may be formed beyond at least one edge of the first emission layer 521 and may be formed (e.g., in a plan view) to have an area larger than the first emission layer 521. In some embodiments, the second emission layer 522 may be arranged to correspond to and overlap with the contact hole 590CH (e.g., in the Z direction).

[0228] refer to Figure 17 The second electrode 530 may be formed on the second emitter layer 522 (e.g., directly formed on the second emitter layer 522).

[0229] In the manufacturing method according to embodiments of the present disclosure, a display device 500 having a structure (such as a columnar structure) in which the first emitting layer 521 and the second emitting layer 522 (e.g., in the Z direction) overlap each other can be readily manufactured. In some embodiments, a display device 500 capable of precisely controlling the discharge or removal of residual charge in the CGL 540 when an abnormal charge remains in the CGL 540 can be readily manufactured.

[0230] Figure 18 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure.

[0231] Figure 19 It is shown Figure 18 A schematic diagram of an example of an intermediate electrode and transistor in a display device.

[0232] refer to Figure 18 In an embodiment, the display device 800 may include a substrate 801, a first electrode 810, a second electrode 830, a first emission layer 821, a second emission layer 822, and an intermediate electrode 840. Hereinafter, for ease of description, details related to... Figure 17 The differences between the embodiments shown are as follows.

[0233] Substrate 801 may include various materials. In embodiments, substrate 801 may include glass, metal, organic materials, or other materials, and may be in contact with... Figure 17 The embodiments shown are modified and applied within substantially the same or similar scope. Therefore, detailed descriptions are omitted.

[0234] The first electrode 810 can have various shapes, such as being patterned into an island shape. The first electrode 810 can be coupled with... Figure 17 The descriptions provided in the embodiments shown are modified and applied within a substantially the same or similar scope, and therefore detailed descriptions are omitted.

[0235] The second electrode 830 can be arranged to face the first electrode 810. The second electrode 830 can include various conductive materials. For example, the second electrode 830 can be positioned in relation to... Figure 17 The descriptions provided in the embodiments shown are modified and applied within a substantially the same or similar scope, and therefore detailed descriptions are omitted.

[0236] The first emission layer 821 may be disposed (e.g., in the Z direction) between the first electrode 810 and the second electrode 830. In embodiments, the first emission layer 821 may include, for example, an organic emission layer, and may include low molecular weight organic materials or high molecular weight organic materials.

[0237] In some embodiments, the first emission layer 821 may be arranged not to correspond to the contact hole 890CH described later and (e.g., in the Z direction) not to overlap with the contact hole 890CH.

[0238] The pixel limiting layer 890 may be on the first electrode 810 (e.g., directly disposed on the first electrode 810).

[0239] The pixel defining layer 890 is arranged not to cover a specific area of ​​the first electrode 810, and the first emitting layer 821 may be arranged (e.g., in the Z direction) to overlap with areas of the first electrode 810 not covered by the pixel defining layer 890 (such as the opening 890a of the pixel defining layer 890).

[0240] The pixel defining layer 890 may include various insulating materials. For example, in one embodiment, the pixel defining layer 890 may include an organic material (such as one or more organic insulating materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenol resin) and formed by a method such as spin coating.

[0241] In some embodiments, the pixel defining layer 890 may include a contact hole 890CH having a depth corresponding to at least a portion of the thickness or the total thickness of the pixel defining layer 890. The contact hole 890CH may be spaced apart from the opening 890a in a planar view (e.g., in the -X direction) and may not overlap with the opening 890a in a planar view (e.g., in the Z direction).

[0242] One or more transistors TRB can be arranged to correspond to the contact hole 890CH of the pixel defining layer 890. For example, the transistor TRB can be a TFT.

[0243] In one embodiment, the transistor TRA may be arranged to be connected (e.g., electrically connected) to the first electrode 810, and the transistor TRA may include a TFT.

[0244] The transistor TRB corresponding to the contact hole 890CH and the transistor TRA connected to the first electrode 810 can be driven individually. In this way, the discharge of charge from the intermediate electrode 840 can be precisely achieved at the desired time point without interfering with the light emission from the first emission layer 821 and the second emission layer 822 between the first electrode 810 and the second electrode 830.

[0245] The second emission layer 822 may be arranged (e.g., in the Z direction) between the first electrode 810 and the second electrode 830.

[0246] In some implementations, the second emission layer 822 may be arranged (e.g., in the Z direction) to at least partially overlap with the first emission layer 821.

[0247] For example, the display device 800 of the embodiment has a columnar structure in which two or more emission layers (e.g., in the Z direction) overlap each other (e.g., the first emission layer 821 and the second emission layer 822 (e.g., in the Z direction) overlap each other).

[0248] The second emitter layer 822 may be arranged such that the second emitter layer 822 may not overlap with the first emitter layer 821 in a region (e.g., in the Z direction). For example, the second emitter layer 822 may extend at least through the edge of the first emitter layer 821 and may include a region (e.g., in the thickness direction of the substrate 801, such as the Z direction) that does not overlap with the first emitter layer 821.

[0249] In an embodiment, the second emission layer 822 may include, for example, an organic emission layer, and may include low molecular weight organic materials or high molecular weight organic materials.

[0250] The first emitting layer 821 and the second emitting layer 822 can be of different types. For example, in one embodiment, the color of the light emitted from the second emitting layer 822 can be different from the color of the light emitted from the first emitting layer 821.

[0251] In some embodiments, the first emitting layer 821 and the second emitting layer 822 can achieve light with the same color base but different brightness levels. In one embodiment, the first emitting layer 821 can achieve deep blue light, and the second emitting layer 822 can achieve light blue light.

[0252] In some embodiments, the first emitting layer 821 can emit deep red light, and the second emitting layer 822 can emit light red light. In other embodiments, the first emitting layer 821 can emit deep green light, and the second emitting layer 822 can emit light green light.

[0253] In some embodiments, the second emission layer 822 may be arranged to correspond to and overlap with the contact hole 890CH (e.g., in the Z direction).

[0254] The intermediate electrode 840 may be (e.g., in the Z direction) disposed between the first emitter layer 821 and the second emitter layer 822. In some embodiments, the intermediate electrode 840 may include (e.g., in the Z direction) a connection region 840A that does not overlap with the first emitter layer 821 and (e.g., in the Z direction) overlaps with the second emitter layer 822.

[0255] The intermediate electrode 840 may be (e.g., in the Z direction) arranged between the first emission layer 821 and the second emission layer 822 and control the selective light emission from the first emission layer 821 and the second emission layer 822.

[0256] In one implementation, two devices can be implemented based on the intermediate electrode 840. For example, the first electrode 810, the first emitting layer 821, and the intermediate electrode 840 can be implemented as a single device (e.g., a first light-emitting device), and in this case, the first electrode 810 and the intermediate electrode 840 can be used as electrodes opposite to each other. For example, the first electrode 810 can be used as an anode, and the intermediate electrode 840 can be used as a cathode.

[0257] In some embodiments, the second electrode 830, the second emitting layer 822, and the intermediate electrode 840 can be implemented as a single device (e.g., a second light-emitting device), and in this embodiment, the second electrode 830 and the intermediate electrode 840 can be used as electrodes opposite to each other. For example, the second electrode 830 can be used as a cathode, and the intermediate electrode 840 can be used as an anode.

[0258] In some implementations, two light-emitting devices can be selectively driven. For example, when driving the first light-emitting device including the first emitting layer 821, the second light-emitting device including the second emitting layer 822 may not be driven. Conversely, when driving the second light-emitting device including the second emitting layer 822, the first light-emitting device including the first emitting layer 821 may not be driven.

[0259] In some implementations, the electric field can be controlled so that the intermediate electrode 840 can be used as an anode or cathode as needed, for example, the applied electric field can be controlled via a transistor TRB.

[0260] Precise light emission from the first emitting layer 821 and the second emitting layer 822 can be controlled using the intermediate electrode 840; for example, selective control can be easily performed. Thus, the color coordinates of the light implemented by the display device 800 can be precisely controlled. In the embodiment, as described above, by allowing the first emitting layer 821 and the second emitting layer 822 to reproduce light of the same color base with different brightness (such as dark blue and light blue), a wide range of color reproduction can be ensured, and in color combinations (e.g., white implementation), by implementing light blue, light green, and light red, the power consumption of the display device 800 can be easily reduced.

[0261] The connection region 840A of the intermediate electrode 840 may include (e.g., in the thickness direction of the substrate 801, such as the Z direction) a region that at least does not overlap with the first emitter layer 821 and (e.g., in the thickness direction of the substrate 801, such as the Z direction) overlaps with the second emitter layer 822.

[0262] The intermediate electrode 840 is electrically connected to the transistor TRB via the connection region 840A of the intermediate electrode 840, and can reduce or prevent interference with the transistor TRA connected to the first electrode 810.

[0263] The connection region 840A of the intermediate electrode 840 can be connected to (e.g., electrically connected to) the transistor TRB via at least one region. For example, the connection region 840A can be connected to (e.g., electrically connected to) the transistor TRB by directly contacting the transistor TRB. In an embodiment, the connection region 840A may at least correspond to the contact hole 890CH, for example, it may (e.g., in the Z direction) overlap with the contact hole 890CH, and can be connected to (e.g., electrically connected to) the transistor TRB via the contact hole 890CH.

[0264] Since the connection region 840A is connected (e.g., electrically connected) to the transistor TRB via the contact hole 890CH, the arrangement structure of the intermediate electrode 840 can be precisely controlled, while reducing or preventing interference with the first electrode 810 or the second electrode 830. For example, since the connection region 840A of the intermediate electrode 840 is connected (e.g., electrically connected) to the transistor TRB via the contact hole 890CH, the electric field applied to the intermediate electrode 840 can be precisely controlled at a desired time point and for a desired time period by controlling the transistor TRB.

[0265] In an embodiment, one or more insulating layers 870 may be further arranged (e.g., in the Z direction) between the substrate 801 and the pixel defining layer 890.

[0266] In some embodiments, contact hole 870CH may be formed in insulating layer 870, and contact hole 870CH may be formed to correspond to and (e.g., in the Z direction) overlap with contact hole 890CH of pixel defining layer 890.

[0267] In some embodiments, the first electrode 810 may be disposed on the insulating layer 870 (e.g., directly disposed on the insulating layer 870), and this may increase the convenience of forming contact holes 890CH and 870CH for discharging from the intermediate electrode 840 and arranging the transistor TRB corresponding to the contact holes 890CH and 80CH.

[0268] In the display device 800 of the embodiment, the connection region 840A of the intermediate electrode 840 (such as the region corresponding to the contact hole 890CH) is electrically connected to the transistor TRB, and the electric field applied to the intermediate electrode 840 can be precisely controlled at a desired time point and for a desired time period by controlling the transistor TRB. In this way, the image quality characteristics of the display device 800 can be improved and power consumption can be reduced.

[0269] In the implementation method, such as Figure 2 and Figure 3 As shown, one or more layers together with the second emitter layer 822 may (e.g., in the Z direction) be further included between the intermediate electrode 840 and the second electrode 830, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer. In some embodiments, one or more layers together with the first emitter layer 821 may (e.g., in the Z direction) be further included between the intermediate electrode 840 and the first electrode 810, such as one or more of an electron transport layer, a hole transport layer, and a hole injection layer.

[0270] In some implementations... Figure 6 The example of the planar shape shown can be applied to Figure 18 The implementation shown is illustrated.

[0271] In some embodiments, the display device 800 may selectively employ the above references. Figure 7 The described connection electrodes.

[0272] In some embodiments, the display device 800 may selectively employ the above references. Figure 12 The detailed structure of the TFT is described.

[0273] In some embodiments, the display device 800 may selectively employ the above references. Figure 10The detailed structure of the plurality of sub-pixels is described. In this embodiment, the display device 800 connects (e.g., electrically connects) a transistor TRB to an intermediate electrode 840 in each of the plurality of sub-pixels to individually control each sub-pixel. In this embodiment, depending on the design conditions of the first and second electrodes, a common transistor TRB may be connected to the intermediate electrode 840 corresponding to the plurality of sub-pixels.

[0274] Figure 19 It is shown Figure 18 A schematic diagram of an example of an intermediate electrode and transistor in a display device.

[0275] refer to Figure 19 Two organic light-emitting devices are shown. A first organic light-emitting device 821EL and a second organic light-emitting device 822EL are shown. In an embodiment, the first organic light-emitting device 821EL may include a first electrode 810 (see [link to documentation]). Figure 18 ), First launch layer 821 (see Figure 18 The second organic light-emitting device 822EL may include, for example, an intermediate electrode 840, a second emitting layer 822 (see [reference]), and an intermediate electrode 840, and the ... Figure 18 ) and the second electrode 830 (see Figure 18 In some embodiments, the first electrode 810 may be connected to the anode AND, and the second electrode 830 may be connected to the cathode CAT.

[0276] The intermediate electrode 840 can be electrically connected to the transistor TRB.

[0277] The electric field applied to the intermediate electrode 840 can be precisely controlled via the transistor TRB.

[0278] In this way, the individual driving of each of the first organic light-emitting device 821EL and the second organic light-emitting device 822EL can be precisely controlled.

[0279] In some embodiments, at least one of the display devices described in the above embodiments can be applied to an electronic device (e.g., an electronic device).

[0280] For example, an electronic device (e.g., an electronic device) may include one or more display devices and other components.

[0281] For example, the electronic device (e.g., electronic device) of the embodiment may include at least one of the above-described display devices, and may further include one or more of a processor, memory, input module, power module, embedded module and external module.

[0282] The processor can execute software to control at least one other component (e.g., a hardware or software component) of an electronic device connected to the processor, and perform data processing or calculations. According to an embodiment, as at least part of the data processing or calculations, the processor can load commands or data received from another component (e.g., an input module, a sensor module, or a communication module) into volatile memory, process the commands or data stored in the volatile memory, and store the resulting data in non-volatile memory.

[0283] In an implementation, the processor may include a main processor and an auxiliary processor. The main processor may include at least one of a central processing unit (CPU) and an application processor (AP). The main processor may also include at least one of a graphics processing unit (GPU), a communication processor (CP), and an image signal processor (ISP). The main processor may also include a neural processing unit (NPU). The NPU may be a processor specifically designed to process artificial intelligence models, and the artificial intelligence models may be generated through machine learning. The artificial intelligence model may include multiple layers of artificial neural networks. The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, and combinations of at least two of these, but is not limited to the examples above. The artificial intelligence model may additionally or alternatively include software structures in addition to hardware structures. At least two of the above-described processing units and processors may be implemented as an integrated component (e.g., a single chip) or may be implemented as separate components (e.g., multiple chips).

[0284] The auxiliary processor may include a controller, and the controller may include interface conversion circuitry and timing control circuitry. The controller receives image signals from the main processor, converts the image signal data format to meet the interface specifications with the display device, and outputs the image data. The controller can output various control signals for driving the display device.

[0285] In implementations, the auxiliary processor may further include a data conversion circuit, a gamma correction circuit, a rendering circuit, etc. The data conversion circuit can receive image data from the controller and can compensate the image data to display the image at a desired brightness according to the characteristics of the electronic device or user settings, or it can convert the image data to reduce power consumption or compensate for afterimages. The gamma correction circuit can convert the image data or a gamma reference voltage so that the image displayed on the electronic device has the desired gamma characteristics. The rendering circuit can receive image data from the controller and can render the image data based on the pixel arrangement of the display device applied to the electronic device.

[0286] The input module can receive commands or data from outside the electronic device (e.g., from a user or external electronic device) for components of the electronic device (e.g., a processor, sensor module, or sound output module).

[0287] The input module may include a first input module for receiving commands or data from a user and a second input module for receiving commands or data from an external electronic device. The first input module may include a microphone, mouse, keyboard, keys (e.g., buttons), or pen (e.g., a passive or active pen). The second input module may support a specified protocol enabling wired (e.g., cable) or wireless connection to an external electronic device. According to embodiments, the second input module may include a High Definition Multimedia Interface (HDMI), a Universal Serial Bus (USB) interface, an SD card interface, or an audio interface. The second input module may include a connector physically connected to the external electronic device, such as an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0288] In some embodiments, the display device may further include a light emission driver. The light emission driver outputs a light emission control signal necessary for light emission from the display device in response to a control signal received from a controller. The light emission driver may be formed independently of or integrally with the scan driver.

[0289] In some embodiments, the display device may include a scan driver that receives control signals from a controller and outputs scan signals in response to the control signals.

[0290] In some embodiments, the display device may include a data driver that receives control signals from a controller and converts and outputs image data as analog voltages in response to the control signals.

[0291] Electronic devices may also include embedded modules and external modules. Embedded modules may include sensor modules, antenna modules, and audio output modules. External modules may include camera modules, optical modules, and communication modules.

[0292] The sensor module can detect input from the user's body or from an input module, and generate an electrical signal or data value corresponding to the input. The sensor module may include at least one of a fingerprint sensor, an input sensor, and a digitizer. The sensor module may also include a gesture sensor, a gyroscope sensor, a pressure sensor, a magnetic sensor, an accelerometer, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a liveness sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0293] Input modules, sensor modules, camera modules, etc., can work together with the processor to control the operation of the display device.

[0294] Electronic devices can be of various types. They may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to embodiments of this disclosure are not necessarily limited to those described above.

[0295] The display device according to one or more embodiments of the present disclosure can enhance image quality characteristics and precisely control optical characteristics.

[0296] Although this disclosure has been specifically shown and described with reference to non-limiting embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of this disclosure.

Claims

1. A display device, comprising: Substrate; The first electrode is on the substrate; The second electrode is arranged to face the first electrode; A first emission layer is disposed between the first electrode and the second electrode; The second emission layer is arranged to have a first region that overlaps with at least the first emission layer; as well as A charge generating layer is disposed between the first emission layer and the second emission layer. The charge generating layer includes a charge connection region that does not overlap with the first emission layer in the thickness direction of the substrate but overlaps with the second emission layer in the thickness direction of the substrate.

2. The display device according to claim 1, wherein: The second emission layer extends beyond at least the edge of the first emission layer and includes a second region that does not overlap with the first emission layer in the thickness direction of the substrate.

3. The display device according to claim 1, wherein: The area of ​​the second emission layer in the plan view is larger than the area of ​​the first emission layer in the plan view.

4. The display device according to claim 1, wherein: One or more insulating layers with contact holes are disposed on the substrate; and The charge connection region of the charge generation layer corresponds to the contact hole.

5. The display device according to claim 4, wherein: The contact hole is arranged to be spaced apart from the first electrode in a plan view.

6. The display device according to claim 1, wherein: The charge connection region of the charge generating layer is electrically connected to one or more conductive layers.

7. The display device according to claim 1, wherein: The charge connection region of the charge generation layer is electrically connected to one or more transistors.

8. A display device, comprising: Substrate; The first electrode is on the substrate; The second electrode is arranged to face the first electrode; A first emission layer is disposed between the first electrode and the second electrode; The second emission layer is arranged to have a first region that overlaps with at least the first emission layer; as well as An intermediate electrode is disposed between the first emission layer and the second emission layer, the intermediate electrode including a connection region that does not overlap with the first emission layer in the thickness direction of the substrate and overlaps with the second emission layer in the thickness direction of the substrate.

9. The display device according to claim 8, wherein: The second emission layer extends beyond at least the edge of the first emission layer and includes a second region that does not overlap with the first emission layer in the thickness direction of the substrate.

10. The display device according to claim 8, wherein: The area of ​​the second emission layer in the plan view is larger than the area of ​​the first emission layer in the plan view.

11. The display device according to claim 8, wherein: One or more insulating layers with contact holes are disposed on the substrate; and The connection area of ​​the intermediate electrode corresponds to the contact hole.

12. The display device according to claim 11, wherein: The contact hole is arranged to be spaced apart from the first electrode in a plan view.

13. The display device according to claim 11, wherein: The connection region of the intermediate electrode is electrically connected to one or more conductive layers in the region corresponding to the contact hole.

14. The display device according to claim 8, wherein: The connection region of the intermediate electrode is arranged to be electrically connected to one or more transistors.

15. The display device according to claim 8, wherein: The intermediate electrode controls one of the first and second emitting layers to emit light selectively.

16. Electronic devices, including display devices, in, The display device includes: Substrate; The first electrode is on the substrate; The second electrode is arranged to face the first electrode; A first emission layer is disposed between the first electrode and the second electrode; A second emission layer is arranged to have a region overlapping at least the first emission layer; and A charge generating layer is disposed between the first emission layer and the second emission layer. The charge generating layer includes a charge connection region that does not overlap with the first emission layer in the thickness direction of the substrate but overlaps with the second emission layer in the thickness direction of the substrate.

17. The electronic device according to claim 16, wherein: The second emission layer extends beyond at least the edge of the first emission layer and includes a second region that does not overlap with the first emission layer in the thickness direction of the substrate.

18. The electronic device according to claim 16, wherein: The area of ​​the second emission layer in the plan view is larger than the area of ​​the first emission layer in the plan view.

19. The electronic device according to claim 16, wherein: One or more insulating layers with contact holes are disposed on the substrate; and The charge connection region of the charge generation layer corresponds to the contact hole.

20. The electronic device according to claim 19, wherein: The contact hole is arranged to be spaced apart from the first electrode in a plan view.

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