Display substrate and display device
By using a triazole derivative as the p-type charge generation layer without doping material in a series OLED and combining it with a barrier structure, the voltage and lifetime issues of series OLED devices were solved, achieving lower driving voltage and longer device lifetime, while simplifying the fabrication process.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2026-01-15
- Publication Date
- 2026-04-21
AI Technical Summary
The performance of existing tandem OLED devices needs improvement, especially in terms of voltage and lifespan.
By using triazole derivatives as undoped materials to form a p-type charge generation layer, combined with a barrier structure, the LUMO energy level is reduced and crystallinity is decreased, simplifying the preparation process.
The device's driving voltage was reduced, its lifespan was improved, crosstalk was reduced, and the fabrication process was simplified.
Smart Images
Figure CN121908770A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology, and in particular to a display substrate and a display device. Background Technology
[0002] Currently, tandem OLEDs (Organic Light-Emitting Diodes) have a stacked structure of multiple light-emitting units with an intermediate layer between adjacent light-emitting units, which can achieve high brightness and high luminous efficiency at low current, thus enabling OLEDs to have a long lifespan.
[0003] However, the performance of current tandem OLED devices needs to be improved. Summary of the Invention
[0004] Based on the background art, this disclosure presents a display substrate and a display device.
[0005] In a first aspect, this disclosure provides a display substrate, comprising: Substrate; Multiple sub-pixels are formed on one side of the substrate, and each sub-pixel includes multiple light-emitting layers arranged in the thickness direction of the substrate, with at least a p-type charge generation layer between each two adjacent light-emitting layers; The p-type charge generation layer is formed of an undoped material, which includes the structure shown in General Formula 1 below: General Formula 1; Both group A and group B are strong electron-withdrawing groups.
[0006] For example, group A and / or group B have the structural formula shown in general formula 2: General Formula 2; Wherein, * indicates the connection site of group A and / or group B in general formula 1, and R1 to R5 are each independently selected from cyano, halogen, sulfonic acid, nitro, and C6-C60 aryl groups substituted with cyano, halogen, sulfonic acid or nitrate.
[0007] For example, group A and / or group B include any one of formulas I-VI:
[0008] Formula I Formula II Formula III
[0009] Type IV, Type V, Type VI.
[0010] For example, the undoped material includes any one of the following structural formulas 1 to 6:
[0011] Structure 1 Structure 2
[0012] Structural Formula 3 Structural Formula 4
[0013] Structure 5 and Structure 6.
[0014] For example, the plurality of sub-pixels includes a first sub-pixel emitting blue light, a second sub-pixel emitting green light, and a third sub-pixel emitting red light; the display substrate further includes: Multiple partition structures, wherein the orthographic projection of the multiple partition structures on the substrate is located between two adjacent sub-pixels; The p-type charge generation layer is disconnected at the partition structure.
[0015] For example, the orthographic projection of the plurality of light-emitting layers included in each sub-pixel onto the substrate is located within the orthographic projection of the p-type charge-generating layer included in that sub-pixel onto the substrate.
[0016] For example, the orthographic projection pattern of the light-emitting layer on the substrate is the same as the orthographic projection pattern of the p-type charge-generating layer on the substrate.
[0017] For example, the sub-pixel further includes: An electron blocking layer is located on the side of the light-emitting layer closest to the substrate; The orthographic projection pattern of the electron blocking layer on the substrate is the same as the orthographic projection pattern of the light-emitting layer adjacent to the electron blocking layer on the substrate.
[0018] For example, the sub-pixel further includes: An n-type charge generation layer is located on the side of the p-type charge generation layer closer to the substrate; The n-type charge generation layer is disconnected at the partition structure.
[0019] For example, the p-type charge generation layer includes a first part, a second part, and a third part, wherein the orthographic projection of the first part on the substrate is located within the first sub-pixel, the orthographic projection of the second part on the substrate is located within the second sub-pixel, and the orthographic projection of the third part on the substrate is located within the third sub-pixel; The dimensions of the first part, the second part, and the third part in the thickness direction of the substrate are different.
[0020] For example, the dimension of the first part in the thickness direction of the substrate is smaller than the dimension of the second part in the thickness direction of the substrate; the dimension of the second part in the thickness direction of the substrate is smaller than the dimension of the third part in the thickness direction of the substrate.
[0021] A second aspect of this disclosure provides a display device including the display substrate described in the first aspect.
[0022] The display substrate provided in this disclosure includes: a substrate; Multiple sub-pixels are formed on one side of the substrate, each sub-pixel including multiple light-emitting layers arranged in the thickness direction of the substrate, and at least one p-type charge-generating layer between each two adjacent light-emitting layers; wherein the p-type charge-generating layer is formed of an undoped material, and the undoped material includes the structure shown in General Formula 1 below: Formula 1; wherein, group A and group B are both strong electron-withdrawing groups; Therefore, this disclosure uses a triazole derivative containing multiple electron-withdrawing groups as the p-type charge generation layer, which has a deep LUMO energy level. The vapor-deposited film as the p-type charge generation layer can reduce the voltage of the series OLED device. Furthermore, since the material has the structure shown in Formula 1, the electron-withdrawing groups and the triazole structure are connected by single bonds, resulting in weaker planarity and crystallinity of the organic material, thereby reducing the problem of crystallization at the interface of the p-type charge generation layer and improving the device lifetime. In addition, using this material as an undoped material to form the p-type charge generation layer simplifies the device fabrication process.
[0023] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure are described below. Attached Figure Description
[0024] To more clearly illustrate the technical solutions in the embodiments or related technologies of this disclosure, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the scale in the drawings is for illustration only and does not represent the actual scale.
[0025] Figure 1 A schematic diagram of the structure of a display substrate provided in an embodiment of this disclosure is shown; Figure 2 A schematic diagram of the structure of a display substrate provided in yet another embodiment of this disclosure is shown; Figure 3 A schematic diagram of the structure of a display substrate provided in another embodiment of this disclosure is shown; Figure 4 The carbon NMR spectrum of the p-type charge generation layer material provided in this embodiment is shown. Figure 5 A performance comparison diagram is shown between the p-type charge generation layer material provided in the embodiments of this disclosure and p-type charge generation layer materials in related technologies; Figure 6 A schematic diagram of the structure of a display substrate provided in another embodiment of the present disclosure is shown; Figure 7 The performance comparison diagrams of the p-type charge generation layer in the display substrates provided in Examples 1, 3, 5 and 6 are shown; Explanation of reference numerals in the attached figures: 100. Substrate; 10. First electrode; 21. Hole injection layer; 22. First hole transport layer; 23. First electron blocking layer; 24. First light-emitting layer; 25. First hole blocking layer; 30. n-type charge generation layer; 40. p-type charge generation layer; 51. Second hole transport layer; 52. Second electron blocking layer; 53. Second light-emitting layer; 54. Second hole blocking layer; 60. Electron transport layer. Detailed Implementation
[0026] To make the above-mentioned objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0027] As an emerging screen type, OLED displays possess advantages such as self-emission, wide viewing angle, rich colors, low power consumption, and flexibility, making them widely recognized as the most promising third-generation display technology after LCD. Driven by an applied voltage, holes are injected from the anode into the highest occupied orbital (HOMO) of the organic material, while electrons are injected from the cathode into the lowest unoccupied orbital (LUMO). Holes and electrons move separately within the organic layer, recombine upon meeting to generate excitons. These excitons then undergo free diffusion within the organic solid film, deactivating through radiation and non-radiation, returning from a high-energy state (excited state) to the ground state. This process releases energy as light, thus emitting light. For device architecture, tandem OLEDs (TOLEDs) have a stacked structure of multiple light-emitting units with an intermediate layer between adjacent units. This allows for high brightness and high luminous efficiency at low current, resulting in a long lifespan for OLEDs. Compared to single-unit devices, the tandem structure has attracted widespread attention due to its potential for high brightness, long lifespan, and approximately 100% internal quantum efficiency (IQE). The researchers then discussed various aspects, such as using different EL cells, introducing new high-efficiency EL materials, designing intermediate layers, and fabricating various TOLED architectures.
[0028] In organic light-emitting diode (OLED) display devices, hole injection layers and electron injection layers are generally used to promote charge injection. The hole injection layer is a functional layer formed from a single material or more than one material. The single-material method typically utilizes a deep lumen, while the method using more than one material involves doping a p-type, deep lumen material with a hole transport material. Both methods require the use of a deep lumen material. However, deep lumen materials are difficult to synthesize due to their strong electron-withdrawing substituents, and it is difficult to simultaneously possess the characteristics of deep lumen, high stability, and high film-forming properties. For example, although F4-TCNQ (a p-type hole injection material) has a very deep lumen, its deposition temperature is too low, affecting deposition control, production performance reproducibility, and device thermal stability. Similarly, HatCN, due to its high crystallinity, presents film-forming problems in devices, and its lumen is not deep enough to be used as a p-type dopant.
[0029] In view of this, the present disclosure provides a display substrate and a display device, which uses a triazole derivative with electron-withdrawing groups as an undoped material to form a p-type charge generation layer. The undoped material has a deep LUMO energy level, which can reduce the device voltage, and has weak crystallinity, which can increase the device lifetime, thereby improving the device performance of the tandem OLED.
[0030] Reference Figure 1 , Figure 1 A schematic diagram of the structure of a display substrate provided in an embodiment of this disclosure is shown, as follows: Figure 1 As shown, the display substrate specifically includes: Substrate 100; Multiple sub-pixels 70 are formed on one side of the substrate 100. Each sub-pixel 70 includes multiple light-emitting layers arranged in the thickness direction of the substrate 100. At least one p-type charge generation layer 40 is included between each two adjacent light-emitting layers. The p-type charge generation layer 40 is formed of an undoped material, which includes the structure shown in General Formula 1 below: General Formula 1; Both group A and group B are strong electron-withdrawing groups.
[0031] In this embodiment, each sub-pixel 70 may include multiple light-emitting layers, specifically two, three, or more light-emitting layers. Figure 1 For example, multiple light-emitting layers may include a first light-emitting layer 24 and a second light-emitting layer 53. The materials of each light-emitting layer can be the same or different. When the materials of each light-emitting layer are different, multiple light-emitting layers emit light of the same color, and the wavelength difference between the emitted light from multiple light-emitting layers does not exceed 20 nm to avoid large color differences in the light emitted from different light-emitting layers. A p-type charge generation layer 40 is included between adjacent light-emitting layers. This p-type charge generation layer 120 is used to inject holes into one side of the light-emitting layer. Specifically, in the case of multiple light-emitting layers including a first light-emitting layer 24 and a second light-emitting layer 53, the p-type charge generation layer 40 injects holes into the second light-emitting layer 53. It can be understood that an n-type charge generation layer 30 is also included between adjacent light-emitting layers. This n-type charge generation layer is used to inject electrons into one side of the light-emitting layer and to form a pn junction with the p-type charge generation layer, so that electron and hole migration also exists between the two series-connected light-emitting layers, realizing series-connected light emission from the two light-emitting layers. For example, using... Figure 1 For example, the n-type charge generation layer 30 is located on the side of the p-type charge generation layer 40 close to the substrate 100. When multiple sub-pixels are turned on, the n-type charge generation layer injects electrons into the first light-emitting layer 24, and the p-type charge generation layer injects holes into the second light-emitting layer 53.
[0032] The p-type charge generation layer 120 is formed using an undoped material, that is, the p-type charge generation layer is formed directly using the organic material shown in Formula 1 without doping with other materials. In this way, the resulting p-type charge generation layer is formed from an undoped material, and the fabrication process is simple and easy. The p-type charge generation layer 40 formed by the material shown in Formula 1 is used to inject holes into the light-emitting layer on the side of the p-type charge generation layer 40 away from the substrate 100. Since the material is a triazole derivative, each carbon of the triazole is connected to group A and group B through a single bond. Group A and group B are both strong electron-withdrawing groups, which makes the undoped material have a deep LUMO energy level, reducing the energy barrier of the charge injection process, thereby reducing the driving voltage of the light-emitting device in the display substrate.
[0033] Specifically, group A and group B can be C6-C6 carbons on the benzene ring in which the hydrogen atoms on each carbon are substituted. 60 The aryl group is an electron-withdrawing substituent, such as nitro, sulfonic acid, or cyano. Group A and group B can be the same or different. If groups A and B are different, it could be due to differences in the total number of carbon atoms in the groups, differences in the substituents on the benzene ring, or differences in both. It should be noted that the aryl group in this embodiment includes, but is not limited to, phenyl, naphthyl, anthraceneyl, acenaphtheneyl, indeneyl, phenanthreneyl, azulel, pyreneyl, fluorenyl, peryleneyl, spirofluorenyl, spirobisfluorenyl, benzo[a]phenanthreneyl, benz[a]anthrayl, fluoranyl, styrannyl, tetraphenyl, and indenephenyl.
[0034] In one example, each sub-pixel may further include a first electrode, a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, and a second electrode, etc., for carrier injection and migration to the emissive layer. For example, using... Figure 1 For example, each sub-pixel includes a first electrode 10, a hole injection layer 21, a first hole transport layer 22, a first electron blocking layer 23, a first light-emitting layer 24, a first electron transport layer 25, an n-type charge generation layer 30, a p-type charge generation layer 40, a second hole transport layer 51, a second electron blocking layer 52, a second light-emitting layer 53, a second electron transport layer 54, and a second electrode 60. When the sub-pixel emits light, holes generated by the hole injection layer 21 are injected into the first light-emitting layer 24 through the first hole transport layer 22 and the first electron blocking layer 23, and electrons generated by the n-type charge generation layer 30 are injected into the first light-emitting layer 24 through the first electron transport layer 25. Thus, electrons and holes recombine in the first light-emitting layer 24 to achieve light emission. Holes generated by the p-type charge generation layer 40 are injected into the second light-emitting layer 53 through the second hole transport layer 51 and the second electron blocking layer 52, and electrons generated by the second electrode 60 are injected into the second light-emitting layer 53 through the second electron transport layer 54. Thus, electrons and holes recombine in the second light-emitting layer 53 to achieve light emission.
[0035] The display substrate provided in this embodiment uses an undoped material to form a p-type charge generation layer between multiple light-emitting layers. Since the undoped material includes groups A and B with strong electron-withdrawing groups, the undoped material has a deeper LUMO energy level, which reduces the potential barrier for carrier injection and thus reduces the device voltage. Furthermore, since groups A and B in the undoped material are connected to triazole through single bonds, the resulting organic compound has weaker planarity. Consequently, after the p-type charge generation layer is formed, its crystallinity is weaker and its stability is stronger, which helps to improve the device lifespan.
[0036] In one embodiment, group A and / or group B have the structure shown in general formula 2: General Formula 2; Wherein, * indicates the connection site of group A and / or group B in general formula 1, and R1 to R5 are each independently selected from cyano, halogen, sulfonic acid, nitro, and C6-C groups substituted with cyano, halogen, sulfonic acid, or nitrate groups. 60 Aryl groups.
[0037] In this embodiment, R1-R5 can be completely identical, completely different, or partially identical. By replacing the hydrogen on the benzene ring with an electron-withdrawing group, the overall electron-withdrawing ability of the benzene ring can be improved. Furthermore, by replacing the hydrogen on the carbon of the triazole with the group shown in general formula 2, the undoped material can have a deeper LUMO energy level. Using it as the p-type charge generation layer 40 can improve the carrier migration efficiency and reduce the operating voltage of the device.
[0038] In one embodiment, group A and / or group B comprise any one of formulas I-VI:
[0039] Formula I Formula II Formula III
[0040] Type IV, Type V, Type VI.
[0041] In one embodiment, the undoped material includes any one of the following structural formulas 1 to 6:
[0042] Structure 1 Structure 2
[0043] Structural Formula 3 Structural Formula 4
[0044] Structure 5 and Structure 6.
[0045] In one embodiment, reference is made to Figure 2 , Figure 2 A schematic diagram of the structure of a display substrate provided in another embodiment of this disclosure is shown, as follows: Figure 2 As shown, the multiple sub-pixels 70 include a first sub-pixel 70B that emits blue light, a second sub-pixel 70G that emits green light, and a third sub-pixel 70R that emits red light; The display substrate also includes: Multiple partition structures A, the orthographic projection of multiple partition structures A on substrate 100 is located between two adjacent sub-pixels 70; The p-type charge generation layer 40 is disconnected at the partition structure A.
[0046] In this embodiment, the p-type charge generation layer 40 is a common layer for multiple sub-pixels 70. By using a partition structure A to disconnect the p-type charge generation layer 40, it is divided into multiple unconnected parts (such as...). Figure 2 As shown in 40a, 40b and 40c), since the orthogonal projection of the isolation structure A on the substrate 100 is located between two adjacent sub-pixels 70, the two parts of the p-type charge generation layer 40 separated by the isolation structure A are located in different sub-pixels 70. In this way, when a sub-pixel 70 is lit, the lateral current generated by the p-type charge generation layer 40 is blocked and will not affect the adjacent sub-pixels 70, thereby reducing the crosstalk phenomenon of the display panel.
[0047] Specifically, in the case where multiple sub-pixels 70 include a first sub-pixel 70B emitting blue light, a second sub-pixel 70G emitting green light, and a third sub-pixel 70R emitting red light, a partition structure A can be included between the first sub-pixel 70B and the second sub-pixel 70G, and another partition structure A can be included between the second sub-pixel 70G and the third sub-pixel 70R. In this case, the p-type charge generation layer 40 is divided into three parts by the two partition structures A. The dimensions of these three parts in the normal direction of the substrate 100 can be the same or different. If the dimensions of the three parts in the normal direction of the substrate 100 are the same, the three parts can be formed simultaneously, simplifying the fabrication process of the p-type charge generation layer 100. If the dimensions of the three parts in the normal direction of the substrate 100 are different, the operating voltage of each sub-pixel 70 can be controlled by using different dimensions.
[0048] In one embodiment, continue to refer to Figure 2The orthographic projection of the multiple light-emitting layers included in each sub-pixel 70 onto the substrate 100 is located within the orthographic projection of the p-type charge generating layer 40 included in that sub-pixel 70 onto the substrate 100.
[0049] In this embodiment, when the partition structure A divides the p-type charge generation layer 40 into multiple unconnected parts, and these multiple parts are located in different sub-pixels 70, in order to ensure that each sub-pixel 70 emits light normally, the orthogonal projections of the multiple light-emitting layers in each sub-pixel 70 onto the substrate 100 can all be located within the orthogonal projection of the p-type charge generation layer 40 included in that sub-pixel 70 onto the substrate 100. In this way, each sub-pixel 70 contains a part of the p-type charge generation layer 40, and the p-type charge generation layer 40 in each sub-pixel 70 independently injects holes into the light-emitting layer in that sub-pixel 70, which can avoid the presence of lateral current in the p-type charge generation layer 40 and reduce crosstalk.
[0050] For example, with Figure 2 For example, the first sub-pixel 70B includes a first blue light emitting layer 24B and a second blue light emitting layer 53B; the second sub-pixel 70G includes a first green light emitting layer 24G and a second green light emitting layer 53G; and the third sub-pixel 70R includes a first red light emitting layer 24R and a second red light emitting layer 53R. The orthographic projections of the first blue light emitting layer 24B and the second blue light emitting layer 53B onto the substrate are both located within the orthographic projection of the p-type charge generating layer 40a included in the first sub-pixel 70B onto the substrate. The orthographic projections of the first green light emitting layer 24G and the second green light emitting layer 53G onto the substrate are both located within the orthographic projection of the p-type charge generating layer 40b included in the second sub-pixel 70G onto the substrate. The orthographic projections of the first red light emitting layer 24R and the second red light emitting layer 53R onto the substrate are both located within the orthographic projection of the p-type charge generating layer 40c included in the third sub-pixel 70R onto the substrate.
[0051] In this embodiment of the disclosure, when the orthogonal projections of the plurality of light-emitting layers included in each sub-pixel 70 onto the substrate 100 are all located within the orthogonal projection of the p-type charge-generating layer 40 included in the sub-pixel 70 onto the substrate 100, the orthogonal projection area of the plurality of light-emitting layers onto the substrate 100 may be smaller than the orthogonal projection area of the p-type charge-generating layer onto the substrate 100, or the orthogonal projection area of the plurality of light-emitting layers onto the substrate 100 may be the same as the orthogonal projection area of the p-type charge-generating layer 40 onto the substrate 100. Wherein, when the orthogonal projection area of the plurality of light-emitting layers onto the substrate 100 is smaller than the orthogonal projection area of the p-type charge-generating layer 40 onto the substrate 100, different masks may be used to fabricate the light-emitting layer and the p-type charge-generating layer 40 separately during the fabrication process; when the orthogonal projection area of the plurality of light-emitting layers onto the substrate is the same as the orthogonal projection area of the p-type charge-generating layer 40 onto the substrate, the same mask may be used to form the light-emitting layer and the p-type charge-generating layer 40.
[0052] In one example, continue to refer to Figure 2 The orthographic projection pattern of the light-emitting layer on the substrate 100 is the same as the orthographic projection pattern of the p-type charge generation layer 40 on the substrate 100.
[0053] In this embodiment, to facilitate the fabrication of the p-type charge generation layer, the same mask used for fabricating the light-emitting layer can be used to fabricate the p-type charge generation layer. Thus, the orthogonal projection pattern of the fabricated light-emitting layer on the substrate is the same as the orthogonal projection pattern of the p-type charge generation layer on the substrate. In this way, the same mask can be used to fabricate the p-type charge generation layer and the light-emitting layer. This simplifies the fabrication process while ensuring that the orthogonal projections of multiple light-emitting layers on the substrate coincide with the orthogonal projections of the p-type charge generation layer on the substrate, so that each sub-pixel 70 can emit light normally.
[0054] Specifically, sub-pixel 70 includes multiple light-emitting layers, and the orthographic projection pattern of each light-emitting layer on substrate 100 is identical to the orthographic projection pattern of the p-type charge-generating layer 40 on substrate 100. The p-type charge-generating layer 40 is separated by partition structure A, dividing it into multiple parts. This means that the orthographic projection pattern of the light-emitting layer included in each sub-pixel 70 on substrate 100 is identical to the orthographic projection pattern of a portion of the p-type charge-generating layer 40 included in that sub-pixel 70 on substrate 100. For example, using... Figure 2For example, in the first sub-pixel 70B, the orthographic projection patterns of the first blue light emitting layer 24B and the second blue light emitting layer 53B on the substrate 100 are the same as the orthographic projection patterns of the p-type charge generating layer 40 included in the first sub-pixel 70B on the substrate 100; in the second sub-pixel 70G, the orthographic projections of the first green light emitting layer 24G and the second green light emitting layer 53G on the substrate 100 are the same as the orthographic projection patterns of the p-type charge generating layer 40 included in the second sub-pixel 70G on the substrate 100; in the third sub-pixel 70R, the orthographic projection patterns of the first red light emitting layer 24R and the second red light emitting layer 53R on the substrate 100 are the same as the orthographic projection patterns of the p-type charge generating layer 40 included in the third sub-pixel 70R on the substrate 100.
[0055] In one embodiment, continue to refer to Figure 2 Subpixel 70 also includes: An electron blocking layer is located on the side of the light-emitting layer closest to the substrate 100; The orthographic projection pattern of the electron blocking layer on the substrate is the same as the orthographic projection pattern of the light-emitting layer adjacent to the electron blocking layer on the substrate.
[0056] In this embodiment, each sub-pixel 70 includes multiple electron blocking layers, and each electron blocking layer is adjacent to a light-emitting layer. Figure 2 For example, each sub-pixel 70 includes a first electron blocking layer 23 and a second electron blocking layer 52. The orthographic projection pattern of the first electron blocking layer 23 on the substrate 100 is the same as the orthographic projection pattern of the first light-emitting layer 24 on the substrate 100; the orthographic projection pattern of the second electron blocking layer 52 on the substrate 100 is the same as the orthographic projection pattern of the second light-emitting layer 53 on the substrate 100. The electron blocking layers are used to block electrons migrating to the light-emitting layer from continuing to propagate towards the hole transport layer, thereby improving the luminous efficiency of the device. When the orthographic projection pattern of the light-emitting layer on the substrate 100 is the same as the orthographic projection pattern of the electron blocking layer on the substrate 100, the electron blocking layer can be formed using the same mask as the light-emitting layer.
[0057] In one embodiment, reference is made to Figure 3 , Figure 3 A schematic diagram of the structure of a display substrate provided in another embodiment of this disclosure shows that the sub-pixel 70 further includes: The n-type charge generation layer 30 is located on the side of the p-type charge generation layer 40 that is close to the substrate 100; The n-type charge generation layer 30 is disconnected at the partition structure A.
[0058] In this embodiment, each sub-pixel 70 includes an n-type charge generation layer 30 located on the side of the p-type charge generation layer 40 near the substrate 100. This n-type charge generation layer allows electrons to be injected into one side of the light-emitting layer, and a pn junction can be formed between the n-type charge generation layer 30 and the p-type charge generation layer 40, enabling carrier migration between multiple light-emitting layers. The n-type charge generation layer 30 can also be disconnected at a partition structure, thus preventing the n-type charge generation layers 30 from connecting with each other in different sub-pixels 70, thereby blocking lateral current and reducing crosstalk in the display panel. The orthographic projection pattern of the n-type charge generation layer 30 on the substrate 100 can also be identical to the orthographic projection pattern of the light-emitting layer 24 on the substrate 100, i.e., the same mask is used to fabricate the light-emitting layer 24, the n-type charge generation layer 30, and the p-type charge generation layer 40.
[0059] In one embodiment, continue to refer to Figure 2 The p-type charge generation layer includes a first part 40a, a second part 40b and a third part 40c. The orthographic projection of the first part 40a on the substrate 100 is located within the first sub-pixel 70B, the orthographic projection of the second part 40b on the substrate 100 is located within the second sub-pixel 70G, and the orthographic projection of the third part 40c on the substrate 100 is located within the third sub-pixel 70R. The dimensions of the first part 40a, the second part 40b, and the third part 40c in the thickness direction of the substrate 100 are different.
[0060] Specifically, the p-type charge generation layer is divided into three unconnected parts by the isolation structure: the first part 40a, the second part 40b, and the third part 40c. The different parts are located in different sub-pixels. Specifically, the orthographic projection of the first part 40a on the substrate 100 is located in the first sub-pixel 70B, the orthographic projection of the second part 40b on the substrate 100 is located in the second sub-pixel 70G, and the orthographic projection of the third part 40c on the substrate 100 is located in the third sub-pixel 70R. In this way, each sub-pixel includes a part of the p-type charge generation layer, enabling normal light emission of each sub-pixel. Since the p-type charge generation layers included in multiple sub-pixels are not connected, the lateral current of the p-type charge generation layer is limited. When a single sub-pixel is lit, it prevents some current from flowing to adjacent sub-pixels, causing adjacent sub-pixels to be lit, thus avoiding crosstalk.
[0061] In this embodiment, the dimensions of the first part 40a, the second part 40b, and the third part 40c in the thickness direction of the substrate 100 can be different. Specifically, the dimensions of the first part 40a, the second part 40b, and the third part 40c in the thickness direction of the substrate 100 can all be different, or one of the three parts can have a different dimension in the thickness direction of the substrate 100. In this way, the operating voltage of sub-pixels of different colors can be controlled by adjusting the thickness of different parts.
[0062] In one embodiment, the dimension of the first portion 40a in the thickness direction of the substrate 100 is smaller than the dimension of the second portion 40b in the thickness direction of the substrate 100; the dimension of the second portion 40b in the thickness direction of the substrate 100 is smaller than the dimension of the third portion 40c in the thickness direction of the substrate.
[0063] In this embodiment, by making the thickness of the first part 40a less than the thickness of the second part 40b, and the thickness of the second part 40b less than the thickness of 40c, the working voltages between multiple different sub-pixels can be more easily distinguished, reducing crosstalk problems.
[0064] In one example, the dimensions of each portion of the p-type charge generation layer 40 in the thickness direction of the substrate 100 can be between 5 and 9 nm. Within this range, the voltage of the light-emitting device in the display substrate is relatively low, and the problem of low luminous intensity due to an excessively thin p-type charge generation layer 40 is avoided. Specifically, the thickness of the p-type charge generation layer 40 can be 5 nm, 6 nm, 7 nm, or 8 nm, etc., or the thickness of the first portion 40a can be 5 nm, the thickness of the second portion 40b can be 7 nm, and the thickness of the third portion 40c can be 9 nm, etc.
[0065] The display substrate provided in this embodiment uses an undoped material as shown in Formula 1 to form a p-type charge generation layer 40, and uses this p-type charge generation layer 40 to form a plurality of sub-pixels 70. Since the material shown in Formula 1 is a triazole derivative including multiple electron-withdrawing groups, the multiple electron-withdrawing groups can reduce the overall electron-withdrawing ability of the material and reduce the LUMO energy level. Using it as the p-type charge generation layer 40 to form sub-pixels 70 can reduce the voltage of the sub-pixels 70. Furthermore, since the multiple electron-withdrawing groups in the undoped material are connected to the triazole structure by single bonds, the overall planarity of the undoped material is relatively weak. Therefore, the interface of the p-type charge generation layer 40 formed by it is not easy to crystallize, thereby improving the overall lifespan of the device. In addition, since the display substrate includes a partition structure, the p-type charge generation layer is divided into multiple unconnected parts by the partition structure, so that the lateral current in the p-type charge generation layer cannot flow to adjacent sub-pixels, thereby avoiding the situation where adjacent sub-pixels are also lit when a single sub-pixel is lit, and reducing the crosstalk of the display panel.
[0066] To enable those skilled in the art to better understand the performance of the display substrate provided in the embodiments of this application, the performance of the light-emitting devices and the integrated display substrates of some exemplary embodiments will be tested and compared below: First, the performance of the two organic materials HAT-CN in the structure and related technologies shown in Formula 1 above was tested, and the results were as follows: Figure 4 and Figure 5 The results shown, in which, Figure 4 The carbon NMR spectrum of the organic material provided in this example is shown. Figure 5 This example and the performance test results of HAT-CN are shown, based on Figure 5 As can be seen, the triazole derivative used in this embodiment has a deeper LUMO level than the hole injection material HAT-CN commonly used in related technologies. Moreover, compared with HAT-CN, the material provided in this embodiment has dihedral angles, which means that it does not crystallize even after being stored at 85°C for 120 hours. In contrast, HAT-CN, which is commonly used in related technologies, crystallizes after being stored at 85°C for 120 hours. Therefore, the p-type charge generation layer formed by the organic material provided in this embodiment has a deeper LUMO level and weaker crystallinity, resulting in a light-emitting device including this p-type charge generation layer having a lower operating voltage and a longer device lifetime.
[0067] Secondly, refer to Figure 1The display substrate includes a substrate 100 and a plurality of sub-pixels 70 formed on one side of the substrate 100. Each sub-pixel 70 includes: a first electrode 10, a hole injection layer 21, a first hole transport layer 22, a first electron blocking layer 23, a first light-emitting layer 24, a first hole blocking layer 25, an n-type charge generation layer 30, a p-type charge generation layer 40, a second hole transport layer 51, a second electron blocking layer 52, a second light-emitting layer 53, a second hole blocking layer 54, and an electron transport layer 60. The materials of each layer are shown in Table 1 below. Table 1 shows the materials of each film layer on the substrate.
[0068] The doping ratio of the doped material in the blue emitting layer is 1%-2%, the doping ratio of the doped material in the green emitting layer is 6%-12%, the doping ratio of the doped material in the red emitting layer is 2%-4%, and the doping ratio of the doped material in the electron transport layer is 5:5.
[0069] Example 1: The hole injection layer has a thickness of 10nm, the hole transport layer has a thickness of 15nm, the first electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the first electron blocking layer corresponding to the green sub-pixel has a thickness of 10nm, the first electron blocking layer corresponding to the red sub-pixel has a thickness of 26nm, the first blue light emitting layer has a thickness of 20nm, the first green light emitting layer has a thickness of 33nm, the first red light emitting layer has a thickness of 45nm, the first hole blocking layer has a thickness of 15nm, the n-type charge generation layer has a thickness of 18nm, the p-type charge generation layer has a thickness of 9nm, the second hole transport layer has a thickness of 30nm, the second electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the second electron blocking layer corresponding to the green sub-pixel has a thickness of 28nm, the second electron blocking layer corresponding to the red sub-pixel has a thickness of 38nm, the second blue light emitting layer has a thickness of 20nm, the second green light emitting layer has a thickness of 33nm, the second red light emitting layer has a thickness of 45nm, the second hole blocking layer has a thickness of 5nm, and the electron transport layer has a thickness of 30nm.
[0070] Example 2: The hole injection layer has a thickness of 10nm, the hole transport layer has a thickness of 15nm, the first electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the first electron blocking layer corresponding to the green sub-pixel has a thickness of 10nm, the first electron blocking layer corresponding to the red sub-pixel has a thickness of 26nm, the first blue light emitting layer has a thickness of 20nm, the first green light emitting layer has a thickness of 33nm, the first red light emitting layer has a thickness of 45nm, the first hole blocking layer has a thickness of 15nm, the n-type charge generation layer has a thickness of 18nm, the p-type charge generation layer has a thickness of 5nm, the second hole transport layer has a thickness of 30nm, the second electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the second electron blocking layer corresponding to the green sub-pixel has a thickness of 28nm, the second electron blocking layer corresponding to the red sub-pixel has a thickness of 38nm, the second blue light emitting layer has a thickness of 20nm, the second green light emitting layer has a thickness of 33nm, the second red light emitting layer has a thickness of 45nm, the second hole blocking layer has a thickness of 5nm, and the electron transport layer has a thickness of 30nm.
[0071] The performance of the display substrates formed in Example 1 and Example 2 were tested, and the results are shown in Table 2 below: Table 2 Performance test results for Example 1 and Example 2
[0072] As shown in Table 2, the lower the thickness of the p-type charge generation layer, the lower the voltage at which the light-emitting device emits light in the display substrate.
[0073] In some examples, the display substrate may also include multiple electron transport layers, in which case, refer to Figure 6 , Figure 6 A schematic diagram of the structure of a display substrate provided in another embodiment of the present disclosure is shown, as follows: Figure 6 As shown, the display substrate includes a substrate 100 and a plurality of sub-pixels 70 formed on one side of the substrate 100. The plurality of sub-pixels 70 include: a first electrode 10, a hole injection layer 21, a first hole transport layer 22, a first electron blocking layer 23, a first light-emitting layer 24, a first hole blocking layer 25, a first electron transport layer 26, an n-type charge generation layer 30, a p-type charge generation layer 40, a second hole transport layer 51, a second electron blocking layer 52, a second light-emitting layer 53, a second hole blocking layer 54, and a second electron transport layer 60.
[0074] Example 3: The hole injection layer has a thickness of 10nm, the hole transport layer has a thickness of 110nm, the first electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the first electron blocking layer corresponding to the green sub-pixel has a thickness of 5nm, the first electron blocking layer corresponding to the red sub-pixel has a thickness of 5nm, the first blue light emitting layer has a thickness of 20nm, the first green light emitting layer has a thickness of 33nm, the first red light emitting layer has a thickness of 45nm, the first hole blocking layer has a thickness of 5nm, the first electron transport layer has a thickness of 10nm, the n-type charge generation layer has a thickness of 18nm, the p-type charge generation layer has a thickness of 9nm, the second hole transport layer has a thickness of 50nm, the second electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the second electron blocking layer corresponding to the green sub-pixel has a thickness of 49nm, the second electron blocking layer corresponding to the red sub-pixel has a thickness of 80nm, the second blue light emitting layer has a thickness of 20nm, the second green light emitting layer has a thickness of 33nm, the second red light emitting layer has a thickness of 45nm, the second hole blocking layer has a thickness of 5nm, and the second electron transport layer has a thickness of 30nm.
[0075] Example 4: The hole injection layer has a thickness of 10nm, the hole transport layer has a thickness of 110nm, the first electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the first electron blocking layer corresponding to the green sub-pixel has a thickness of 5nm, the first electron blocking layer corresponding to the red sub-pixel has a thickness of 5nm, the first blue light emitting layer has a thickness of 20nm, the first green light emitting layer has a thickness of 33nm, the first red light emitting layer has a thickness of 45nm, the first hole blocking layer has a thickness of 5nm, the first electron transport layer has a thickness of 10nm, the n-type charge generation layer has a thickness of 18nm, the p-type charge generation layer has a thickness of 5nm, the second hole transport layer has a thickness of 50nm, the second electron blocking layer corresponding to the blue sub-pixel has a thickness of 5nm, the second electron blocking layer corresponding to the green sub-pixel has a thickness of 49nm, the second electron blocking layer corresponding to the red sub-pixel has a thickness of 80nm, the second blue light emitting layer has a thickness of 20nm, the second green light emitting layer has a thickness of 33nm, the second red light emitting layer has a thickness of 45nm, the second hole blocking layer has a thickness of 5nm, and the second electron transport layer has a thickness of 30nm.
[0076] The display substrates formed in Examples 3 and 4 were subjected to performance tests, and the results are shown in Table 3 below: Table 3 Performance test results for Examples 3 and 4
[0077] As shown in Table 3, the lower the thickness of the p-type charge generation layer, the lower the voltage at which the light-emitting device emits light in the display substrate.
[0078] Example 5, see reference Figure 3The p-type charge generation layer 40 of the display substrate is divided into three parts, specifically the first part 40a, the second part 40b and the third part 40c, and the remaining film layers are the same as in Example 1.
[0079] Example 6, see reference Figure 3 The p-type charge generation layer 40 of the display substrate is divided into three parts, specifically the first part 40a, the second part 40b and the third part 40c, and the remaining film layers are the same as in Example 3.
[0080] The performance of the display substrate provided in Example 6 was tested, and compared with the display substrates of Example 1 and Example 3, and the results were as follows. Figure 7 The results shown Figure 7 The performance diagrams of the p-type charge generation layer in Examples 1, 3, 5, and 6 are shown. Rs is the sheet resistance calculated from the lateral leakage current of the p-type charge generation layer. A larger Rs value indicates smaller lateral crosstalk. Figure 7 It can be seen that the display substrate with the p-type charge generation layer blocked has less lateral crosstalk than the unblocked case, indicating that the structure provided in this embodiment can improve the crosstalk problem of the display panel.
[0081] Based on the same inventive concept, this disclosure also provides a display device, including the display substrate described in any of the above embodiments.
[0082] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0083] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0084] The above provides a detailed description of a display substrate and display device provided by this disclosure. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this disclosure. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this disclosure. Therefore, the content of this specification should not be construed as a limitation of this disclosure.
[0085] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.
[0086] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.
[0087] The terms "an embodiment," "embodiment," or "one or more embodiments" as used herein mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this disclosure. Furthermore, please note that the examples of the phrase "in one embodiment" do not necessarily all refer to the same embodiment.
[0088] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this disclosure may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.
[0089] In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This disclosure can be implemented by means of hardware comprising a plurality of different elements and by means of a suitably programmed computer. In a unit claim enumerating a plurality of means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.
[0090] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.
Claims
1. A display substrate, characterized in that, include: Substrate; Multiple sub-pixels are formed on one side of the substrate, and each sub-pixel includes multiple light-emitting layers arranged in the thickness direction of the substrate, with at least a p-type charge generation layer between each two adjacent light-emitting layers; The p-type charge generation layer is formed of an undoped material, which includes the structure shown in General Formula 1 below: General Formula 1; Both group A and group B are strong electron-withdrawing groups.
2. The display substrate according to claim 1, characterized in that, The group A and / or the group B have the structural formula shown in general formula 2 below: General Formula 2; Wherein, * indicates the connection site of group A and / or group B in general formula 1, and R1 to R5 are each independently selected from cyano, halogen, sulfonic acid, nitro, and C6-C groups substituted with cyano, halogen, sulfonic acid, or nitrate groups. 60 Aryl groups.
3. The display substrate according to claim 2, characterized in that, The group A and / or group B includes any one of the following formulas I-VI: Formula I Formula II Formula III Type IV, Type V, Type VI.
4. The display substrate according to claim 1, characterized in that, The undoped material includes any one of the following structural formulas 1 to 6: Structure 1 Structure 2 Structural Formula 3 Structural Formula 4 Structure 5 and Structure 6.
5. The display substrate according to claim 1, characterized in that, The plurality of sub-pixels includes a first sub-pixel emitting blue light, a second sub-pixel emitting green light, and a third sub-pixel emitting red light; the display substrate further includes: Multiple partition structures, wherein the orthographic projection of the multiple partition structures on the substrate is located between two adjacent sub-pixels; The p-type charge generation layer is disconnected at the partition structure.
6. The display substrate according to claim 5, characterized in that, The orthographic projection of the plurality of light-emitting layers included in each sub-pixel onto the substrate is located within the orthographic projection of the p-type charge-generating layer included in that sub-pixel onto the substrate.
7. The display substrate according to claim 6, characterized in that, The orthographic projection pattern of the light-emitting layer on the substrate is the same as the orthographic projection pattern of the p-type charge-generating layer on the substrate.
8. The display substrate according to claim 7, characterized in that, The sub-pixel also includes: An electron blocking layer is located on the side of the light-emitting layer closest to the substrate; The orthographic projection pattern of the electron blocking layer on the substrate is the same as the orthographic projection pattern of the light-emitting layer adjacent to the electron blocking layer on the substrate.
9. The display substrate according to claim 5, characterized in that, The sub-pixel also includes: An n-type charge generation layer is located on the side of the p-type charge generation layer closer to the substrate; The n-type charge generation layer is disconnected at the partition structure.
10. The display substrate according to claim 5, characterized in that, The p-type charge generation layer includes a first part, a second part, and a third part. The orthographic projection of the first part on the substrate is located within the first sub-pixel, the orthographic projection of the second part on the substrate is located within the second sub-pixel, and the orthographic projection of the third part on the substrate is located within the third sub-pixel. The dimensions of the first part, the second part, and the third part in the thickness direction of the substrate are different.
11. The display substrate according to claim 10, characterized in that, The dimension of the first part in the thickness direction of the substrate is smaller than the dimension of the second part in the thickness direction of the substrate; the dimension of the second part in the thickness direction of the substrate is smaller than the dimension of the third part in the thickness direction of the substrate.
12. A display device, characterized in that, The display substrate includes any one of the claims 1-11 above.