Method for aligning, method for bonding, bonding apparatus, and computer-readable storage medium

Abstract

The application belongs to the technical field of semiconductor device bonding integration, and particularly discloses a location finding method, a bonding method, a bonding device and a computer readable storage medium. The location finding method first acquires theoretical coordinates of a plurality of alignment marks of each bonding site on a wafer, and calculates a geometric center coordinate as a theoretical center coordinate of the corresponding bonding site. After the wafer is actually fixed, coordinate transformation parameters are calculated according to the deviation between the actual mechanical coordinates and the corresponding theoretical coordinates, and the theoretical center coordinates are corrected to obtain calibrated center coordinates. The camera is controlled to be directly moved from an initial position to the calibrated center coordinates of the bonding site to be bonded, and then the camera is driven to shift in different directions according to the distribution relationship of the alignment marks relative to the calibrated center coordinates, and the location finding of the alignment marks is sequentially completed. The application simplifies the camera location finding process when the chip and the wafer are aligned, greatly reduces the image data processing amount under the premise of ensuring the alignment accuracy, and significantly improves the alignment efficiency and the overall bonding efficiency.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device bonding and integration technology, and in particular to a positioning method, bonding method, bonding device and computer-readable storage medium. Background Technology

[0002] Die-to-Wafer (D2W) bonding is a core process for wafer-level packaging and 3D integration. It involves precisely bonding pre-cut and tested individual dies to corresponding bonding sites on a wafer. For example, a single die with pre-defined alignment marks constitutes a bonding site, achieving electrical interconnection between the chip and the wafer. This technology significantly improves integration density and shortens interconnect paths, and is widely used in high-performance computing, artificial intelligence, and MEMS sensors.

[0003] Alignment is the core technology of D2W bonding. To achieve high-precision alignment, the field of view of the alignment camera typically needs to be set very small, generally less than 1 mm². Therefore, when using a coaxial camera for chip and carrier wafer alignment, the coaxial camera must first be coarsely moved to the vicinity of the bonding point, and then finely traversed and searched within that area to identify alignment marks on the bonding point, such as... Figure 1 As shown; after confirming the position of the bonding alignment mark, drive the chip to move so that the chip alignment mark matches the bonding alignment mark, thus completing the alignment.

[0004] Typically, there are four bonding sites on the wafer and four markers on the chip, distributed at the four corners. To ensure alignment accuracy, bonding a single chip requires four alignment marker recognitions. The process of the camera traversing and searching for the markers is cumbersome, and the recognition process requires processing a large amount of image data; while there are often hundreds of chips to be bonded on a single wafer, ultimately resulting in low overall bonding efficiency. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a positioning method, bonding method, bonding device and computer-readable storage medium. By simplifying the camera positioning process during chip and wafer alignment, the process of the camera traversing and searching for marker points is eliminated, ensuring alignment accuracy while reducing a large amount of image data processing, thereby significantly improving alignment efficiency and overall bonding efficiency.

[0006] To achieve this objective, the present invention adopts the following technical solution:

[0007] A positioning method, applied to a chip-wafer bonding device, includes:

[0008] Obtain the theoretical coordinates of multiple alignment marks for each bonding site on the wafer, and calculate the geometric center coordinates of these multiple alignment marks as the theoretical center coordinates of the bonding site.

[0009] After the wafer is actually fixed, the actual mechanical coordinates of the alignment marks of at least two bonding sites on the wafer are measured. Based on the deviation between the actual mechanical coordinates and the corresponding theoretical coordinates, coordinate transformation parameters are calculated. Based on the coordinate transformation parameters, the theoretical center coordinates are corrected to obtain the calibrated center coordinates.

[0010] Based on the calibrated center coordinates, the camera is driven to move directly from the initial position to the calibrated center coordinates of the bonding site to be bonded, wherein the calibrated center coordinates are located at the center of the area enclosed by the plurality of alignment marks.

[0011] Based on the distribution relationship of the multiple alignment marks relative to the calibrated center coordinates, the camera is driven to shift in different directions from the calibrated center coordinates to sequentially complete the positioning of each alignment mark.

[0012] Preferably, the plurality of alignment marks are four alignment marks distributed at the four corners of the bonding site;

[0013] Calculate the geometric center coordinates, including: calculating the geometric center coordinates of the quadrilateral formed by the four alignment marks.

[0014] Preferably, the plurality of alignment marks are two alignment marks that are diagonally distributed;

[0015] Calculate the coordinates of the geometric center, including: calculating the coordinates of the midpoint of the line connecting the two alignment marks.

[0016] Preferably, the calculation of coordinate transformation parameters includes:

[0017] Calculate the rotation angle and translation vector between the actual mechanical coordinates and the corresponding theoretical coordinates; or

[0018] Calculate the affine transformation matrix.

[0019] Preferably, the driving camera is offset from the calibrated center coordinates in different directions, including:

[0020] Based on the relative position of each alignment mark to the calibrated center coordinates, the offset vector corresponding to each alignment mark is determined, and the magnitudes of the offset vectors are equal.

[0021] The camera moves in a mirror-symmetric manner according to the offset vector to locate each alignment mark.

[0022] Preferably, determining the offset vector corresponding to each alignment mark includes:

[0023] Based on the theoretical coordinates of the multiple alignment marks, calculate the distance between each alignment mark and the coordinates of the geometric center;

[0024] The magnitude of the offset vector is determined based on the distance and the coordinate transformation parameters.

[0025] Preferably, obtaining the theoretical coordinates of the alignment mark includes:

[0026] Extract the design coordinates of each bonding site alignment mark from the wafer layout design data; or

[0027] Based on actual wafer measurement data, the coordinates of each bonding site alignment mark are obtained through statistical fitting.

[0028] Preferred options also include:

[0029] Batch calculation of the calibrated center coordinates of multiple bonding sites to be bonded on a wafer;

[0030] Based on the calibrated center coordinates of each bonding site, the optimal moving path of the camera is planned.

[0031] Following the optimal movement path, the camera is sequentially driven to move to the calibrated center coordinates of each bonding site.

[0032] A bonding method, comprising:

[0033] Using the positioning method described above, the camera is moved to the calibrated center coordinates of the bonding sites to be bonded on the wafer;

[0034] Keeping the camera at the calibrated center coordinates, move the chip so that the corresponding mark group of the chip is coarsely aligned with the multiple alignment marks of the bonding site;

[0035] The camera is driven to shift from the calibrated center coordinates to each alignment mark, the positional deviation between each alignment mark and the corresponding mark on the chip is obtained, and the chip pose is adjusted according to the positional deviation to make the chip mark and the bonding mark precisely aligned.

[0036] The driver chip is bonded to the wafer.

[0037] Preferably, the plurality of alignment marks are four alignment marks distributed at the four corners;

[0038] The driving camera is offset from the calibrated center coordinates to each alignment mark, including:

[0039] The camera is driven to shift from the calibrated center coordinates along the first diagonal direction, and is aligned with two alignment marks on the first diagonal in sequence. The chip rotation angle is adjusted based on the positional deviation of the two alignment marks.

[0040] While maintaining the chip's rotation angle, drive the camera to shift from the calibrated center coordinates along the second diagonal direction, align it with the two alignment marks on the second diagonal, and detect the positional deviation to verify the alignment accuracy.

[0041] Preferably, adjusting the chip pose based on the position deviation includes:

[0042] Based on the first positional deviation between the first alignment mark and the first mark on the chip, the chip is rotated so that the first alignment mark overlaps with the first mark.

[0043] Maintain the chip pose and detect the second positional deviation between the second alignment mark and the second mark on the chip;

[0044] If the second position deviation is within the preset threshold range, the alignment is confirmed to be complete;

[0045] If the second position deviation exceeds the preset threshold, the chip rotation angle is iteratively adjusted until alignment is completed or the maximum number of iterations is reached.

[0046] A bonding device, comprising:

[0047] A stage is used to hold a wafer in place.

[0048] Bonding head, used for picking up and bonding chips;

[0049] Camera, used for image acquisition;

[0050] Memory, used to store the theoretical coordinates of multiple alignment marks for each bonding site on the wafer;

[0051] A processor, communicatively connected to the memory, the camera, and the bonding head, is configured to:

[0052] Calculate the geometric center coordinates of multiple alignment marks on each bonding site as the theoretical center coordinates;

[0053] The actual mechanical coordinates of the alignment marks of at least two bonding sites are measured. The coordinate transformation parameters are calculated based on the deviation between the actual mechanical coordinates and the theoretical coordinates. The theoretical center coordinates are corrected based on the coordinate transformation parameters to obtain the calibrated center coordinates.

[0054] Drive the camera to move directly from its initial position to the calibrated center coordinates of the bonding site to be bonded;

[0055] Based on the distribution relationship of the multiple alignment marks relative to the calibrated center coordinates, the camera is driven to shift in different directions from the calibrated center coordinates to sequentially complete the positioning of each alignment mark;

[0056] The bonding head is controlled to complete the bonding of the chip and the wafer.

[0057] Preferably, the camera is a coaxially aligned camera, and its optical axis is parallel to or coincides with the pickup axis of the bonding head;

[0058] The bonding head includes a rotation mechanism and a Z-axis movement mechanism, which are used to adjust the rotation angle and height position of the chip, respectively.

[0059] The stage includes an XY-axis moving mechanism for adjusting the planar position of the wafer.

[0060] A computer-readable storage medium having a computer program stored thereon, characterized in that, when the computer program is executed by a processor, it implements the steps in the bit-finding method as described above.

[0061] The beneficial effects of this invention are:

[0062] This invention simplifies the traditional traversal search process, which requires more than ten movements for image acquisition, into a single long-distance movement superimposed with two short-distance offsets by pre-calculating the center coordinates and employing a one-step positioning strategy. This reduces the average search time per chip by 14 seconds (0.5 seconds of movement + 0.2 seconds of calculation; for a single corner point, it is calculated as 10 searches). Simultaneously, images are acquired only at a fixed position after the offset, significantly reducing the system load compared to the traditional method's 0.2 seconds of continuous image processing per frame. For bonding 100 chips on a single wafer, this can cumulatively save approximately 23 minutes. Furthermore, a rigid body transformation model based on rotation and translation establishes a precise mapping between theoretical and mechanical coordinates, achieving an alignment accuracy of ±0.1 μm, significantly improving production efficiency while maintaining high precision. Attached Figure Description

[0063] Figure 1 This is a schematic diagram of the existing technology of camera traversing and searching for marker points;

[0064] Figure 2 This is a schematic diagram of the camera recognizing marker points according to the present invention;

[0065] Figure 3 This is a schematic diagram of the alignment process of the present invention, wherein (a) indicates that the camera is aligned with the center coordinates of the bonding site and the chip center is aligned with the camera; (b) indicates that the camera performs alignment mark recognition; and (c) indicates that the camera performs another alignment mark recognition.

[0066] In the diagram: 1. Wafer; 2. Bonding site; 3. Alignment mark; 4. Camera window traversal search path; 5. Camera window; 6. Center coordinate point; 7. Chip; 8. Camera. Detailed Implementation

[0067] The technical solution of the present invention will be further illustrated below through specific embodiments. Those skilled in the art should understand that the embodiments described are merely illustrative of the present invention and should not be construed as limiting the invention in any way.

[0068] It should be understood that in the description of this invention, the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more.

[0069] It should be noted that, in the description of this invention, unless otherwise explicitly specified and limited, the terms "set," "connected," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0070] This invention provides a positioning method, bonding method, and bonding equipment applicable to semiconductor chip-wafer bonding processes. Addressing the inefficiency of existing technologies where the camera 8 needs to traverse and search for alignment marks 3, this invention calculates the geometric center coordinates of multiple alignment marks 3 at each bonding site using pre-stored wafer layout design data or measured data as theoretical center coordinates. After the wafer is fixed on the stage, the rotation and translation transformation relationship between the theoretical coordinate system and the mechanical coordinate system is established through measured calibration to obtain the calibrated center coordinates. The camera 8 is then driven to move directly from its initial position to these calibrated center coordinates, and a short-distance mirror offset is performed based on the distribution relationship of each alignment mark relative to the center coordinates to sequentially complete the positioning of each alignment mark 3.

[0071] As attached Figures 1-3 As shown, the traditional camera 8 searches for the alignment mark 3 by traversing the search trajectory 4 multiple times through the camera window. However, the present invention first goes to the center coordinate point 6, and then moves at a fixed distance in both directions to find the position in one step. This significantly reduces the amount of image data processing while ensuring alignment accuracy and improving the overall bonding efficiency.

[0072] The bonding device provided in this embodiment includes a frame, a stage, a bonding head, a camera 8, a memory, and a processor.

[0073] The frame provides structural support for the entire equipment, and a horizontal reference plane and vertical guide rails are installed on it.

[0074] The stage is mounted on the horizontal reference plane of the rack and is used to fix and support wafer 1. The stage includes an XY-axis moving mechanism, a vacuum adsorption device, and a rotary table. The XY-axis moving mechanism is used to adjust the position of wafer 1 in the horizontal plane. The vacuum adsorption device is located on the top surface of the stage and is used to firmly adsorb and fix wafer 1. The rotary table is used to achieve small angle adjustments of wafer 1 around the vertical axis.

[0075] The bonding head is mounted on a vertical guide rail of the rack and is used to pick up the chip 7 and perform the bonding operation. The bonding head includes a Z-axis moving mechanism, a rotating mechanism, a vacuum nozzle, and a force sensor. The Z-axis moving mechanism controls the lifting and lowering movement of the chip 7. The rotating mechanism adjusts the rotation angle of the chip 7 about the vertical axis. The vacuum nozzle picks up and releases the chip 7. The force sensor monitors the pressure during the bonding process in real time.

[0076] Camera 8 is a coaxially aligned camera, with its optical axis parallel or coincident with the pickup axis of the bonding head. Camera 8 includes a high-magnification optical lens, an image sensor, and an illumination source. The magnification of the optical lens is adjustable from 10× to 50×. The image sensor uses a CMOS or CCD sensor. The illumination source uses coaxial LED illumination.

[0077] The memory is used to store wafer layout design data, theoretical coordinates of each bonding bit 2 alignment mark 3, coordinate transformation parameters, and control programs, etc.

[0078] The processor is communicatively connected to the memory, camera 8, XY-axis moving mechanism and rotary table of the stage, and Z-axis moving mechanism and rotary mechanism of the bonding head. It is used to execute the control logic of the positioning method and bonding method and coordinate the action sequence of each component.

[0079] The positioning method provided by this invention includes the following steps: obtaining theoretical coordinates and calculating geometric center coordinates, coordinate system calibration, one-step camera positioning, and mirror offset positioning.

[0080] Obtaining theoretical coordinates and calculating geometric center coordinates: Before the bonding operation on wafer 1 begins, a database of theoretical coordinates for alignment marks 3 on each bonding site 2 is first established. There are two methods for obtaining theoretical coordinates:

[0081] The first method involves extracting the data from the wafer layout design data. The wafer layout design data is generated by integrated circuit design software and contains the layout information of all bonding sites 2 on wafer 1, as well as the design coordinates of alignment marks 3 on each bonding site 2. The processor reads the layout design data from memory and extracts the theoretical coordinates of the four alignment marks 3 distributed at the four corners of each bonding site 2, denoted as P1(x1,y1), P2(x2,y2), P3(x3,y3), and P4(x4,y4). The geometric center coordinates of the quadrilateral formed by these four alignment marks 3 are calculated as the theoretical center coordinates of the bonding site 2. The calculation formula is as follows:

[0082] C0=((x1+x2+x3+x4) / 4,(y1+y2+y3+y4) / 4)

[0083] The second method is based on statistical fitting of wafer measurement data. For wafer 1 that has completed the previous process, the actual position of the alignment mark 3 on each bonding site 2 is measured using high-precision measuring equipment, and the theoretical coordinates are obtained through statistical fitting. Specifically, the same bonding site 2 of multiple wafers 1 in the same batch is measured, and the average value of the measurement results is taken as the theoretical coordinate of the alignment mark 3 of that bonding site 2. Then, the theoretical center coordinates are calculated according to the above formula.

[0084] The theoretical center coordinates of each bonding bit 2 are stored in memory to create a coordinate dataset.

[0085] Coordinate system calibration: After wafer 1 is actually fixed on the stage, due to the deviation in the placement of wafer 1 and the inconsistency between the stage mechanical coordinate system and the layout design coordinate system, it is necessary to calibrate the theoretical coordinates and establish the rotation and translation transformation relationship between the two coordinate systems.

[0086] Actual mechanical coordinates were measured: The camera 8 was sequentially aligned with the alignment marks 3 on the two pre-selected bonding sites 2, and the actual coordinates of each alignment mark 3 in the mechanical coordinate system were recorded as Q1(u1,v1) and Q2(u2,v2). To improve calibration accuracy, the two selected bonding sites 2 should be located at diagonal positions on wafer 1.

[0087] Calculate coordinate transformation parameters: The processor calculates the coordinate transformation parameters based on the measured actual mechanical coordinates and the corresponding theoretical coordinates. This embodiment uses a rigid body transformation model, considering only the rotation angle θ and the translation vector (tx, ty). The transformation relationship is as follows:

[0088] u = xcosθ - ysinθ + tx;

[0089] v = xsinθ + ycosθ + ty;

[0090] By solving the above system of equations, we obtain the rotation angle θ and the translation vector (tx, ty).

[0091] Correcting the theoretical center coordinates: Using the obtained rotation angle θ and translation vector (tx, ty), the theoretical center coordinates of each bond site 2 are corrected to obtain the calibrated center coordinates:

[0092] C = R × C0 + T

[0093] Where R is the rotation matrix and T is the translation vector.

[0094] The calibrated center coordinates of all bond bits 2 are stored in memory for subsequent camera positioning control.

[0095] Camera one-step positioning: At the start of the bonding operation, the processor controls the XY-axis movement mechanism of the stage to move according to the calibrated center coordinates of the current bonding site 2, so that the camera 8 moves directly from the initial position to the calibrated center coordinates. In this step, the camera 8 does not perform any image acquisition or processing, but only performs rapid positioning movement.

[0096] At this point, the center of the field of view of camera 8 is located at the center of the area enclosed by the four alignment marks 3. Since the camera window 5 is usually smaller than the distribution range of the four alignment marks 3, not all four alignment marks 3 are located within the field of view, but camera 8 is in a position where it is closest to and equal to each alignment mark 3.

[0097] Mirror offset positioning: After camera 8 reaches the calibrated center coordinates, the processor calculates the offset vector corresponding to each alignment mark 3 based on the distribution relationship of each alignment mark 3 relative to the center coordinates. For the four alignment marks 3 distributed at four corners, they are divided into two groups of diagonal marks.

[0098] Calculate the offset vectors: Based on the theoretical coordinates, calculate the offset vectors between the first alignment mark and the center coordinates, and the offset vectors between the third alignment mark and the center coordinates. Since the two marks are diagonally distributed, the two offset vectors are equal in magnitude and opposite in direction. Similarly, the offset vectors corresponding to the second and fourth alignment marks also satisfy the relationship of equal in magnitude and opposite in direction.

[0099] Considering the effects of coordinate transformation, the offset vector in the actual mechanical coordinate system is the rotated vector. The magnitude of the offset vector is equal to the theoretical distance, and its direction is adjusted according to the rotation angle θ.

[0100] Mirror-symmetric positioning: The processor controls the stage to move camera 8 from the calibrated center coordinates along the first offset vector to the first alignment mark for image acquisition and recognition. After positioning at the first alignment mark, camera 8 returns to the center coordinates and then moves along the reverse offset vector to the third alignment mark. Similarly, positioning at the second set of diagonal marks is completed.

[0101] Each offset movement involves a fixed distance, equal to the magnitude of the offset vector. Because the offset distance is short and fixed, camera 8 can move at a high speed while maintaining positioning accuracy.

[0102] Through the aforementioned mirror-symmetric movement, camera 8 sequentially completes the positioning of the four alignment marks 3.

[0103] Based on the above-mentioned positioning method, the bonding method provided by the present invention includes four stages: wafer positioning, chip coarse positioning, alignment mark alignment, and bonding execution.

[0104] Wafer alignment: Using the alignment method described above, the processor controls the stage to move the camera 8 to the calibrated center coordinates of the bonding site 2 to be bonded on the wafer 1. At this time, the field of view center of the camera 8 is located at the geometric center of the four alignment marks 3 of the bonding site 2.

[0105] Chip coarse positioning: Keep camera 8 stationary at the calibrated center coordinates. The bonding head picks up the chip 7 to be bonded from the wafer tray or chip supply device through a vacuum nozzle. The processor controls the Z-axis movement mechanism and rotation mechanism of the bonding head to move the chip 7 above the bonding position 2, so that the corresponding mark group of the chip 7 is roughly aligned with the four alignment marks 3 of the bonding position 2 in the vertical direction.

[0106] The accuracy requirement for coarse positioning is that the deviation between the chip mark and the bonding mark is within the range of the camera window 5, which can be achieved by the relationship between the chip central axis and the calibrated center coordinates.

[0107] Alignment Mark Alignment: First Diagonal Alignment: The processor controls the stage to move, causing camera 8 to move from the calibrated center coordinates along the first offset vector to the first alignment mark. Camera 8 acquires an image and identifies the positional deviation between the first alignment mark of the bonding position and the first mark of chip 7. Based on this positional deviation, the processor controls the rotation mechanism of the bonding head to rotate chip 7, bringing the first mark of chip 7 closer to the first alignment mark of the bonding position. The above image acquisition and rotation adjustment process is repeated until the two marks overlap or the deviation is less than a preset threshold, and the rotation angle of chip 7 at this time is recorded.

[0108] Keeping the rotation angle of chip 7 fixed, camera 8 returns to the calibrated center coordinates and then moves along the reverse offset vector to the third alignment mark. An image is acquired, and the positional deviation between the third alignment mark of the bonding site and the third mark on chip 7 is detected. If the deviation is within a preset accuracy threshold, the alignment of the first diagonal is confirmed to be complete; if the deviation exceeds the threshold, the system returns to the first alignment mark, readjusts the rotation angle of chip 7, and iterates the above process.

[0109] Iteration Control and Anomaly Handling: Set the maximum number of iterations. If the accuracy requirement is still not met even after exceeding the maximum number of iterations, the processor triggers an anomaly alarm, prompting the operator to check whether chip 7 or bonding bit 2 has a defect, and marking bonding bit 2 as an abnormal bit, skipping this position and continuing to the next bonding bit.

[0110] In a preferred embodiment, a second diagonal verification is also included: after the first diagonal alignment is completed, the camera 8 moves from the calibrated center coordinates along the second offset vector to the second alignment mark, and then moves along the reverse offset vector to the fourth alignment mark, detecting the positional deviation between the two marks on the second diagonal. This step is mainly used to verify the alignment accuracy. If the deviation is within the allowable range, the alignment of the entire bonding position 2 is confirmed to be complete; if the deviation exceeds the range, the position of the chip 7 can be fine-tuned or re-alignment can be triggered.

[0111] Bonding Execution: After alignment, camera 8 moves out of the bonding area. The processor controls the Z-axis movement mechanism of the bonding head to descend, bringing chip 7 into contact with wafer 1. Bonding pressure is monitored by a force sensor; when the pressure reaches a preset value, it is maintained for a certain period to complete the bonding. After bonding, the bonding head rises, the vacuum nozzle releases the vacuum, and the bonding head moves to the next chip pickup position to begin the next bonding cycle.

[0112] As a simplified scheme for the four-corner distribution marking, some bonding processes can use two alignment marks 3 diagonally distributed. In this case, the coordinates of the midpoint of the line connecting the two alignment marks 3 are calculated as the theoretical center coordinates. The coordinate calibration and camera positioning steps are the same as the four-corner distribution scheme, but only one mirror-symmetric movement is needed to complete the positioning of the two marks.

[0113] For a single wafer 1 with hundreds of bonding sites 2 to be bonded, the processor can batch calculate the calibrated center coordinates of all bonding sites 2 and use algorithms such as the nearest neighbor algorithm to plan the optimal moving path of the camera 8, so that the total moving distance of the camera 8 from the first bonding site to the last bonding site is minimized.

[0114] Compared with the prior art, the location-finding method, bonding method, and bonding device provided by the present invention have the following technical effects:

[0115] This invention simplifies the traditional traversal search process, which requires more than ten movements for image acquisition, into a single long-distance movement superimposed with two short-distance offsets by pre-calculating the center coordinates and employing a one-step positioning strategy. This reduces the average search time per chip by 14 seconds (0.5 seconds of movement + 0.2 seconds of calculation; for a single corner point, it is calculated as 10 searches). Simultaneously, images are acquired only at a fixed position after the offset, significantly reducing the system load compared to the traditional method's continuous image processing of 0.2 seconds per frame. For bonding 100 chips on a single wafer, this can cumulatively save approximately 23 minutes. Furthermore, a rigid body transformation model based on rotation and translation establishes a precise mapping between theoretical and mechanical coordinates, achieving an alignment accuracy of ±0.1 μm, significantly improving production efficiency while maintaining high precision.

[0116] It should be noted that the present invention is illustrated through the above embodiments, but the present invention is not limited to the above process steps, that is, it does not mean that the present invention must rely on the above process steps to be implemented. Those skilled in the art should understand that any improvements to the present invention, equivalent substitutions of the raw materials used in the present invention, additions of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

Claims

1. A positioning method applied to chip-wafer bonding equipment, characterized in that, include: Obtain the theoretical coordinates of multiple alignment marks for each bonding site on the wafer, and calculate the geometric center coordinates of these multiple alignment marks as the theoretical center coordinates of the bonding site. After the wafer is actually fixed, the actual mechanical coordinates of the alignment marks of at least two bonding sites on the wafer are measured. Based on the deviation between the actual mechanical coordinates and the corresponding theoretical coordinates, coordinate transformation parameters are calculated. Based on the coordinate transformation parameters, the theoretical center coordinates are corrected to obtain the calibrated center coordinates. Based on the calibrated center coordinates, the camera is driven to move directly from the initial position to the calibrated center coordinates of the bonding site to be bonded, wherein the calibrated center coordinates are located at the center of the area enclosed by the plurality of alignment marks. Based on the distribution relationship of the multiple alignment marks relative to the calibrated center coordinates, the camera is driven to shift in different directions from the calibrated center coordinates to sequentially complete the positioning of each alignment mark.

2. The method according to claim 1, characterized in that, The multiple alignment marks are four alignment marks distributed at the four corners of the bonding site; Calculate the geometric center coordinates, including: calculating the geometric center coordinates of the quadrilateral formed by the four alignment marks.

3. The method according to claim 1, characterized in that, The plurality of alignment marks are two alignment marks that are diagonally distributed; Calculate the coordinates of the geometric center, including: calculating the coordinates of the midpoint of the line connecting the two alignment marks.

4. The method according to claim 1, characterized in that, The calculation of coordinate transformation parameters includes: Calculate the rotation angle and translation vector between the actual mechanical coordinates and the corresponding theoretical coordinates; or Calculate the affine transformation matrix.

5. The method according to claim 1, characterized in that, The driving camera is offset from the calibrated center coordinates in different directions, including: Based on the relative position of each alignment mark to the calibrated center coordinates, the offset vector corresponding to each alignment mark is determined, and the magnitudes of the offset vectors are equal. The camera moves in a mirror-symmetric manner according to the offset vector to locate each alignment mark.

6. The method according to claim 5, characterized in that, Determining the offset vector corresponding to each alignment mark includes: Based on the theoretical coordinates of the multiple alignment marks, calculate the distance between each alignment mark and the coordinates of the geometric center; The magnitude of the offset vector is determined based on the distance and the coordinate transformation parameters.

7. The method according to claim 1, characterized in that, The process of obtaining the theoretical coordinates of the alignment mark includes: Extract the design coordinates of each bonding site alignment mark from the wafer layout design data; or Based on actual wafer measurement data, the coordinates of each bonding site alignment mark are obtained through statistical fitting.

8. The method according to claim 1, characterized in that, Also includes: Batch calculation of the calibrated center coordinates of multiple bonding sites to be bonded on a wafer; Based on the calibrated center coordinates of each bonding site, the optimal moving path of the camera is planned. Following the optimal movement path, the camera is sequentially driven to move to the calibrated center coordinates of each bonding site.

9. A bonding method, characterized in that, include: Using the positioning method as described in any one of claims 1-8, the camera is moved to the calibrated center coordinates of the bonding site to be bonded on the wafer; Keeping the camera at the calibrated center coordinates, move the chip so that the corresponding mark group of the chip is coarsely aligned with the multiple alignment marks of the bonding site; The camera is driven to shift from the calibrated center coordinates to each alignment mark, the positional deviation between each alignment mark and the corresponding mark on the chip is obtained, and the chip pose is adjusted according to the positional deviation to make the chip mark and the bonding mark precisely aligned. The driver chip is bonded to the wafer.

10. The method according to claim 9, characterized in that, The plurality of alignment marks are four alignment marks distributed at four corners; The driving camera is offset from the calibrated center coordinates to each alignment mark, including: The camera is driven to shift from the calibrated center coordinates along the first diagonal direction, and is aligned with two alignment marks on the first diagonal in sequence. The chip rotation angle is adjusted based on the positional deviation of the two alignment marks. While maintaining the chip's rotation angle, drive the camera to shift from the calibrated center coordinates along the second diagonal direction, align it with the two alignment marks on the second diagonal, and detect the positional deviation to verify the alignment accuracy.

11. The method according to claim 9, characterized in that, The step of adjusting the chip pose based on the position deviation includes: Based on the first positional deviation between the first alignment mark and the first mark on the chip, the chip is rotated so that the first alignment mark overlaps with the first mark. Maintain the chip pose and detect the second positional deviation between the second alignment mark and the second mark on the chip; If the second position deviation is within the preset threshold range, the alignment is confirmed to be complete; If the second position deviation exceeds the preset threshold, the chip rotation angle is iteratively adjusted until alignment is completed or the maximum number of iterations is reached.

12. A bonding apparatus, characterized in that, include: A stage is used to hold a wafer in place. Bonding head, used for picking up and bonding chips; Camera, used for image acquisition; Memory, used to store the theoretical coordinates of multiple alignment marks for each bonding site on the wafer; A processor, communicatively connected to the memory, the camera, and the bonding head, is configured to: Calculate the geometric center coordinates of multiple alignment marks on each bonding site as the theoretical center coordinates; The actual mechanical coordinates of the alignment marks of at least two bonding sites are measured. The coordinate transformation parameters are calculated based on the deviation between the actual mechanical coordinates and the theoretical coordinates. The theoretical center coordinates are corrected based on the coordinate transformation parameters to obtain the calibrated center coordinates. Drive the camera to move directly from its initial position to the calibrated center coordinates of the bonding site to be bonded; Based on the distribution relationship of the multiple alignment marks relative to the calibrated center coordinates, the camera is driven to shift in different directions from the calibrated center coordinates to sequentially complete the positioning of each alignment mark; The bonding head is controlled to complete the bonding of the chip and the wafer.

13. The device according to claim 12, characterized in that, The camera is a coaxially aligned camera, and its optical axis is parallel to or coincides with the pickup axis of the bonding head. The bonding head includes a rotation mechanism and a Z-axis movement mechanism, which are used to adjust the rotation angle and height position of the chip, respectively. The stage includes an XY-axis moving mechanism for adjusting the planar position of the wafer.

14. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps in the bit-finding method as described in any one of claims 1-8.

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