Controlling access to memory blocks

Abstract

An issuer device, a conversion device, and an access device for providing a security mechanism to access a memory are provided. When the issuer requests address translation of the memory block, the translation device provides the translated address and signature. The signature includes an address and a random number, and is signed using a private key unknown to the issuer. When an issuer accesses the translated address, the issuer provides a signature. And updating the random number every time the authority of the memory block changes. Thus, when an access request is made, the validity of the signature may be checked. If the random number is old, the access request is disabled. The issuer cannot simply modify the signature because it cannot access the private key. Thus, the memory remains secure.

Description

[0001] This technology relates to data processing and can be associated with the field of memory block protection.

[0002] The goal is to control access to memory blocks so that only the execution environment that owns them (e.g., device, processor, virtual machine, application, process, thread, etc.) can access them.

[0003] From a first exemplary configuration, a conversion apparatus is provided, comprising: a conversion request receiving circuit configured to receive from a publisher device a conversion request for an address for accessing a memory block; a permission checking circuit configured to check permissions associated with the memory block and generate a determination of whether the publisher device is permitted to access the memory block; a random number storage circuit configured to store a random number associated with the memory block; and a conversion response circuit configured to transmit a response to the conversion request in response to the determination that the publisher device is permitted to access the memory block, the response having one of the addresses for accessing the memory block and a signature corresponding to the current value of the random number and the one of the addresses, wherein the random number is changed in response to the changed permissions of the memory block.

[0004] From a second exemplary configuration, a data processing method is provided, the data processing method comprising: receiving from a publisher device a conversion request for an address for accessing a memory block; checking permissions associated with the memory block; generating a determination whether the publisher device is permitted to access the memory block; storing a random number associated with the memory block; and, in response to the determination that the publisher device is permitted to access the memory block, transmitting a response to the conversion request, the response having an address among the addresses for accessing the memory block and a signature corresponding to the current value of the random number and the address among the addresses, wherein the random number is changed in response to the changed permissions of the memory block.

[0005] From a third exemplary configuration, a computer program is provided for controlling a host data processing device to provide an instruction execution environment. The computer program includes: conversion request receiving program logic configured to receive from a publisher a conversion request for an address used to access a general data structure; permission checking program logic configured to check permissions associated with the memory block and generate a determination of whether the publisher is permitted to access the general data structure; a random number data structure configured to store random numbers associated with the general data structure; and conversion response program logic configured to transmit a response to the conversion request in response to the determination that the publisher is permitted to access the general data structure. The response has an address from the address used to access the general data structure and a signature corresponding to the current value of the random number and the address from the address, wherein the random number is changed in response to the changed permissions of the general data structure.

[0006] From a fourth exemplary configuration, an access device is provided, comprising: an access request receiving circuit configured to receive an access request for accessing a memory block from an issuer device; a signature obtaining circuit configured to obtain a signature for the access request; a random number storage circuit configured to store a random number associated with the memory block; a checking circuit configured to perform a check on whether the current value of the random number matches a value used to generate the signature; and an granting circuit configured to grant access to the memory block based on the check, wherein the random number is changed in response to a modified permission of the memory block.

[0007] From a fifth exemplary configuration, a data processing method is provided, the data processing method comprising: receiving an access request for accessing a memory block from a publisher device; obtaining a signature for the access request; storing a random number associated with the memory block; performing a check on whether the current value of the random number matches a value used to generate the signature; and granting access to the memory block based on the check, wherein the random number is changed in response to permissions of the memory block being changed.

[0008] From a sixth exemplary configuration, a computer program is provided for controlling a host data processing device to provide an instruction execution environment. The computer program includes: access request receiving program logic configured to receive an access request from a publisher to access a generic data structure; signature obtaining program logic configured to obtain a signature for the access request; a random number data structure configured to store random numbers associated with the generic data structure; checking program logic configured to perform a check on whether the current value of the random number matches a value used to generate the signature; and granting program logic configured to grant access to the generic data structure based on the check, wherein the random number is changed in response to permissions of the modified generic data structure.

[0009] From the seventh exemplary configuration, a publisher apparatus is provided, the publisher apparatus comprising: a storage circuit configured to store a signature corresponding to a memory block in association with the memory block; and a request circuit configured to issue a memory access request to an access device, wherein the memory access request is for accessing the memory block, and the memory access request is generated using the signature; the signature has been generated using a private key and a random number specific to the memory block; and the random number is changed in response to the permissions of the memory block being changed.

[0010] From the eighth exemplary configuration, a data processing method is provided, the data processing method comprising: storing a signature corresponding to a memory block in association with the memory block; and issuing a memory access request to an access device, wherein the memory access request is for accessing the memory block and the memory access request is generated using the signature; the signature has been generated using a private key and a random number specific to the memory block; and the random number is changed in response to the permissions of the memory block being changed.

[0011] From the ninth exemplary configuration, a computer program is provided for controlling a host data processing device to provide an instruction execution environment. The computer program includes: a signature data structure configured to store a signature corresponding to a general data structure in association with the general data structure; and request program logic configured to issue a memory access request to an accessor, wherein the memory access request is for accessing the general data structure, and the memory access request is generated using the signature; the signature has been generated using a private key and a random number specific to the memory block; and the random number is changed in response to the permissions of the changed memory block.

[0012] From the tenth exemplary configuration, an apparatus is provided, the apparatus comprising: a signature obtaining circuit configured to obtain a first payload and a second payload; an inspection circuit configured to generate a message authentication code from the first payload and the second payload; and a packet generating circuit configured to generate a packet including the first payload and the message authentication code, while omitting the second payload.

[0013] From the eleventh exemplary configuration, a data processing method is provided, which includes: obtaining a first payload and a second payload; generating a message authentication code from the first payload and the second payload; and generating a group including the first payload and the message authentication code, while omitting the second payload.

[0014] From the twelfth exemplary configuration, a computer program is provided for controlling a host data processing device to provide an instruction execution environment. The computer program includes: obtaining program logic configured to obtain a first payload and a second payload; first generating program logic configured to generate a message authentication code from the first payload and the second payload; and second generating program logic configured to generate a packet including the first payload and the message authentication code, while omitting the second payload.

[0015] From the thirteenth exemplary configuration, an apparatus is provided, the apparatus comprising: a packet acquisition circuit configured to receive a packet including a first payload and a message authentication code; a signature acquisition circuit configured to acquire a second payload of the packet; and an inspection circuit configured to inspect whether the message authentication code was generated using the first payload and the second payload, wherein the second payload is omitted from the packet.

[0016] From the fourteenth exemplary configuration, a data processing method is provided, the data processing method comprising: receiving a packet including a first payload and a message authentication code; obtaining a second payload of the packet; and checking that the message authentication code was generated using the first payload and the second payload, wherein the second payload is omitted from the packet.

[0017] From the fifteenth exemplary configuration, a computer program is provided for controlling a host data processing device to provide an instruction execution environment. The computer program includes: packet acquisition program logic configured to receive a packet data structure including a first payload and a message authentication code; signature acquisition program logic configured to obtain a second payload of the packet data structure; and checking program logic configured to check whether the message authentication code was generated using the first payload and the second payload, wherein the second payload is omitted from the packet.

[0018] The invention will be further described by way of example only, with reference to embodiments illustrated in the accompanying drawings, wherein:

[0019] Figure 1 The system is illustrated with some examples;

[0020] Figure 2 This illustrates exemplary behavior of the process of changing random numbers;

[0021] Figure 3 The process that allows a signature to be implicitly included in a memory access request is illustrated;

[0022] Figure 4 Examples are given of how such memory access request packets can be received and how signatures can be implicitly obtained;

[0023] Figure 5A , Figure 5B and Figure 5C A series of flowcharts illustrating methods for data processing based on some examples are shown;

[0024] Figure 6A and Figure 6B The process of data processing based on some examples is illustrated; and

[0025] Figure 7A , Figure 7B , Figure 7C , Figure 7D and Figure 7E Examples of available simulator implementations are shown.

[0026] Before discussing the implementation scheme with reference to the accompanying drawings, the following description of the implementation scheme and its associated advantages is provided.

[0027] According to an exemplary configuration, a conversion apparatus is provided, comprising: a conversion request receiving circuit configured to receive from a publisher device a conversion request for an address for accessing a memory block; a permission checking circuit configured to check permissions associated with the memory block and generate a determination of whether the publisher device is permitted to access the memory block; a random number storage circuit configured to store a random number associated with the memory block; and a conversion response circuit configured to transmit a response to the conversion request in response to the determination that the publisher device is permitted to access the memory block, the response having one of the addresses for accessing the memory block and a signature corresponding to the current value of the random number and the one of the addresses, wherein the random number is changed in response to the changed permissions of the memory block.

[0028] A translation device can be part of a PCIe host device and can be responsible for translating memory addresses—for example, from a first domain to a second domain, such as from a virtual address to a physical address or an intermediate physical address. Such address translation preempts memory access requests. Upon receiving a translation request, a permissions check circuit then determines whether the requester has permission to access the memory block involved in the provided address. A response to the translation request can then be provided, containing the translated address (e.g., a physical address). The translated address is also provided in the form of a signature (signature), which is generated using a private key and a random number (a one-time-use number). The random number is specific to the memory block in question and is updated each time the permissions of the memory block change. Because the signature is generated using a private key, it cannot be copied by unauthorized devices. Furthermore, because the signature contains a random number, the value of the random number at the time the translation was given can be determined. If the random number in the signature matches the current random number, the address translation (also in the signature) is valid. Otherwise, the translated address is old—the permissions have changed—and is no longer valid (the requester may no longer be able to access the memory block). In this way, address translation can be coupled with a 'self-destruct' mechanism that invalidates the translation (e.g., when permissions change). By requiring accessors / issuers to prove they have a valid signature of the address, the use of the address can be controlled. The granularity of permissions depends on the underlying system. For example, permissions can be granted based on the underlying application. In other examples, permissions can be granted based on virtual machine identifiers, machine identifiers, or even identifiers used to identify a set of physical devices.

[0029] In some examples, a memory block is a page of memory. Each random number can be provided on a per-page basis, thus allowing control over (on a per-page basis) which execution environment (application, device, virtual machine, processor, physical device, etc.) is allowed to access the memory block.

[0030] In some examples, the random number is generated in the form of a counter that is incremented in response to changes in the permissions of the memory block. For example, the counter might increment each time the permissions of the memory block are changed. This should prevent the same random number from being used twice until the counter is reset (e.g., due to an overflow). In some other implementations, the random number can be randomly assigned each time the random number is changed. This eliminates the need for an adder circuit but could lead to the random number being used twice. One way to prevent this is to increase the number of bits used to generate the random number.

[0031] In some examples, the permissions of the altered memory block that cause the random number to be changed are the ownership of the altered memory block. Therefore, the permissions in question can be ownership of the memory block, where ownership has full permissions to read and / or write to the memory block as needed.

[0032] In some examples, the signature is generated by performing a first one-way hash on a random number and one of the addresses. A hash function can be thought of as a function that takes an input in an input domain and produces an output in an output domain, where the output domain is the same as or smaller than the input domain. In a one-way hash function, the process cannot be reversed to determine the input from the output. For example, a hash function that reverses the input to produce the output is not a one-way hash because the process can be reversed. A one-way hash is performed on a combination of a random number and one of the addresses (e.g., a virtual address or a physical address). In some examples, a one-way hash is performed on a combination of a random number and a physical address. For example, this combination can be achieved by connecting two components.

[0033] In some examples, the first one-way hash is encrypted. In encrypted hashes, generating a valid input that produces the same output is computationally intractable without at least some of the parameters used to generate the result. That is, given the output from the hash function, without, for example, the private key used in the hash function, it is essentially impossible to determine what the input is. Using the private key, reversing the generation can be trivial.

[0034] In some examples, the translation response circuitry is configured to respond to multiple translation requests for addresses from multiple publisher devices by performing multiple checks on the permissions of multiple publisher devices and transmitting responses based on which publisher device is allowed to access the memory block. Therefore, the translation device can handle multiple publisher devices.

[0035] According to another exemplary configuration, an access device is provided, comprising: an access request receiving circuit configured to receive an access request for accessing a memory block from an issuer device; a signature obtaining circuit configured to obtain a signature for the access request; a random number storage circuit configured to store a random number associated with the memory block; a checking circuit configured to perform a check on whether the current value of the random number matches a value used to generate the signature; and an granting circuit configured to grant access to the memory block based on the check, wherein the random number is changed in response to a modified permission of the memory block.

[0036] The access device is responsible for receiving access requests after the address translation discussed earlier has occurred, and may form part of a larger host device together with the translation device. The issuer device issues its access request for a memory block, and the signature acquisition circuitry obtains a signature used to generate the access request. As illustrated below, there are several ways to achieve this, but importantly, the signature does not need to be in the access request itself (although it may be). The access device includes random number storage circuitry that contains random numbers associated with the memory block. This may be shared with the translation device (or other devices) or may be dedicated. The current value of the random number used by the checking circuitry to determine the memory block (e.g., a random number stored in the random number storage circuitry) is then checked against the value used to generate the obtained signature. If so, the granting circuitry grants the requested access (e.g., returning data in the case of a read, and storing data in the case of a write). When the permissions of the memory block are changed, the random number is altered, and thus the access request indicates the state of permissions when an address translation for the memory block is provided.

[0037] In some examples, the access device includes: encryption circuitry configured to encrypt data in the access request using a random number to produce encrypted data, and to write the encrypted data to the memory block according to the check. Besides using random numbers to control access to the memory block by requiring a signature (generated using random numbers) for access, the random number can also be used as a key or adjustment for encrypting data within the memory block. Therefore, when permissions to the memory block change, the data is automatically invalidated (e.g., becomes unreadable) because the key has changed. When the random number is randomized, encryption is improved, making it impossible to recover an older version of the key. Because the random number is used for the key (either as the key itself or as an adjustment to the key), and this key is not provided to the issuer in unencrypted form, it is impossible for the issuer or another device to directly access the data stored in the memory block. Due to encryption, the data will be incomprehensible (and any data write will also result in unreadable data).

[0038] In some examples, the access device includes a decryption circuit configured to decrypt data retrieved from the memory block using the random number to produce decrypted data according to the check. Similar to the encryption circuit, the random number can be used to decrypt data retrieved from memory in response to a write memory access request. If the data is encrypted using the same random number, the returned data is understandable; otherwise, it is not, and the request returns incomprehensible data. This can be prevented by the issuer device following up on invalid requests, as will be discussed below regarding the issuer device. It should be noted that the decryption circuit and the encryption circuit can be the same component, or they can share components to reduce circuit size.

[0039] In some examples, the access request includes the address and signature of the memory block; and the signature acquisition circuitry is configured to obtain the signature from the access request. Another method is to obtain the signature by reading it from the access request itself. That is, the access request contains a signature, and the access device reads that signature to verify its validity. While this method is secure, it does require sending the signature with every memory access request, which increases overhead and bandwidth consumption.

[0040] In some examples, the signature is generated by performing a first one-way hash using a private key on the address of the memory block and a random number. As explained earlier, a one-way hash is a hash function in which the process cannot be reversed to determine the input from the output. Note that in some examples, the access device itself does not generate the signature; instead, the signature is provided as part of the access request itself.

[0041] In some examples, the access device includes a storage circuit configured to store a private key. The storage circuit need not be part of the access device itself, nor need it be dedicated to the access device. In some implementations, the access device is shared with another device, or may be shared among multiple devices.

[0042] In some examples, the one-way hash is encrypted. As explained above, an encrypted hash function makes it computationally difficult to generate a valid input that produces the same output without at least some parameters used to generate the output. That is, in the current example, it is impossible to determine an input that will produce the same output without a private key and / or a random number.

[0043] In some examples, the signature acquisition circuitry is configured to implicitly obtain the signature from the access request. It is not necessary to include the signature in the access request to verify (relatively definitively) that the issuer possesses the signature. In these examples, the access mechanism can imply that the issuer has the signature for the access request without transmitting it as part of the access request. This allows for security to be provided without significantly increasing bandwidth consumption.

[0044] In some examples, the access request received by the access request receiving circuit includes the address of the memory block and a message authentication code, omitting the signature; the message authentication code is generated by performing a second one-way hash on a variant of the access request that includes the address of the memory block and the signature. The message authentication code is obtained by performing a second hash function (different from the first hash function) on the content of the (typical) message to be transmitted. By restoring the second hash function on the content, it can be checked whether the content has been altered (e.g., due to a transmission error during transmission). In these examples, the MAC can be used to imply ownership of the signature by the issuer without actually sending the signature.

[0045] In some examples, the checking circuitry is configured to perform the check by generating a test signature from the address of the memory block and the random number, and by testing whether the message authentication code corresponds to the result of performing the second one-way hash on the address of the memory block and the test signature. If a signature exists, a MAC is generated at the issuer's device, and then the signature is removed before transmission. By regenerating the signature at the access device, and testing that the MAC in the packet is valid when the regenerated MAC is inserted, it can be determined whether the MAC was generated when the signature existed at the issuer. Without a signature, it is generally impossible to generate a MAC corresponding to content including a signature. Therefore, if the MAC is correct (using the signature generated at the access device), it suggests that the issuer has the same signature. If the signature has been changed, the MAC will be incorrect.

[0046] In some examples, the access device includes a cache circuit configured to cache the result. Instead of actually regenerating the signature every time an access request is received (which could be time-consuming), the signature is cached. This can be done the first time any access request is received, where no corresponding signature exists, or it can be cached when the signature is generated by the conversion device—making the signature available to the access device.

[0047] In some examples, memory blocks are pages of memory. Therefore, permissions can be controlled on a page-by-page basis.

[0048] In some examples, the random number is generated in the form of a counter that is incremented in response to changes in the permissions of the memory block. For example, the counter might increment each time the permissions of the memory block are changed. This should prevent the same random number from being used twice until the counter is reset (e.g., due to an overflow). In some other implementations, the random number can be randomly assigned each time the random number is changed. This eliminates the need for an adder circuit but could lead to the random number being used twice. One way to prevent this is to increase the number of bits used to generate the random number.

[0049] In some examples, the permissions of the altered memory block that cause the random number to be changed are the ownership of the altered memory block. Therefore, the permissions in question can be ownership of the memory block, where ownership has full permissions to read and / or write to the memory block as needed.

[0050] In some examples, there exists a device that includes one of the conversion devices described above and one of the access devices described above. These can form, for example, a host device. Circuits performing similar functions can be shared rather than copied. For example, it is not necessary to provide two random number storage circuits.

[0051] According to another exemplary configuration, a publisher apparatus is provided, the publisher apparatus comprising: a storage circuit configured to store a signature corresponding to a memory block in association with the memory block; and a request circuit configured to issue a memory access request to an access device, wherein the memory access request is for accessing the memory block, and the memory access request is generated using the signature; the signature has been generated using a private key and a random number specific to the memory block; and the random number is changed in response to permissions of the memory block being modified.

[0052] The issuer device is responsible for issuing memory access requests throughout the system. The request circuitry is responsible for issuing memory access requests (e.g., read or write requests) for memory blocks. In these examples, the issuer device has an access address (e.g., a physical address) and a signature used for that access address. This can be obtained using an address translation request (discussed below) or otherwise. In any case, when a request is made, the access request is generated using (but not necessarily including) a signature. Therefore, it can be determined (or at least inferred) that the issuer device has a signature. If that signature matches a current signature, the access request remains valid. The signature is generated using a private key not available to the issuer, along with a random number (e.g., generated by a device other than the issuer). The random number is used to enforce presentability and changes whenever the permissions of the memory block change. Therefore, when permissions change, the signature held by the issuer will no longer be valid. Because the signature is generated using a private key not available to the issuer, the issuer cannot simply recreate the signature using a new random number (and in fact, the value of the random number may be unavailable to the issuer under any circumstances). In practice, issuers are encouraged to delete old signatures as part of receiving invalid requests. In other words, when permissions to a memory block change, an invalidation request associated with at least one of the addresses used to access the memory block will be sent to the issuer device. In response to the invalidation request, the issuer device should delete any associated cached translations. However, the issuer device should also delete any existing signatures stored in association with the translations. In the future, if the accessing device wishes to re-access the memory block, it will obtain a new signature (which changed due to the permission change) and use it in memory access requests, provided that access to the memory block is still permitted.

[0053] In some examples, the request circuitry is configured to use the signature to generate the memory access request by including the signature in the request. As previously explained, one way to use a signature in a memory access request is by including it in the request, which is then extracted by the access device.

[0054] In some examples, the request circuitry is configured to generate the memory access request using the signature by generating a message authentication code based on the memory access request including the signature; and the request circuitry is configured to transmit the memory access request including the message authentication code and omitting the signature. As previously explained, an alternative to including a signature within the memory access request is to generate a MAC code for the packet as if a signature were present, but omit the signature from the packet (e.g., when transmitting the packet to the access device). If the signature is not altered, the access device can infer that the issuing device had a signature when sending the access request.

[0055] In some examples, memory blocks are pages of memory. Therefore, access can be controlled on a page-by-page basis.

[0056] In some examples, the random number is generated in the form of a counter that is incremented in response to changes in the permissions of the memory block. For example, the counter might increment each time the permissions of the memory block are changed. This should prevent the same random number from being used twice until the counter is reset (e.g., due to an overflow). In some other implementations, the random number can be randomly assigned each time the random number is changed. This eliminates the need for an adder circuit but could lead to the random number being used twice. One way to prevent this is to increase the number of bits used to generate the random number.

[0057] In some examples, the permissions of the altered memory block that cause the random number to be changed are the ownership of the altered memory block. Therefore, the permissions in question can be ownership of the memory block, where ownership has full permissions to read and / or write to the memory block as needed.

[0058] In some examples, the issuer device includes: a conversion request circuit configured to transmit a conversion request for an address used to access the memory block to a conversion device; and a conversion response receiving circuit configured to receive the address used to access the memory block and the signature. One way to obtain the signature is as part of the conversion request for the address used to access the memory block. That is, upon receiving a response to the memory conversion request, if the issuer is allowed to access the memory block, a signature and the converted address (e.g., physical address) of the memory block will be provided. If the issuer is not allowed to access the memory block, the conversion request will not provide a signature (or conversion) and may respond with an error or cause an anomaly.

[0059] In some examples, the signature is generated by performing a one-way hash on the address of a memory block and a random number using a private key. As explained earlier, in a one-way hash function, this process cannot be reversed to determine the input from the output. For example, a hash function that reverses the input to produce the output is not a one-way hash because the process can be reversed. A one-way hash is performed on a combination of a random number and an address (e.g., a virtual address or a physical address). In some examples, a one-way hash is performed on a combination of a random number and a physical address. For example, this combination can be achieved by connecting two elements.

[0060] In some examples, one-way hashes are encrypted. In encrypted hashes, generating valid inputs that produce the same output without at least some of the parameters used to generate the result is computationally intractable. That is, given the output from the hash function, without, for example, the private key used in the hash function, it is essentially impossible to determine what the input is. Using the private key, reversing the generation can be trivial.

[0061] According to another exemplary configuration, an apparatus is provided, the apparatus comprising: a signature obtaining circuit configured to obtain a first payload and a second payload; an inspection circuit configured to generate a message authentication code from the first payload and the second payload; and a packet generation circuit configured to generate a packet including the first payload and the message authentication code, while omitting the second payload.

[0062] In the example above, packets that allow the inference of a second payload can be transmitted without actually transmitting the second payload. This allows verification that a user possesses the second payload without consuming the bandwidth required to transmit it. This is particularly useful in security scenarios where it is necessary to prove that the sender possesses a token or signature (e.g., granting access to certain resources). The process works by relying on a message authentication code that produces a signature or digest of a set of input data. In most cases, any modification to the input data will result in a significant change in the message authentication code. Finding two inputs that produce the same output can also be computationally intractable. Therefore, it is impractical for senders to generate and send message authentication codes that have already been generated using the second payload unless they actually possess it. The first payload is used to add variability to the message authentication code and essentially acts as a "seed." Specifically, the first payload can be set to empty (or an empty string), meaning the message authentication code will be based solely on the second payload. However, this does not prevent replay attacks, as the same packets will be generated repeatedly.

[0063] According to another exemplary configuration, an apparatus is provided comprising: a packet acquisition circuit configured to receive a packet including a first payload and a message authentication code; a signature acquisition circuit configured to acquire a second payload of the packet; and a checking circuit configured to check that the message authentication code was generated using the first payload and the second payload, wherein the second payload is omitted from the packet. The recipient of the packet mentioned in the above paragraph can infer the presence of a second payload at the sender by acquiring the second payload of the packet (e.g., from an alternative source). This second payload is then used with the first payload to regenerate the message authentication code. The result is compared with the message authentication code provided in the received packet. If they are identical, the received packet has a message authentication code that requires the second payload to already exist. Therefore, this can be used to infer that the packet exists at the sender. Of course, in practice, further analysis of the first payload may be necessary to prevent replay attacks. That is, the first payload should ideally be unique to determine that the message authentication code is newly generated using a signature, rather than copied from another source. This can be achieved using a table with the first payload sent previously, or, for example, a counter that increments with each communication. Of course, other techniques will be known to those skilled in the art.

[0064] The specific implementation scheme will now be described with reference to the accompanying drawings.

[0065] Figure 1 A system 100 comprising a host device 102 and a issuer device 104 is illustrated. The host device 102 is connected to a memory such as DRAM 106. The issuer device 104 may be in the form of a PCIe device, such as an endpoint device or an address translation cache device. The host device may be in the form of a root port or implemented at the root port, and may be in the form of a translation agent. In this example, the host device 102 is composed of a translation device 108 and an access device 110.

[0066] Issuer device 104 includes translation request circuitry 114 for obtaining address translations of memory blocks (e.g., pages). For example, the translation process can translate a virtual address into a physical address (or an intermediate physical address). The response to this is received and processed by translation response receiving circuitry 116. In this example, in addition to the translation, a signature of the translation is also received. The signature is implemented by applying a private key k (held at host device 102) using a one-way hash function (e.g., a cryptographic hash function). As will be explained later, the signature ensures that it remains valid as long as the permissions of the memory pages remain the same. Therefore, if the ownership of the page changes, the translation becomes invalid.

[0067] The converted address and signature are stored in the storage circuit 112 of the issuer device 104.

[0068] When the requesting circuit 118 makes a memory access request (e.g., a request to read or write memory), the request includes a signature to verify the issuer device 104's right to access the memory location.

[0069] Simultaneously, the conversion request receiving circuit 122 of the conversion device 108 receives the conversion request sent by the conversion request circuit 114 of the issuer device 104. An access control circuit checks whether the issuer 104 is permitted to access the requested memory region. If no access is granted, no response or a transmission rejection response is provided. Otherwise, the conversion is provided by the conversion response circuit 126. In these examples, in addition to providing the converted address, a signature is also provided. The signature is obtained by performing a one-way or cryptographic hash on the value of the converted address combined with a unique random number for each block or page of memory. The hash is performed using a private key (k). The random number is stored in the random number storage circuit 128, and the private key is stored in the private key storage circuit 130.

[0070] Typically, address translation requests are made for blocks or pages of memory, and the final memory access provides an offset to the block or page of memory to be accessed. Therefore, the signature used for each memory block can be cached—for example, in a random number storage circuit—so that signature recalculation is unnecessary.

[0071] Access device 110 processes the final memory access request (read or write) from issuer device 104. This request is received by access request receiving circuitry 132. The request will contain the memory address of the memory block or page to be accessed. From there, the signature of the memory block or page can be obtained by signature obtaining circuitry 134. (The remaining text appears to be unrelated and likely refers to a separate topic.) Figure 3 and Figure 4As illustrated, there are multiple ways to accomplish this. The checking circuit 136 checks whether the signature is valid and current. That is, if a new signature generated for the same memory address using the key in the private key storage circuit 130, and the latest version of the random number stored in the random number storage circuit 128, produce the same signature obtained by the signature acquisition circuit, the signal is considered current and valid. Therefore, the granting circuit 140 will grant the requested access. Otherwise, no grant will be provided. This can be achieved through a lack of response (or acknowledgment), a failed acknowledgment (NAK), or an error such as causing an exception. The access device 110 also includes an encryption / decryption circuit 138 that can be used to encrypt / decrypt the access request. For example, in some embodiments, the contents of the memory page itself are encrypted using, for example, a random number or a signature of the page (the access address of the page, encrypted using the private key k and the current random value). Therefore, the encryption / decryption circuit 138 can be used to decrypt data retrieved from memory 106 before sending it back to issuer 104 in response to a read access request, or to encrypt data provided from issuer 104 in response to a write request before writing it to memory 106.

[0072] A random number is provided on a per-block or per-page basis, and this random number changes each time the permissions of the associated block or page change. Therefore, if permissions change (e.g., ownership of a block or page changes), the random number changes, and inspection circuit 136 will report that the obtained signature is different from the signature that should currently be present. Therefore, access will not be granted.

[0073] It should be noted that in this example, the conversion device 108 and the access device 110 together form a single unit—the host 102. However, this is not necessary, and the two components can be completely separated. Furthermore, the conversion device 108 and the access device 110 are shown as sharing a random number storage circuit 128 and a private key (k) storage circuit 130. However, the conversion device 108 and the access device 110 can each store their own random number storage circuit 128 and private key (k) storage circuit 130, with their master versions stored elsewhere.

[0074] The access control circuit 124 and / or the access control circuit 136 may be or form part of the SMMU or IOMMU.

[0075] Figure 2 An example behavior of the random number storage circuit 128 is illustrated, particularly the process of changing random numbers. In this example, the random numbers are in the form of a counter, as this helps ensure that each random number is used only once. In an alternative implementation, the random numbers can be randomized, especially if the width of the random values ​​is sufficiently high. This is simpler, but may also carry the risk of using the same random value twice within a short time space.

[0076] In this example, the ownership of the execution environment for memory page 0xFF320000 changes. The execution environment can be a physical machine, virtual machine, processor, domain (e.g., from non-secure to secure, to a domain within a domain, or to the root), operating system, application, or any other environment within which a series of instructions can be executed in the encapsulated region. Here, we do not focus on the details of the exact change, but on the fact that a change has occurred. This causes the random number associated with that memory page (in this example, a counter) to increment.

[0077] Figure 2 An example address translation request in progress is also shown. Here, a virtual address is provided as part of the translation request. It is determined that the requester has permission to access the memory page pointed to by the virtual address. Therefore, the physical address 200 of the memory page and the corresponding signature 202 are provided.

[0078] The signature is the result of applying a cryptographic hash (using a private key 'k') to the physical address of the page and a current random value (now incrementing to 3). Examples of cryptographic hash functions include SHA and DSA.

[0079] When performing memory access, a signature must be provided. If the random number is increased during this period (due to a change in ownership), the latest version of the signature will not match the signature provided by the issuer. Therefore, the memory access will fail. Since the random number is part of the signature, the issuer cannot simply adjust the random number itself because it does not have access to the private key 'k'. Similarly, the issuer cannot simply provide another signature. Even if the random value is valid, the physical address will not match. Likewise, because the issuer does not have access to the private key 'k', the issuer cannot adjust the signature to apply to different physical addresses with the same random number.

[0080] It should be noted that in practice, the translation request may include a complete virtual address, which includes an offset of 204 to the memory page. Nevertheless, the response provided by the translation device 108 is for the memory page containing the physical address pointed to by the complete virtual address.

[0081] In addition to altering the random number, an invalidation request (TLBI) is transmitted to other devices that may have cached the random number, causing these devices to delete their (now incorrect) cached value and / or replace it with the new value. Conventional invalidation techniques (e.g., as defined by ATC) can also be used to invalidate a conversion stored by issuer device 104, thereby deleting the entry (containing the conversion and signature) from storage circuitry 112. This can be accomplished by a further conversion request (which can be accepted or rejected based on new permissions) when the conversion is needed again in the future. If issuer device 104 chooses to (illegally) save the signature, it will not work because it will not use a new version of the random number to generate it.

[0082] For simplicity, this specification describes the process occurring between a host device 102 and a publisher device 104. In practice, the host device may handle multiple publisher devices. Multiple publisher devices can share access to memory pages or blocks by simply distributing a signature to all publishers who have and need access.

[0083] In practice, the ownership of an execution environment for a memory page can be specified at any granularity. For example, an execution environment can be specified as a processor, virtual machine, realm, application, thread, etc. This can be implemented by a publisher device 104, which is a virtualizable device consisting of multiple logical interfaces / entities that can be assigned to different execution environments. In these cases, the publisher device 104's responsibility is to ensure that an interface assigned to one execution environment (e.g., an application) cannot use the address or signature granted to an interface assigned to another execution environment. Such techniques can be implemented by those skilled in the art. If the use of an interface (and its associated memory page) changes from, for example, one virtual machine to another, the signature will change and will need to be re-obtained—possibly by the same publisher device 104.

[0084] Figure 3 An example is illustrated of a process performed by, for example, the request circuit 118 of the issuer device 104, which allows a signature to be implicitly included in the memory access request and obtained by the signature acquisition circuit 134. Figure 3 An example is a memory access request packet 300 containing a header 302, which contains the physical address of the page being accessed and the offset to that page. Packet 300 also contains a payload 304, in this case, a signature 306 for the physical address.

[0085] This content is used to generate a Message Authentication Code (MAC) 308. Several techniques exist that can be used for this, which are beyond the scope of this disclosure, as the specific technique used is not important. After generating the MAC 308, it is appended to the packet, and then the signature is removed. This results in a smaller payload 304'. In fact, since the signature does not need to be provided as part of the memory access request, it makes the bandwidth usage of the previously described technique essentially cost-free.

[0086] The result is that the MAC does not correspond to the content that is actually being transmitted, but rather to the packet that would be transmitted if a signature were present.

[0087] Figure 4 Examples include how the inspection circuit 136 receives such a memory access request packet 300 and how it implicitly obtains (e.g., without actually transmitting a signature) a signature 306.

[0088] When packet 306 is received, the physical address of the memory page is extracted and used to access the random number storage circuit 128 to obtain the current version of the random number at that physical address. For example, if memory page 0x3F67800 is accessed, then in Figure 4 In the example, a random number '1' will be obtained. This is the latest version of the random number and is therefore used to represent the latest set of permissions. The random number is then used with the private key k from the private key k storage circuit 130 and the physical address of the requested memory page specified in the header of packet 300 to form a signature. This signature represents the signature currently applied to access the specified memory page.

[0089] Then, the signature is combined with the header 302 and payload 304 of the received packet 300 to regenerate the packet—this time using the current signature. The result is checked against the MAC 308 provided in the received packet. That is, the same MAC algorithm is applied to the header 302 and payload 304 containing the newly generated signature to see if a match exists. If a match exists, it means that the MAC was generated with the signature in place. In other words, it proves that the issuer device 104 has a valid current version of the signature for the accessed memory block.

[0090] If MAC 308 does not match, this indicates that the issuer device 104 does not have a signature or does not have a correct signature.

[0091] Based on this result, access to the requested memory page can be granted. For example, if it is determined that the issuer device 104 has the correct signature, access can be granted (to perform a write or return a read), and if it is determined that there is no correct, valid current signature, access can be denied.

[0092] Therefore, issuer device 104 may provide evidence that it possesses a signature without providing the signature itself. This is achieved by providing a MAC that is only correct if a correct signature exists. Since issuer device 104 cannot copy a signature without possessing it, it is impossible to generate a correct MAC in the absence of a signature.

[0093] An alternative to the above process is to actually include the signature in the packet. This process may be more secure because it provides additional assurance that the signature is held by the issuing device. However, it requires transmitting the signature itself, which increases bandwidth.

[0094] When such a packet is received, it is straightforward to determine whether the issuer device 104 is permitted to access the memory page. The signature provided in the received packet can be decrypted using the private key 'k' to read the value of the random number, and then compared with the corresponding current entry in the random number storage circuit 128 to see if a match exists (a match means access is granted because the signature is the latest version). Alternatively, a new signature can be generated using the latest random number, and the signatures can be compared (again, a match means the provided signature is the latest version).

[0095] It should be noted that in practice, many items may or may not be included. The techniques described above are not limited to a single implicit data. In these cases, the MAC address is generated using both the existing and implicit data, and the receiver will access the implicit data to regenerate the MAC address to verify the accuracy of the received content.

[0096] Depend on Figure 5A , Figure 5B and Figure 5C Figure 5 illustrates a series of flowcharts 500, 508, and 524, which respectively illustrate the processes performed by the publisher device 104, the conversion device 108, and the access device 110. At the publisher, an optional step 502 may occur, where a conversion request for a virtual address to a memory block is received. This request may be sent to the conversion device 108. In this example, the conversion device 108 undergoes a continuous loop of listening for changes in permissions to memory pages, and if such a notification is received at step 510, a random number associated with the memory page is incremented at step 512, and the process returns to step 510. If no permissions have been changed, at step 514, it is determined whether a conversion has been received (e.g., received from the publisher device 104 in step 502). If not, the loop returns to step 510.

[0097] At step 516, it is determined whether the device requesting the conversion has appropriate permissions to access the memory page. If not, an exception is raised at step 518. Otherwise, at step 520, the current random number of the memory page is obtained, and a signature is generated by combining the physical address of the requested virtual address with the random number using a private key not provided to the issuer and an encrypted one-way hash. The resulting signature is then transmitted along with the (unencrypted) physical address at step 522.

[0098] At step 504, the conversion and signature are received and can be stored for future access requests. At step 506, memory access is performed. This uses the returned physical address and signature. The memory access request is made to access device 110. Memory access is performed by including the physical address in the memory access request or, for example, by generating a MAC using the physical address, and then including that MAC in an unsigned memory access request.

[0099] Then, at step 526, the access device receives a memory access request (read or write request) containing the physical address of the memory block to be accessed. At step 528, the access device obtains a signature. This can be done by extracting the signature from the memory access request, generating a signature using a random number, a private key, and the physical address, or by accessing an already generated signature from a cache provided to the access device (e.g., by a conversion device). In either case, at step 530, it is determined whether the random number that should have been (or was) in the signature matches the current value of the random number. This can be determined by determining whether the signature is a valid extension. That is, if the received data access request cannot be generated using the latest version of the signature (which contains the latest version of the random number), the random number is implicitly invalid. If the random number is invalid, an exception is raised at step 532. Otherwise, at step 534, access is granted (e.g., a write is performed, or the requested data is read back to the issuer).

[0100] Depend on Figure 6A and Figure 6B Figure 6 illustrates the process of implicitly including data in a group using flowcharts 600 and 608, which can be performed by the issuer device 104 and the access device 110.

[0101] A first flowchart 600 illustrates the process of generating packets, and can be executed by issuer device 104. At step 602, a first payload (e.g., a physical address) and a second payload (e.g., a signature) are obtained. At step 604, a MAC address is generated using at least the first and second payloads. Then, at step 606, a packet is generated using the first payload and the MAC address, excluding the second payload. Therefore, the provided MAC address will not represent the contents of the packet itself, but rather the contents of the packet and imply the contents of the packet.

[0102] A second flowchart 608 illustrates the packet decoding process, which can be performed by access device 110. Here, at step 610, a packet containing a first payload (e.g., a physical address) and a MAC is received. As previously stated, the MAC does not directly correspond to the first payload. Then, at step 612, a second payload is obtained from somewhere other than the packet. At step 614, the MAC is checked to determine if it corresponds to a combination of the first payload (from the packet) and the second payload, which is implied to be present in the packet. If so, it is determined that the second payload implicitly exists in the transmitted packet, since a MAC cannot be generated without the packet. Obviously, in this process, the algorithm used to generate the MAC is the same at both devices.

[0103] Figure 7A , Figure 7B , Figure 7C , Figure 7D and Figure 7EEmulator implementations that can be used are illustrated. While the previously described embodiments implement the invention in terms of means and methods for operating specific processing hardware supporting the technologies involved, it is also possible to provide an instruction execution environment according to the embodiments described herein, which is implemented using a computer program. Such computer programs are generally referred to as emulators, in part because they provide a software-based implementation of a hardware architecture. Types of emulator computer programs include simulators, virtual machines, models, and binary converters, including dynamic binary converters. Typically, emulator implementations can run on host processors 702, 722, 742, 762, 782, which optionally runs host operating systems 704, 724, 744, 764, 784 that support emulator programs 706, 726, 746, 766, 786. In some arrangements, multiple emulation layers may exist between the hardware and the provided instruction execution environment and / or multiple different instruction execution environments provided on the same host processor. Historically, powerful processors were required to provide simulator implementations that executed at reasonable speeds. However, this approach may have been reasonable in specific situations, such as when it was desirable to run code native to another processor for compatibility or reuse reasons. For example, simulator implementations could provide additional functionality to the instruction execution environment that was not supported by the host processor hardware, or provide an instruction execution environment typically associated with a different hardware architecture. An overview of simulation is given in the following literature: “Some Efficient Architecture Simulation Techniques,” Robert Bedichek, Winter 1990 USENIX Conference, pp. 53–63.

[0104] With respect to embodiments previously described with reference to specific hardware constructions or features, equivalent functionality may be provided in simulated embodiments by suitable software constructions or features. For example, specific circuitry may be implemented as computer program logic in simulated embodiments. Similarly, memory hardware such as registers or cache memory may be implemented as software data structures in simulated embodiments. Where one or more of the hardware elements referenced in the previously described embodiments are present in an arrangement on host hardware (e.g., host processors 702, 722, 742, 762, 782), some simulated embodiments may utilize the host hardware where appropriate.

[0105] Emulator programs 706, 726, 746, 766, and 786 may be stored on a computer-readable storage medium (which may be a non-transitory medium) and provide a program interface (instruction execution environment) to target codes 708, 728, 748, 768, and 788 (which may include application programs, operating systems, and management programs). This program interface is identical to the interface of the hardware architecture modeled by the emulator programs 706, 726, 746, 766, and 786. Therefore, the emulator programs 706, 726, 746, 766, and 786 can be used to execute program instructions of target codes 708, 728, 748, 768, and 788 from within the instruction execution environment, enabling host computers 702, 722, 742, 762, and 782, which do not actually possess the hardware features of devices 108, 110, and 104 discussed above, to emulate these features.

[0106] In this application, the phrase "configured as..." is used to mean that the elements of the device have a configuration capable of performing the defined operation. In this context, "configuration" means the arrangement or manner of interconnection of hardware or software. For example, the device may have dedicated hardware that provides the defined operation, or a processor or other processing device may be programmed to perform the function. "Configured as" does not mean that the elements of the device need to be changed in any way to provide the defined operation.

[0107] While exemplary embodiments of the invention have been described in detail herein with reference to the accompanying drawings, it should be understood that the invention is not limited to those precise embodiments, and various changes, additions, and modifications can be made therein by those skilled in the art without departing from the scope and spirit of the invention as defined by the appended claims. For example, features of the dependent claims can be combined with features of the independent claims in various ways without departing from the scope of the invention.

Claims

1. A conversion device, the conversion device comprising: A conversion request receiving circuit is configured to receive a conversion request for an address used to access a memory block from a publisher device. A permission checking circuit is configured to check the permissions associated with the memory block and generate a determination as to whether the publisher device is allowed to access the memory block. A random number storage circuit, configured to store random numbers in association with the memory block; as well as A conversion response circuit, configured to transmit a response to the conversion request in response to determining that the issuer device is permitted to access the memory block, the response having an address from the addresses for accessing the memory block and a signature corresponding to the current value of the random number and the address from the addresses, wherein... The random number is changed in response to the permissions of the memory block being modified.

2. The conversion device according to claim 1, wherein The memory block is a page of memory.

3. The conversion device according to any of the preceding claims, wherein The random number is in the form of a counter, which is changed by incrementing the counter in response to the permissions of the memory block being changed.

4. The conversion device according to any of the preceding claims, wherein The permissions of the memory block that caused the random number to be changed are the ownership of the memory block that was changed.

5. The conversion device according to any of the preceding claims, wherein The signature is generated by performing a first one-way hash on the random number and one of the addresses.

6. The conversion device according to claim 5, wherein The first one-way hash is encrypted.

7. The conversion device according to any of the preceding claims, wherein The conversion response circuit is configured to perform multiple checks on the permissions of the multiple publisher devices and to respond to multiple conversion requests for the address from the multiple publisher devices based on which publisher device is allowed to access the memory block.

8. A data processing method, the data processing method comprising: Receive a translation request for the address used to access the memory block from the issuer device; Check the permissions associated with the memory block; A determination is made as to whether the publisher device is allowed to access the memory block; Random numbers are stored in association with the memory block; as well as In response to the determination that the issuer device is permitted to access the memory block, a response to the conversion request is transmitted, the response having an address from the addresses for accessing the memory block and a signature corresponding to the current value of the random number and the address from the addresses, wherein The random number is changed in response to the permissions of the memory block being modified.

9. A computer program for controlling a host data processing device to provide an instruction execution environment, the computer program comprising: A conversion request receiving program logic, which is configured to receive a conversion request from the issuer for an address used to access a generic data structure; Permission checking logic is configured to check permissions associated with the memory block and generate a determination as to whether the publisher is allowed to access the general data structure. A random number data structure, configured to store random numbers in association with the general data structure; as well as A conversion response procedure logic, configured to transmit a response to the conversion request in response to the determination that the issuer is permitted access to the general data structure, the response having an address from the addresses for accessing the general data structure and a signature corresponding to the current value of the random number and the address from the addresses, wherein... The random number is changed in response to the permissions of the modified general data structure.

10. An access device, the access device comprising: An access request receiving circuit is configured to receive an access request for accessing a memory block from a publisher device. A signature obtaining circuit, configured to obtain a signature for the access request; A random number storage circuit, configured to store random numbers in association with the memory block; A checking circuit is configured to perform a check on whether the current value of the random number matches the value used to generate the signature; as well as An granting circuit, configured to grant access to the memory block based on the check, wherein... The random number is changed in response to the permissions of the memory block being modified.

11. The access device according to claim 10, wherein the access device comprises: An encryption circuit configured to encrypt data in the access request using the random number to generate encrypted data, and to write the encrypted data into the memory block according to the check.

12. The access device according to any one of claims 10 to 11, wherein the access device comprises: A decryption circuit configured to decrypt data retrieved from the memory block using the random number to generate decrypted data based on the check.

13. The access device according to any one of claims 10 to 12, wherein The access request includes the address of the memory block and the signature; and The signature acquisition circuit is configured to obtain the signature from the access request.

14. The access device according to any one of claims 10 to 13, wherein the access device comprises: The signature is generated by performing a first one-way hash on the address of the memory block and the random number using a private key.

15. The access device according to claim 14, wherein the access device comprises: A storage circuit configured to store the private key.

16. The access device according to claim 15, wherein The one-way hash is encrypted.

17. The access device according to any one of claims 10 to 16, wherein The signature acquisition circuit is configured to implicitly obtain the signature from the access request.

18. The access device according to any one of claims 10 to 17, wherein The access request received by the access request receiving circuit includes the address of the memory block and a message authentication code, and omits the signature; The message authentication code is generated by performing a second one-way hash on an access request variant that includes the address of the memory block and the signature.

19. The access device according to claim 18, wherein The checking circuit is configured to perform the check by generating a test signature from the address of the memory block and the random number, and by testing whether the message authentication code corresponds to the result of performing a second one-way hash on the address of the memory block and the test signature.

20. The access device according to claim 19, wherein the access device comprises: A cache circuit, the cache circuit being configured to cache the result.

21. The access device according to any one of claims 10 to 20, wherein The memory block is a page of memory.

22. The access device according to any one of claims 10 to 21, wherein The random number is in the form of a counter, which is changed by incrementing the counter in response to the permissions of the memory block being changed.

23. The access device according to any one of claims 10 to 22, wherein The permissions of the memory block that caused the random number to be changed are the ownership of the memory block that was changed.

24. An apparatus comprising: The conversion device according to any one of claims 1 to 7, and The access device according to any one of claims 10 to 23.

25. A data processing method, the data processing method comprising: Receive access requests to memory blocks from the issuer device; Obtain the signature used for the access request; Random numbers are stored in association with the memory block; Perform a check to see if the current value of the random number matches the value used to generate the signature; as well as Access to the memory block is granted based on the aforementioned check, wherein The random number is changed in response to the permissions of the memory block being modified.

26. A computer program for controlling a host data processing device to provide an instruction execution environment, the computer program comprising: Access request receiving program logic, which is configured to receive access requests for accessing a general data structure from the issuer; The signature acquisition program logic is configured to obtain a signature for the access request; A random number data structure, configured to store random numbers in association with the general data structure; The checking program logic is configured to perform a check on whether the current value of the random number matches the value used to generate the signature; as well as Granting program logic, configured to grant access to the general data structure based on the check, wherein... The random number is changed in response to the permissions of the modified general data structure.

27. A publisher device, the publisher device comprising: A storage circuit configured to store a signature corresponding to a memory block in association with the memory block; as well as A request circuit, configured to issue a memory access request to an access device, wherein... The memory access request is used to access the memory block, and the memory access request is generated using the signature; The signature has been generated using a private key and a random number specific to the memory block; as well as The random number is changed in response to the permissions of the memory block being modified.

28. The issuer device of claim 27, wherein The request circuit is configured to generate the memory access request using the signature by including the signature in the request.

29. The issuer device of claim 27, wherein The request circuit is configured to generate the memory access request using the signature by generating a message authentication code based on the memory access request including the signature; and The request circuit is configured to transmit the memory access request, which includes the message authentication code and omits the signature.

30. The issuer device according to any one of claims 27 to 29, wherein The memory block is a page of memory.

31. The issuer device according to any one of claims 27 to 30, wherein The random number is in the form of a counter, which is changed by incrementing the counter in response to the permissions of the memory block being changed.

32. The issuer device according to any one of claims 27 to 31, wherein The permissions of the memory block that caused the random number to be changed are the ownership of the memory block that was changed.

33. The issuer device according to any one of claims 27 to 32, wherein the issuer device comprises: A conversion request circuit, configured to transmit a conversion request for an address used to access the memory block to a conversion device; as well as A conversion response receiving circuit is configured to receive the address for accessing the memory block and the signature.

34. The issuer device according to any one of claims 27 to 33, wherein The signature is generated by performing a one-way hash on the address of the memory block and the random number using the private key.

35. The issuer device according to claim 34, wherein The one-way hash is encrypted.

36. A data processing method, the data processing method comprising: A signature corresponding to the memory block is stored in association with the memory block; as well as A memory access request is sent to the access device, wherein The memory access request is used to access the memory block, and the memory access request is generated using the signature; The signature has been generated using a private key and a random number specific to the memory block; as well as The random number is changed in response to the permissions of the memory block being modified.

37. A computer program for controlling a host data processing device to provide an instruction execution environment, the computer program comprising: A signature data structure configured to store a signature corresponding to the general data structure in association with a general data structure; as well as The request procedure logic is configured to issue a memory access request to the accessor, wherein... The memory access request is used to access the general data structure, and the memory access request is generated using the signature; The signature has been generated using a private key and a random number specific to the memory block; as well as The random number is changed in response to the permissions of the memory block being modified.

38. An apparatus comprising: A signature acquisition circuit, configured to acquire a first payload and a second payload; An inspection circuit is configured to generate a message authentication code from the first payload and the second payload; as well as A packet generation circuit configured to generate packets including the first payload and the message authentication code, while omitting the second payload.

39. A data processing method, the data processing method comprising: Obtain the first and second payloads; Generate a message authentication code from the first payload and the second payload; as well as Generate a packet that includes the first payload and the message authentication code, while omitting the second payload.

40. A computer program for controlling a host data processing device to provide an instruction execution environment, the computer program comprising: Obtaining program logic, wherein the obtaining program logic is configured to obtain a first payload and a second payload; A first generation program logic, configured to generate a message authentication code from the first payload and the second payload; as well as The second generation program logic is configured to generate a packet that includes the first payload and the message authentication code, while omitting the second payload.

41. An apparatus comprising: A packet acquisition circuit configured to receive packets including a first payload and a message authentication code; A signature acquisition circuit configured to acquire a second payload of the packet; as well as The inspection circuit is configured to check whether the message authentication code was generated using the first payload and the second payload, wherein... The second payload is omitted from the group.

42. A data processing method, the data processing method comprising: Receive a packet including a first payload and a message authentication code; Obtain the second payload of the group; as well as The message authentication code is checked and found to be generated using the first payload and the second payload, wherein... The second payload is omitted from the group.

43. A computer program for controlling a host data processing device to provide an instruction execution environment, the computer program comprising: A packet acquisition program logic, configured to receive a packet data structure including a first payload and a message authentication code; The signature acquisition program logic is configured to obtain the second payload of the block data structure; as well as The inspection program logic is configured to check whether the message authentication code was generated using the first payload and the second payload, wherein... The second payload is omitted from the group.

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