Laminated ceramic electronic component and method for manufacturing same

Abstract

The laminated ceramic electronic component includes: a main body having a substantially rectangular parallelepiped shape, the main body including a capacitor portion formed by alternately laminating a first internal electrode layer and a second internal electrode layer with a dielectric layer interposed therebetween, and a protection portion provided outside the capacitor portion; and external electrodes formed on a surface of the main body so as to be spaced apart from each other, the first internal electrode layer and the second internal electrode layer being led out to each of the external electrodes. The dielectric layer and the protection part each have a dielectric ceramic as a main component, the protection part includes a first layer adjacent to the capacitor part, a second layer adjacent to the first layer, and a third layer adjacent to the second layer, the atomic content of Mn in the second layer is greater than the atomic content of Mn in the first layer, and the atomic content of Mn in the third layer is greater than the atomic content of Mn in the fourth layer. A content of a glass component of the second layer is greater than a content of a glass component of the first layer and a content of a glass component of the third layer.

Description

Technical Field

[0001] This invention relates to laminated ceramic electronic components and their manufacturing methods. Background Technology

[0002] Recently, it has been known to have a laminated ceramic electronic component having a laminate (capacitor portion) formed by alternating layers of internal electrodes and dielectric layers, and a protective portion around the laminate. The protective portion includes side edge portions and a cover portion, wherein the side edge portions are formed on the side surfaces of the laminate, and the cover portion is provided on the main surfaces located at both ends of the lamination directions of the internal electrodes and dielectric layers forming the laminate. The side edge portions are sometimes referred to as side layer. The cover portion is sometimes referred to as main surface layer. Conventionally, it has been proposed that the main surface layer and the side layer are composed of multiple layers (for example, see Patent Document 1).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-072356 Summary of the Invention

[0006] The technical problem that the invention aims to solve

[0007] The protective element functions to protect the laminate. When the protective element is placed around the laminate, elements are sometimes added to suppress grain growth in the protective element to ensure its reliability. However, the addition of elements to suppress grain growth can, on the other hand, hinder the grain growth of the dielectric in the capacitor section. When the grain growth of the dielectric in the capacitor section is hindered, the dielectric constant of the laminate that forms the capacitor section decreases, resulting in a decrease in effective capacitance. Therefore, the protective element is required to ensure the effective capacitance of the ceramic electronic component and improve its reliability. The solution proposed in Patent Document 1 has room for improvement in terms of the aforementioned requirements for the protective element.

[0008] Therefore, the purpose of this invention is to ensure the effective capacitance of ceramic electronic components and to improve the reliability of ceramic electronic components.

[0009] Means for solving technical problems

[0010] The aforementioned objective can be achieved by, as one method, a laminated ceramic electronic component comprising: a body having a generally cuboid shape, including a capacitor portion formed by alternatingly stacking a first internal electrode layer and a second internal electrode layer separated by a dielectric layer, and a protective portion disposed outside the capacitor portion; and external electrodes formed on the surface of the body at intervals from each other, wherein the first internal electrode layer and the second internal electrode layer are led out to each of the external electrodes, the dielectric layer and the protective portion are each composed primarily of dielectric ceramic, the protective portion including a first layer adjacent to the capacitor portion, a second layer adjacent to the first layer, and a third layer adjacent to the second layer, wherein the Mn atomic content in the second layer is greater than the Mn atomic content in the first layer, and the glass content in the second layer is greater than the glass content in the first layer and the glass content in the third layer.

[0011] Furthermore, the aforementioned objective can be achieved through a method for manufacturing a laminated ceramic electronic component, which includes: a step of forming a laminated body, wherein the laminated body is a capacitor portion formed by alternately stacking a first internal electrode layer and a second internal electrode layer separated by a dielectric layer; a step of forming a protective portion by providing a first layer adjacent to the exposed surfaces of the first internal electrode layer and the second internal electrode layer, a second layer adjacent to the first layer, and a third layer adjacent to the second layer in the laminated body, and a step of manufacturing an unfired body; a step of firing the body; and a step of forming an external electrode in the fired body, wherein the dielectric layer and the protective portion are each mainly composed of dielectric ceramic, the Mn atomic content in the second layer is greater than the Mn atomic content in the first layer, and the glass content in the second layer is greater than the glass content in the first layer and the glass content in the third layer.

[0012] Invention Effects

[0013] By employing this invention, the effective capacitance of ceramic electronic components can be ensured, and the reliability of ceramic electronic components can be improved. Attached Figure Description

[0014] Figure 1 This is a perspective view of the stacked ceramic capacitor according to the first embodiment of the present invention.

[0015] Figure 2 yes Figure 1 A cross-sectional view of a multilayer ceramic capacitor along line AA′.

[0016] Figure 3 yes Figure 1 A cross-sectional view of a multilayer ceramic capacitor along line BB′.

[0017] Figure 4 This is a partially enlarged cross-sectional view of the side edge portion of the stacked ceramic capacitor according to the embodiment.

[0018] Figure 5 This is a flowchart illustrating an example of a method for manufacturing a multilayer ceramic capacitor according to an embodiment.

[0019] Figure 6 This is a perspective view showing the manufacturing process of a multilayer ceramic capacitor according to an embodiment.

[0020] Figure 7 This is a perspective view showing the manufacturing process of a multilayer ceramic capacitor according to an embodiment.

[0021] Figure 8 (A) to Figure 8 (C) is a schematic cross-sectional view showing the manufacturing process of the multilayer ceramic capacitor according to the embodiment.

[0022] Figure 9 This is a perspective view showing the manufacturing process of a multilayer ceramic capacitor according to an embodiment.

[0023] Figure 10 The second embodiment of the multilayer ceramic capacitor is arranged along a path equivalent to... Figure 1 The cross-sectional view is obtained by cutting the AA′ line in the diagram.

[0024] Figure 11 This is a schematic cross-sectional view showing the manufacturing process of the multilayer ceramic capacitor according to the second embodiment. Detailed Implementation

[0025] (First Implementation)

[0026] The first embodiment of the present invention will now be described with reference to the accompanying drawings.

[0027] In the accompanying figures, the X, Y, and Z axes, which are orthogonal to each other, are appropriately shown. The X, Y, and Z axes are the same in all the accompanying figures.

[0028] [Overall structure of the multilayer ceramic capacitor 10]

[0029] Figures 1-4 This is a diagram illustrating the multilayer ceramic capacitor 10 according to the first embodiment of the present invention. Figure 1 This is a three-dimensional view of the multilayer ceramic capacitor 10. Figure 2 It is along the multilayer ceramic capacitor 10 Figure 1 A cross-sectional view of line AA′. Figure 3 It is along the multilayer ceramic capacitor 10 Figure 1 A cross-sectional view of the BB′ line. Figure 4This is a partially enlarged cross-sectional view of the side edge portion 19 of the multilayer ceramic capacitor 10.

[0030] like Figures 1-4 As illustrated, the multilayer ceramic capacitor 10 includes a body 11 having a generally cuboid shape. In the body 11, the four surfaces other than the upper and lower surfaces in the stacking direction are referred to as side surfaces. In the body 11, a first external electrode 14a and a second external electrode 14b are respectively provided on two opposing side surfaces (a first side surface and a second side surface). The first external electrode 14a extends from the first side surface to the four adjacent side surfaces. The second external electrode 14b extends from the second side surface to the four adjacent side surfaces. However, the first external electrode 14a and the second external electrode 14b are spaced apart from each other.

[0031] In addition, Figures 1-3 In this diagram, the Z-axis (first direction) is the stacking direction, representing the relative directions of the internal electrode layers. The X-axis (second direction) is the length direction of the main body 11, representing the relative directions of the first and second side surfaces of the main body 11, and the relative directions of the first external electrode 14a and the second external electrode 14b. The Y-axis (third direction) is the width direction of the internal electrode layers, representing the relative directions of the two side surfaces of the main body 11 other than the first and second side surfaces (the third and fourth side surfaces). The X-axis, Y-axis, and Z-axis are orthogonal to each other.

[0032] The main body 11 has a structure in which a dielectric layer 15, comprising a ceramic material that functions as a dielectric, and an internal electrode layer are alternately stacked. The internal electrode layer includes a plurality of first internal electrode layers 12 and a plurality of second internal electrode layers 13. The first internal electrode layers 12 and the second internal electrode layers 13 are alternately stacked with respect to the dielectric layer 15. The end edge of the first internal electrode layer 12 is led out to a first side of the main body 11 where a first external electrode 14a is provided. The end edge of the second internal electrode layer 13 is led out to a second side of the main body 11 where a second external electrode 14b is provided. Thus, the first internal electrode layer 12 and the second internal electrode layer 13 are alternately connected to the first external electrode 14a and the second external electrode 14b. As a result, the stacked ceramic capacitor 10 has a structure formed by stacking capacitor units. In addition, in the stack of the dielectric layer 15 and the internal electrode layer, the internal electrode layer is disposed on the outermost layer in the stacking direction, and the upper and lower surfaces of the stack are covered by a cover portion 18. The cover portion 18 is mainly composed of ceramic material. Furthermore, the multilayer ceramic capacitor is not limited to any particular type of capacitor, as long as the first internal electrode layer 12 and the second internal electrode layer 13 are exposed in different areas on the surface of the multilayer and thus connected to different external electrodes. Figures 1 to 3The structure of the laminate. Different regions on the surface of the laminate can be the surface regions of opposite faces of the laminate, the surface regions of adjacent faces of the laminate, or different surface regions of the same face of the laminate. Different external electrodes can extend from the exposed surfaces of the first internal electrode layer 12 and the second internal electrode layer 13 on the surface regions of the laminate to other surfaces, as long as they are spaced apart from each other.

[0033] The dimensions of the multilayer ceramic capacitor 100 are, for example, a length of 0.25 mm, a width of 0.125 mm, and a height of 0.125 mm; or a length of 0.4 mm, a width of 0.2 mm, and a height of 0.2 mm; or a length of 0.6 mm, a width of 0.3 mm, and a height of 0.3 mm; or a length of 1.0 mm, a width of 0.5 mm, and a height of 0.5 mm; or a length of 3.2 mm, a width of 1.6 mm, and a height of 1.6 mm; or a length of 4.5 mm, a width of 3.2 mm, and a height of 2.5 mm, but are not limited to these dimensions. The dimensions of the multilayer ceramic capacitor 100 can be, for example, length > width ≥ height; width > length ≥ height; height > length ≥ width; or height > width ≥ length.

[0034] The main body 11 has: a capacitor portion 16, which is a laminate of a dielectric layer 15, a first internal electrode layer 12, and a second internal electrode layer 13; and a protective portion 17. The protective portion 17 constitutes the peripheral portion of the main body 11 and has two opposing side surfaces in the X-axis direction, two opposing side surfaces 11b in the Y-axis direction, and two opposing main surfaces 11c in the Z-axis direction. The two opposing side surfaces in the X-axis direction are sometimes also referred to as end surfaces 11a. The side surfaces 11b and the main surfaces 11c constitute a plurality of peripheral surfaces. The end surfaces 11a, side surfaces 11b, and main surfaces 11c are, for example, generally flat surfaces, but may also have rounded corners.

[0035] The protective portion 17 has a cover portion 18, a side edge portion 19, and an end edge portion 20. The cover portion 18 is the region located on the outer side in the stacking direction relative to the capacitor portion 16. The side edge portion 19 is the region located on the outer side in the direction perpendicular to the stacking direction relative to the capacitor portion 16, and the first internal electrode layer 12 and the second internal electrode layer 13 are not extended to the surface of the body 11. The end edge portion 20 is the region located on the outer side in the direction perpendicular to the stacking direction relative to the capacitor portion 16, and at least one of the first internal electrode layer 12 and the second internal electrode layer 13 is extended to the surface of the body 11.

[0036] In detail, Figures 1 to 3 In this structure, the cover portion 18 is located outside the capacitor portion 16 in the Z-axis direction. The side edge portion 19 is located outside the capacitor portion 16 in the Y-axis direction. The end edge portion 20 is located outside the capacitor portion 16 in the X-axis direction. Figures 1 to 3 In this case, the lamination direction is the Z direction of the main body 11. Of course, even if the lamination direction is the X direction or the Y direction, the covering part 18, the side edge part 19 and the end edge part 20 included in the protective part 17 can be appropriately defined.

[0037] The capacitor section 16 is disposed inside the protection section 17, constituting a functional section. In the capacitor section 16, multiple first internal electrode layers 12 and multiple second internal electrode layers 13 are separated by a dielectric layer 15 (see reference). Figure 2 (Layered). Capacitor section 16 in Figures 1 to 3 The structure is stacked along the Z-axis. Internal electrode layers 12 and 13 are both along a direction perpendicular to the stacking direction. Figures 1 to 3 The structure consists of sheets extending in the XY plane, which are alternately arranged along the Z-axis. The structure of the dielectric layer 15 will be described in detail later.

[0038] The first internal electrode layer 12 and the second internal electrode layer 13 are primarily composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn), or alloys thereof. Alternatively, noble metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys thereof, may be used as the primary components of the first internal electrode layer 12 and the second internal electrode layer 13. The primary components of the first internal electrode layer 12 and the second internal electrode layer 13 may be the same or different. When no special distinction is required, the first internal electrode layer 12 and the second internal electrode layer 13 are sometimes collectively referred to as internal electrodes.

[0039] The dielectric layer 15 is, for example, a ceramic material having a perovskite structure represented by the general formula ABO3 as the main phase. Furthermore, this perovskite structure contains ABO3, which deviates from its stoichiometric composition. 3-α (0≤α≤1, where α represents the amount deviating from the stoichiometric composition; α is omitted below). For example, as this ceramic material, materials selected from barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and Ba, which forms a perovskite structure, can be used. 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≤x≤1, 0≤y≤1, 0≤z≤1), etc. Ba 1-x-y Ca x Sr y Ti 1-z Zr zO3 can be barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, or barium calcium zirconate titanate. For example, the dielectric layer 15 may contain more than 50 at% of the main component ceramic, or, as an example, more than 90 at% of the main component ceramic. The thickness of the dielectric layer 15 may be, for example, 5.0 μm or less, 3.0 μm or less, 1.0 μm or less, 0.5 μm or less, 0.4 μm or less, 0.3 μm or less, or 0.2 μm or less. The thickness of the dielectric layer 15 can be measured by observing the cross-section of the multilayer ceramic capacitor 100 using a SEM (scanning electron microscope), measuring the thickness at 10 points for each of the 10 different dielectric layers 15, and deriving the average thickness of all measured points.

[0040] Additives may be added to the dielectric layer 15. Examples of additives added to the dielectric layer 15 include oxides of zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0041] The protective portion 17 is also formed of dielectric ceramic. From the viewpoint of suppressing internal stress, the end edge portion 20 of the protective portion 17 is preferably composed of the same main component as the dielectric layer 15. In this embodiment, the covering portion 18 is also composed of the same main component as the dielectric layer 15. This improves manufacturing efficiency.

[0042] Typically, the cover portion 18 and side edge portion 19 of the protective portion 17 do not contain internal electrodes. Therefore, during pressing, the density after pressing is more likely to be lower than that of the capacitor portion 16. Furthermore, the cover portion 18 and side edge portion 19 are almost unaffected by the sintering effect of the metal elements contained in the internal electrodes during firing. Although the end edge portion 20 of the protective portion 17 contains leads of the internal electrode layers 12 and 13 in a portion of it, the proportion is smaller than that of the capacitor portion 16. Therefore, during pressing, the density after pressing is more likely to be lower than that of the capacitor portion 16. Additionally, the influence of the metal elements contained in the leads of the internal electrodes during firing is limited compared to the capacitor portion 16. In summary, the protective portion 17 is difficult to increase in density during firing, and the density after firing will differ from that of the capacitor portion 16. Therefore, the mechanical strength of the protective portion 17 is prone to decrease, and it is susceptible to peeling and cracking. Moreover, because it is not dense, moisture can easily penetrate from the outside, leading to a reduced lifespan. In order to suppress the reliability degradation as described above, elements for promoting firing are added to the protective section 17.

[0043] The side edge portion 19 in the protective portion 17 has the same main component as the dielectric layer 15. However, unlike in the usual case, in this invention, as... Figure 3 and Figure 4 As shown, the side edge portion 19 includes a first layer 19a, a second layer 19b, and a third layer 19c. The first layer 19a is adjacent to the side surface 16b of the capacitor portion 16 facing the Y-axis. The second layer 19b is adjacent to the first layer 19a. The third layer 19c is adjacent to the second layer 19b.

[0044] The first layer 19a is a layer with a small density difference with the dielectric layer 15 and has the function of not affecting the grain growth of the dielectric on the first layer 19a side of the dielectric layer 15.

[0045] The second layer 19b is an intermediate layer that has the function of smoothly connecting the layer that inhibits the grain growth of the dielectric on the first layer 19a side and the layer that promotes the grain growth of the dielectric on the first layer 19a side.

[0046] The third 19c layer promotes the growth of dielectric grains. Additionally, the third 19c layer also improves moisture resistance.

[0047] In order to achieve the functions described above, the first layer 19a, the second layer 19b and the third layer 19c are layers whose main components are the same as the dielectric layer of the capacitor section 16, but whose secondary components or added components are different.

[0048] Specifically, the first layer 19a can be defined as a layer in which the total concentration (atomic%) of magnesium (Mg), ytterbium (Yb), and erbium (Er) is greater than the concentration (atomic%) of Mn. Alternatively, the first layer 19a can be defined as a layer in which, given the ratio of the number of atoms at the A-site and B-site of the perovskite structure in the dielectric, i.e., the A / B ratio, is ((Ba+Sr+Ca) / (Ti+Zr+Hf)), the ratio ((Ba+Sr+Ca) / (Ti+Zr+Hf)) is less than 0.96 or greater than 1.02.

[0049] The second layer 19b can be defined as a layer in which the concentration (atomic %) of Mn is greater than the combined concentration (atomic %) of Mg, Yb and Er, and the concentration (atomic %) of Mn is greater than the combined concentration (atomic %) of Mo, B and Li.

[0050] The third layer, 19c, can be defined as a layer in which the combined concentration (atomic %) of Mo, B, and Li is greater than the concentration (atomic %) of Mn.

[0051] The second layer 19b and the third layer 19c may contain glass components, and the concentration of the glass components (the concentration of the part where Si and B coexist: atomic %) may be the second layer 19b > the third layer 19c > the first layer 19a.

[0052] The first layer 19a is a layer that minimizes the density difference with the dielectric layer 15 and has the function of not affecting the grain growth of the dielectric on the first layer 19a side of the dielectric layer 15. To achieve the functions described above, in a first embodiment of the present invention, the first layer 19a may contain, in addition to the same main components as the dielectric layer 15, elements that promote densification of the first layer 19a and have minimal diffusion into the dielectric layer 15 during firing. Elements that promote densification of the first layer 19a and do not affect the grain growth of the dielectric layer 15 refer to elements that, during the firing of the first layer 19a, do not significantly increase grain growth but promote the formation of fine particle morphology, thereby increasing the density of the first layer 19a to eliminate the density difference with the dielectric layer 15, and which do not easily diffuse during firing. Because there is less diffusion into the dielectric layer 15 during firing, the effect on the grain growth of the dielectric layer 15 caused by the diffusion of elements to the first layer 19a side of the dielectric layer 15 that has occurred in the past can be suppressed.

[0053] Examples of such elements include those selected from Mg, Yb, and Er, but other elements may also be used, and one or more of these elements may be appropriately added. To achieve the functions described above, in the second aspect of the invention, this can be achieved by setting the atomic ratio of the A-site to B-site of the perovskite structure within the dielectric of the first layer 19a, i.e., the A / B ratio, to be ((Ba+Sr+Ca) / (Ti+Zr+Hf)), such that ((Ba+Sr+Ca) / (Ti+Zr+Hf)) is less than 0.96 or more, and greater than 1.02. In the case of a perovskite structure with the A / B ratio described above, during the firing of the first layer 19a, significant grain growth does not occur, resulting in a fine particle morphology, thereby increasing the density of the first layer 19a to eliminate the density difference with the dielectric layer 15. In this second aspect, it is preferable not to add elements for promoting grain growth to the first layer 19a. During the firing of the first layer 19a, by forming an A / B ratio as described above, excessive grain growth can be suppressed. As a result, dense particles can be formed, thereby increasing the density of the first layer 19a and eliminating the density difference with the dielectric layer 15. Moreover, since the first layer 19a does not contain the elements that promote grain growth, the elements do not diffuse from the first layer 19a to the dielectric layer 15 at all. Therefore, the obstacles to grain growth caused by elements diffusing towards the first layer 19a side of the dielectric layer 15 that previously occurred can be suppressed.

[0054] The ratio of the number of atoms at the A-site and B-site in the perovskite structure within a dielectric, known as the A / B ratio, can be observed, for example, by using TEM-EDS (Transmission Electron Microscope-Energy Dispersive X-ray Spectroscopy) to create an elemental surface distribution of the element being measured. This observation can be performed using instruments such as the JEM-ARM200 manufactured by Nippon Electronics Corporation.

[0055] The first layer 19a may contain Cu. It can be considered that by including Cu in the first layer 19a, the lifespan of the multilayer ceramic capacitor 10 is improved. This will be explained in detail later. The first layer 19a is obtained by modifying the unfired first layer 119a (refer to...). Figure 9 The multilayer ceramic capacitor 10 is formed by firing (etc.). It can be considered that when the Cu component diffuses into the internal electrode layers 12 and 13 that are in contact with the unfired first layer 119a, the interface between the Ni contained in the internal electrode layers 12 and 13 and the dielectric of the capacitor portion 16 is strengthened, thus increasing the IR (Insulation Resistance). Therefore, the lifetime of the multilayer ceramic capacitor 10 can be considered to be improved. The Cu component can be, for example, CuO.

[0056] The first layer 19a is a dense layer. Therefore, the average particle size of the particles forming the first layer 19a is smaller than the average particle size of the particles forming the second layer 19b, and smaller than the average particle size of the particles forming the third layer 19c.

[0057] Regardless of the external dimensions of the multilayer ceramic capacitor 10, the average particle size of the first layer 19a can be formed to be greater than 0 μm and less than 5 μm. The average particle size of the second layer 19b can be formed to be greater than 0 μm and less than 15 μm. The average particle size of the third layer 19c can be formed to be greater than 0 μm and less than 30 μm. Furthermore, when the multilayer ceramic capacitor 10 is larger than 0.603, for example, it can be formed with the average particle size of the first layer 19a greater than 0 μm and less than 7 μm, the average particle size of the second layer 19b greater than 0 μm and less than 15 μm, and the average particle size of the third layer 19c greater than 0 μm and less than 45 μm. Alternatively, for example, it can be formed with the average particle size of the first layer 19a greater than 0 μm and less than 10 μm, the average particle size of the second layer 19b greater than 0 μm and less than 20 μm, and the average particle size of the third layer 19c greater than 0 μm and less than 60 μm.

[0058] In any case, the average particle size of each layer is preferably the average particle size of the first layer 19a < the average particle size of the second layer 19b < the average particle size of the third layer 19c. With such a relationship of average particle size, a structure that is tightly fitted to the capacitor part, does not easily peel off between layers, and has excellent reliability can be formed.

[0059] Here, the average particle size of each layer can be measured according to the following procedure. First, the cross-section of the multilayer ceramic capacitor 10 is ground to allow observation of the surface containing the axis of the stacking direction (first direction). Observation is performed using a field emission scanning secondary electron microscope (FE-SEM) equipped with an energy dispersive X-ray spectrometer (EDS). The area that appears bright in the SEM image due to the contrast difference is identified as the internal electrode (first internal electrode portion 12 or second internal electrode portion 13), thereby identifying the capacitor portion area, and the outer side of it is identified as the protective portion. An observation area is set in the dielectric region of the protective portion, which is the outer portion of the capacitor portion perpendicular to the stacking direction. EDS elemental distribution analysis is performed in this observation area to measure the presence of Ni, Ba, Ti, O, Mn, Mo, Yb, Er, Mg, Si, and other elements as needed, and the presence amount is calculated as an atomic percentage relative to the overall composition at each location. The boundaries of each layer can be determined according to the definitions of the first, second, and third layers. For the measurements, a FE-SEM (SU7000) manufactured by Hitachi High-Tech Corporation was used as a field emission scanning secondary electron microscope. A Quantax manufactured by Bruker Corporation was used as the EDS detector.

[0060] Regarding the average particle size of the first layer 19a, the second layer 19b, and the third layer 19c, double electron imaging was used. The observation area of ​​the portion of the protective part closest to the capacitor portion 16 was taken as the observation area of ​​the first layer 19a, and the observation area of ​​the outermost portion was taken as the observation area of ​​the third layer 19c. For the second layer 19b, the portion with the highest Mn content was selected as the observation area of ​​the second layer 19b. Three observation areas were photographed for each layer. The average particle size can be measured by measuring the area of ​​each particle in the field of view using image processing measurement software, calculating the diameter of a circle with equal area (Heywood diameter), and then calculating the average value based on these values. The average value of the measurements from the three observation areas of each layer using SEM can be taken as the average particle size of each layer of the sample. Furthermore, the method for calculating the average particle size described here is an example, and other methods can also be used for calculation.

[0061] The first layer 19a increases the contact area with the dielectric layer 15 of the capacitor section 16 by forming a dense film, thereby making it easier to seal (adhere tightly) with the capacitor section 16.

[0062] The second layer 19b is an intermediate layer that smoothly connects a layer that inhibits grain growth of the dielectric on the first layer 19a side and a layer that promotes grain growth of the dielectric on the first layer 19a side. The second layer 19b is characterized by containing manganese (Mn) and glass components in the same main composition as the dielectric layer 15. First, the Mn component in the second layer 19b will be explained. Mn is a component that promotes grain growth inhibition and densification during firing, and it has a higher effect than Mg, Yb, and Er, which have similar effects. However, Mn diffuses over a large area during firing; therefore, if added to the first layer 19a, it will also diffuse to the adjacent dielectric layer 15, inhibiting grain growth of the dielectric on the first layer 19a side of the dielectric layer 15, leading to a decrease in capacitance. Therefore, Mn is not suitable as an element added to the first layer 19a.

[0063] The present invention is characterized by the addition of Mn to a second layer 19b, which is spaced from a first layer 19a between the dielectric layer 15 and the second layer 19b. Even if the Mn component diffuses during firing, the first layer 19a, which is free of Mn before firing, acts as a buffer between the dielectric layer 15 and the second layer 19b, preventing the Mn component from reaching the dielectric on the side of the first layer 19a of the dielectric layer 15 and thus not inhibiting grain growth in that area. Therefore, no decrease in capacitance is caused. The second layer 19b, with the addition of Mn, which has a densifying effect, becomes a dense layer, and the first layer 19a, with the Mn component diffused during firing, together with magnesium (Mg), ytterbium (Yb), and erbium (Er), forms a denser layer compared to the case without Mn diffusion. Furthermore, as described later, due to the effect of the glass composition contained in the second layer 19b, the sinterability is improved, and the dielectric undergoes excessive grain growth, thereby increasing the density of the second layer 19b and reducing the density difference with the dielectric layer 15. Therefore, it is possible to prevent the density difference with the first layer 19a, which inhibits grain growth, from increasing, thus preventing discontinuity in mechanical strength and the occurrence of peeling and cracks.

[0064] The Mn content in the second layer 19b is greater than that in the first layer 19a. Here, the comparison of Mn content can be based on the atomic proportion of Mn in each layer. That is, the atomic proportion of Mn in the second layer 19b is greater than that in the first layer 19a. The first layer 19a may contain Mn, but its Mn content is more than 0% to less than 100% of the Mn content in the second layer 19b. Since the Mn content in the first layer 19a is more than 0% of the Mn content in the second layer 19b, the first layer 19a can also be designed to be Mn-free. Alternatively, the comparison of content can also be expressed by the concentration distribution of each component.

[0065] The content and concentration of each element can be measured as follows. The observation surface exposed by cross-sectional grinding of the multilayer ceramic capacitor 10, which allows observation of the axis including the stacking direction (first direction), is observed using a field emission scanning secondary electron microscope (FE-SEM) equipped with an energy-dispersive X-ray spectrometer (EDS). The area appearing bright in the SEM image due to contrast difference is identified as the internal electrode (first internal electrode portion 12 or second internal electrode portion 13), thereby determining the area of ​​the capacitor portion 16, and its outer side is designated as the protective portion. An observation area is set in the dielectric region of the protective portion, which is the outer portion of the capacitor portion perpendicular to the stacking direction. EDS elemental distribution analysis is performed in this observation area to measure the presence of Ni, Ba, Ti, O, Mn, Mo, Yb, Er, Mg, Si, and other elements as needed, and the amount present is calculated as an atomic percentage relative to the overall composition at each location. The boundaries of each layer can be determined according to the definitions of the first, second, and third layers. The average content and average concentration obtained by averaging the observation areas at three locations in each layer can be used as the average content and average concentration of that layer. The observation area can be the same as the observation area set when measuring the average particle size. For the measurement, a field emission scanning secondary electron microscope (FE-SEM) (SU7000) manufactured by Hitachi High-Tech Corporation was used. A Quantax detector manufactured by BRUKER Corporation was used as the EDS detector.

[0066] In the first layer 19a, due to the diffusion of Mn into the substrate 11, the grain size of the dielectric ceramic in the substrate 11 will decrease, potentially reducing the effective capacitance. Therefore, in the first layer 19a, it is preferable to reduce the Mn content so that Mn does not diffuse into the substrate 11. On the other hand, due to grain growth near the substrate 11, it is conceivable that the reduction in lifetime can be confirmed, for example, through the results of a HALT (Highly Accelerated Limit Test). Therefore, in the second layer 19b, it is preferable to contain an appropriate amount of Mn content that inhibits grain growth, within a range that does not contribute to the grain growth of the dielectric ceramic in the substrate 11; that is, to allow Mn to diffuse from the second layer 19b only into the first layer 19a, and not into the substrate 11. In other words, the concentration gradient of Mn content is preferably that the concentration of the first layer 19a is less than the concentration of the second layer 19b. The content of Mn component in the first layer 19a is preferably 80% or less, more preferably 60% or less, and even more preferably 30% or less.

[0067] Next, the glass composition contained in the second layer 19b will be explained. As a glass composition, any low-melting-point component capable of forming a liquid phase during the firing of the main body 11 is acceptable, such as silicon and boron. For each elemental composition, its presence and concentration can be identified using the same method as for the Mn composition. At this time, the portion where silicon and boron, as elements contained in the glass, are simultaneously observed at the same observation point is considered the portion where the glass exists. Furthermore, the concentration obtained by adding the silicon concentration and the boron concentration is considered the concentration of the glass composition. In the second layer 19b, during firing, the liquid phase composed of the glass composition is released from the grains, thereby forming a fine structure of glass phase segregated at the grain boundaries.

[0068] Furthermore, in the second layer 19b where a glassy phase precipitates at the grain boundaries, high sinterability is achieved due to the formation of a liquid phase during firing, resulting in a structure with few intergranular voids. By simultaneously containing Mn and glass in the second layer 19b, a layer with densely packed particles and few intergranular voids can be formed, suppressing grain growth. This results in a highly reliable structure that effectively inhibits the intrusion of moisture and other contaminants.

[0069] The third layer 19c is a layer that promotes the grain growth of the dielectric. The first layer 19a and the second layer 19b are spaced between the third layer 19c and the dielectric layer 15, thus allowing the dielectric grains within the third layer 19c to grow without affecting the dielectric of the dielectric layer 15. The third layer 19c is a layer that improves moisture resistance. The third layer 19c also contains glass components. The glass components contained in the third layer 19c can be low-melting-point components that can form a liquid phase during the firing of the main body 11, such as silicon and boron. The second layer 19b contains more glass components than the third layer 19c. By making the glass component content of the second layer 19b greater than that of the third layer 19c, the glass components diffusing from the second layer 19b diffuse into the third layer 19c during firing. A small amount of glass components may also be pre-contained in the third layer 19c before firing. The glass composition pre-contained in the third layer 19c can be the same as or different from the glass composition contained in the second layer 19b. During firing, the glass composition forms a liquid phase, thus creating a dielectric layer with fewer pores. Furthermore, the liquid-phase and diffused glass composition also enters the slightly generated pores and, after firing and cooling, fills the pores within the third layer 19c. This improves the moisture resistance of the third layer 19c. Since the third layer 19c is located at the outermost layer of the side edge portion 19, the improved moisture resistance of the third layer 19c enhances the overall moisture resistance of the multilayer ceramic capacitor 10.

[0070] Elements that promote grain growth can be added to the third layer 19c. These grain-growth-promoting elements are not densification-promoting elements found in firing processes, but rather elements that promote grain growth, resulting in multiple particles growing into a single, integrated grain. Examples of grain-growth-promoting elements include molybdenum (Mo), boron (B), and lithium (Li). Preferably, these grain-growth-promoting elements are not included in the first layer 19a or the second layer 19b before firing. This is because even if the grain-growth-promoting elements diffuse during firing, the first layer 19a and the second layer 19b act as buffers, preventing them from diffusing into the dielectric layer 15 and thus not affecting the capacitance. The content of grain-growth-promoting elements in each layer after firing is: first layer 19a < second layer 19b < third layer 19c. The grain-growth-promoting elements added to the third layer 19c, like the glass composition, can improve reliability.

[0071] The thickness of each layer, for example, in the case where the dimensions of the multilayer ceramic capacitor 10 are 0603 (0.6mm × 0.3mm × 0.3mm), can be formed as shown in the following example. The thickness t[19a] of the first layer 19a is greater than 0μm and less than 10μm. The thickness t[19b] of the second layer 19b is greater than 0μm and less than 20μm. The thickness t[19c] of the third layer 19c is greater than 0μm and less than 60μm. Furthermore, here, the thickness of each layer is a dimension along the Y-axis direction. The thickness of each layer can be appropriately changed according to the dimensions of the multilayer ceramic capacitor 10, but the thickness of each layer can be formed such that the thickness t[19a] of the first layer 19a < the thickness t[19b] of the second layer 19b < the thickness t[19c] of the third layer 19c. The comparison of the thicknesses of each layer can be a comparison of the maximum thicknesses or a comparison of the average thicknesses. The relationship of the thicknesses of each layer can be derived from the average particle size of the particles constituting each layer and the number of particles required for each layer.

[0072] When each layer is composed of a single particle, it is prone to becoming a layer with many penetration paths for moisture, etc. Therefore, it is preferable that each layer consists of 2 to 5 particles in the thickness direction, and it is more preferable that each layer consists of 3 to 5 particles in the thickness direction, taking into account the continuity of mechanical strength such as peeling between layers.

[0073] The external electrodes 14a and 14b have: a base film 21 formed in such a way as to cover the surface of the protective portion 17 from which the internal electrodes are led out; and a coating 22 formed on the base film 21. Figures 1 to 3In this case, a base film 21 is formed in a manner covering the end face 11a, and a coating 22 is formed on the base film 21. The base film 21 is, for example, a sintered film or a sputtered film obtained by firing a conductive paste. The coating 22 is a film formed by electrolytic plating. The films of the external electrodes 14a and 14b are, for example, formed of metals or alloys with nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), silver (Ag), gold (Au) as the main components.

[0074] [Manufacturing method of multilayer ceramic capacitor 10]

[0075] Figure 5 This is a flowchart illustrating the manufacturing method of the multilayer ceramic capacitor 10. Figures 6 to 9 This is a schematic diagram illustrating the manufacturing process of the multilayer ceramic capacitor 10. Below, according to... Figure 5 The flowchart shown is for reference as appropriate. Figures 6 to 9 The manufacturing method of the multilayer ceramic capacitor 10 is described.

[0076] (Step S01: Fabrication of ceramic laminate C)

[0077] In step S01, an unfired ceramic laminate (laminated sheet) C is produced by stacking and cutting ceramic sheets 101 and 102 for forming capacitor portion 16 with ceramic sheet 103 for forming cover portion 18.

[0078] Before fabricating the ceramic laminate C, a dielectric material is prepared. The A-site and B-site elements contained in the dielectric layer 15 are typically included in the dielectric layer 15 as a sintered body of ABO3 particles. For example, barium titanate is a tetragonal compound with a perovskite structure, exhibiting a high relative permittivity. This barium titanate is typically obtained by reacting titanium raw materials such as titanium dioxide with barium raw materials such as barium carbonate to synthesize barium titanate. Various methods are known for synthesizing the ceramic, the main component of the dielectric layer 15, including solid-state methods, sol-gel methods, and hydrothermal methods. In this embodiment, any of these methods can be employed.

[0079] In the obtained ceramic raw material powder, specified additive compounds may be added according to the purpose. Examples of additive compounds include oxides of zirconium (Zr), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (scandium (Sc), cerium (Ce), neodymium (Nd), yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0080] For example, a ceramic material is prepared by wet mixing a compound containing additives into ceramic raw material powder, followed by drying and pulverization. For example, the ceramic material obtained as described above can be pulverized as needed to adjust the particle size, or the particle size can be adjusted by combining it with a classification process. Through the above steps, a dielectric material is obtained.

[0081] Figure 6 The ceramic sheets 101, 102, and 103 shown are configured as unfired dielectric green sheets comprising a dielectric material made of dielectric ceramic, an organic binder, and other additives. An unfired first internal electrode pattern 112 corresponding to the first internal electrode layer 12 is formed on ceramic sheet 101. An unfired second internal electrode pattern 113 corresponding to the second internal electrode layer 13 is formed on ceramic sheet 102. No internal electrode is formed on ceramic sheet 103. Furthermore, ceramic sheets 101, 102, and 103 can be obtained according to the following method: A binder such as polyvinyl butyral (PVB) resin, an organic solvent such as ethanol or toluene, and a plasticizer are added to the obtained raw material powder and wet-mixed. Using the obtained slurry, the ceramic green sheet 51 is coated onto a substrate using, for example, a molding method or a doctor blade method, and then dried. The substrate is, for example, a polyethylene terephthalate (PET) film.

[0082] The first internal electrode layer 12 and the second internal electrode layer 13 are primarily composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn), or alloys containing them. Noble metals such as platinum (Pt), palladium (Pd), silver (Ag), and gold (Au), or alloys containing them, may also be used. Therefore, a metal conductive paste for forming internal electrodes containing these materials and an organic binder is prepared. The internal electrode patterns 112 and 113 have multiple strip-shaped electrode patterns extending transversely through a cut line Lx parallel to the X-axis and along a cut line Ly parallel to the Y-axis. These internal electrode patterns 112 and 113 can be formed by printing the metal conductive paste using methods such as screen printing or gravure printing. The internal electrode formation method is not limited to printing; plating, vacuum evaporation, sputtering, and CVD methods may also be used.

[0083] Ceramic tiles 101, 102, etc. Figure 6 As shown, the ceramic sheets 101 and 102 are stacked alternately in the Z-axis direction. The stacked bodies of ceramic sheets 101 and 102 correspond to the capacitor portion 16 and the end edge portion 20. Ceramic sheet 103 is stacked on the upper and lower surfaces of the unfired stacked bodies of ceramic sheets 101 and 102 in the Z-axis direction. The stacked body of ceramic sheet 103 corresponds to the cover portion 18. In addition, the number of stacked ceramic sheets 101, 102, and 103 can be adjusted appropriately.

[0084] Next, the laminated ceramic sheets 101, 102, and 103 are pressed together along the Z-axis and then cut along the cutting lines Lx and Ly. This produces a... Figure 7 The laminated sheet C shown is shown.

[0085] The laminate C has: an unburned capacitor portion 116 with unburned internal electrode patterns 112, 113; an unburned cover portion 118; and an unburned end edge portion 120. The laminate C has: a side surface Cb as a cut surface corresponding to the cut line Lx; and an end surface Ca as a cut surface corresponding to the cut line Ly. The ends of the unburned internal electrode patterns 112, 113 are exposed from the side surface Cb.

[0086] (Step 02: Form the side edge portion 119)

[0087] In step S02, a side edge portion 119 is formed on the side surface Cb of the laminate C. An example of the forming method is given below.

[0088] The side edge portion 119 includes an unfired first layer 119a, a second layer 119b, and a third layer 119c. In this embodiment, the first layer 119a, the second layer 119b, and the third layer 119c are sequentially formed on each side surface Cb by paste impregnation. Alternatively, in this embodiment, the adhesive removal treatment of the laminated sheet C can be pre-completed before forming the side edge portion 119. By pre-completing the adhesive removal treatment, the sheet or paste to be used as the protective portion enters the portion where the adhesive has been removed. As a result, the bonding strength of each layer is improved. The adhesive removal treatment can also be performed before (step S03: firing) or simultaneously during (step S03: firing).

[0089] First, such as Figure 8 As shown in (A), a first layer 119a is formed on one side Cb. Then, as... Figure 8 As shown in (B), the second layer 119b is formed in a manner that covers the first layer 119a. Then, as... Figure 8 As shown in (C), the third layer 119c is formed in a manner that covers the second layer 119b.

[0090] After forming the first layer 119a, the second layer 119b, and the third layer 119c on one side Cb, the same process is repeated on the other side Cb to form the first layer 119a, the second layer 119b, and the third layer 119c. Thus, a product is manufactured. Figure 9 The unfired ceramic body 111 is shown.

[0091] In addition, the first layer 119a, the second layer 119b, and the third layer 119c can each be formed by attaching ceramic sheets.

[0092] The first layer 119a is mainly composed of a ceramic material made of dielectric ceramic, containing one or more elements selected from Mg, Yb, and Er, as well as other additives, but not Mn. The second layer 119b is mainly composed of a ceramic material made of dielectric ceramic, containing Mn, glass, and other additives. The third layer 119c is mainly composed of a ceramic material made of dielectric ceramic, containing glass and other additives such as Mo, BN, and Si. All three layers contain a binder. The first layer 119a does not contain Mn before firing. In this case, the concentration gradient of Mn after firing is: first layer 119a < second layer 119b.

[0093] (Step S03: Firing)

[0094] In step S03, the ceramic body 111 obtained in step S02 is fired to produce... Figure 1 The ceramic body 11 of the multilayer ceramic capacitor 10 shown. The firing temperature in step S03 can be determined based on the sintering temperature of the ceramic body 111. Furthermore, firing can be carried out, for example, in a reducing atmosphere or a low oxygen partial pressure atmosphere. For example, at an oxygen partial pressure of 10... -5 ~10 -8 The firing process is carried out in a reducing atmosphere with an atm and a temperature range of 1100℃~1300℃ for 5 minutes to 10 hours.

[0095] The first layer 119a contains one or more elements among Mg, Yb, and Er, which promote densification but do not easily diffuse during firing. Therefore, it does not significantly affect the grain growth of the dielectric within the laminate C. Furthermore, Mn is a densifying component that diffuses easily during firing, but the first layer 119a does not contain Mn, thus it does not affect the grain growth of the dielectric within the laminate C. Consequently, the grain growth of the dielectric in the laminate C adjacent to the first layer 119a is not inhibited. As a result, the effective capacitance of the capacitor portion 16 formed after firing can be ensured.

[0096] The second layer 119b contains manganese (Mn). Mn diffuses towards the laminate C, but because the first layer 19a is located between the laminate C and the second layer 119b, Mn has difficulty reaching the laminate C. As a result, the effective capacitance of the capacitor portion 16 formed after firing is ensured. Furthermore, the second layer 119b contains glass components. These glass components do not easily diffuse into the first layer 119a, which becomes a dense layer. Therefore, the glass components mainly diffuse into the third layer 119c. The glass components diffused into the third layer 119c fill the pores within it. This densifies the third layer 119c, improving its moisture resistance.

[0097] (Step S04: Formation of basement membrane)

[0098] In step S04, Figure 2 and Figure 3 A conductive base film 21 is formed on the end face 11a, side face 11b and main face 11c shown.

[0099] The base film 21 is formed by coating unfired electrode material onto the end face 11a, side face 11b, and main face 11c. The coating method can be, for example, dipping, but can also be other known methods, such as printing or sputtering, or a combination thereof. Next, the unfired electrode material is welded. Welding can be performed, for example, in a reducing atmosphere or a low oxygen partial pressure atmosphere.

[0100] (Step S05: Forming a coating)

[0101] In step S05, the multilayer ceramic capacitor 10 with the base film 21 is immersed in a plating solution for forming the coating 22 for electrolytic plating. Thus, the coating 22 is formed.

[0102] Through the above steps, a product is manufactured. Figures 1-3 The stacked ceramic capacitor 10 shown.

[0103] In step S02, when preparing the ceramic material composed of dielectric ceramic to become the first layer 119a, a dielectric material that does not contain one or more elements selected from Mg, Yb, and Er and does not contain Mn can also be prepared and used. Other steps can be performed in the same manner as in the case where one or more elements selected from Mg, Yb, and Er are present. That is, by preparing the material such that the ratio of the number of atoms at the A-site and B-site of the perovskite structure within the dielectric of the first layer 119a is ((Ba+Sr+Ca) / (Ti+Zr+Hf)), and preparing the material to satisfy a layer ratio where ((Ba+Sr+Ca) / (Ti+Zr+Hf)) is less than 0.96 or greater than 1.02, the first layer 119a as described above can be produced. In this case, the influence of Mn contained in the second layer 119b on the capacitor portion can also be eliminated, and a multilayer ceramic capacitor 10 with excellent adhesion to the capacitor portion can be obtained using the dense first layer 119a.

[0104] (Second Implementation)

[0105] Next, the stacked ceramic capacitor 50 of the second embodiment will be described. Figure 10 The second embodiment of the multilayer ceramic capacitor 50 is arranged along a path equivalent to... Figure 1 The cross-sectional view is obtained by cutting the AA′ line in the diagram. Figure 11 This is a schematic cross-sectional view showing the manufacturing process of the multilayer ceramic capacitor 50 according to the second embodiment.

[0106] Reference Figure 10 The protective portion 17 includes a cover portion 18, which comprises a first layer 18a, a second layer 18b, and a third layer 18c. That is, in the stacked ceramic capacitor 50 of the second embodiment, the cover portion 18, like the side edge portion 19, includes a three-layer structure. The components forming the first layer 18a, the second layer 18b, and the third layer 18c in the cover portion 18 are identical to the components forming the first layer 19a, the second layer 19b, and the third layer 19c in the side edge portion 19. Therefore, the first layer 18a, the second layer 18b, and the third layer 18c in the cover portion 18 have the same function as the first layer 19a, the second layer 19b, and the third layer 19c in the side edge portion 19.

[0107] The first layer 18a, the second layer 18b, and the third layer 18c are connected by, as follows: Figure 11 As shown, ceramic sheets 103a, 103b, and 103c are stacked to form ceramic sheet 103. Ceramic sheet 103a corresponds to the first layer 18a. Ceramic sheet 103b corresponds to the second layer 18b. Ceramic sheet 103c corresponds to the third layer 18c.

[0108] Then, by following the same process as in the first embodiment, the stacked ceramic capacitor 50 of the second embodiment can be obtained.

[0109] The various embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention.

[0110] In the above embodiments, a multilayer ceramic capacitor 10 was described as an example of a multilayer ceramic electronic component. However, the present invention can be applied to all multilayer ceramic electronic components in which the dielectric layer and the internal electrode are stacked. Examples of such multilayer ceramic electronic components include surface-mount varistors and surface-mount thermistors.

[0111] Explanation of reference numerals in the attached figures

[0112] 10, 50…Layered ceramic capacitor, 11…Ceramic body, 11a…End face, 11b…Side face, 11c…Main face, 12, 13…Internal electrode, 14…External electrode, 17…Protective part, 18…Covering part, 18a…First layer, 18b…Second layer, 18c…Third layer, 19…Side edge part, 19a…First layer, 19b…Second layer, 19c…Third layer, 21…Base film, 22…Coating.

Claims

1. A laminated ceramic electronic component, characterized in that, include: A main body having a generally rectangular parallelepiped shape includes a capacitor portion formed by alternating layers of a first internal electrode layer and a second internal electrode layer separated by a dielectric layer, and a protective portion disposed on the outside of the capacitor portion; and External electrodes are formed on the surface of the body at intervals from each other, and the first internal electrode layer and the second internal electrode layer are led out to each of the external electrodes. The dielectric layer and the protective layer are each primarily composed of dielectric ceramic. The protective portion includes a first layer adjacent to the capacitor portion, a second layer adjacent to the first layer, and a third layer adjacent to the second layer. The second layer contains a higher proportion of Mn atoms than the first layer. The glass composition of the second layer is greater than that of the first layer and the third layer.

2. The laminated ceramic electronic component according to claim 1, characterized in that: The first layer contains at least one element selected from Mg, Yb, and Er, and the total content of the elements is greater than the Mn content in the first layer.

3. The laminated ceramic electronic component according to claim 1 or 2, characterized in that: The Mn content in the second layer is greater than the combined content of Mg, Yb, and Er.

4. The laminated ceramic electronic component according to any one of claims 1 to 3, characterized in that: The third layer contains at least one element selected from Mo, B, and Si, and the total content of Mo, B, and Si in the third layer is greater than the content of Mn.

5. The laminated ceramic electronic component according to claim 1, characterized in that: The content of the component in the first layer is more than 0% and less than 100% of the content of the component in the second layer.

6. The laminated ceramic electronic component according to claim 1, characterized in that: The first layer contains Cu.

7. The laminated ceramic electronic component according to claim 1, characterized in that: When the first layer is set to have an A / B ratio of ((Ba+Sr+Ca) / (Ti+Zr+Hf)) where the number of atoms at the A site and B site of the perovskite structure within the dielectric is ((Ba+Sr+Ca) / (Ti+Zr+Hf)), it satisfies that ((Ba+Sr+Ca) / (Ti+Zr+Hf)) is less than 0.96 or greater than 1.

02.

8. The laminated ceramic electronic component according to claim 1, characterized in that: The protective portion includes at least one of a side edge portion and a covering portion.

9. A method for manufacturing a laminated ceramic electronic component, characterized in that, include: The process of forming a laminated body, wherein the laminated body is a capacitor portion formed by alternately stacking a first internal electrode layer and a second internal electrode layer separated by a dielectric layer; The process of forming a protective portion by providing a first layer adjacent to the exposed surfaces of the first internal electrode layer and the second internal electrode layer, a second layer adjacent to the first layer, and a third layer adjacent to the second layer in the laminated body, thereby creating an unfired main body; The process of firing the main body; and In the process of forming the external electrode in the body after firing. The dielectric layer and the protective layer are each primarily composed of dielectric ceramic. The second layer contains a higher proportion of Mn atoms than the first layer. The glass composition of the second layer is greater than that of the first layer and the third layer.

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