Low-delay LVDS / CML video transmission anti-electromagnetic interference method and system

Abstract

The invention discloses an anti-electromagnetic interference method for low-delay LVDS / CML video transmission, and relates to video transmission. The method comprises the following steps: sampling a received differential video signal in real time at an LVDS / CML receiving end to obtain a continuous differential signal sequence; carrying out edge detection processing on the differential signal sequence, extracting a rising edge moment and a falling edge moment of each signal jump, and constructing edge time sequence characteristics; processing the edge time sequence characteristics by using an edge compensation algorithm to obtain an edge correction signal; processing the edge correction signal by using a jitter suppression algorithm to obtain an edge stabilization signal; and performing clock data recovery processing on the differential signal sequence according to the edge stabilizing signal to obtain an anti-electromagnetic interference video data stream. Aiming at difficulty in clock data recovery caused by edge jitter and degradation of LVDS / CML video transmission signals in a strong electromagnetic interference environment in the prior art, the eye pattern closing phenomenon caused by electromagnetic interference is effectively inhibited, and the error rate is reduced.

Description

Technical Field

[0001] This application relates to the field of video transmission, and in particular to a method and system for resisting electromagnetic interference in low-latency LVDS / CML video transmission. Background Technology

[0002] With the rapid development of industrial automation and intelligent manufacturing, high-speed video transmission technology is increasingly being used in fields such as power system monitoring, industrial inspection, medical imaging, and aerospace. LVDS and CML, as two mainstream high-speed differential signal transmission standards, have become important technologies for video data transmission due to their low power consumption, high bandwidth, and good common-mode interference immunity. In typical application scenarios such as substations, industrial production lines, rail transportation, and ships, LVDS / CML video transmission links need to operate stably in complex electromagnetic environments to provide high-quality video data support for upper-layer applications.

[0003] However, the aforementioned application scenarios are generally plagued by strong electromagnetic interference sources, including power frequency power supplies, high-frequency switching power supplies, frequency converters, and high-power power electronic equipment. The electromagnetic fields generated by these sources act on the LVDS / CML transmission link through spatial radiation or conductive coupling, affecting the integrity of the differential signal. Although differential transmission itself has a certain common-mode interference suppression capability, when the electromagnetic interference intensity exceeds a certain threshold or when there is a specific relationship between the interference frequency and the signal frequency, interference energy can still couple into the differential signal, leading to signal quality degradation.

[0004] The impact of electromagnetic interference on LVDS / CML video transmission is mainly reflected in the timing characteristics of signal edges. When interference couples into a differential signal, the zero-crossing times of the rising and falling edges of the signal will shift irregularly, manifesting as edge jitter. This edge jitter includes deterministic components related to the frequency of the interference source, as well as random components caused by thermal noise and random interference. The presence of edge jitter makes it difficult for the receiver to accurately determine the data sampling time when recovering clock data. From the perspective of the signal eye diagram, this manifests as a decrease or even complete closure of the horizontal opening of the eye diagram, compressing the time margin for data decision-making, and increasing the bit error rate. In severe cases, it can lead to video transmission interruption or obvious abnormal phenomena such as stripes, flickering, and mosaic in the image.

[0005] Therefore, how to effectively suppress edge jitter of LVDS / CML video transmission signals, achieve stable clock data recovery and determine the optimal data sampling time in a strong electromagnetic interference environment, while meeting the low latency requirements of video transmission, has become a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0006] To address the difficulty in clock data recovery caused by edge jitter degradation of LVDS / CML video transmission signals under strong electromagnetic interference environments in existing technologies, this application provides a method and system for low-latency LVDS / CML video transmission to resist electromagnetic interference. This method restores a stable clock signal and determines the optimal data sampling time without increasing transmission delay, effectively suppressing eye diagram closure caused by electromagnetic interference and reducing the bit error rate.

[0007] One aspect of this application provides a method for resisting electromagnetic interference in low-latency LVDS / CML video transmission, comprising: sampling the received differential video signal in real time at the LVDS / CML receiver to obtain a continuous differential signal sequence; performing edge detection processing on the differential signal sequence to extract the rising edge time and falling edge time of each signal transition to construct edge timing features; processing the edge timing features using an edge compensation algorithm to obtain an edge correction signal; processing the edge correction signal using a jitter suppression algorithm to obtain an edge stable signal; and performing clock data recovery processing on the differential signal sequence based on the edge stable signal to obtain an electromagnetic interference-resistant video data stream.

[0008] Furthermore, edge timing features are processed using an edge compensation algorithm, including: using a preset clock period as a reference, calculating the deviation between the actual time interval between adjacent edges in the edge timing features and the reference; arranging the deviations in chronological order to construct a jitter vector sequence; obtaining prior information on the frequency of interference sources in the electromagnetic environment of the LVDS / CML transmission link, and constructing a target frequency set based on the prior information; performing directional frequency domain analysis on the jitter vector sequence at the frequency points corresponding to the target frequency set, and extracting the jitter components associated with the interference source frequencies as interference-related jitter components; segmenting the jitter vector sequence using a sliding window, updating the amplitude and phase parameters of the interference-related jitter components in each window, and predicting the jitter offset of subsequent edges in the current window based on the updated amplitude and phase parameters; generating time compensation amounts for each edge based on the predicted jitter offsets, and superimposing the time compensation amounts onto the corresponding rising or falling edge times in the edge timing features to obtain a corrected edge time sequence; and constructing an edge correction signal based on the corrected edge time sequence.

[0009] Specifically, edge jitter caused by electromagnetic interference is essentially the offset of the zero-crossing time of the edge relative to the ideal time, belonging to the time domain. By performing periodic analysis on the jitter vector sequence, deterministic jitter components caused by fixed-frequency electromagnetic interference (such as power frequency and its harmonics) can be extracted. In this application, prior information on the frequencies of electromagnetic interference sources (such as 50Hz / 60Hz power frequency and its harmonics, switching power supply frequency, inverter carrier frequency, etc.) is introduced to construct a target frequency set, and directional frequency domain analysis is performed only at the target frequency points. In a strong electromagnetic interference environment, how to accurately identify the edge jitter components caused by external electromagnetic interference and avoid misjudging the inherent jitter of the system as interference jitter, leading to overcompensation or incorrect compensation direction?

[0010] Furthermore, constructing a target frequency set based on prior information includes: determining the type of potential interference source according to the deployment environment information of the LVDS / CML transmission link, where the potential interference source type includes at least one of power frequency power supply, switching power supply and frequency conversion drive equipment; obtaining the corresponding fundamental frequency according to the type of potential interference source, and calculating the preset order harmonic frequency of the fundamental frequency; and constructing the target frequency set by combining the fundamental frequency and the preset order harmonic frequency.

[0011] Furthermore, a sliding window is used to segment the jitter vector sequence, including: determining the window length of the main window based on the fundamental frequency in the target frequency set, the window length of the main window being no less than a preset multiple of the period corresponding to the fundamental frequency; determining corresponding sub-windows based on each harmonic frequency in the target frequency set, the window length of each sub-window being the window length of the main window divided by the corresponding harmonic order, the main window and each sub-window together forming a hierarchical sliding window; synchronously moving the main window and each sub-window with a preset step size, and performing directional frequency domain analysis on the jitter vector sequence at the frequency point corresponding to the fundamental frequency within the main window to obtain the amplitude and phase parameters of the fundamental jitter component. Within each sub-window, directional frequency domain analysis is performed on the jitter vector sequence at the corresponding harmonic frequency to obtain the amplitude and phase parameters of each harmonic jitter component. Based on the integer multiple constraint relationship between the phase of each harmonic and the fundamental phase, the phase parameters of each harmonic jitter component are jointly corrected to obtain the corrected phase parameters. The amplitude and phase changes of the interference-related jitter components between the current window and the previous window are calculated. The fusion weight is adaptively adjusted according to the amplitude and phase changes. The amplitude and phase parameters of the current window are weighted and fused with those of the previous window using the fusion weight to obtain the updated amplitude and phase parameters.

[0012] Furthermore, the edge correction signal is processed using a jitter suppression algorithm, including: extracting the time interval between adjacent edges from the corrected edge time sequence, calculating the residual deviation between the time interval and the preset clock period, and arranging the residual deviations in chronological order to construct a residual jitter sequence; separating the residual jitter sequence into low-frequency drift components and high-frequency random components, where the low-frequency drift component is obtained by low-pass filtering the residual jitter sequence, and the high-frequency random component is the difference between the residual jitter sequence and the low-frequency drift component; generating a drift compensation amount for the low-frequency drift component using a trend-following method, which offsets the systematic timing offset caused by temperature drift and device aging; setting a limiting threshold for the high-frequency random component based on its statistical distribution characteristics, limiting high-frequency random components exceeding the limiting threshold to the limit threshold; synthesizing the drift compensation amount and the limited high-frequency random component to obtain a comprehensive jitter correction amount; superimposing the comprehensive jitter correction amount onto the corresponding rising or falling edge time in the corrected edge time sequence to obtain a stabilized edge time sequence; and constructing an edge-stabilized signal based on the stabilized edge time sequence.

[0013] Specifically, in LVDS / CML video transmission systems, the residual jitter after deterministic jitter compensation comprises two different types of components: one is low-frequency systematic drift caused by factors such as temperature drift and device parameter drift, which exhibits a slowly changing trend; the other is high-frequency random jitter caused by factors such as thermal noise and crosstalk, which exhibits a random distribution. If these two types of components are treated uniformly without distinction, problems such as low-frequency drift tracking lag or excessive amplification of high-frequency noise may occur. This application achieves targeted suppression of residual jitter components of different natures through frequency domain separation and divide-and-conquer processing.

[0014] Furthermore, the residual jitter sequence is separated into low-frequency drift components and high-frequency random components, including: determining the drift cutoff frequency based on the thermal time constant of the LVDS / CML transmission link, where the thermal time constant characterizes the time scale of the device temperature response in the transmission link; using the drift cutoff frequency as the separation boundary, performing low-pass filtering on the residual jitter sequence, and using the filtered output as the low-frequency drift component; calculating the difference between the residual jitter sequence and the low-frequency drift component, and using the difference as the high-frequency random component.

[0015] In particular, low-frequency drift in the LVDS / CML transmission link mainly originates from timing parameter drift caused by device temperature changes, and the rate of change of this drift is limited by the device's thermal time constant. The thermal time constant characterizes the characteristic time required for the device temperature to transition from one steady state to another, and determines the highest frequency of timing offset caused by temperature drift.

[0016] Furthermore, a trend-following method is used to generate drift compensation, including: performing first-order difference operations on the low-frequency drift components to obtain a drift rate of change sequence; determining the drift trend direction based on the sign persistence of the drift rate of change sequence; when multiple consecutive sampling points of the drift rate of change sequence maintain the same sign, the drift trend direction is determined to be monotonic drift; when the drift trend direction is monotonic drift, the trend slope is calculated based on the mean of the drift rate of change sequence, and linear extrapolation prediction is performed on the low-frequency drift components of subsequent sampling points based on the trend slope, with the negative of the predicted value used as the drift compensation; when the drift trend direction is non-monotonic drift, the negative of the low-frequency drift component of the current sampling point is used as the drift compensation.

[0017] In particular, low-frequency drift components exhibit a slow changing trend. If only the drift value at the current moment is used for compensation, there will be a compensation lag problem. When the drift shows a monotonic trend, a linear extrapolation method is used to predict subsequent drift values ​​and generate compensation amounts in advance, achieving proactive compensation for the drift trend. When the drift shows a non-monotonic change, the opposite of the current drift value is used as the compensation amount to avoid introducing additional errors due to erroneous trend predictions.

[0018] Furthermore, clock data recovery processing is performed on the differential signal sequence based on the edge-stabilized signal, including: extracting the stabilization time interval between adjacent edges from the stabilized edge time sequence; calculating the recovery clock period based on the stabilization time interval; determining the sampling phase offset based on the time interval difference between the rising edge and falling edge in the stabilized edge time sequence; determining the data sampling time based on the recovery clock period and the sampling phase offset; and performing level determination on the differential signal sequence at the data sampling time to obtain an electromagnetic interference-resistant video data stream.

[0019] Furthermore, the first time interval from the rising edge to the adjacent falling edge in the stable edge time sequence is calculated; the second time interval from the falling edge to the adjacent rising edge in the stable edge time sequence is calculated; the duty cycle offset is calculated based on the difference between the first time interval and the second time interval; the sampling phase offset is determined based on the duty cycle offset, the direction of the sampling phase offset is related to the sign of the duty cycle offset, and the magnitude of the sampling phase offset is positively correlated with the absolute value of the duty cycle offset.

[0020] Specifically, by calculating the first time interval from the rising edge to the falling edge and the second time interval from the falling edge to the rising edge, the difference between the duration of the high-level signal and the duration of the low-level signal is quantified. This difference reflects the duty cycle offset characteristic of the signal. When the first time interval is greater than the second time interval, it indicates that the duration of the high-level signal is longer than the duration of the low-level signal, and the maximum eye opening position shifts towards the high-level region, so the sampling phase offset should be positive; conversely, the sampling phase offset should be negative. The magnitude of the sampling phase offset is positively correlated with the absolute value of the duty cycle offset; the larger the duty cycle offset, the farther the sampling point deviates from the center of the period. This application achieves adaptive tracking of the sampling phase for signal edge asymmetry, ensuring that the data sampling time always tends towards the actual maximum eye opening position.

[0021] Another aspect of this application provides a low-latency LVDS / CML video transmission system resistant to electromagnetic interference, comprising: a signal sampling module for real-time sampling of received differential video signals at the LVDS / CML receiver to obtain a continuous differential signal sequence; an edge detection module for edge detection processing of the differential signal sequence, extracting the rising and falling edge times of each signal transition to construct edge timing features; an edge compensation module for processing the edge timing features using an edge compensation algorithm to obtain an edge correction signal; a jitter suppression module for processing the edge correction signal using a jitter suppression algorithm to obtain an edge-stabilized signal; and a clock recovery module for performing clock data recovery processing on the differential signal sequence based on the edge-stabilized signal to obtain an electromagnetic interference-resistant video data stream.

[0022] Compared to existing technologies, the advantages of this application are: To address the problem of difficult clock data recovery caused by edge jitter degradation in LVDS / CML video transmission signals under strong electromagnetic interference environments in existing technologies, this application provides a method and system for low-latency LVDS / CML video transmission to resist electromagnetic interference. This method can extract and compensate for deterministic jitter components associated with the interference source frequency through an edge compensation algorithm, separate and suppress low-frequency drift components and high-frequency random components in the residual jitter through a jitter suppression algorithm, and adaptively adjust the sampling phase based on the time interval difference between the rising and falling edges of the signal. This allows for the recovery of a stable clock signal and determination of the optimal data sampling time without increasing transmission delay, effectively suppressing eye diagram closure caused by electromagnetic interference, reducing the bit error rate, and ensuring the reliability of video transmission. Attached Figure Description

[0023] This application will be further described by way of exemplary embodiments, which will be described in detail with reference to the accompanying drawings. These embodiments are not limiting; in these embodiments, the same reference numerals denote the same structures, wherein: Figure 1This is an exemplary flowchart illustrating a method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to some embodiments of this application; Figure 2 This is an exemplary flowchart of the reconstructed signal according to some embodiments of this application; Figure 3 This is an exemplary flowchart illustrating the construction of an edge-stable signal according to some embodiments of this application; Figure 4 This is an exemplary flowchart illustrating the generation of electromagnetic interference resistant video data streams according to some embodiments of this application. Detailed Implementation

[0024] The methods and systems provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0025] like Figure 1 As shown, this application includes: real-time sampling of the received differential video signal at the LVDS / CML receiver to obtain a continuous differential signal sequence; edge detection processing of the differential signal sequence to extract the rising and falling edge times of each signal transition and construct edge timing features; processing the edge timing features using an edge compensation algorithm to obtain an edge correction signal; processing the edge correction signal using a jitter suppression algorithm to obtain an edge-stabilized signal; and performing clock data recovery processing on the differential signal sequence based on the edge-stabilized signal to obtain an electromagnetic interference-resistant video data stream.

[0026] Step 1: Differential video signal sampling: The received differential video signal is sampled in real time at the LVDS / CML receiver to obtain a continuous differential signal sequence. At the receiver, for example, but not limited to, a high-speed sampling module is installed on the video receiving device to sample the differential video signal in real time. This high-speed sampling module mainly includes a differential receiver and an analog-to-digital converter.

[0027] Step 2: Edge temporal feature extraction: Edge detection processing is performed on the differential signal sequence to extract the rising and falling edge times of each signal transition, constructing edge timing features. For example, but not limited to, an edge detection module is set up at the receiver, and a zero-crossing detection algorithm is used to detect the edges of the differential signal sequence.

[0028] Step 3: Edge Compensation Processing like Figure 2As shown, electromagnetic interference typically affects LVDS / CML transmission links through spatial radiation or conductive coupling. This application addresses edge jitter detected at the receiver. Common interference sources include power frequency power supplies, switching power supplies, and frequency converters. For power frequency power supply interference, its frequency characteristics are fixed and can be directly determined based on prior information.

[0029] The directional frequency domain analysis method based on prior information of the interference source frequency compensates for the edge timing characteristics. The edge compensation algorithm analyzes the energy distribution of the jitter vector sequence at a specific frequency point to accurately extract the deterministic jitter component associated with the electromagnetic interference source. Based on the interference source frequency information fed back by the interference source identification module and the jitter component parameters extracted by the frequency domain analysis module, the compensation parameters are dynamically updated to ensure that the edge compensation effect is optimal under the dynamic changes of the electromagnetic interference environment.

[0030] Step 3.1: Construction of jitter vector sequence In this application, determining the preset clock period requires first obtaining the nominal bit rate of the LVDS / CML transmission link. For the LVDS standard interface, the nominal bit rate is determined based on the specific application scenario; the preset clock period is 1ns when the nominal bit rate is 1Gbps, and 320ps when the nominal bit rate is 3.125Gbps. For the CML standard interface, the nominal bit rate is usually higher; the preset clock period is 160ps when the nominal bit rate is 6.25Gbps, and 100ps when the nominal bit rate is 10Gbps.

[0031] Calculate the actual time interval between the nth edge and the (n-1)th edge. jitter deviation Calculated as ,in, To preset the clock period, Arranged in chronological order to form a jitter vector sequence The actual time interval The jitter deviation is calculated by the difference between adjacent edge times in the edge timing characteristics. A positive value indicates that the current edge lags behind the ideal position, resulting in jitter deviation. A negative value indicates that the current edge is ahead of the ideal position. The length N of the jitter vector sequence is determined according to the frequency resolution requirements of the subsequent frequency domain analysis.

[0032] Step 3.2: Construction of the target frequency set The construction of the target frequency set specifically includes: ① Determining the types of potential interference sources based on the deployment environment information of the LVDS / CML transmission link. Potential interference source types include at least one of power frequency power supplies, switching power supplies, and frequency converters. ② Obtaining the corresponding fundamental frequency based on the type of potential interference source. The fundamental frequency of a power frequency power supply is 50Hz or 60Hz. The fundamental frequency of a switching power supply is determined based on its switching frequency, typically in the range of 100kHz to 1MHz. The fundamental frequency of a frequency converter is determined based on its carrier frequency, typically in the range of 2kHz to 20kHz. ③ Calculating the preset order harmonic frequencies of the fundamental frequency. The preset orders include 2 to 10. The frequency of the kth harmonic is The upper limit of the preset order is determined based on the nonlinear characteristics of the interference source and the bandwidth of the transmission link. Harmonic frequencies exceeding the transmission link bandwidth are not included in the target frequency set. ④ The fundamental frequency and the preset order harmonic frequencies constitute the target frequency set. Where K is the preset highest harmonic order.

[0033] Step 3.3: Directional Frequency Domain Analysis The frequency domain components of the jitter vector sequence are calculated at the frequency points corresponding to the target frequency set using the Goertzel algorithm or discrete Fourier transform. For the target frequency... Calculate the complex amplitude of the jitter vector sequence at this frequency point. Extract its amplitude and phase As a parameter of the interference-related jitter component. Where the complex amplitude... The real part represents the in-phase component of that frequency component, and the complex amplitude. The imaginary part represents the quadrature component of that frequency component, and the amplitude... This indicates the jitter intensity and phase of the frequency component. This indicates the phase shift of the frequency component relative to the reference time.

[0034] Step 3.4: Sliding window processing and parameter update A combination of main windows and sub-windows is used to segment the jitter vector sequence. The sliding window processing specifically includes: ① Determining the window length of the main window based on the fundamental frequency in the target frequency set. The window length of the main window is not less than a preset multiple of the period corresponding to the fundamental frequency. The preset multiple is 3 to 5 times; for power frequency interference with a fundamental frequency of 50Hz, the main window length is not less than 60ms. ② Determining the corresponding sub-windows based on each harmonic frequency in the target frequency set. The window length of each sub-window is the window length of the main window divided by the corresponding harmonic order. For the k-th harmonic, the sub-window length is 1 / k of the main window length. The main window and all sub-windows together constitute a hierarchical sliding window. ③ Synchronously moving the main window and all sub-windows with a preset step size. The preset step size is 1 / 4 to 1 / 2 of the main window length. ④ In the main window, perform directional frequency domain analysis on the jitter vector sequence at the frequency point corresponding to the fundamental frequency to obtain the amplitude and phase parameters of the fundamental jitter component. In each sub-window, perform directional frequency domain analysis on the jitter vector sequence at the frequency point corresponding to the harmonic frequency to obtain the amplitude and phase parameters of each harmonic jitter component. ⑤ Based on the integer multiple constraint relationship between the phase of each harmonic and the phase of the fundamental frequency, perform joint correction on the phase parameters of each harmonic jitter component. The phase of the k-th harmonic should satisfy... The constraint relationship, where, The fundamental phase, To allow for phase deviation, phase parameters that do not meet the constraints are corrected to the constraint range, resulting in corrected phase parameters. ⑥ Calculate the amplitude and phase changes of the interference-related jitter components between the current window and the previous window. Adaptively adjust the fusion weights based on the amplitude and phase changes. Use the fusion weights to perform weighted fusion of the amplitude and phase parameters of the current window and the amplitude and phase parameters of the previous window to obtain updated amplitude and phase parameters.

[0035] Step 3.5: Compensation Amount Generation and Overlay Based on the updated amplitude and phase parameters of the interference-related jitter components, the jitter offset of each subsequent edge within the current window is predicted using the following formula: ,in, and These are the amplitude and phase parameters of the k-th frequency component, respectively. This is the time of the nth edge. The time compensation is the negative of the predicted jitter offset. The time compensation is then added to the corresponding edge time to obtain the corrected edge time. Corrected edge time sequence This constitutes the edge correction signal.

[0036] Step 4: Jitter Suppression Processing like Figure 3As shown, based on the statistical distribution characteristics of high-frequency random components, the standard deviation is first calculated and an amplitude limiting threshold is set. Then, the components exceeding the threshold are subjected to amplitude limiting processing.

[0037] The edge-corrected signal is processed using a residual jitter separation and differential suppression method. The jitter suppression algorithm separates the residual jitter into low-frequency drift components and high-frequency random components, and then uses differentiated strategies such as trend-following compensation and amplitude limiting to suppress them respectively. Based on the jitter distribution characteristics fed back by the real-time jitter statistical analysis module, the suppression parameters are dynamically adjusted to ensure optimal jitter suppression even when the residual jitter characteristics change. Preferably, but not limitingly, the jitter suppression processing specifically includes: Step 4.1: Construction of Residual Jitter Sequence Calculate the time interval between adjacent edges in the corrected edge time sequence. residual deviation ,Will Arranged in chronological order to form a residual jitter sequence The time interval The residual bias is calculated by the difference between the corrected edge times. A positive value indicates that the current edge interval is greater than the preset clock period, and the residual deviation is... A negative value indicates that the current edge interval is less than the preset clock period. The statistical characteristics of the residual jitter sequence reflect the overall distribution of residual jitter after edge compensation.

[0038] Step 4.2: Residual jitter separation A low-pass filtering method is used to separate the residual jitter sequence into low-frequency drift components and high-frequency random components. The residual jitter separation specifically includes: ① Determining the drift cutoff frequency: The drift cutoff frequency is determined based on the thermal time constant of the LVDS / CML transmission link. The thermal time constant characterizes the time scale of the temperature response of devices in the transmission link. The thermal time constant is typically in the range of seconds to minutes, and the drift cutoff frequency is set to 1 to 10 times the reciprocal of the thermal time constant, typically in the range of 0.01Hz to 1Hz. ② Using the drift cutoff frequency as the separation boundary, the residual jitter sequence is low-pass filtered, and the filtered output is taken as the low-frequency drift component. Low-pass filtering is achieved using a moving average filter or a first-order IIR low-pass filter. ③ The difference between the residual jitter sequence and the low-frequency drift component is calculated, and this difference is used as the high-frequency random component. The difference operation achieves a high-pass filtering effect in the frequency domain, and the high-frequency random component contains all components in the residual jitter sequence that are above the drift cutoff frequency.

[0039] Step 4.3: Suppression of low-frequency drift components A trend-following method based on the rate of change of drift is used to generate drift compensation. Specifically, this includes: ① performing a first-order difference operation on the low-frequency drift components to obtain the drift rate of change sequence. ② Determine the drift trend direction based on the sign persistence of the drift rate of change sequence. When multiple consecutive sampling points in the drift rate of change sequence maintain the same sign, the drift trend direction is determined to be monotonic drift. The threshold for the number of consecutive sampling points is set to 5 to 20. ③ When the drift trend direction is monotonic drift, calculate the trend slope based on the mean of the drift rate of change sequence. Based on the trend slope, perform linear extrapolation prediction on the low-frequency drift components of subsequent sampling points, and use the negative of the predicted value as the drift compensation amount. Trend Slope Where M is the number of sampling points used to calculate the trend slope, and the predicted value is... Drift compensation amount ④ When the drift trend is non-monotonic, the negative value of the low-frequency drift component at the current sampling point is used as the drift compensation amount. .

[0040] Step 4.4: Suppression of high-frequency random components An adaptive amplitude limiting method based on statistical distribution is used to suppress high-frequency random components, based on the standard deviation of the high-frequency random components. Set the amplitude limit threshold Where k is the limiting factor, which is usually taken as 2 to 3. At that time, Limiting The high-frequency random components after amplitude limiting are obtained. The selection of the limiting coefficient k determines the balance between the over-limit rate and the jitter suppression effect. When k is 2, the theoretical over-limit rate is about 4.6%, and when k is 3, the theoretical over-limit rate is about 0.3%. The smaller the limiting coefficient, the stronger the jitter suppression effect but the greater the signal distortion. The larger the limiting coefficient, the less the signal distortion but the weaker the jitter suppression effect.

[0041] Step 4.5: Constructing a signal combining jitter correction and edge stabilization Overall jitter correction amount Stabilization edge time Stabilized edge time sequence This constitutes an edge-stabilized signal. The comprehensive jitter correction includes both low-frequency drift compensation and high-frequency randomness suppression. The stabilized edge time is obtained by superimposing the comprehensive jitter correction onto the corrected edge time. The temporal stability of the stabilized edge time sequence is further improved compared to the corrected edge time sequence.

[0042] Step 5: Clock Data Recovery like Figure 4As shown, the adjustment steps for adaptive phase sampling are as follows: Based on the timing relationship between the rising and falling edges in the stabilized edge time sequence, first calculate the high-level duration and low-level duration, then sequentially obtain the duty cycle offset and sampling phase offset. The time interval between adjacent rising and falling edges is calculated as the first time interval, i.e., the high-level duration; the time interval between falling edges and adjacent rising edges is calculated as the second time interval, i.e., the low-level duration. The difference between the first and second time intervals is the duty cycle offset, i.e., the degree to which the signal duty cycle deviates from 50%. Multiplying the duty cycle offset by the phase adjustment coefficient yields the sampling phase offset, i.e., the adjustment amount for the optimal sampling time.

[0043] Clock data recovery processing specifically includes: Step 5.1: Restore clock cycle calculation Calculate the stabilization time interval between adjacent edges in the stabilization edge time sequence. The recovery clock period is obtained by statistically averaging the stabilization time intervals. .

[0044] Step 5.2: Determine the sampling phase offset The determination of the sampling phase offset specifically includes: ① calculating the first time interval from the rising edge to the adjacent falling edge in the stabilized edge time sequence. . ① The duration of the high level. ② Calculate the second time interval from the falling edge to the adjacent rising edge in the stabilized edge time sequence. . The duration of the low level. ③ Calculate the duty cycle offset based on the difference between the first and second time intervals. The duty cycle offset is calculated as follows: a positive value indicates that the high-level duration is greater than the low-level duration, i.e., the duty cycle is greater than 50%; a negative value indicates that the high-level duration is less than the low-level duration, i.e., the duty cycle is less than 50%. The absolute value of the duty cycle offset indicates the degree to which the duty cycle deviates from 50%. ④ The sampling phase offset is determined based on the duty cycle offset. The direction of the sampling phase offset is related to the sign of the duty cycle offset, and the magnitude of the sampling phase offset is positively correlated with the absolute value of the duty cycle offset. Where α is the phase adjustment coefficient, typically ranging from 0.25 to 0.5. At that time, the sampling phase shifts backward, when At that time, the sampling phase shifts forward. The phase adjustment coefficient is... The selection of the sampling phase determines the sensitivity of the sampling phase to the duty cycle shift. When the value is 0.5, the sampling phase offset is equal to half of the duty cycle offset. When the value is 0.25, the sampling phase offset is equal to one-quarter of the duty cycle offset.

[0045] Step 5.3: Determining the data sampling time and making a level decision Data sampling time At the data sampling time, the differential signal sequence is subjected to level determination. When the amplitude of the differential signal is higher than the determination threshold, it is determined as logic 1; when the amplitude of the differential signal is lower than the determination threshold, it is determined as logic 0. The determination results are arranged in chronological order to obtain the electromagnetic interference-resistant video data stream. The determination threshold is set according to the level range of the differential signal, usually set to the midpoint between high and low levels. The level determination adopts a hard decision method to directly output the binary result. The bit rate of the video data stream is equal to the reciprocal of the recovery clock period.

[0046] The foregoing illustrative description of the present application and its embodiments is not restrictive and can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. The accompanying drawings are only one embodiment of the present application, and the actual structure is not limited thereto. Therefore, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the spirit of the present application, such designs should fall within the scope of protection of this application. Furthermore, the word "comprising" does not exclude other elements or steps, and the word "a" preceding an element does not exclude the inclusion of "a plurality" of that element. Terms such as "first," "second," etc., are used to indicate names and do not indicate any specific order.

Claims

1. A method for resisting electromagnetic interference in low-latency LVDS / CML video transmission, characterized in that, include: The received differential video signal is sampled in real time at the LVDS / CML receiver to obtain a continuous differential signal sequence; Edge detection processing is performed on the differential signal sequence to extract the rising edge and falling edge times of each signal transition and construct edge timing features; Edge timing characteristics are processed using an edge compensation algorithm to obtain an edge correction signal; The edge correction signal is processed using a jitter suppression algorithm to obtain an edge-stabilized signal; Clock data recovery processing is performed on the differential signal sequence based on the edge-stabilized signal to obtain an electromagnetic interference-resistant video data stream.

2. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 1, characterized in that: Edge compensation algorithms are used to process edge timing features, including: Using a preset clock cycle as a reference, the deviation between the actual time interval between adjacent edges in the edge timing characteristics and the reference is calculated. Arrange the deviations in chronological order to construct a jitter vector sequence; Obtain prior information on the frequencies of interference sources in the electromagnetic environment of the LVDS / CML transmission link, and construct a target frequency set based on the prior information; Directional frequency domain analysis is performed on the jitter vector sequence at the frequency points corresponding to the target frequency set, and the jitter components associated with the interference source frequency are extracted as interference-related jitter components; A sliding window is used to segment the jitter vector sequence. Within each window, the amplitude and phase parameters of the interference-related jitter components are updated. Based on the updated amplitude and phase parameters, the jitter offset of each subsequent edge within the current window is predicted. The time compensation amount for each edge is generated based on the predicted jitter offset. The time compensation amount is then superimposed on the corresponding rising edge or falling edge time in the edge time sequence feature to obtain the corrected edge time sequence. An edge correction signal is constructed based on the corrected edge time sequence.

3. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 2, characterized in that: Construct a target frequency set based on prior information, including: Based on the deployment environment information of the LVDS / CML transmission link, the types of potential interference sources are determined. The types of potential interference sources include at least one of power frequency power supply, switching power supply and frequency conversion drive equipment. Obtain the corresponding fundamental frequency based on the type of potential interference source, and calculate the preset order harmonic frequency of the fundamental frequency; The fundamental frequency and the preset order harmonic frequencies constitute the target frequency set.

4. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 3, characterized in that: The jitter vector sequence is segmented using a sliding window, including: The window length of the main window is determined based on the fundamental frequency in the target frequency set; The corresponding sub-window is determined based on the window length of the main window and the harmonic frequencies in the target frequency set; Move the main window and each sub-window according to the preset step size. In the main window, perform directional frequency domain analysis on the jitter vector sequence for the fundamental frequency to obtain the amplitude and phase parameters of the fundamental jitter component. In each sub-window, perform directional frequency domain analysis on the jitter vector sequence for the corresponding harmonic frequency to obtain the amplitude and phase parameters of each order harmonic jitter component. Based on the integer multiple constraint relationship between the phase of each harmonic and the phase of the fundamental wave, the phase parameters of each harmonic jitter component are jointly corrected to obtain the corrected phase parameters. Calculate the amplitude and phase changes of the interference-related jitter components between the current window and the previous window; The fusion weight is calculated based on the amplitude and phase changes. The amplitude and phase parameters of the current window are then weighted and fused with those of the previous window using the fusion weight to obtain the updated amplitude and phase parameters.

5. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to any one of claims 2 to 4, characterized in that: The edge correction signal is processed using a jitter suppression algorithm, including: Extract the time interval between adjacent edges from the corrected edge time sequence, calculate the residual deviation between the time interval and the preset clock period, and arrange the residual deviation in chronological order to construct a residual jitter sequence; The residual jitter sequence is separated into low-frequency drift components and high-frequency random components; For low-frequency drift components, a trend-following method is used to generate drift compensation. Amplitude limiting thresholds are set based on the statistical distribution characteristics of high-frequency random components, and the high-frequency random components are limited using the amplitude limiting thresholds. The drift compensation amount and the high-frequency random component after amplitude limiting are combined to obtain the comprehensive jitter correction amount; The overall jitter correction is superimposed on the corresponding rising or falling edge time in the corrected edge time sequence to obtain the stable edge time sequence. Construct an edge-stabilized signal based on the stabilized edge time sequence.

6. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 5, characterized in that: The residual jitter sequence is separated into low-frequency drift components and high-frequency random components, including: The drift cutoff frequency is determined based on the thermal time constant of the LVDS / CML transmission link; Using the drift cutoff frequency as the separation boundary, the residual jitter sequence is low-pass filtered, and the filtered output is used as the low-frequency drift component. Calculate the difference between the residual jitter sequence and the low-frequency drift component, and use the difference as the high-frequency random component.

7. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 5, characterized in that: The drift compensation amount is generated using a trend-following method, including: Perform a first-order difference operation on the low-frequency drift components to obtain the drift rate sequence; The direction of the drift trend is determined by the persistence of the sign of the drift rate of change sequence. When multiple consecutive sampling points of the drift rate of change sequence maintain the same sign, the drift trend direction is determined to be monotonic drift. When the drift trend direction is monotonic drift, the trend slope is calculated based on the mean of the drift change rate sequence. Based on the trend slope, the low-frequency drift components of subsequent sampling points are linearly extrapolated and predicted, and the opposite of the predicted value is used as the drift compensation amount. When the drift trend is non-monotonic drift, the negative of the low-frequency drift component at the current sampling point is used as the drift compensation amount.

8. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 6 or 7, characterized in that: Clock data recovery processing of differential signal sequences based on edge-stabilized signals includes: Extract the stabilization time interval between adjacent edges from the stabilization edge time sequence; Calculate the recovery clock cycle based on the stabilization time interval; The sampling phase offset is determined based on the time interval difference between the rising edge and the falling edge in the stabilized edge time sequence; The data sampling time is determined based on the recovery clock cycle and the sampling phase offset; Level determination is performed on the differential signal sequence at the data sampling time to obtain a video data stream resistant to electromagnetic interference.

9. The method for resisting electromagnetic interference in low-latency LVDS / CML video transmission according to claim 8, characterized in that: Calculate the first time interval between the rising edge and the adjacent falling edge in the stabilized edge time sequence; Calculate the second time interval between the falling edge moment and the adjacent rising edge moment in the stabilized edge time sequence; The duty cycle offset is calculated based on the difference between the first time interval and the second time interval; The sampling phase offset is determined based on the duty cycle offset. The direction of the sampling phase offset is related to the sign of the duty cycle offset, and the magnitude of the sampling phase offset is positively correlated with the absolute value of the duty cycle offset.

10. A system for low-latency LVDS / CML video transmission with electromagnetic interference resistance, used to implement the method according to any one of claims 1 to 9, characterized in that, include: The signal sampling module performs real-time sampling of the received differential video signal at the LVDS / CML receiver to obtain a continuous differential signal sequence; The edge detection module performs edge detection processing on the differential signal sequence, extracts the rising edge time and falling edge time of each signal transition, and constructs edge timing features; The edge compensation module uses an edge compensation algorithm to process the edge timing characteristics to obtain an edge correction signal; The jitter suppression module uses a jitter suppression algorithm to process the edge correction signal to obtain an edge-stable signal; The clock recovery module performs clock data recovery processing on the differential signal sequence based on the edge-stabilized signal to obtain a video data stream resistant to electromagnetic interference.

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