Industrial scene small target detection method and system based on FPGA

Abstract

The invention discloses an industrial scene small target detection method and system based on an FPGA, and the method comprises the steps: collecting and preprocessing an original industrial image, and constructing an industrial target data set; based on the original industrial image, multi-level features are generated through a multi-feature decoupling interaction module; the multi-level features are input into a hybrid encoder comprising an AIFI module and an SACF scale perception convolution fusion module to execute cross-scale fusion and enhancement, and a multi-scale enhanced feature map is obtained; the multi-scale enhanced feature map is input into a hybrid decoding module, and end-to-end detection output is realized through an intersection-to-parallel ratio perception query selection strategy and a multi-scale deformable attention module; performing mixing precision quantization on the parameters based on the second-order curvature information of the loss function; and designing an HLS accelerator module based on the quantitative model and loading the HLS accelerator module to an FPGA hardware platform. According to the invention, the feature expression is sufficient, the detection precision is improved, and meanwhile, the low-delay and low-power-consumption real-time detection requirements of an industrial field can be met.

Description

Technical Field

[0001] This invention relates to the field of industrial vision inspection and hardware acceleration technology, and in particular to a method and system for small target detection in industrial scenes based on FPGA. Background Technology

[0002] Against the backdrop of rapid development in industrial automation and intelligent manufacturing, online inspection of industrial components and products has become a crucial link in ensuring product quality and production efficiency. The targets being inspected during the production process are typically small in size and numerous, placing high demands on the accuracy, robustness, and real-time performance of the inspection system. Traditional inspection methods relying on manual visual inspection or rule-based machine vision are easily affected by factors such as changes in lighting, background interference, and variations in target posture and shape. They generally suffer from low inspection efficiency, insufficient stability, and poor consistency, making them unsuitable for the high-speed, high-reliability, and continuous operation requirements of modern industrial production lines.

[0003] In recent years, deep learning-based object detection methods have been widely used in industrial vision, especially Transformer-based detection models, which have demonstrated outstanding performance in global modeling and multi-scale feature representation. However, these models typically have large parameter scales and high computational complexity, significantly relying on computing power and storage resources, posing a significant challenge to embedded or edge devices (such as FPGAs) deployed directly in industrial settings. On the one hand, complex models struggle to meet the real-time detection requirements of low latency and low power consumption in industrial environments; on the other hand, existing models still suffer from insufficient feature representation and decreased detection accuracy when dealing with small targets, high-density targets, and complex background scenes in industrial detection. Summary of the Invention

[0004] To address the problems existing in the prior art, this invention provides an FPGA-based method and system for small target detection in industrial scenarios. In high-density target and complex background scenarios, it enables full feature representation and improves detection accuracy, while also meeting the real-time detection requirements of low latency and low power consumption in industrial settings.

[0005] Firstly, an FPGA-based method for detecting small targets in industrial scenarios includes the following steps:

[0006] S1. Collect and preprocess raw industrial images to construct an industrial target dataset;

[0007] S2. Based on the original industrial images, multi-level features are generated through a multi-feature decoupling interaction module;

[0008] S3. Input the multi-level features into a hybrid encoder including the AIFI module and the SACF scale-aware convolutional fusion module to perform cross-scale fusion and enhancement, and obtain a multi-scale enhanced feature map.

[0009] S4. Input the multi-scale enhanced feature map into the hybrid decoding module, and achieve end-to-end detection output through the intersection-union-ratio perceptual query selection strategy and the multi-scale deformable attention module.

[0010] S5. Perform mixed-precision quantization on parameters based on the second-order curvature information of the loss function;

[0011] S6. Design the HLS accelerator module based on the quantization model and load it onto the FPGA hardware platform.

[0012] Preferably, S2 includes:

[0013] The original industrial image is input into the DWMS-DETR network; the feature decoupling interaction module obtains the hierarchical feature map output by the DWMS-DETR network and performs channel number compression to obtain the intermediate feature representation; the intermediate feature representation is input into the high-frequency feature extraction branch and the low-frequency feature extraction branch respectively to generate local detail features and global context features respectively;

[0014] Global average pooling is performed on the intermediate feature representations to generate fusion weights. Local detail features and global context features are then weighted and fused according to the fusion weights to generate dynamic fusion features. Channel mixing is performed on the dynamic fusion features, and then the channel-mixed features are gated by a convolutional gated linear unit to generate gated output features.

[0015] Channel recovery is performed on the gated output features, and the results are added to the residual branches corresponding to the dynamically fused features to output decoupled interactive features; multiple feature decoupling interactive modules are cascaded, and the backbone network outputs multi-level features.

[0016] As a preferred embodiment, S3 includes: inputting multi-level features into the AIFI module, uniformly encoding the multi-level features by introducing a self-attention mechanism, and combining a feedforward network to achieve adaptive interaction and enhancement of feature information, thereby generating intra-scale interactive features.

[0017] Preferably, S3 further includes: an SACF scale-aware convolutional fusion module that inputs intra-scale interactive features into a bidirectional weighted multi-level cross-scale feature pyramid network and a selective feature recalibration module; the bidirectional weighted multi-level cross-scale feature pyramid network constructs a top-down semantic enhancement path and a bottom-up detail compensation path, introduces high-resolution shallow features during feature fusion to compensate for the information loss in spatial details of deep features, and uses learnable normalized weights to adaptively adjust the contribution of features at different levels to generate cross-scale fused features; a selective feature recalibration module is provided before each feature fusion unit to selectively recalibrate low-level boundary detail features and high-level semantic features.

[0018] As a preferred embodiment, in S3, the SACF scale-aware convolutional fusion module uses the dynamic branch reweighting module - reparameterized C3 module to enhance the cross-scale fusion features; the DBRM-RepC3 module includes a 3×3 depthwise separable convolutional branch, a 1×1 depthwise separable convolutional branch, and an identity mapping branch; by modeling the global information of the cross-scale fusion features, relevant branch weights are generated, and the outputs of each branch are adaptively weighted and fused to generate multi-scale enhanced feature maps.

[0019] As a preferred option, in S4, the intersection-union ratio (IUU) perceptual query selection strategy performs quality evaluation on the multi-scale enhanced feature maps during the decoding stage. By jointly considering the confidence of the predicted target location and category, and introducing the target location overlap as a constraint, the multi-scale enhanced feature maps are screened and sorted.

[0020] As a preferred embodiment, in S4, the multi-scale deformable attention module introduces a reference point and position offset mechanism to select a limited number of key sampling locations on the multi-scale enhanced feature map for feature aggregation, and uses learnable attention weights to perform weighted fusion of features at each sampling location.

[0021] As a preferred embodiment, S5 includes: in the offline optimization stage, assessing the sensitivity of each parameter to quantization error based on the response of the loss function to parameter perturbations, and constructing a parameter importance metric by combining parameter amplitude and local curvature information to generate a mixed precision configuration table; grouping and aggregating the parameter importance and then sorting them, dividing the model parameters into different precision levels, and assigning differentiated quantization bit widths to different parameter groups; in the inference stage, performing block quantization and sorting calculation on the weights according to the mixed precision configuration table, and achieving an inference result equivalent to the original model through multi-submatrix accumulation.

[0022] As a preferred embodiment, S6 includes: an HLS accelerator module that is customized based on the quantized network structure and mixed-precision configuration table, which maps core operators such as convolution, attention computation, and matrix multiplication and addition into synthesizable high-level description language modules, and adopts pipelined parallelism, data reuse, and on-chip memory optimization strategies to achieve coordinated scheduling of computation and memory access; the HLS accelerator module generates an instruction set that matches the FPGA architecture and loads it onto the hardware platform.

[0023] Secondly, an FPGA-based small target detection system for industrial scenarios includes:

[0024] The data processing module is used to acquire and preprocess raw industrial images to construct industrial target datasets;

[0025] A multi-feature decoupling interaction module is used to generate multi-level features based on the original industrial images;

[0026] The hybrid encoder, including the AIFI module and the SACF scale-aware convolutional fusion module, inputs multi-level features into the hybrid encoder to perform cross-scale fusion and enhancement, resulting in a multi-scale enhanced feature map.

[0027] The hybrid decoding module receives multi-scale enhanced feature maps and achieves end-to-end detection output through an intersection-union-ratio (IU) perceptual query selection strategy and a multi-scale deformable attention module.

[0028] The parameter precision quantization module is used to perform mixed precision quantization on parameters based on the second-order curvature information of the loss function;

[0029] The HLS accelerator module is used to load quantization models onto the FPGA hardware platform.

[0030] The FPGA-based small target detection system for industrial scenes is used to implement the FPGA-based small target detection method and its steps for industrial scenes as described in the first aspect.

[0031] Compared with the prior art, the beneficial effects of the present invention are reflected in:

[0032] Unlike existing technologies that rely on manual visual inspection or traditional rule-based machine vision detection methods, which suffer from low efficiency, poor stability, and susceptibility to lighting and background interference, this invention employs a DWMS-DETR dynamic weighted multi-scale detection network architecture based on FPGA hardware acceleration. This architecture combines a feature decoupling interaction module, an AIFI cross-scale attention interaction module, a SACF scale-aware convolutional fusion module, and a hybrid precision quantization strategy to produce high-precision, highly robust, and low-latency small target detection results. It is suitable for real-time online detection in dense and complex backgrounds in industrial scenarios.

[0033] Unlike existing technologies where deep learning models have large parameter counts and high computational complexity, making them difficult to deploy efficiently on edge devices such as FPGAs, this invention employs a hybrid precision quantization method based on the second-order curvature information of the loss function. By combining group sensitivity assessment and dynamic bit width allocation, it achieves block quantization and sequential computation of model parameters, resulting in significant model compression and inference acceleration effects. This method greatly reduces storage and computing resource requirements while maintaining detection accuracy.

[0034] Unlike traditional feature pyramid networks in existing technologies, which suffer from information loss and insufficient detail retention during cross-scale feature fusion, this invention employs a bidirectional weighted multi-level cross-scale feature pyramid network and a selective feature recalibration module. It combines a top-down semantic enhancement and a bottom-up detail compensation dual-path fusion mechanism to generate enhanced multi-scale feature representation capabilities, effectively improving the detection recall and localization accuracy of small targets in complex backgrounds. Attached Figure Description

[0035] Figure 1 This is a flowchart of the method in Embodiment 1 of the present invention;

[0036] Figure 2 This is a diagram illustrating the overall system architecture of Embodiment 1 of the present invention;

[0037] Figure 3 This is a topology diagram of the overall computing architecture of Embodiment 1 of the present invention. Detailed Implementation

[0038] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0039] like Figure 1 As shown, this embodiment discloses a method and system for small target detection in industrial scenarios based on FPGA. This method takes industrial production line assembly as an application scenario and addresses issues such as small target size, dense distribution, inconsistent poses, complex backgrounds, and limited edge computing power. It achieves end-to-end high-precision, low-latency industrial target detection by constructing a DWMS-DETR (Dynamic Weighted Multi-Scale Detection Transformer) detection network and combining mixed-precision quantization and HLS hardware acceleration design. The method of this embodiment includes the following steps:

[0040] S1. Collect and preprocess raw industrial images to construct an industrial target dataset;

[0041] In this embodiment, the industrial target image is acquired by an industrial camera deployed at a key workstation on the production line. The acquisition location can be set at process nodes such as material loading, fastening, assembly completion, or quality re-inspection. The industrial camera can use an area array CMOS sensor, and is equipped with a ring light source or a strip fill light to ensure good imaging quality of the target edges and details.

[0042] To meet the input requirements of the detection network, the resolution of the acquired raw industrial images is adjusted, preferably to 640×640 or 800×800. During the adjustment process, bilinear interpolation can be used for scaling, and cropping or boundary padding operations can be combined if necessary to maintain the image aspect ratio and prevent target deformation.

[0043] In addition, the adjusted image undergoes normalization, mapping pixel values ​​to a preset range, and channel-level normalization is performed to reduce the impact of illumination variations and reflection interference on the model's inference stability. After these processes, the adjusted original industrial image is obtained, which serves as the input for subsequent feature extraction steps.

[0044] S2. Input the original industrial image into the backbone network and generate multi-level features through multiple FDIB (Feature Decoupling Interaction Block) feature extraction modules;

[0045] In step S2, the original industrial image is input into the backbone network of the DWMS-DETR network architecture, and multi-level feature representations are extracted step by step through multiple FDIB feature extraction modules. The backbone network adopts a multi-level downsampling structure, outputting feature maps with different spatial resolutions at different levels for subsequent cross-scale fusion.

[0046] The FDIB feature extraction module is used to explicitly model high-frequency and low-frequency features, and enhances feature selection capabilities through content-adaptive dynamic fusion and gating mechanisms. The specific processing procedure is as follows:

[0047] First, the hierarchical feature maps output from the backbone network of the DWMS-DETR network architecture are obtained, and the number of channels is compressed using a first-point convolution to obtain intermediate feature representations, thereby reducing computational complexity. Then, the intermediate features are input into the high-frequency feature extraction branch and the low-frequency feature extraction branch, respectively. The high-frequency branch uses a first-depth separable convolution to extract local detail features, used to enhance edges, textures, and fine structures; the low-frequency branch uses a second-depth separable convolution with dilation to expand the receptive field, extracting global contextual information and enhancing robustness to complex backgrounds.

[0048] Based on the intermediate feature representation, fusion weights for high-frequency and low-frequency features are generated through global average pooling and second-point convolution. The high-frequency and low-frequency features are then weighted and fused according to these fusion weights to obtain dynamic fused features. Subsequently, channel mixing is performed on the dynamic fused features to enhance cross-channel information interaction, and convolutional gated linear units are used to perform gating selection on the dynamic fused features to suppress redundant background information.

[0049] Finally, channel recovery is performed on the gated output features through a third-point convolution, and the results are added to the residual branch results corresponding to the dynamically fused features to output the decoupled interactive features of the FDIB feature extraction module. Through the cascading of multiple FDIB modules, the backbone network can output multi-level feature representations with rich details and semantic information under lightweight conditions.

[0050] S3. Input the multi-level features into a hybrid encoder including the AIFI module and the SACF scale-aware convolutional fusion module to perform cross-scale fusion and enhancement, and obtain a multi-scale enhanced feature map.

[0051] The multi-level features output from the backbone network are input into the improved hybrid encoder for cross-scale feature fusion and enhancement, resulting in multiple scale-enhanced feature maps. The hybrid encoder includes an AIFI (Attention-based Intrascale Feature Interaction) module and a SACF (Scale-Aware Convolutional Fusion) module.

[0052] The S31 and AIFI modules are adaptive interactive feature fusion modules based on the DETR network architecture, used for unified encoding of multi-scale features. Multi-level features are input into the AIFI module, which introduces a self-attention mechanism to model the global dependencies between features at different scales. Combined with a feedforward network, it achieves adaptive interaction and enhancement of feature information, thereby improving the consistency and discriminativeness of cross-scale feature representation and generating intra-scale interactive features.

[0053] S32. Subsequently, the intra-scale interactive features are input into the SACF scale-aware convolutional fusion module for further processing. The BWMC-FPN module (Bidirectional Weighted Multi-Level Cross-Scale Feature Pyramid Network) is used to construct a top-down semantic enhancement path and a bottom-up detail compensation path. During feature fusion, high-resolution shallow features are introduced to compensate for the information loss in spatial details of deep features. Learnable normalized weights are used to adaptively adjust the contributions of features at different levels, generating cross-scale fused features. Simultaneously, an SBA module (Selective Feature Recalibration Module) is introduced before each feature fusion unit to selectively recalibrate low-level boundary detail features and high-level semantic features.

[0054] After feature selection and fusion, the cross-scale fused features are dynamically enhanced using the DBRM-RepC3 (Dynamic Branch Reweighting Module - Reparameterized C3) module. This module introduces a multi-branch dynamic weighting mechanism based on the RepC3 structure, including a 3×3 depthwise separable convolution branch, a 1×1 depthwise separable convolution branch, and an identity mapping branch. It generates branch weights by modeling global information of the cross-scale fused features and adaptively weights and fuses the outputs of each branch, thereby dynamically adjusting the contribution ratio of features from different receptive fields and enhancing the expressive power of target-related features.

[0055] S4. Input the multi-scale enhanced feature map into the hybrid decoding module, and achieve end-to-end detection output through the IoU-aware query selection strategy (intersection over union aware query selection strategy) and the multi-scale deformable attention module;

[0056] The multi-scale enhanced feature map output by the hybrid encoder is input into the hybrid decoding module of the DWMS-DETR network architecture. By combining the IoU-aware query selection strategy with the multi-scale deformable attention module, end-to-end industrial target detection is achieved.

[0057] The IoU-aware query selection strategy evaluates the quality of multi-scale enhanced feature maps during the decoding stage. By jointly considering the confidence of the predicted target location and category, and introducing the overlap of the target location as a constraint, the multi-scale enhanced feature maps are screened and sorted. Queries with high overlap consistency and low prediction uncertainty are selected as initial object queries, thus filtering out high-quality queries, reducing the number of redundant queries and improving decoding efficiency.

[0058] The multi-scale deformable attention module introduces a reference point and position offset mechanism to select a limited number of key sampling locations on the multi-scale enhanced feature map for feature aggregation. It then utilizes learnable attention weights to weightedly fuse the features at each sampling location, reducing computational complexity while maintaining effective modeling capability for multi-scale targets. The decoder outputs the target's category prediction and corresponding bounding box location after multiple iterations.

[0059] S5. Perform mixed precision quantization on model parameters based on the second-order curvature information of the loss function;

[0060] S51. In the offline phase, the sensitivity of the model parameters is evaluated based on the second-order curvature information of the loss function with respect to the model parameters or its approximate form. The second-order approximation satisfies the following relationship:

[0061]

[0062] in, Let the second-order curvature matrix of the loss function with respect to the model parameters, or its approximation matrix, be the matrix of its approximation. The parameter perturbation vector;

[0063] S52. Based on this, construct a set of parameter importance indicators, which satisfy the following form:

[0064]

[0065] in, For the first Each model parameter It is a monotonic mapping function. This is a predetermined index used to jointly characterize the influence of parameter amplitude and local curvature on the sensitivity to quantization error.

[0066] The mixed precision configuration table is obtained by aggregating the sensitivity of parameter importance indicators at the group level. The sensitivity of the group-level aggregation satisfies the following:

[0067]

[0068] in, This represents a set of indices that belong to the same row, the same channel, or the same parameter group. The coefficients are used to adjust the contribution weight of different parameters within the group; and based on the ranking result of aggregation sensitivity, the parameters are divided into a high-precision set and a low-precision set, and different quantization bit widths are assigned to them respectively. The quantization bit width includes at least two or more of the following: 8 bits, 6 bits, 4 bits, and 2 bits.

[0069] S53. Based on the mixed precision configuration table, the weight matrix of the same layer is split into uniform precision submatrices, so that the original weight matrix is ​​represented as the sum of multiple submatrices with consistent quantization bit width, satisfying:

[0070]

[0071] in, To use submatrices with a uniform quantization scale and uniform bit width; during inference, the input features and each submatrix are multiplied and added according to a predetermined scheduling order, and the calculation results of each submatrix are accumulated to obtain an output result equivalent to the original weight matrix, satisfying:

[0072]

[0073] in, For the input feature matrix, This is the equivalent output result.

[0074] S6. Design an HLS (High-Level Synthesis) accelerator module based on a quantization model and load it onto the FPGA hardware platform.

[0075] The HLS accelerator module is designed based on the quantized network structure and mixed-precision configuration table. By mapping core operators such as convolution, attention computation, and matrix multiplication and addition into synthesizable high-level description language modules, and employing pipelined parallelism, data reuse, and on-chip memory optimization strategies, collaborative scheduling of computation and memory access is achieved.

[0076] Ultimately, the HLS accelerator module generates an instruction set that matches the FPGA architecture and loads it onto the hardware platform, combined with... Figure 3The overall computing architecture topology diagram shown enables high-speed inference of the quantized DWMS-DETR model. While ensuring detection accuracy, it significantly improves the real-time processing performance and energy efficiency of industrial target detection tasks, making it suitable for online detection applications in industrial edge computing environments.

[0077] Example 2:

[0078] like Figure 2 The illustrated FPGA-based small target detection system for industrial scenarios includes:

[0079] The data processing module is used to acquire and preprocess raw industrial images to construct industrial target datasets;

[0080] A multi-feature decoupling interaction module is used to generate multi-level features based on the original industrial images;

[0081] The hybrid encoder, including the AIFI module and the SACF scale-aware convolutional fusion module, inputs multi-level features into the hybrid encoder to perform cross-scale fusion and enhancement, resulting in a multi-scale enhanced feature map.

[0082] The hybrid decoding module receives multi-scale enhanced feature maps and achieves end-to-end detection output through an intersection-union-ratio (IU) perceptual query selection strategy and a multi-scale deformable attention module.

[0083] The parameter precision quantization module is used to perform mixed precision quantization on parameters based on the second-order curvature information of the loss function;

[0084] The HLS accelerator module is used to load quantization models onto the FPGA hardware platform.

[0085] The system also covers on-chip storage strategies for mixed-precision parameters, hardware deployment of core operators, and hardware inference execution processes for FPGAs.

Claims

1. A method for detecting small targets in industrial scenarios based on FPGA, characterized in that, Includes the following steps: S1. Collect and preprocess raw industrial images to construct an industrial target dataset; S2. Based on the original industrial images, multi-level features are generated through a multi-feature decoupling interaction module; S3. Input the multi-level features into a hybrid encoder including the AIFI module and the SACF scale-aware convolutional fusion module to perform cross-scale fusion and enhancement, and obtain a multi-scale enhanced feature map. S4. Input the multi-scale enhanced feature map into the hybrid decoding module, and achieve end-to-end detection output through the intersection-union-ratio perceptual query selection strategy and the multi-scale deformable attention module. S5. Perform mixed-precision quantization on parameters based on the second-order curvature information of the loss function; S6. Design the HLS accelerator module based on the quantization model and load it onto the FPGA hardware platform.

2. The method for detecting small targets in industrial scenarios based on FPGA according to claim 1, characterized in that, S2 include: The original industrial image is input into the DWMS-DETR network; the feature decoupling interaction module obtains the hierarchical feature map output by the DWMS-DETR network and performs channel number compression to obtain the intermediate feature representation; the intermediate feature representation is input into the high-frequency feature extraction branch and the low-frequency feature extraction branch respectively to generate local detail features and global context features respectively; Global average pooling is performed on the intermediate feature representations to generate fusion weights. Local detail features and global context features are then weighted and fused according to the fusion weights to generate dynamic fusion features. Channel mixing is performed on the dynamic fusion features, and then the channel-mixed features are gated by a convolutional gated linear unit to generate gated output features. Channel recovery is performed on the gated output features, and the results are added to the residual branches corresponding to the dynamically fused features to output decoupled interactive features; multiple feature decoupling interactive modules are cascaded, and the backbone network outputs multi-level features.

3. The method for detecting small targets in industrial scenarios based on FPGA according to claim 1, characterized in that, S3 includes: inputting multi-level features into the AIFI module, uniformly encoding the multi-level features by introducing a self-attention mechanism, and combining a feedforward network to achieve adaptive interaction and enhancement of feature information, thereby generating intra-scale interactive features.

4. The method for detecting small targets in industrial scenarios based on FPGA according to claim 3, characterized in that, S3 also includes: an SACF scale-aware convolutional fusion module that inputs intra-scale interactive features into a bidirectional weighted multi-level cross-scale feature pyramid network and a selective feature recalibration module; the bidirectional weighted multi-level cross-scale feature pyramid network constructs a top-down semantic enhancement path and a bottom-up detail compensation path, introduces high-resolution shallow features during feature fusion to compensate for the information loss in spatial details of deep features, and uses learnable normalized weights to adaptively adjust the contribution of features at different levels to generate cross-scale fused features; a selective feature recalibration module is set before each feature fusion unit to selectively recalibrate low-level boundary detail features and high-level semantic features.

5. The method for detecting small targets in industrial scenarios based on FPGA according to claim 4, characterized in that, In S3, the SACF scale-aware convolutional fusion module uses the dynamic branch reweighting module - reparameterized C3 module to enhance cross-scale fusion features; the DBRM-RepC3 module includes a 3×3 depthwise separable convolutional branch, a 1×1 depthwise separable convolutional branch, and an identity mapping branch; by modeling global information of cross-scale fusion features, relevant branch weights are generated, and the outputs of each branch are adaptively weighted and fused to generate multi-scale enhanced feature maps.

6. The method for detecting small targets in industrial scenarios based on FPGA according to claim 1, characterized in that, In S4, the intersection-union-ratio (IUU) perceptual query selection strategy evaluates the quality of multi-scale enhanced feature maps during the decoding stage. By jointly considering the confidence of the predicted target location and category, and introducing the overlap of the target location as a constraint, the multi-scale enhanced feature maps are screened and sorted.

7. The method for detecting small targets in industrial scenarios based on FPGA according to claim 6, characterized in that, In S4, the multi-scale deformable attention module introduces a reference point and position offset mechanism to select a limited number of key sampling locations on the multi-scale enhanced feature map for feature aggregation, and uses learnable attention weights to perform weighted fusion of features at each sampling location.

8. The method for detecting small targets in industrial scenarios based on FPGA according to claim 1, characterized in that, S5 includes: In the offline optimization phase, the sensitivity of each parameter to quantization error is evaluated based on the response of the loss function to parameter perturbation. The parameter importance metric is constructed by combining parameter amplitude and local curvature information, and a mixed precision configuration table is generated. The parameters are grouped and aggregated based on their importance before being sorted. The model parameters are divided into different precision levels, and different quantization bit widths are assigned to different parameter groups. During the inference phase, the weights are quantized and ordered according to the mixed precision configuration table, and the inference results are equivalent to those of the original model by accumulating multiple sub-matrixes.

9. The method for detecting small targets in industrial scenarios based on FPGA according to claim 1, characterized in that, S6 includes: The HLS accelerator module is customized based on the quantized network structure and mixed-precision configuration table. It maps core operators such as convolution, attention computation, and matrix multiplication and addition into synthesizable high-level description language modules, and adopts pipelined parallelism, data reuse, and on-chip memory optimization strategies to achieve coordinated scheduling of computation and memory access. The HLS accelerator module generates an instruction set that matches the FPGA architecture and loads it onto the hardware platform.

10. A small target detection system for industrial scenarios based on FPGA, characterized in that, include: The data processing module is used to acquire and preprocess raw industrial images to construct industrial target datasets; A multi-feature decoupling interaction module is used to generate multi-level features based on the original industrial images; The hybrid encoder, including the AIFI module and the SACF scale-aware convolutional fusion module, inputs multi-level features into the hybrid encoder to perform cross-scale fusion and enhancement, resulting in a multi-scale enhanced feature map. The hybrid decoding module receives multi-scale enhanced feature maps and achieves end-to-end detection output through an intersection-union-ratio (IU) perceptual query selection strategy and a multi-scale deformable attention module. The parameter precision quantization module is used to perform mixed precision quantization on parameters based on the second-order curvature information of the loss function; The HLS accelerator module is used to load quantization models onto the FPGA hardware platform. The FPGA-based industrial scene small target detection system is used to implement the FPGA-based industrial scene small target detection method and its steps as described in claim 1.

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