Display panel and display device

Abstract

The embodiment of the invention discloses a display panel and a display device. The display panel comprises a pixel unit, and the pixel unit sequentially comprises a first sub-pixel, a second sub-pixel and a third sub-pixel in a first direction; the display panel further comprises a first data line, a second data line, a third data line and a gate line, the first data line is connected with the first sub-pixel through a first thin film transistor, the second data line is connected with the second sub-pixel through a second thin film transistor, and the third data line is connected with the third sub-pixel through a third thin film transistor. The first thin film transistor, the second thin film transistor and the third thin film transistor are arranged in circuit areas corresponding to the first sub-pixel and the second sub-pixel.

Description

Display panel and display device Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel and display device. Background Technology

[0002] With the rapid development of high-resolution display technology, pixel structure design faces the dual challenges of improving aperture ratio and light transmittance. As display panels evolve towards higher PPI (pixels per inch), pixel sizes are continuously shrinking, leading to a decrease in the proportion of light-transmitting area, directly affecting display brightness and energy efficiency. At the same time, users' demands for display performance are increasing, especially in terms of high brightness, low power consumption, and high contrast, placing higher requirements on pixel structure design.

[0003] In the traditional 1G1D (1 Gate 1 Data) architecture, each sub-pixel is spatially compressed because each thin-film transistor is located in the circuit region corresponding to each sub-pixel, and the thin-film transistor is large in size, which leads to problems such as insufficient aperture ratio and low light transmittance. Summary of the Invention

[0004] This application provides a display panel and display device that can increase the aperture ratio, thereby increasing the light transmittance.

[0005] This application provides a display panel, which includes a pixel unit. The pixel unit includes a first sub-pixel, a second sub-pixel, and a third sub-pixel in a first direction. The display panel also includes a first data line, a second data line, a third data line, and a gate line. The first data line is connected to the first sub-pixel through a first thin-film transistor, the second data line is connected to the second sub-pixel through a second thin-film transistor, and the third data line is connected to the third sub-pixel through a third thin-film transistor. The first thin-film transistor, the second thin-film transistor, and the third thin-film transistor are disposed in the circuit regions corresponding to the first sub-pixel and the second sub-pixel.

[0006] Optionally, the first thin-film transistor, the second thin-film transistor, and the third thin-film transistor are arranged along a first direction.

[0007] Optionally, the display panel further includes a support pillar disposed near the third thin-film transistor in the third sub-pixel.

[0008] Optionally, the third thin-film transistor is disposed on the side of the second thin-film transistor away from the second sub-pixel in the second direction.

[0009] Optionally, the display panel further includes a support pillar disposed in the area where the second thin-film transistor and the third thin-film transistor are disposed.

[0010] Optionally, the pixel units are arranged in a repeating pattern in the first direction, and the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a cyclical pattern in the second direction.

[0011] Optionally, the colors of the first sub-pixel, the second sub-pixel, and the third sub-pixel are any one of red, green, and blue, respectively.

[0012] Optionally, the first sub-pixel and the second sub-pixel have the same length in the second direction, and the third sub-pixel has a longer length in the second direction than the first sub-pixel and the second sub-pixel.

[0013] Accordingly, this application also provides a display device, including a display panel as described in any of the above embodiments.

[0014] It is understandable that when the length of the third sub-pixel in the column direction is greater than that of the other two sub-pixels, the difference in length forms an area for placing three thin-film transistors. This compresses the three thin-film transistors that were originally placed in the circuit areas corresponding to the three sub-pixels into the circuit areas corresponding to the two sub-pixels, thereby increasing the display area of ​​the third sub-pixel, thus increasing the aperture ratio and light transmittance. Attached Figure Description

[0015] Figure 1 is a schematic diagram of a first embodiment of a pixel unit in a display panel provided in this application; Figure 2 is a schematic diagram of a second embodiment of a pixel unit in a display panel provided in this application. Detailed Implementation

[0016] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In addition, it should be understood that the specific implementation methods described herein are only for illustration and explanation of this application and are not intended to limit this application. In this application, the embodiments can be combined with each other but will not be described in detail one by one. Unless otherwise stated, the directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device; the terms "first," "second," "third," etc. are only used as markings and do not impose numerical requirements or establish a sequence.

[0017] This application provides a display panel and a display device, which will be described in detail below. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of the embodiments.

[0018] Referring to Figure 1, this application embodiment provides a display panel, which includes a pixel unit 10. The pixel unit 10 includes a first sub-pixel 1, a second sub-pixel 2, and a third sub-pixel 3 in a first direction. The display panel also includes a first data line 4, a second data line 5, a third data line 6, and a gate line 11. The first data line 4 is connected to the first sub-pixel 1 through a first thin-film transistor 7, the second data line 5 is connected to the second sub-pixel 2 through a second thin-film transistor 8, and the third data line 6 is connected to the third sub-pixel 3 through a third thin-film transistor 9. The first thin-film transistor 7, the second thin-film transistor 8, and the third thin-film transistor 9 are disposed in the circuit areas corresponding to the first sub-pixel 1 and the second sub-pixel 2.

[0019] Understandably, in the traditional 1G1D (1 Gate 1 Data) architecture, due to the large size of thin-film transistors, when a thin-film transistor is set in the circuit area of ​​each sub-pixel, it occupies a large space. In this embodiment, the three thin-film transistors that were originally placed in the circuit areas corresponding to the three sub-pixels are compressed and placed in the circuit areas corresponding to the two sub-pixels, thereby increasing the display area of ​​the third sub-pixel, thus improving the aperture ratio and increasing the light transmittance.

[0020] Please refer to Figure 1. The display panel also includes a connecting line 13 and a common electrode trace 14. The connecting line 13 is used to connect the common electrode (not shown) of the upper and lower rows of pixel units. Specifically, one end of the connecting line 13 is electrically connected to the pixel electrode corresponding to one row of pixel units, and the other end of the connecting line 13 is electrically connected to the common electrode trace 14 corresponding to the other row of pixel units.

[0021] Optionally, in some embodiments of this application, the first thin-film transistor 7, the second thin-film transistor 8, and the third thin-film transistor 9 are arranged along a first direction.

[0022] Optionally, the display panel further includes a support post 12, which is disposed on the third sub-pixel 3 near the third thin-film transistor 9.

[0023] It is understandable that although the position of the support column 12 still occupies part of the light-transmitting area of ​​the third sub-pixel 3, the area of ​​the third sub-pixel 3 itself has increased. Therefore, overall, the light-emitting area of ​​each pixel unit is still larger than that of the traditional 1G1D architecture.

[0024] Referring to Figure 2, optionally, in some embodiments of this application, the third thin-film transistor 9 is disposed on the side of the second thin-film transistor 8 away from the second sub-pixel 2 in the second direction.

[0025] Optionally, in some embodiments of this application, the support post 12 is disposed in the region where the second thin-film transistor 8 and the third thin-film transistor 9 are disposed.

[0026] It is understandable that placing the support pillar between the two thin-film transistors makes full use of the gap between the thin-film transistor devices and avoids occupying the space of the light-transmitting area of ​​the sub-pixel, thus further improving the aperture ratio and increasing the light transmittance.

[0027] Optionally, in some embodiments of this application, the pixel units 10 are arranged in a repeating sequence in the first direction, and the first sub-pixel 1, the second sub-pixel 2 and the third sub-pixel 3 are arranged in a cyclical pattern in the second direction.

[0028] Optionally, in some embodiments of this application, the colors of the first sub-pixel 1, the second sub-pixel 2, and the third sub-pixel 3 are any one of red, green, and blue, respectively.

[0029] Understandably, in the existing design where two thin-film transistors are placed in one sub-pixel region, the different display area of ​​different sub-pixels leads to variations in the display area of ​​the same color sub-pixels at different positions during sorting, resulting in bright and dark lines when displaying solid colors. In this embodiment, by using a design with three thin-film transistors placed in two sub-pixel regions, it can be ensured that in pixel units composed of red, green, and blue colors, only the area of ​​one color sub-pixel is larger than the other two. This ensures that the opening of pixels of the same color is the same, avoiding the appearance of bright and dark lines when displaying solid colors.

[0030] Optionally, in some embodiments of this application, the first sub-pixel 1 and the second sub-pixel 2 have the same length in the second direction, and the third sub-pixel 3 has a longer length in the second direction than the first sub-pixel 1 and the second sub-pixel 2. Preferably, the edges of the first sub-pixel 1, the second sub-pixel 2, and the third sub-pixel 3 on the side away from the thin-film transistor region can also be designed to be flush.

[0031] Understandably, adopting a design where the top edges of different sub-pixels are flush is beneficial in terms of industrial processes, as it helps to standardize parameter specifications and reduce manufacturing costs. In terms of increasing the aperture ratio, it can maximize the formation of the sub-pixel circuit area, thereby making the most efficient use of the space to place thin-film transistors and other devices.

[0032] Accordingly, this application also provides a display device, which includes the display panel described in any of the above-described embodiments.

[0033] The above provides a detailed description of a display panel and display device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A display panel, characterized in that, The display panel includes a pixel unit, which sequentially includes a first sub-pixel, a second sub-pixel, and a third sub-pixel in a first direction. The display panel also includes a first data line, a second data line, a third data line, and a gate line. The first data line is connected to the first sub-pixel through a first thin-film transistor, the second data line is connected to the second sub-pixel through a second thin-film transistor, and the third data line is connected to the third sub-pixel through a third thin-film transistor. The first thin-film transistor, the second thin-film transistor, and the third thin-film transistor are disposed in the circuit regions corresponding to the first sub-pixel and the second sub-pixel.

2. The display panel according to claim 1, characterized in that, The first thin-film transistor, the second thin-film transistor, and the third thin-film transistor are arranged along a first direction.

3. The display panel according to claim 2, characterized in that, The display panel also includes a support pillar, which is disposed near the third thin-film transistor in the third sub-pixel.

4. The display panel according to claim 1, characterized in that, The third thin-film transistor is disposed on the side of the second thin-film transistor away from the second sub-pixel in the second direction.

5. The display panel according to claim 4, characterized in that, The display panel also includes a support pillar disposed in the area where the second thin-film transistor and the third thin-film transistor are disposed.

6. The display panel according to any one of claims 1 to 5, characterized in that, The pixel units are arranged in a repeating pattern in the first direction, and the first sub-pixel, the second sub-pixel, and the third sub-pixel are arranged in a cyclical pattern in the second direction.

7. The display panel according to claim 6, characterized in that, The colors of the first sub-pixel, the second sub-pixel, and the third sub-pixel are any one of red, green, and blue, respectively.

8. The display panel according to claim 7, characterized in that, The first sub-pixel and the second sub-pixel have the same length in the second direction, and the third sub-pixel has a longer length in the second direction than the first sub-pixel and the second sub-pixel.

9. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 8.

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