Overcurrent protection circuit and electrophysiological stimulation equipment

Abstract

The invention provides an overcurrent protection circuit and electrophysiological stimulation equipment. The overcurrent protection circuit comprises a load channel, a sampling unit, a processing unit, a comparison circuit, an AND gate circuit and a switch unit, the sampling unit is used for acquiring a voltage drop signal from a load channel; the processing unit is used for outputting an enable signal under the condition of determining that the load channel is not over-current according to the voltage drop signal and a preset first current range; the comparison circuit is used for outputting a first low level signal under the condition that the voltage drop signal exceeds a first voltage range, and the first voltage range is determined according to a preset second current range; the AND gate circuit is used for outputting a second low-level signal under the condition that the enable signal is not received or the first low-level signal is received; and the switch unit is used for switching off the load channel under the condition that the second low-level signal is received. According to the embodiment of the invention, a dual protection mechanism of software over-current protection and hardware over-current protection can be realized, and the reliability of circuit over-current protection is greatly improved.

Description

Technical Field

[0001] The embodiments of this application relate to, but are not limited to, the field of electronic circuit technology, and in particular to an overcurrent protection circuit and an electrophysiological stimulation device. Background Technology

[0002] Electrophysiological stimulation (ESP) devices are medical devices widely used in pain management, muscle rehabilitation, and neuromodulation. They stimulate nerves or muscles by outputting electrical current to achieve therapeutic effects. In some cases, ESP devices may generate current peaks exceeding normal operating current. These peaks can be caused by various factors and can easily lead to overcurrent in the circuit, posing a risk to the safety of the ESP device. Summary of the Invention

[0003] The embodiments of this application aim to provide a safe and reliable overcurrent protection circuit and an electrophysiological stimulation device.

[0004] In a first aspect, embodiments of this application provide an overcurrent protection circuit, the circuit comprising: a load channel; a sampling unit for acquiring a voltage drop signal from the load channel; a processing unit for receiving the voltage drop signal and, when determining that the load channel is not overcurrent based on the voltage drop signal and a preset first current range, outputting an enable signal; a comparison circuit for receiving the voltage drop signal and, when the voltage drop signal exceeds a first voltage range, outputting a first low-level signal, wherein the first voltage range is determined based on a preset second current range; an AND gate circuit connected to the processing unit and the comparison circuit respectively, for outputting a second low-level signal when the enable signal is not received or the first low-level signal is received; and a switching unit connected to the AND gate circuit for turning off the load channel when the second low-level signal is received. By adopting the above technical solution, firstly, a sampling unit collects the voltage drop signal from the load channel. Then, a processing unit determines whether the load channel is overcurrent based on the voltage drop signal and a preset first current range. If there is no overcurrent, an enable signal is output to the AND gate circuit. If there is an overcurrent, the processing unit stops outputting the enable signal. If the AND gate circuit does not receive the enable signal, it outputs a second low-level signal to the switching unit, causing the switching unit to shut down the load channel in response to the second low-level signal, thus implementing overcurrent protection in software. In this embodiment, a comparison circuit is also used to compare the voltage drop signal with a first voltage range, which is determined based on a preset second current range. If the voltage drop signal exceeds the first voltage range, it indicates that the load channel is overcurrent. The comparison circuit outputs a first low-level signal to the AND gate circuit. After receiving the first low-level signal, the AND gate circuit outputs a second low-level signal to the switching unit, causing the switching unit to shut down the load channel in response to the second low-level signal, thus implementing overcurrent protection in hardware. In the scheme of this application embodiment, as long as the AND gate circuit does not receive the enable signal of the processing unit or receives the first low-level signal, it outputs the second low-level signal to control the switching unit to turn off the load channel, thereby realizing a dual protection mechanism of software overcurrent protection and hardware overcurrent protection, which greatly improves the reliability of circuit overcurrent protection.

[0005] Optionally, the overcurrent protection circuit further includes an ADC unit; the ADC unit is configured to receive the voltage drop signal from the sampling unit and convert the voltage drop signal into a digital voltage drop signal; the processing unit is configured to receive the digital voltage drop signal and calculate the load current based on the digital voltage drop signal; the processing unit is further configured to output the enable signal when the load current does not exceed the first current range; the processing unit is further configured to stop outputting the enable signal when the load current exceeds the first current range.

[0006] Optionally, the processing unit is further configured to determine the equivalent contact impedance of the load channel based on the load current, and to determine the contact state of the load channel based on the equivalent contact impedance.

[0007] Optionally, the overcurrent protection circuit further includes a bidirectional isolation circuit. The processing unit includes a lower-level machine and a higher-level machine. The lower-level machine is connected to the ADC unit, and the bidirectional isolation circuit is connected between the higher-level machine and the lower-level machine. The lower-level machine is used to receive the digital voltage drop signal from the ADC unit and transmit the digital voltage drop signal to the higher-level machine via the bidirectional isolation circuit. The higher-level machine is used to receive the digital voltage drop signal and calculate the load current based on the digital voltage drop signal. The higher-level machine is also used to output the enable signal when the load current does not exceed the first current range. The higher-level machine is also used to stop outputting the enable signal when the load current exceeds the first current range. The lower-level machine is also used to receive the enable signal from the higher-level machine via the bidirectional isolation circuit and transmit the enable signal to the AND gate circuit.

[0008] Optionally, the comparison circuit includes a digital potentiometer unit and a comparator unit; the digital potentiometer unit is used to adjust the first voltage range; the comparator unit is used to output the first low-level signal when the voltage drop signal exceeds the first voltage range.

[0009] Optionally, the comparator unit includes a first comparator and a second comparator, with the output terminals of the first and second comparators connected in a wired-AND configuration to form a hardware overcurrent detection terminal; the digital potentiometer unit includes a first digital potentiometer unit and a second digital potentiometer unit; the first comparator is used to receive the voltage drop signal and output a third low level when the voltage drop signal is higher than the upper threshold of the first voltage range; the second comparator is used to receive the voltage drop signal and output a fourth low level when the voltage drop signal is lower than the lower threshold of the first voltage range; the hardware overcurrent detection terminal is used to output a first low level when the first comparator outputs the third low level or the second comparator outputs the fourth low level; the first digital potentiometer unit is used to adjust the upper threshold of the first voltage range; the second digital potentiometer unit is used to adjust the lower threshold of the first voltage range.

[0010] Optionally, the non-inverting input of the first comparator is used to receive the upper threshold reference voltage signal; the inverting input of the first comparator is used to receive the voltage drop signal; the non-inverting input of the second comparator is used to receive the voltage drop signal; the inverting input of the second comparator is used to receive the lower threshold reference voltage signal; the first digital potentiometer unit is connected to the non-inverting input of the first comparator; and the second digital potentiometer unit is connected to the non-inverting input of the second comparator.

[0011] Optionally, the first current range is located within the second current range.

[0012] Optionally, the overcurrent protection circuit includes a constant current source circuit and a load in the load channel, wherein the constant current source circuit is used to output a constant load current to the load.

[0013] Optionally, the constant current source circuit includes an instrumentation amplifier and an operational amplifier. The output terminal of the instrumentation amplifier is connected to the load, the output terminal and the inverting input terminal of the operational amplifier are respectively connected to the reference signal input terminal of the instrumentation amplifier, and the non-inverting input terminal of the operational amplifier is connected to the load.

[0014] Optionally, there are multiple load channels, multiple comparison circuits, multiple AND gate circuits, and multiple switching units, and each of the multiple load channels, multiple comparison circuits, multiple AND gate circuits, and multiple switching units corresponds to one another; the output terminals of the multiple comparison circuits are connected together in a wired-AND manner.

[0015] Secondly, embodiments of this application provide an electrophysiological stimulation device, which includes the overcurrent protection circuit described above.

[0016] The electrophysiological stimulation device provided in the second aspect above includes the overcurrent protection circuit provided in the first aspect above, and therefore has the same technical effect as the overcurrent protection circuit provided in the first aspect, which will not be elaborated here.

[0017] It should be understood that the above general description and the following detailed description are merely exemplary and do not limit this application. Attached Figure Description

[0018] Figure 1 A schematic diagram of an overcurrent protection circuit provided in one embodiment of this application; Figure 2 A schematic diagram of an overcurrent protection circuit provided in another embodiment of this application; Figure 3 A schematic diagram of a load channel provided in one embodiment of this application; Figure 4 A schematic diagram of a sampling unit provided in one embodiment of this application; Figure 5 This is a schematic diagram illustrating the connection relationship between an ADC unit, a bidirectional isolation circuit, a lower-level machine, and a higher-level machine, provided in one embodiment of this application. Figure 6 A schematic diagram of a bidirectional isolation circuit provided in one embodiment of this application; Figure 7 A schematic diagram of a comparison circuit provided in one embodiment of this application; Figure 8 A schematic diagram of a USB and lithium battery power switching circuit provided in one embodiment of this application; Figure 9 A schematic diagram of a battery charging management circuit provided in one embodiment of this application; Figure 10 This is a schematic diagram of a battery power management circuit provided in one embodiment of this application. Detailed Implementation

[0019] To make the objectives, technical methods, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0020] It should be noted that the meaning of "multiple" (or "more than") in the description of the embodiments of this application refers to two or more, and "greater than," "less than," "exceeding," etc. are understood to exclude the number itself, while "above," "below," "within," etc. are understood to include the number itself. If "first," "second," etc. are used in the description, they are only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or the order of the technical features indicated.

[0021] In this application embodiment, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent the existence of A alone, the simultaneous existence of A and B, or the existence of B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, and c can represent: the existence of a alone, the existence of b alone, the existence of c alone, the simultaneous existence of a and b, the simultaneous existence of a and c, the simultaneous existence of b and c, or the simultaneous existence of a, b, and c, where a, b, and c can be single or multiple.

[0022] See Figure 1 This is a schematic diagram of an overcurrent protection circuit provided in one embodiment of this application, as shown below. Figure 1As shown, the overcurrent protection circuit 100 includes a processing unit 110, a comparator circuit 120, an AND gate circuit 130, a switching unit 140, a sampling unit 150, and a load channel 160. The sampling unit 150 is used to acquire a voltage drop signal from the load channel 160; the processing unit 110 receives the voltage drop signal and, if it determines that the load channel is not overcurrent based on the voltage drop signal and a preset first current range, outputs an enable signal; the comparator circuit 120 receives the voltage drop signal and, if the voltage drop signal exceeds a first voltage range, outputs a first low-level signal, wherein the first voltage range is determined based on a preset second current range; the AND gate circuit 130 is connected to both the processing unit 110 and the comparator circuit 120, and outputs a second low-level signal if no enable signal is received or if the first low-level signal is received; the switching unit 140 is connected to the AND gate circuit 130 and shuts off the load channel 160 upon receiving the second low-level signal.

[0023] It should be noted that, in the embodiments of this application, the load channel 160 refers to the closed loop formed by the current signal flowing from the signal source along the path to the load and then back to the signal source.

[0024] It should be noted that the sampling unit 150 can use a current sensing resistor to acquire the voltage drop signal of the load channel 160. Specifically, a current sensing resistor can be connected in series in the load channel 160. When the load current flows through the current sensing resistor, a voltage drop proportional to the load current will be generated across the current sensing resistor. In this way, the voltage drop signal can be acquired from the load channel 160, and this voltage drop signal can be used as a basis for determining whether the load channel 160 is overcurrent.

[0025] It should be noted that in some embodiments of this application, the switching unit 140 is connected in series in the current path of the load channel 160 to control the load channel 160 to be in a conducting or turning-off state. The switching unit 140 can be implemented using a metal-oxide-semiconductor field-effect transistor (MOSFET) or other switching devices. Here, we take the switching unit 140 using a MOSFET as an example. When there is no overcurrent in the load channel 160, the AND gate circuit 130 outputs a high level to control the MOSFET to be in a conducting state, thereby turning on the load channel 160; when there is an overcurrent in the load channel 160, the AND gate circuit 130 outputs a low level to control the MOSFET to be in a turning-off state, thereby turning off the load channel 160. It should be understood that, in addition to MOSFETs, the switching unit 140 can also be implemented using mechanical switches, relays, thyristors, etc. The embodiments of this application do not impose too many restrictions on the specific type of the switching unit 140.

[0026] It should be noted that the overcurrent protection circuit 100 provided in this application embodiment adopts a dual protection mechanism combining software overcurrent protection and hardware overcurrent protection. The implementation principles of the software overcurrent protection and hardware overcurrent protection adopted in the solution of this application embodiment will be explained below.

[0027] The software overcurrent protection mechanism adopted in this embodiment is mainly implemented through processing unit 110, AND gate circuit 130, switching unit 140, sampling unit 150 and load channel 160. Sampling unit 150 collects the voltage drop signal of load channel 160 and then transmits the voltage drop signal to processing unit 110. After receiving the voltage drop signal, processing unit 110 determines whether overcurrent has occurred in load channel 160 according to the voltage drop signal and a preset first current range. If no overcurrent occurs, processing unit 110 outputs an enable signal to AND gate circuit 130; if an overcurrent occurs, processing unit 110 stops outputting the enable signal to AND gate circuit 130.

[0028] It should be noted that the enable signal is a high-level active signal. If the AND gate circuit 130 does not receive a high-level enable signal, it will output a second low-level signal to the switching unit 140; the switching unit 140 is triggered by the second low-level signal and turns off the load channel 160. The above process is the principle of software overcurrent protection of the load channel 160 implemented by software in this embodiment of the application.

[0029] It should be noted that in some embodiments of this application, the processing unit 110 includes a host computer, and the value of the first current range can be set or modified by the user through the host computer. Specifically, the user sets or modifies the overcurrent judgment condition of the device through the host computer. The overcurrent judgment condition includes an upper current limit and a lower current limit. When the load current of the load channel is between the upper current limit and the lower current limit, it is considered that no overcurrent has occurred in the load channel; otherwise, it is considered that an overcurrent has occurred. The range defined by the upper current limit and the lower current limit set by the host computer is the first current range.

[0030] It should be noted that determining whether an overcurrent has occurred in load channel 160 based on the voltage drop signal and a pre-set first current range can be achieved in the following two ways: In the first method, based on the preset relationship between the voltage drop signal and the load current, the load current of the load channel is calculated using the acquired voltage drop signal. Then, the calculated load current is compared with a preset first current range. If the load current does not exceed the first current range, it indicates that the load channel is not overcurrent, and the processing unit 110 outputs an enable signal to the AND gate circuit 130. If the load current exceeds the first current range, it indicates that the load channel is overcurrent, and the processing unit 110 stops outputting the enable signal to the AND gate circuit 130.

[0031] It should be understood that the acquired voltage drop signal reflects the magnitude of the load current in the load channel. Specifically, the voltage drop signal and the load current are directly proportional; the larger the acquired voltage drop signal value, the larger the load current in the load channel; the smaller the acquired voltage drop signal value, the smaller the load current in the load channel. Based on this relationship, the load current of the load channel can be calculated from the acquired voltage drop signal, and then the calculated load current can be compared with a pre-set first current range to determine whether the load channel is overcurrent.

[0032] The second method involves converting a pre-set first current range into a second voltage range based on the relationship between a preset voltage drop signal and the load current. For example, the first current range is […]. , Based on the direct proportional relationship between the voltage drop signal and the load current, we obtain [ , The corresponding second voltage range , Then the voltage drop signal is compared with [ , Compare the voltage drop signal to the above values. If the voltage drop signal does not exceed the specified value, then... , If the voltage drop signal exceeds [ ], it indicates that the load channel is not overcurrent, and the processing unit 110 outputs an enable signal to the AND gate circuit 130; if the voltage drop signal exceeds [ , This indicates that the load channel is overcurrent, and the processing unit 110 stops outputting the enable signal to the AND gate circuit 130.

[0033] The hardware overcurrent protection mechanism adopted in this embodiment is mainly implemented through a comparator circuit 120, an AND gate circuit 130, a switching unit 140, a sampling unit 150, and a load channel 160. The sampling unit 150 collects the voltage drop signal from the load channel 160 and then transmits the voltage drop signal to the comparator circuit 120. The comparator circuit 120 compares the voltage drop signal with a first voltage range. When the voltage drop signal does not exceed the first voltage range, the comparator circuit 120 outputs a first high level to the AND gate circuit 130. When the voltage drop signal exceeds the first voltage range, it indicates that an overcurrent has occurred in the load channel 160. The comparator circuit 120 outputs a first low level to the AND gate circuit 130. After receiving the first low level, the AND gate circuit 130 outputs a second low level signal to the switching unit 140. The switching unit 140 is triggered by the second low level signal and turns off the load channel 160. The above process is the principle of the hardware overcurrent protection of the load channel 160 implemented in this embodiment.

[0034] It should be noted that the aforementioned first voltage range is determined based on a pre-set second current range. For example, the second current range is [ Based on the direct proportional relationship between the voltage drop signal and the load current, we obtain [ The corresponding first voltage range ].

[0035] It should be noted that the overcurrent protection circuit 100 provided in this application embodiment can be applied to medical equipment, industrial automation equipment, home appliances, electric vehicles and charging equipment, automotive electronic systems or power supply circuits. Through a dual protection mechanism combining software overcurrent protection and hardware overcurrent protection, it prevents the equipment circuit from being damaged due to excessive current.

[0036] It should be noted that the first current range and the second current range in the embodiments of this application may be equal or unequal, and can be set according to actual needs.

[0037] In some embodiments of this application, the first current range is located within the second current range. For example, the first current range is [ , The second current range is [] ], [ , ]exist[ Within the range of ], that is Less than , Greater than The purpose of this configuration is to first detect whether an overcurrent has occurred in the load channel 160 through the processing unit 110. If the processing unit 110 malfunctions and cannot respond to the overcurrent in the load channel 160 in a timely manner, then the comparison circuit 120 will detect the overcurrent in the load channel 160 and respond accordingly, thereby improving the reliability of the circuit overcurrent protection and achieving a dual protection effect.

[0038] It should be noted that the AND gate circuit 130 in this embodiment is a digital circuit that implements the logical "AND" operation. Its characteristic is that the output is only high when all inputs are at a high level. This can be understood as follows: the AND gate circuit 130 includes multiple inputs and one output. If any input of the AND gate circuit 130 receives a low-level signal, the output of the AND gate circuit 130 will output a low-level signal; only when all inputs of the AND gate circuit 130 receive high-level signals will the output of the AND gate circuit 130 output a high-level signal.

[0039] It should be noted that the AND gate circuit 130 can also be a circuit composed of NAND gates and NOT gates. The embodiments of this application do not limit the specific implementation of the AND gate circuit 130.

[0040] It should be noted that in some embodiments of this application, the first input terminal of the AND gate circuit 130 is connected to the processing unit 110, the second input terminal of the AND gate circuit 130 is connected to the output terminal of the comparator circuit 120, and the output terminal of the AND gate circuit 130 is connected to the switching unit 140. When the AND gate circuit 130 receives the enable signal output by the processing unit 110 through its first input terminal and receives the first high-level signal output by the comparator circuit 120 through its second input terminal, the output terminal of the AND gate circuit 130 outputs a second high-level signal to the switching unit 140, so as to control the load channel 160 to be turned on through the switching unit 140. When the first input terminal of the AND gate circuit 130 does not receive the enable signal output by the processing unit 110, or when the second input terminal of the AND gate circuit 130 receives the first low-level signal output by the comparator circuit 120, the AND gate circuit 130 will output a second low-level signal to the switching unit 140, so as to control the load channel 160 to be turned off through the switching unit 140.

[0041] In other words, as long as AND gate 130 does not receive the enable signal from processing unit 110 or receives the first low-level signal, it will output the second low-level signal to control switch unit 140 to turn off load channel 160, thereby realizing a dual protection mechanism of software overcurrent protection and hardware overcurrent protection, which can greatly improve the reliability of circuit overcurrent protection.

[0042] In one optional implementation, AND gate 130 is implemented using a diode AND gate, which includes two diodes connected in parallel. The first and second input terminals are connected through the anodes of the two diodes, the cathodes are grounded, and the output terminal is obtained from the intersection of the diodes. The output is high only when both the first and second input terminals are high. In another optional implementation, AND gate 130 is implemented using a transistor AND gate, which includes two NPN transistors connected in parallel. The bases of the two transistors serve as the first and second input terminals, respectively, and their collectors are connected together as the output terminal. The emitters are grounded. Both transistors conduct only when both the first and second input terminals are high, resulting in a high output. In specific implementations, the appropriate type of AND gate can be selected according to actual needs; this application does not impose any limitations on this embodiment.

[0043] It should be noted that in some embodiments of this application, there are multiple load channels 160. Correspondingly, the circuit is provided with the same number of comparison circuits 120, AND gate circuits 130 and switching units 140 as the load channels 160. The multiple load channels 160, multiple comparison circuits 120, multiple AND gate circuits 130 and multiple switching units 140 correspond one-to-one.

[0044] It should be noted that in some embodiments of this application, the output terminals of all comparison circuits 120 are connected together in a wired-AND manner. Under this design, when one comparison circuit 120 outputs a low level, the output terminals of other comparison circuits 120 will also be pulled low, so that each AND gate circuit 130 receives the low level output by the corresponding comparison circuit 120, and then outputs a low level to the corresponding switching unit 140, so that all load channels 160 are turned off.

[0045] See Figure 2 This is a schematic diagram of an overcurrent protection circuit provided in another embodiment of this application. Figure 2 The overcurrent protection circuit 100 shown includes n load channels 160, n sampling units 150, n comparator circuits 120, n AND gate circuits 130, n switching units 140, and a processing unit 110. Each of the n sampling units 150, n comparator circuits 120, n AND gate circuits 130, and n switching units 140 corresponds one-to-one with one of the n load channels 160. That is, each load channel 160 is equipped with one corresponding sampling unit 150, one comparator circuit 120, one AND gate circuit 130, and one switching unit 140.

[0046] It should be noted that, in this embodiment, the processing unit 110 includes n voltage drop signal input terminals and n enable signal output terminals. The n voltage drop signal input terminals and n enable signal output terminals correspond one-to-one with the n load channels 160. The voltage drop signal input terminals are used to receive the voltage drop signal of the corresponding load channel 160, and the enable signal output terminals are used to output the enable signal of the corresponding load channel 160. In other words, each load channel 160 has a corresponding voltage drop signal input terminal and an enable signal output terminal in the processing unit 110.

[0047] Figure 2A sampling unit 1 is connected in series in the load channel 1. The sampling unit 1 outputs a voltage drop signal 1 to the voltage drop signal input terminal 1 (In1) of the processing unit 110 and the input terminal of the comparator circuit 1, respectively. When the processing unit 110 determines that the load channel 1 is not overcurrent based on the voltage drop signal 1, it outputs an enable signal through the enable signal output terminal 1 (Out1). The enable signal is output to one input terminal of the AND gate circuit 1. When the voltage drop signal 1 does not exceed the first voltage range, the comparator circuit 1 outputs a high-level signal to the other input terminal of the AND gate circuit 1. After receiving the enable signal from Out1 and the high-level signal from the comparator circuit 1, the AND gate circuit 1 outputs a high level to the switching unit 1 to control the load channel 1 to be in the on state. When the AND gate circuit 1 does not receive the enable signal or receives a low-level signal from the comparator circuit 1, it outputs a low level to the switching unit 1 to control the load channel 1 to be in the off state. The overcurrent protection principle for other load channels (load channel 2 to load channel n) can refer to the overcurrent protection principle of load channel 1 described above, and will not be repeated here.

[0048] Figure 2 The outputs of the n comparator circuits 120 are connected in a wired-AND manner. This means that when any one comparator circuit 120 outputs a low level, the outputs of the other comparator circuits 120 will also be pulled low. As a result, the AND gate circuits 130 connected to the other comparator circuits 120 will all receive a low-level signal, which will trigger the corresponding switching unit 140 to turn off the load channel 160. In other words, once a load channel 160 is turned off due to overcurrent, the other load channels 160 will also be turned off, thereby improving the safety of the equipment.

[0049] It should be noted that the outputs of the n comparator circuits 120 may not be connected together in a wired-AND manner. In this case, each load channel 160 implements separate hardware overcurrent protection. When an overcurrent occurs in a load channel 160, only the signal of that load channel 160 will be shut off, while the other load channels 160 will remain in the conducting state and will not be affected.

[0050] It is worth mentioning that the overcurrent protection circuit 100 of this application embodiment can be applied to electrophysiological stimulation devices. Generally speaking, electrophysiological stimulation devices include multiple load channels 160. Each load channel 160 applies electrical stimulation to the human body to achieve the purpose of treatment. The load in the load channel 160 includes an electrode plate for contacting the human body to apply electrical stimulation. The electrical stimulation is generally a constant current signal. In specific implementation, the load channel 160 can use a constant current source circuit to generate a constant current signal.

[0051] See Figure 3 This is a schematic diagram of a load channel 160 provided in one embodiment of this application. Figure 3 As shown, load channel 160 includes a constant current source circuit and a load (LOAD), wherein the constant current source circuit is used to output a constant load current to the load. It should be noted that... Figure 3 The constant current source circuit shown is a bidirectional constant current source circuit. Its working principle is based on the ability to control the flow of current in both directions, driving current from the power source to the load, and also from the load back to the power source. For example... Figure 3 As shown, the constant current source circuit includes an instrumentation amplifier 161 and an operational amplifier 162. The output terminal of the instrumentation amplifier 161 is connected to the load. The output terminal and the inverting input terminal of the operational amplifier 162 are respectively connected to the reference signal input terminal (ref) of the instrumentation amplifier. The non-inverting input terminal of the operational amplifier 162 is connected to the load (LOAD).

[0052] It should be noted that the instrumentation amplifier 161 has an adjustable gain that can be set by an external resistor Rset, which helps to precisely control the amount of current flowing from the load channel 160 to the load.

[0053] It should be noted that the input terminal of the instrumentation amplifier 161 is connected to the analog voltage output terminal of the digital-to-analog converter (DAC) unit, and the analog voltage V output by the DAC unit is... Out The current I is converted into current I by the constant current source circuit formed by the combination of instrumentation amplifier 161 and operational amplifier 162. Out And applied to the load end, such as Figure 3 As shown, the output of the instrumentation amplifier is connected to the load through a resistor Rset, and its output current is I. Out The calculation formula is: (1) Among them, V Out I represents the voltage input to the instrumentation amplifier. Out This indicates the output current of the instrumentation amplifier.

[0054] See Figure 4 This is a schematic diagram of a sampling unit provided in one embodiment of this application. Figure 4 As shown, the sampling unit 150 includes a current sensing resistor Rf and an amplifier 151. The load current passing through the current sensing resistor Rf will generate a voltage drop signal across it. It is understood that since the current applied to the human body by the electrophysiological stimulation system is generally in the milliampere (mA) range, the corresponding voltage drop signal is also very small. Therefore, in this embodiment, the amplifier 151 is used to amplify the small voltage drop. This voltage drop signal is amplified by the amplifier 151 and then output. In this embodiment, the amplified voltage drop signal (Vi) is used as the basis for determining whether the load channel 160 is overcurrent.

[0055] It should be noted that in some embodiments of this application, the overcurrent protection circuit 100 further includes an analog-to-digital converter (ADC) unit 111, and the processing unit 110 receives the voltage drop signal through the ADC unit 111.

[0056] The ADC unit 111 is connected to the sampling unit 150 and is used to receive the voltage drop signal from the sampling unit 150 and convert the voltage drop signal into a digital voltage drop signal. The processing unit 110 is used to receive the digital voltage drop signal and calculate the load current based on the digital voltage drop signal, and then determine whether to output an enable signal based on the calculated load current and a preset first current range. Specifically, the processing unit 110 is used to output an enable signal when the load current does not exceed the first current range; and to stop outputting the enable signal when the load current exceeds the first current range.

[0057] It should be noted that in some embodiments of this application, the overcurrent protection circuit 100 further includes a bidirectional isolation circuit 113, and the processing unit 110 includes a lower-level machine 112 and a higher-level machine 114. See also Figure 5 This is a schematic diagram illustrating the connection relationship between an ADC unit, a bidirectional isolation circuit, a lower-level machine, and a higher-level machine according to an embodiment of this application. Figure 5 As shown, the lower-level computer 112 is connected to the ADC unit 111, and a bidirectional isolation circuit 113 is connected between the upper-level computer 114 and the lower-level computer 112. The lower-level computer 112 receives the digital voltage drop signal from the ADC unit 111 and transmits the digital voltage drop signal to the upper-level computer 114 via the bidirectional isolation circuit 113. The upper-level computer 114 calculates the load current based on the digital voltage drop signal, and then determines whether to output an enable signal based on the calculated load current and a preset first current range. Specifically, the upper-level computer 114 outputs an enable signal when the load current does not exceed the first current range; and stops outputting the enable signal when the load current exceeds the first current range.

[0058] It should be understood that the lower-level machine 112 is also used to receive the enable signal from the upper-level machine 114 via the bidirectional isolation circuit 113, and to pass the enable signal to the AND gate circuit 130.

[0059] It should be noted that the host computer 114 can be a personal computer (PC), a server, or an embedded computer system, etc. The slave computer 112 can be a microcontroller unit (MCU) or a digital signal processor (DSP), etc.

[0060] It should be noted that in this embodiment, the host computer 114 is not directly connected to the load front-end circuit to avoid damage to the host computer due to electrical interference or voltage surges. The slave computer 112 can provide electrical isolation for the host computer 114 to protect the host computer.

[0061] Next, combine Figure 4 The provided sampling unit 150 explains the principle of overcurrent detection by the processing unit 110. The host computer 114 sends an enable signal to the slave computer 112 via the bidirectional isolation circuit 113. This enable signal instructs the slave computer 112 to output an enable signal to the AND gate circuit 130 corresponding to a certain load channel 160, initiating the software overcurrent protection process for the load channel 160. The ADC unit 111 acquires the voltage drop signal Vi amplified by the amplifier 151 and converts it into a digital voltage drop signal for subsequent comparison processing. The ADC unit 111 transmits the converted digital voltage drop signal to the slave computer 112. The slave computer 112 buffers the value of the digital voltage drop signal and then transmits it to the corresponding digital voltage drop signal input terminal of the host computer 114 via the bidirectional isolation circuit 113. After receiving the digital voltage drop signal value, the host computer 114 converts it into a corresponding current value, compares this current value with a preset first current range, and determines whether to output an enable signal based on the comparison result.

[0062] In another possible implementation, the host computer 114 may also, after receiving the value of the digital voltage drop signal, compare the value of the digital voltage drop signal with the second voltage range obtained by converting the preset first current range, and determine whether to output an enable signal based on the comparison result.

[0063] In one possible implementation, the lower-level machine 112 has n digital voltage drop signal input terminals and n enable signal output terminals. The n digital voltage drop signal input terminals and n enable signal output terminals are respectively connected to n load channels 160. The n digital voltage drop signal input terminals are connected to n ADC units 111. The n ADC units 111 are connected to n sampling units 150. The n enable signal output terminals are connected to n AND gate circuits 130.

[0064] It should be noted that in this embodiment, bidirectional communication is used between the host computer 114 and the slave computer 112 to enable the host computer 114 to send an enable signal for a certain load channel 160 to the slave computer 112, and the slave computer 112 will return the digital voltage drop signal obtained from the ADC unit 111 to the host computer 114.

[0065] Specifically, the host computer 114 and the slave computer 112 can achieve bidirectional communication in any of the following ways: serial communication (RS-232, RS-485, etc.), serial bus (USB) communication, wireless communication (Wi-Fi, Bluetooth, ZigBee, etc.), I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface), etc.

[0066] It should be noted that the host computer 114 is also used to provide a human-machine interface. Users can set or modify the overcurrent conditions of the load channel 160 through the human-machine interface. For example, users can input the upper limit and / or lower limit of the current for determining overcurrent through the host computer 114.

[0067] In this embodiment, the bidirectional isolation circuit 113 is connected to the host computer 114 and the slave computer 112 respectively. The bidirectional isolation circuit 113 is used to isolate the system ground of the front-end circuit from the system ground of the host computer, which can effectively reduce power frequency interference and improve the signal acquisition accuracy of the front-end circuit.

[0068] See Figure 6 This is a schematic diagram of a bidirectional isolation circuit provided in one embodiment of this application, as shown below. Figure 6 As shown, the bidirectional isolation circuit 113 can be a bidirectional digital isolator, which enables the isolated transmission of digital signals in two directions.

[0069] It should be noted that in some embodiments of this application, the processing unit 110 may only include a lower-level machine 112. The lower-level machine 112 is used to receive the digital voltage drop signal from the ADC unit 111, calculate the load current based on the digital voltage drop signal, and then determine whether to output an enable signal based on the calculated load current and a preset first current range. Specifically, the lower-level machine 112 is used to output an enable signal when the load current does not exceed the first current range, and to stop outputting the enable signal when the load current exceeds the first current range.

[0070] It should be noted that in some embodiments of this application, the processing unit 110 may only include the host computer 114. The host computer 114 is connected to the ADC unit 111 through a bidirectional isolation circuit 113. The host computer 114 is used to receive the digital voltage drop signal from the ADC unit 111 through the bidirectional isolation circuit 113, calculate the load current based on the digital voltage drop signal, and then determine whether to output an enable signal based on the calculated load current and a preset first current range. Specifically, the host computer 114 is used to output an enable signal when the load current does not exceed the first current range; and to stop outputting the enable signal when the load current exceeds the first current range. The enable signal output by the host computer 114 is output to the AND gate circuit 130 through the bidirectional isolation circuit 113.

[0071] In an optional embodiment, the processing unit 110 is further configured to determine the equivalent contact impedance of the load channel 160 based on the load current, and to determine the contact state of the load channel 160 based on the equivalent contact impedance.

[0072] Next, combine Figure 4 The provided sampling unit 150, for Figure 5 The principle of the processing unit 110 for detecting contact status is explained.

[0073] The actual current value of load channel 160 can be calculated using the following formula: (2) Where If represents the actual load current value, Vi represents the voltage drop signal output by amplifier 151, G represents the gain of amplifier 151, and Rf represents the resistance value of the current sensing resistor.

[0074] After calculating the actual load current value If, ​​the equivalent contact impedance Rc can be calculated based on the actual current value If. The formula for calculating the equivalent contact impedance Rc is: (3) Where Rc represents the equivalent contact impedance, If represents the actual load current value, and Vreal represents the actual voltage value applied to load channel 160 as acquired by the ADC unit.

[0075] It should be noted that in the software overcurrent protection implemented in this application embodiment, the normal current range of the load channel 160 in the software overcurrent protection mechanism can be predefined as […]. , Then, the voltage range is determined using the following formula: , ]: = ×G×Rf, = ×G×Rf; then by comparing the voltage drop signal and [ , Determine whether load channel 160 is overcurrent, where G represents the amplifier gain and Rf represents the resistance value of the current sensing resistor.

[0076] Similarly, the first voltage range used for comparison with the voltage drop signal in the hardware overcurrent protection implemented in this application embodiment can be calculated in the following way: In the predefined hardware overcurrent protection mechanism, the normal current range of the load channel 160 is […]. The lower limit of the first voltage range. = ×G×Rf, the upper limit of the voltage in the first voltage range. G represents the amplifier gain, and Rf represents the resistance of the current sensing resistor.

[0077] It should be noted that in some embodiments of this application, the host computer 114 determines the equivalent contact impedance of the load channel 160 based on the load current, and determines the contact state of the load channel 160 based on the equivalent contact impedance.

[0078] It should be noted that for electrophysiological stimulation equipment, the host computer 114 determines the contact status between the electrostimulation electrode and the human body by calculating the equivalent contact impedance Rc of the load channel 160 of the equipment. When the contact status indicates that the electrode is not in good contact with the human body, the load channel 160 is turned off to promptly shut off the electrostimulation output and avoid the problems of burns and electric shocks to the patient.

[0079] In one possible implementation, when the host computer 114 determines that the electrode of the load channel 160 is not making good contact with the human body based on the equivalent contact impedance Rc, it stops outputting the enable signal, thereby causing the AND gate circuit 130 to output a low level to the switching unit 140, turning off the load channel 160.

[0080] In one possible implementation, the human-machine interface of the host computer 114 is also used to display the operating parameters or operating status of each load channel 160. For example, when an overcurrent occurs in a load channel 160, fault information is displayed on the display device; or, when it is detected that the electrode pads of the load channel 160 are not in good contact with the human body, relevant prompt information is displayed on the display device.

[0081] In this embodiment, a comparator circuit 120 is used to implement hardware overcurrent protection. In one possible implementation, the comparator circuit 120 includes a digital potentiometer unit and a comparator unit. The digital potentiometer unit is used to adjust a first voltage range. The comparator unit is used to output a first low-level signal when the voltage drop signal exceeds the first voltage range. After receiving the first low-level signal, the AND gate circuit 130 outputs a second low-level signal to the switching unit 140, thereby turning off the load channel 160.

[0082] It should be noted that the comparator circuit 120 is also used to output a first high-level signal when the voltage drop signal does not exceed the first voltage range. When the AND gate circuit 130 receives the enable signal from the processing unit 110 and the first high-level signal, it outputs a second high-level signal to the switching unit 140, thereby connecting the load channel 160.

[0083] It should be noted that the embodiments of this application utilize a digital potentiometer unit to adjust the threshold voltage used for comparison with the voltage drop signal. Specifically, the digital potentiometer unit is connected to the input terminal of the comparator unit, and divides the voltage signal input to the comparator unit. By changing the resistance value of the digital potentiometer unit, the voltage division ratio can be changed, thereby changing the threshold voltage value of the comparator unit.

[0084] It should be noted that the comparison circuit 120 in some embodiments of this application adopts a dual-threshold comparison circuit. The dual-threshold comparison circuit can compare the voltage drop signal with a preset upper threshold voltage value and a lower threshold voltage value. When the voltage drop signal is higher than the upper threshold voltage value or lower than the lower threshold voltage value, the comparison circuit 120 outputs a low level; when the voltage drop signal is within the range defined by the upper threshold voltage value and the lower threshold voltage value, the comparison circuit 120 outputs a high level.

[0085] See Figure 7 , Figure 7 This is a schematic diagram of a comparison circuit provided in one embodiment of this application. The comparison circuit 120 is a dual-threshold comparison circuit with adjustable threshold voltage. Figure 7As shown, the comparator unit includes a first comparator 121 and a second comparator 122. The output terminals of the first comparator 121 and the second comparator 122 are connected together in a wired-AND manner to form a hardware overcurrent detection terminal OCP. The digital potentiometer unit includes a first digital potentiometer unit and a second digital potentiometer unit. The first comparator 121 is used to receive the voltage drop signal and output a third low level when the voltage drop signal is higher than the upper threshold of the first voltage range. The second comparator 122 is used to receive the voltage drop signal and output a fourth low level when the voltage drop signal is lower than the lower threshold of the first voltage range. The hardware overcurrent detection terminal OCP is used to output a first low level when the first comparator 121 outputs a third low level or the second comparator 122 outputs a fourth low level. The first digital potentiometer unit is used to adjust the upper threshold of the first voltage range. The second digital potentiometer unit is used to adjust the lower threshold of the first voltage range.

[0086] The first comparator 121 is used to compare the voltage drop signal with the upper threshold value of the first voltage range, and outputs a corresponding high or low level according to the comparison result. The non-inverting input of the first comparator 121 is used to receive the upper threshold reference voltage signal Vth_h, which is a signal proportional to the upper threshold value of the first voltage range. The inverting input of the first comparator 121 is used to receive the voltage drop signal Vi.

[0087] It should be noted that the working principle of the first comparator 121 is as follows: when the inverting input voltage of the inverting input terminal of the first comparator 121 is higher than the input voltage of the non-inverting input terminal of the first comparator 121, the first comparator 121 outputs a third low level; when the input voltage of the inverting input terminal of the first comparator 121 is lower than the input voltage of the non-inverting input terminal of the first comparator 121, the first comparator 121 outputs a third high level.

[0088] In a specific implementation, the first digital potentiometer unit is connected to the non-inverting input terminal of the first comparator 121. The first digital potentiometer unit includes a first digital potentiometer Rf_h and a first voltage divider resistor Rh. The first digital potentiometer Rf_h and the first voltage divider resistor Rh form a voltage divider circuit to divide the upper threshold reference voltage signal Vth_h input to the non-inverting input terminal of the first comparator 121.

[0089] It should be noted that changing the resistance value of the first digital potentiometer Rf_h can change the voltage division ratio of the first digital potentiometer unit, thereby changing the upper threshold value of the first voltage range. Therefore, in this embodiment, the upper threshold value can be adjusted by adjusting the resistance value of the first digital potentiometer Rf_h.

[0090] The second comparator 122 is used to compare the voltage drop signal with the lower threshold value of the first voltage range, and outputs a corresponding high or low level according to the comparison result. The non-inverting input of the second comparator 122 is used to receive the voltage drop signal Vi, and the inverting input of the first comparator 121 is used to receive the lower threshold reference voltage signal Vth_l, which is a signal that is directly proportional to the lower threshold value of the first voltage range.

[0091] It should be noted that the working principle of the second comparator 122 is as follows: when the inverting input voltage of the inverting input terminal of the second comparator 122 is higher than the input voltage of the non-inverting input terminal of the second comparator 122, the second comparator 122 outputs a fourth low level; when the input voltage of the inverting input terminal of the second comparator 122 is lower than the input voltage of the non-inverting input terminal of the second comparator 122, the fourth comparator outputs a fourth high level.

[0092] In a specific implementation, the second digital potentiometer unit is connected to the non-inverting input terminal of the second comparator 122. The second digital potentiometer unit includes a second digital potentiometer Rf_l and a second voltage divider resistor Rl. The second digital potentiometer Rf_l and the second voltage divider resistor Rl form a voltage divider circuit to divide the voltage drop signal Vi input to the non-inverting input terminal of the second comparator 122.

[0093] It should be noted that changing the resistance value of the second digital potentiometer Rf_l can change the voltage division ratio of the second digital potentiometer unit, thereby changing the lower threshold value of the first voltage range. Therefore, in this embodiment, the lower threshold value can be adjusted by adjusting the resistance value of the second digital potentiometer Rf_l.

[0094] In practice, the first digital potentiometer and the second digital potentiometer can be connected to the host computer 114 through digital interfaces (such as I2C or SPI). Users can program and control the first digital potentiometer or the second digital potentiometer through the human-machine interface of the host computer 114 to adjust the resistance value of the first digital potentiometer or the second digital potentiometer, thereby improving the convenience and flexibility of adjusting the first voltage range.

[0095] It should be noted that some embodiments of this application also include a power supply circuit, which is used to provide power signals to various parts of the overcurrent protection circuit 100.

[0096] In one possible implementation, the power supply circuit includes a USB-to-lithium battery power switching circuit. This switching circuit is configured such that when the USB power is plugged in, the device should preferentially use the USB power to charge the lithium battery, and when the USB power is disconnected, the device should automatically switch to lithium battery power.

[0097] See Figure 8 , Figure 8 This is a schematic diagram of a USB-to-lithium battery power switching circuit provided in one embodiment of this application. Figure 8 In the switching circuit shown, the VBUS input is used to connect to the USB power supply, and the VIN input is used to connect to the lithium battery power supply. A Schottky diode D1 is placed between the VBUS and VIN inputs to prevent current from flowing back from the USB power supply to the lithium battery power supply input. It should be noted that the switching circuit can use a standard Type-C interface to connect to the USB power supply.

[0098] exist Figure 8 In the switching circuit shown, VBAT is the battery charging terminal. When the USB power supply is plugged in, the USB power can charge the lithium battery through the VBAT charging terminal. A Schottky diode D2 is placed between the VBAT charging terminal and the VIN input terminal to prevent USB power from flowing to the VIN input terminal.

[0099] In one possible implementation, the power supply circuit also includes a battery charging management circuit. See also Figure 9 , Figure 9 This is a schematic diagram of a battery charging management circuit provided in one embodiment of this application. Figure 9 The battery charging management circuit shown has a battery charging management chip (U9) located between the VBUS input and the VBAT charging terminal. This chip includes a charging status indicator (CHRG) and a charging completion indicator (STDBY). When the USB power supply charges the battery, the CHRG pin is pulled low by an internal switch, indicating that charging is in progress; after charging is complete, the CHRG pin is in a high-impedance state. A charging status indicator LED (LED3) is located between the VBUS input and the CHRG pin. The LED lights up when charging is in progress and turns off when charging is complete.

[0100] When the battery is fully charged, the STDBY pin is pulled low by an internal switch, indicating that charging is complete; otherwise, the STDBY pin is in a high-impedance state. A charging completion indicator LED (LED2) is located between the VBUS input and the STDBY pin, which lights up when charging is complete.

[0101] In one possible implementation, the power supply circuit also includes a battery power management circuit. See also Figure 10 , Figure 10 This is a schematic diagram of a battery power management circuit provided in one embodiment of this application. Figure 10The battery power management circuit shown includes a battery power management chip (U10). This chip has a voltage detection pin (CELL), which connects to the VBAT charging terminal to monitor the battery voltage and determine its power level. The battery power management chip communicates with a host computer via I2C. Specifically, the chip establishes a communication connection with the host computer through SDA (I2C bus data line) and SCL (I2C bus clock line), sending battery power data to the host computer. After receiving the battery power data, the host computer can display the lithium battery's power information on a display device.

[0102] It should be noted that the device embodiments described above are merely illustrative. For example, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0103] Another embodiment of this application provides an electrophysiological stimulation device, including the overcurrent protection circuit 100 as described in any of the above embodiments. Since the electrophysiological stimulation device includes the overcurrent protection circuit 100 of any of the above embodiments, the technical effects achieved by the electrophysiological stimulation device provided in this application are exactly the same as those achieved by the overcurrent protection circuit 100 of any of the above embodiments, and will not be repeated here.

[0104] It should be noted that, in the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0105] The above description, with reference to the accompanying drawings, illustrates some embodiments of this application, but does not limit the scope of this application. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and substance of this application shall be within the scope of this application.

Claims

1. An overcurrent protection circuit, characterized in that, The circuit includes: Load channel; A sampling unit is used to acquire the voltage drop signal from the load channel; The processing unit is configured to receive the voltage drop signal and, if it is determined from the voltage drop signal and a preset first current range that the load channel is not overcurrent, output an enable signal. A comparator circuit is used to receive the voltage drop signal and output a first low-level signal when the voltage drop signal exceeds a first voltage range, wherein the first voltage range is determined according to a preset second current range; An AND gate circuit is connected to the processing unit and the comparison circuit respectively, and is used to output a second low-level signal when the enable signal is not received or the first low-level signal is received; A switching unit, connected to the AND gate circuit, is used to turn off the load channel upon receiving the second low-level signal.

2. The overcurrent protection circuit according to claim 1, characterized in that, It also includes an ADC unit; The ADC unit is used to receive the voltage drop signal from the sampling unit and convert the voltage drop signal into a digital voltage drop signal; The processing unit is configured to receive the digital voltage drop signal and calculate the load current based on the digital voltage drop signal; The processing unit is further configured to output the enable signal when the load current does not exceed the first current range; The processing unit is further configured to stop outputting the enable signal when the load current exceeds the first current range.

3. The overcurrent protection circuit according to claim 2, characterized in that, The processing unit is further configured to determine the equivalent contact impedance of the load channel based on the load current, and to determine the contact state of the load channel based on the equivalent contact impedance.

4. The overcurrent protection circuit according to claim 2, characterized in that, It also includes a bidirectional isolation circuit. The processing unit includes a host computer and a slave computer. The slave computer is connected to the ADC unit, and the bidirectional isolation circuit is connected between the host computer and the slave computer. The lower-level machine is used to receive the digital voltage drop signal from the ADC unit and transmit the digital voltage drop signal to the upper-level machine through the bidirectional isolation circuit. The host computer is used to receive the digital voltage drop signal and calculate the load current based on the digital voltage drop signal; The host computer is also configured to output the enable signal when the load current does not exceed the first current range; The host computer is also used to stop outputting the enable signal when the load current exceeds the first current range; The lower-level machine is also used to receive the enable signal from the upper-level machine via the bidirectional isolation circuit, and to transmit the enable signal to the AND gate circuit.

5. The overcurrent protection circuit according to claim 1, characterized in that, The comparison circuit includes a digital potentiometer unit and a comparator unit; The digital potentiometer unit is used to adjust the first voltage range; The comparator unit is configured to output the first low-level signal when the voltage drop signal exceeds the first voltage range.

6. The overcurrent protection circuit according to claim 5, characterized in that, The comparator unit includes a first comparator and a second comparator, and the output terminals of the first comparator and the second comparator are connected in a wire-AND manner to form a hardware overcurrent detection terminal; the digital potentiometer unit includes a first digital potentiometer unit and a second digital potentiometer unit. The first comparator is configured to receive the voltage drop signal and output a third low level when the voltage drop signal is higher than the upper threshold of the first voltage range; The second comparator is used to receive the voltage drop signal and output a fourth low level when the voltage drop signal is lower than the lower threshold of the first voltage range; The hardware overcurrent detection terminal is used to output the first low level when the first comparator outputs the third low level or the second comparator outputs the fourth low level; The first digital potentiometer unit is used to adjust the upper threshold value of the first voltage range; The second digital potentiometer unit is used to adjust the lower threshold value of the first voltage range.

7. The overcurrent protection circuit according to claim 6, characterized in that, The non-inverting input of the first comparator is used to receive the upper threshold reference voltage signal; The inverting input of the first comparator is used to receive the voltage drop signal; The non-inverting input of the second comparator is used to receive the voltage drop signal; The inverting input of the second comparator is used to receive the lower threshold reference voltage signal; The first digital potentiometer unit is connected to the non-inverting input of the first comparator; The second digital potentiometer unit is connected to the non-inverting input of the second comparator.

8. The overcurrent protection circuit according to claim 1, characterized in that, The first current range is within the second current range.

9. The overcurrent protection circuit according to claim 1, characterized in that, The load channel includes a constant current source circuit and a load, wherein the constant current source circuit is used to output a constant load current to the load.

10. The overcurrent protection circuit according to claim 9, characterized in that, The constant current source circuit includes an instrumentation amplifier and an operational amplifier. The output terminal of the instrumentation amplifier is connected to the load. The output terminal and the inverting input terminal of the operational amplifier are respectively connected to the reference signal input terminal of the instrumentation amplifier. The non-inverting input terminal of the operational amplifier is connected to the load.

11. The overcurrent protection circuit according to claim 1, characterized in that, The number of load channels, comparator circuits, AND gate circuits, and switching units are all multiple. Each load channel, comparator circuit, AND gate circuit, and switching unit corresponds to another load channel. The output terminals of the multiple comparator circuits are connected together in a wired-AND manner.

12. An electrophysiological stimulation device, characterized in that, The electrophysiological stimulation device includes the overcurrent protection circuit as described in any one of claims 1-11.

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