Flexible power voltage regulation control method and system based on power electronic conversion

Abstract

The invention discloses a flexible power voltage regulation control method and system based on power electronic conversion, and belongs to the field of power distribution network voltage regulation. According to the method, the real-time state of a power grid is obtained through a high-frequency data acquisition and phase locking technology based on a unified power quality conditioner architecture; judging a power grid operation interval by utilizing three-interval voltage state space mapping and hysteresis logic; a compensation voltage vector is injected through the series converter, and bidirectional flexible adjustment of the voltage is achieved; multi-target cooperative control is carried out through a parallel converter, and reactive compensation and harmonic suppression are realized; a priority-based dynamic weight distribution mechanism is also introduced, and a control strategy is automatically adjusted to prevent overload when the capacity is limited; and PI parameters are optimized on line by using an improved adaptive particle swarm optimization algorithm. The problems of voltage bidirectional out-of-limit, low power factor and harmonic pollution caused by long-distance power supply and photovoltaic access of the rural power distribution network can be effectively solved, and the method has the advantages of being high in response speed, high in adjustment precision and high in robustness.

Description

Flexible Voltage Regulation Control Method and System Based on Power Electronic Conversion Technical Field

[0001] This invention belongs to the field of power distribution network voltage regulation technology, and more specifically, relates to a flexible power voltage regulation control method and system based on power electronic conversion. Background Technology

[0002] With the development of modern power systems, rural power grids are facing increasingly severe voltage quality challenges. Rural power grids are characterized by numerous points of operation, long lines, wide coverage, and dispersed loads. Excessive power supply radius leads to high line impedance, resulting in severe voltage drops at the end of lines during peak electricity consumption periods. In some distribution areas, voltage remains below the standard lower limit for extended periods, seriously affecting the normal operation of residential life and agricultural production equipment. Simultaneously, with the rapid development of distributed photovoltaic (PV) power, a large number of PV power sources are connected to the end of the distribution network, causing a misalignment between source and load in time and space. During peak PV power generation periods when load is low, reverse power transmission from PV systems can raise the voltage at the end of the distribution network, causing voltage to exceed the upper limit and even triggering PV inverter disconnection. The problem of bidirectional voltage exceeding the limit has become a key bottleneck restricting the high-quality development of rural distribution networks.

[0003] Existing voltage management technologies mainly include adjusting transformer taps, installing reactive power compensation devices (such as capacitor banks), and line upgrades. Tap adjustment is a stepped adjustment method, unable to cope with continuous voltage fluctuations, and its adjustment range is limited. Reactive power compensation devices mainly address power factor issues, with limited effectiveness in improving voltage drops caused by resistive components in long lines, and are prone to resonance. While line upgrades can fundamentally reduce impedance, they involve huge investments and long construction periods, making large-scale deployment difficult. Some power electronic voltage regulators that have emerged in recent years, while possessing certain voltage regulation capabilities, are often single-function and unable to simultaneously address multiple problems such as low voltage, overvoltage, harmonic pollution, and three-phase imbalance. They are also prone to overload shutdown under extreme conditions and lack adaptive protection mechanisms. Existing technologies cannot achieve rapid, continuous, bidirectional voltage regulation, making it difficult to adapt to the drastic voltage fluctuations after photovoltaic integration; they lack comprehensive harmonic and reactive power management capabilities, resulting in limited improvement in power quality; fixed control parameters are difficult to adapt to the large parameter variations in rural power grids; and under heavy load conditions, they lack effective capacity management mechanisms, leading to low equipment reliability.

[0004] This shows that existing technologies suffer from rigid adjustment methods, limited functionality, slow response speed, and a lack of adaptive capabilities. Summary of the Invention

[0005] (I) Technical Problems Solved In response to the problems in related technologies, the present invention provides a flexible power voltage regulation and control method and system based on power electronic conversion to overcome the above-mentioned technical problems existing in the existing related technologies.

[0006] (II) Technical Solution To solve the above-mentioned technical problems, the present invention is implemented through the following technical solution: S1. Real-time acquisition of electrical signals at the common coupling point, load side, and DC bus side; generation of fundamental positive-sequence component, negative-sequence component, and harmonic component through phase-locked loop technology and coordinate transformation processing; S2. Based on the grid voltage amplitude information of the components in S1, combined with preset three-interval voltage thresholds and hysteresis comparison logic, a one-dimensional voltage state space mapping is constructed to determine the current grid operating interval in real time and generate control mode commands; S3. Responding to the control mode commands in S2, when in an abnormal operating zone, the load reference voltage vector and the actual grid voltage in S1 are calculated. The vector difference is used to generate the modulation signal of the series converter based on the dual closed-loop control model and feedforward decoupling strategy, which drives the series converter to inject compensation voltage vector; S4, through the multi-objective control function of the parallel converter, based on the components in S1, the active reference current, reactive reference current and harmonic reference current are calculated and synthesized to obtain the synthesized reference current; S5, it is determined whether the amplitude of the synthesized reference current in the synthesis process exceeds the rated capacity of the device. If it does not exceed the rated capacity, the synthesized reference current is used as the final command current; otherwise, the synthesized reference current is corrected to obtain the final command current; the final command current is used to generate the drive signal of the parallel converter.

[0007] Preferably, step S1 includes the following steps: S11, configuring a high-frequency A / D conversion module to discretize and acquire the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage to obtain the original digital signal sequence; S12, using a phase-locked loop based on a second-order generalized integrator to perform orthogonal signal generation processing on the grid voltage signal in S11, and locking the fundamental angular frequency and phase angle of the grid voltage through coordinate transformation and PI adjustment; S13, using the phase angle extracted in S12 to construct a Park transformation matrix to convert the voltage and current in the three-phase stationary coordinate system in S11 into DC components in the dq rotating coordinate system; separating the fundamental DC component and harmonic AC component through a low-pass filter and combining them to form a real-time status data stream.

[0008] Preferably, step S2 includes the following steps: S21, setting a standard phase voltage reference value, and setting a low-voltage threshold and an overvoltage threshold according to the distribution network operation standard, while setting a hysteresis voltage dead zone to prevent frequent switching; S22, reading the effective value of the grid voltage in the real-time status data stream in S1; if the effective value is less than the low-voltage threshold minus the dead zone value, it is determined to be a low-voltage overload zone, and a boost compensation command is generated; if the effective value is greater than the overvoltage threshold plus the dead zone value, it is determined to be a photovoltaic overvoltage zone, and a buck suppression command is generated; otherwise, it is determined to be a normal operation zone, and a standby command is generated; S23, outputting the command generated in S22 as the control mode command to the series converter to generate a control mode command.

[0009] Preferably, step S3 includes the following steps: S31, setting the d-axis reference voltage and q-axis reference voltage in the dq coordinate system according to the load rated voltage requirements; S32, subtracting the actual grid voltage vector in the real-time status data stream of S1 from the d-axis reference voltage and q-axis reference voltage to obtain the compensation voltage reference value to be output by the series converter; S33, setting the voltage outer loop to use a PI controller and the current inner loop to use a P controller to obtain a double closed-loop control circuit; inputting the error between the compensation voltage reference value and the actual output voltage, and the error between the reference capacitor current and the actual capacitor current, into the PI controller and the P controller respectively to obtain the reference capacitor current and the initial voltage command; S34, introducing the grid voltage feedforward quantity and the cross-coupling term of the output filter inductor and filter capacitor in S1 into the initial voltage command of S33 to eliminate the coupling interference between the dq axes and generate the final dq axis modulation wave command; S35, converting the dq axis modulation wave command generated in S34 into a modulation wave in the three-phase stationary coordinate system through inverse Park transformation, comparing it with a high-frequency triangular carrier wave, and generating a PWM pulse signal to drive the IGBT.

[0010] Preferably, step S4 includes the following steps: S41, reading the DC bus voltage in S1 and comparing it with the DC bus voltage reference value to obtain the DC bus voltage error; adjusting the DC bus voltage error through a PI controller to obtain the active current component required to maintain energy balance; S42, extracting the fundamental reactive component of the load current from the components in S1 as the reactive reference current, and extracting the harmonic AC component of the load current as the harmonic reference current; S43, subtracting the active current component from the harmonic d-axis component of the harmonic reference current to obtain the d-axis reference current; adding the reactive reference current to the harmonic q-axis component of the harmonic reference current to obtain the q-axis reference current; the d-axis reference current and the q-axis reference current together constitute the composite reference current.

[0011] Preferably, step S5 includes the following steps: S51, setting the maximum allowable output current amplitude of the parallel converter; calculating the magnitude of the synthesized reference current synthesized in S43 in real time; S52, determining whether the magnitude is greater than the maximum allowable output current amplitude; if it is greater, initiating current limiting protection and weight redistribution; S53, prioritizing the active current component calculated in S41, deducting the active current component from the maximum allowable output current amplitude, and calculating the first remaining available capacity; S54, introducing a reactive power reduction coefficient and a harmonic reduction coefficient, and using the first remaining available capacity in S53 to proportionally reduce the reactive power reference current and harmonic reference current in S42, generating the corrected final command current; S55, comparing the corrected final command current with the actual parallel output current, and generating the control voltage command for the parallel inverter through PI regulation and grid voltage feedforward decoupling.

[0012] Preferably, the step of generating the corrected final command current in S54 includes: S541, comparing the reactive reference current amplitude in S42 with the first remaining available capacity in S53; S542, if the reactive reference current amplitude is less than or equal to the first remaining available capacity, then the reactive current is output in full; calculating the second remaining available capacity after subtracting the reactive reference current amplitude from the first remaining available capacity; if the harmonic reference current amplitude in S42 is greater than the second remaining available capacity, then multiplying the harmonic reference current by the ratio of the second remaining available capacity to the harmonic reference current amplitude to limit the amplitude, thus obtaining the corrected harmonic reference current; S543, if the reactive reference current amplitude is greater than the first remaining available capacity, then multiplying the reactive reference current by the ratio of the first remaining available capacity to the reactive reference current amplitude to limit the amplitude, thus obtaining the corrected reactive reference current, and setting the harmonic reference current to zero; S544, recombining the active current component from S41 with the above-mentioned corrected reactive and harmonic reference currents to obtain the corrected final command current.

[0013] Preferably, a flexible power voltage regulation control method based on power electronic conversion further includes an adaptive optimization method to maintain the optimal performance of the PI controller in S3 and S4, including the following steps: S6, constructing a comprehensive objective function that includes tracking error and energy loss, using an improved adaptive particle swarm optimization algorithm to optimize the proportional coefficient and integral coefficient of the PI controller in S3 and S4 online to obtain the globally optimal control parameters; at the same time, monitoring the system fault status and triggering bypass protection when abnormal.

[0014] Preferably, step S6 includes the following steps: S61, defining the parameters to be optimized as the voltage loop PI parameters and current loop PI parameters of the series converter in S3 and the corresponding PI parameters of the parallel converter in S4, forming a particle position vector; S62, constructing a fitness function, wherein the fitness function is a weighted sum of the integral time absolute error and the control input energy; S63, initializing the particle swarm, and calculating the fitness value based on the particle position parameters in each iteration to obtain the current optimal particle position; S64, adopting a nonlinear dynamic inertia weight adjustment strategy to update the particle velocity and position; when the maximum number of iterations or the fitness threshold is reached, outputting the PI parameter set corresponding to the globally optimal position and assigning it to the controller in S3 and S4.

[0015] Preferably, a flexible power voltage regulation control system based on power electronic conversion is used to implement the flexible power voltage regulation control method based on power electronic conversion. The system includes: a data acquisition and phase-locked loop module: used to execute S1, acquire grid voltage, current and DC voltage, and output grid phase information and real-time status data stream; a status determination and mode switching module: used to execute S2, determine the grid voltage range and output control mode command; a series voltage compensation control module: used to execute S3, generate PWM drive signal for the series converter to realize voltage regulation; a parallel current collaborative control module: used to execute S4, generate PWM drive signal for the parallel converter to realize reactive power and harmonic compensation; a capacity management and optimization module: used to execute S5 and S6, perform dynamic weight allocation and PI parameter adaptive optimization; and a fault protection and bypass module: used to monitor faults and perform bypass switching operations.

[0016] (III) Beneficial Effects This invention offers the following beneficial effects: Based on the coordinated control of series and parallel converters, and utilizing a dual-closed-loop control model and feedforward decoupling strategy, this invention achieves millisecond-level response and zero steady-state error tracking to grid voltage fluctuations. By constructing a three-interval voltage state-space mapping and hysteresis comparison logic, the device can intelligently identify and smoothly switch between boost compensation, buck suppression, and standby modes. This not only effectively solves the problem of low voltage at the end of long-distance power supply but also suppresses overvoltage problems caused by distributed photovoltaic access, achieving bidirectional flexible voltage regulation and ensuring that the user-side voltage remains stable within the standard range.

[0017] This invention, through the multi-objective control function of a parallel converter, achieves comprehensive compensation for load reactive power and harmonic current while maintaining DC bus energy balance. It can accurately extract the fundamental reactive and harmonic components from the load current and generate a command current through vector synthesis. This allows the parallel converter to correct the grid-side power factor to near 1.0 while regulating voltage and significantly reducing current harmonic distortion rate; thus significantly improving the overall power quality of the distribution area and reducing line losses.

[0018] This invention introduces a priority-based dynamic weight allocation mechanism and an improved adaptive particle swarm optimization algorithm. Under extreme heavy load conditions, the system can automatically reduce secondary targets (harmonics, reactive power) and prioritize the core function (DC voltage regulation) to prevent the device from shutting down due to overload. The adaptive algorithm can find the optimal PI control parameters online, enabling the system to adapt to the large-scale fluctuations in rural power grid parameters, significantly enhancing the robustness and environmental adaptability of the control system and reducing the difficulty of operation and maintenance.

[0019] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the invention. For those skilled in the art, the drawings can be obtained from these drawings without creative effort.

[0021] Figure 1 is a flowchart illustrating the flexible power voltage regulation control method based on power electronic conversion according to the present invention; Figure 2 is a schematic diagram illustrating the device of the flexible power voltage regulation control method based on power electronic conversion and the fast flexible voltage regulation device in the system according to the present invention; Figure 3 is a diagram illustrating the installation location and installation effect of the fast flexible voltage regulation device in the flexible power voltage regulation control method based on power electronic conversion and the system according to the present invention; Figure 4 is a schematic diagram illustrating the modules of the flexible power voltage regulation control system based on power electronic conversion according to the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the invention, and not all embodiments. Based on the embodiments of the invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the invention.

[0023] To address the technical problems raised in the background section, please refer to Figure 1. This embodiment of the invention provides a flexible power voltage regulation control method and system based on power electronic conversion, including: S1. Real-time acquisition of electrical signals at the common coupling point, load side, and DC bus side; generation of fundamental positive-sequence components, negative-sequence components, and harmonic components through phase-locked loop technology and coordinate transformation processing; S2. Based on the grid voltage amplitude information of the components in S1, combined with preset three-interval voltage thresholds and hysteresis comparison logic, constructing a one-dimensional voltage state space mapping, determining the current grid operating interval in real time, and generating control mode commands; S3. Responding to the control mode commands in S2, when in an abnormal operating zone, calculating the difference between the load reference voltage vector and the actual grid voltage vector in S1, and generating a modulation signal for the series converter based on a dual closed-loop control model and a feedforward decoupling strategy, driving the series converter to inject a compensation voltage vector; S4. Utilizing the multi-objective control function of the parallel converter... Based on the components in S1, the active reference current, reactive reference current, and harmonic reference current are calculated and synthesized to obtain the synthesized reference current; S5, it is determined whether the amplitude of the synthesized reference current exceeds the rated capacity of the device during the synthesis process. If it does not exceed the rated capacity, the synthesized reference current is used as the final command current; otherwise, the synthesized reference current is corrected to obtain the final command current; the final command current is used to generate the drive signal of the parallel converter; the above embodiment, through multi-dimensional data perception, state space determination, series-parallel collaborative control, and capacity dynamic allocation mechanism, can not only accurately capture the characteristics of grid voltage fluctuations and load distortion in real time, but also avoid frequent start-stop of the device through hysteresis logic, achieve voltage tracking without steady-state error through feedforward decoupling, and prevent device overload through priority dynamic weight allocation strategy under extreme heavy load conditions; effectively solves the problems of low voltage, photovoltaic back-feeding overvoltage, and comprehensive power quality management caused by long-distance power supply in rural power grids.

[0024] Please refer to Figures 2 and 3. The method of this invention is based on a fast flexible voltage regulation device (UPQC), whose topology includes a series converter, a parallel converter, a common DC bus capacitor, a series injection transformer, and an output LC filter. The above embodiment S1 includes the following steps: S11, configuring a high-frequency A / D conversion module to discretize and acquire the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage to obtain the original digital signal sequence. In specific implementation, the above embodiment S11 specifically involves: selecting Hall voltage sensors and Hall current sensors (in this embodiment, LV25-P or LA55-P are used respectively) and installing them at the PCC point (common coupling point), the load input line, and both ends of the DC capacitor; the signal conditioning circuit uses a second-order Butterworth low-pass filter with a cutoff frequency set to 2kHz to filter out high-frequency switching noise and prevent interference. The A / D converter is configured in synchronous sampling mode, with a sampling frequency set to 12.8kHz (i.e., 256 points sampled per cycle at 50Hz power frequency), and a quantization accuracy of 16 bits, ensuring a voltage resolution better than 0.1V and a current resolution better than 0.01A. The acquired data is directly transferred to the DSP memory via the DMA controller to form the original digital signal sequence. In S12, a phase-locked loop based on a second-order generalized integrator is used to perform orthogonal signal generation processing on the grid voltage signal in S11. Through coordinate transformation and PI adjustment, the fundamental angular frequency and phase angle of the grid voltage are locked. In specific implementation, S12 of the above embodiment is as follows: For the case of severe voltage distortion in rural power grids, a dual second-order generalized integrator phase-locked loop is used. The A-phase voltage signal acquired in S11 is input into the dual second-order generalized integrator phase-locked loop to obtain mutually orthogonal signals v. α v β Transform these two signals to the dq rotating coordinate system using the Park transformation matrix to obtain the sum and v. d v q Adjusting v using a PI controller q The component is brought close to 0. After the PI controller output is superimposed with the fundamental angular frequency feedforward, the real-time phase angle θ of the grid voltage is output through the integrator. This phase angle θ will serve as the reference for all coordinate transformations in subsequent S13 and S3, S4, ensuring that the control system is strictly synchronized with the grid. In S13, the Park transformation matrix is ​​constructed using the phase angle extracted in S12 to convert the voltage and current in the three-phase stationary coordinate system in S11 into DC components in the dq rotating coordinate system. The fundamental DC component and harmonic AC component are separated by a low-pass filter and combined to form the real-time status data stream. In specific implementation, S13 of the above embodiment is as follows: the Park transformation matrix is ​​constructed using the phase angle θ output in S12; the three-phase voltage and current collected in S11 are multiplied by this matrix on the left to obtain u. d u q and i d i q; where, the Park transformation matrix T abc / dq as follows: In the dq coordinate system, the fundamental positive-sequence component is represented as a DC quantity, while the harmonic and negative-sequence components are represented as AC quantities. The system design includes a digital low-pass filter with a cutoff frequency of 20Hz to filter u. d u q Filtering is performed to extract the fundamental voltage component u. 1 d u 1 q Simultaneously, the original dq signal is subtracted from the filtered DC component to obtain the AC component u, which includes harmonics and negative sequence. 2 d u 2 q These components together constitute the real-time status data stream, providing a precise data foundation for subsequent voltage determination and harmonic mitigation. The above-described embodiment S1, through high-frequency hardware sampling and advanced digital signal processing algorithms, solves the problem of severe signal distortion and difficulty in extracting effective control quantities in rural power grids. Utilizing a SOGI phase-locked loop and coordinate transformation, the complex AC signal is decoupled into DC and AC quantities, achieving not only precise locking of the fundamental phase but also accurate separation of harmonics and negative-sequence components, providing a high-quality, low-latency data foundation for subsequent precise voltage compensation and comprehensive power quality management.

[0025] The above embodiment S2 includes the following steps: S21, setting a standard phase voltage reference value, and setting a low-voltage threshold and an overvoltage threshold according to the distribution network operation standard, while setting a hysteresis voltage dead zone to prevent frequent switching; in specific implementation, the above embodiment S21 specifically involves: setting a standard phase voltage reference value U ref The voltage is 220V; based on the "Permissible Deviation of Power Supply Voltage" standard and the actual conditions of rural power grids, the low-voltage threshold U is set. low The overvoltage threshold is 198V (-10%). highThe voltage is set to 260V (considering the allowable deviation of the photovoltaic grid connection voltage and the voltage drop of the line impedance, the upper limit is set to approximately +18%). The voltage dead zone value ΔV for hysteresis comparison is set to 2V to construct a buffer band for state switching. The reason for setting the voltage dead zone value ΔV to 2V in this embodiment is based on engineering experience. When ΔV is slightly larger than the sensor measurement error (usually <1V) and the instantaneous fluctuation amplitude of the power grid, it can effectively filter out small voltage fluctuations near the critical point, avoid frequent erroneous switching of the device due to measurement noise or instantaneous fluctuations, and ensure the smoothness of state switching. Reliability and mechanical switch life; S22, read the effective value of the grid voltage from the real-time status data stream in S1; if the effective value is less than the low-voltage threshold minus the dead zone value, it is determined to be a low-voltage heavy load zone, and a boost compensation command is generated; if the effective value is greater than the overvoltage threshold plus the dead zone value, it is determined to be a photovoltaic overvoltage zone, and a buck suppression command is generated; otherwise, it is determined to be a normal operation zone, and a standby command is generated; in specific implementation, the above embodiment S22 is specifically as follows: in this embodiment, the effective value of the grid voltage U is calculated from the data stream of S1 every half power frequency cycle (10ms). rms Define state variable S mode Where 0 represents normal / standby, 1 represents low voltage compensation, and 2 represents overvoltage suppression; 198V≤U rms ≤260V is the normal operating range; Logic A (entering the low voltage range): when U rms When <(198V−2V)=196V, set S mode =1; Logic B (Exit Low Voltage Zone): When S mode =1 and U rms When (198V + 2V) = 200V, set S mode =0; Logic C (Entering Overvoltage Region): When U rms When (260V + 2V) = 262V, set S mode =2; Logical D (Exit Overpressure Zone): When S mode =2 and U rms When <(260V−2V)=258V, set S mode =0; S23, Output the instruction generated in S22 as the control mode instruction to the series converter to generate the control mode instruction; In specific implementation, S23 of the above embodiment is specifically: when S mode When S = 0, the output command controls the series converter voltage to 0 and closes the thyristor bypass switch, putting the device in a "zero-loss" standby state; when S modeWhen a transition occurs (such as from 0 to 1), the system initiates a "soft switching" process: first, the thyristor bypass switch is disconnected, and then within 5 power frequency cycles, the reference output voltage of the series converter is linearly increased from 0 to the target compensation value to achieve a smooth transition. The above embodiment effectively solves the problem of frequent start-stop oscillations of the device caused by fluctuations in the grid voltage near the critical point by constructing a three-interval state machine logic that includes a dead zone. It can sensitively identify low voltage and overvoltage conditions and filter out minor disturbances through the hysteresis interval. Combined with the soft switching process, it not only extends the life of the device's mechanical switches but also avoids secondary impacts on the grid and load during mode switching, thus improving the system's operational stability.

[0026] The above embodiment S3 includes the following steps: S31, setting the d-axis reference voltage and q-axis reference voltage in the dq coordinate system according to the load rated voltage requirements; specifically, in the above embodiment S31, the reference vector of the load voltage is set as U in the dq coordinate system. Lref =[311,0] T Where 311V is the peak value corresponding to the effective value of 220V; T represents transpose; the q-axis component is set to 0 to represent the direction of unity power factor; S32, subtract the actual grid voltage vector in the real-time status data stream in S1 from the d-axis reference voltage and the q-axis reference voltage to obtain the compensation voltage reference value that the series converter needs to output; In specific implementation, the above embodiment S32 is specifically as follows: read the grid voltage vector Us=[u sd ,u sq ] T ; Calculate the reference compensation voltage vector U that needs to be injected into the series converter. inj1 d-axis component u injd1 =311−u sd q-axis component u injq1 =0−u sq The calculation logic achieves flexible adjustment by compensating for any missing values ​​and removing any excess values. S33: The outer voltage loop uses a PI controller, and the inner current loop uses a P controller, resulting in a dual closed-loop control circuit. The error between the compensation voltage reference value and the actual output voltage, as well as the error between the reference capacitor current and the actual capacitor current, are input to the PI controller and the P controller respectively to obtain the reference capacitor current and initial voltage command. In specific implementation, S33 of the above embodiment specifically involves: acquiring the actual voltage u across the output capacitor of the series converter. injd u injq ; Calculate voltage error e d =u injd1 -u injd e q =u injq1 -u injdThe error is input to the PI controller to obtain the reference current command i for the filter capacitor of the series converter. cd1 i cq1 S34. In the initial voltage command of S33, the grid voltage feedforward quantity and the cross-coupling term of the output filter inductor and filter capacitor in S1 are introduced to eliminate the coupling interference between the dq axes and generate the final dq axis modulation wave command. In specific implementation, S34 of the above embodiment is specifically as follows: constructing a current inner loop control circuit; acquiring the actual current i of the current filter capacitor. cd i cq Because the LC filter has coupling terms in the dq coordinate system (i.e., changes in the d-axis current cause changes in the q-axis voltage), decoupling control needs to be introduced; the final voltage modulation wave command v d1 v q1 The calculation formula is as follows: v d1 =u sd -fm Ls i cq +Kpi(i cd1 -i cd );v q1 =u sq -fm Ls i cd +Kpi(i cq1 -i cq ); where fm represents the grid angular frequency; Ls is the filter inductance value; u sd u sq The grid voltage feedforward term extracted in S1 is used to improve the dynamic response speed; Kpi is the current loop proportional coefficient; through this decoupling algorithm, independent control of the d-axis and q-axis is achieved; S35, the dq-axis modulation wave command generated in S34 is converted into a modulation wave in the three-phase stationary coordinate system through inverse Park transformation, and compared with a high-frequency triangular carrier wave to generate a PWM pulse signal to drive the IGBT; in specific implementation, S35 of the above embodiment is specifically: using the phase angle extracted in S12, the modulation wave command v in the dq coordinate system is converted into a modulation wave in the three-phase stationary coordinate system. d1 ,v q1 The modulation wave v in the three-phase stationary coordinate system is converted by inverse Park transform using the Park transform matrix. a1The three modulated waves, vb1 and vc1, are compared with a triangular carrier wave with a frequency of 12.8kHz to generate six PWM pulse signals. A dead time of 2µs is set to prevent shoot-through between the upper and lower transistors on the same bridge arm. Finally, the IGBT module is driven to establish the required compensation voltage between the grid and the load. The above embodiment achieves fast and accurate compensation of grid voltage fluctuations by the series converter through dual closed-loop control and feedforward decoupling strategy. Feedforward decoupling eliminates coupling interference between the d and q axes, giving the system extremely high dynamic response speed. The vector synthesis logic that compensates for the missing voltage ensures that the load side can obtain a stable standard voltage regardless of whether the grid voltage is too low or too high, solving the problem of bidirectional voltage over-limit.

[0027] The above embodiment S4 includes the following steps: S41, reading the DC bus voltage in S1, comparing it with the DC bus voltage reference value, and obtaining the DC bus voltage error; adjusting the DC bus voltage error through a PI controller to obtain the active current component required to maintain energy balance; in specific implementation, the above embodiment S41 specifically involves: setting the DC bus voltage reference value U. dc1 The actual DC bus voltage U is 700V; read from the data stream of S1. dc ; Calculate the voltage deviation ΔU dc =U dc1 -U dc The deviation is input into the PI controller, which outputs the active current component i required to maintain the energy balance of the DC bus. dloss The active current component represents the internal losses of the device and the active power consumed / absorbed by voltage compensation on the series side; S42, extract the fundamental reactive component of the load current from the components in S1 as the reactive reference current, and extract the harmonic AC component of the load current as the harmonic reference current; In specific implementation, the above embodiment S42 specifically means: directly extract the fundamental reactive current component i of the load current from the real-time status data stream of S1. Lq Extract the AC component of the load current i Ld - (d-axis harmonics) and i Lq - (q-axis harmonics); these components accurately reflect the degree of nonlinear pollution caused by the load to the power grid; S43, subtract the active current component from the harmonic d-axis component of the harmonic reference current to obtain the d-axis reference current; add the reactive reference current to the harmonic q-axis component of the harmonic reference current to obtain the q-axis reference current; the d-axis reference current and the q-axis reference current together constitute the composite reference current; in specific implementation, the above embodiment S43 is specifically as follows: the control objective of the parallel converter is to provide the reactive power and harmonics required by the load to the power grid, while absorbing active power from the power grid to maintain the DC voltage; therefore, the composite reference current command i of the parallel converter is... shd1 i shq1The calculation is as follows: d-axis (active axis): i shd1 =i Ld - -i dloss (Compensates for active harmonics and absorbs loss current); q-axis (reactive axis): i shq1 =i Lq +i Lq - (Fully compensated fundamental and harmonic reactive power of the load); Here, the symbol is defined as: positive when flowing out of the converter; The above embodiment uses a multi-objective cooperative control strategy to enable the parallel converter to maintain the DC bus energy balance while taking into account reactive power compensation and harmonic control; It makes full use of the current control capability of power electronic devices and uses vector synthesis technology to solve various power quality problems (such as low power factor and harmonic pollution) in the same control loop, which significantly improves the overall power quality of the distribution area.

[0028] S5. Determine whether the amplitude of the synthesized reference current during the synthesis process exceeds the rated capacity of the device. If it does not exceed the rated capacity, the synthesized reference current is used as the final command current; otherwise, the synthesized reference current is corrected to obtain the final command current; the final command current is used to generate the drive signal for the parallel converter. The above embodiment S5 includes the following steps: S51. Set the maximum allowable output current amplitude of the parallel converter; calculate the magnitude of the synthesized reference current synthesized in S43 in real time; In specific implementation, the above embodiment S51 specifically involves: setting the maximum safe current I of the parallel converter IGBT module. max =50A; Real-time calculation of the magnitude of the synthesized reference current generated by S43 S52. Determine whether the modulus value is greater than the maximum allowable output current amplitude; if it is greater, activate current limiting protection and weight redistribution; in specific implementation, S52 of the above embodiment is specifically as follows: if I req ≤I max If I... req >I max This indicates that the load demand exceeds the device's capacity and must be reduced; S53, prioritize the active current component calculated in S41, deduct this active current component from the maximum allowable output current amplitude, and calculate the first remaining available capacity; in specific implementation, the above embodiment S53 specifically is: if i dloss The absolute value of (active component in S41) > I max If the error occurs, the system will shut down; otherwise, the active power component i will be deducted. shda =−idloss; Calculate the first remaining available capacity. S54. Introduce reactive power reduction coefficients and harmonic reduction coefficients, and use the first remaining available capacity in S53 to proportionally reduce the reactive power reference current and harmonic reference current in S42 to generate the corrected final command current; the step of generating the corrected final command current in S54 of the above embodiment includes: S541. Compare the reactive power reference current amplitude in S42 with the first remaining available capacity in S53; in specific implementation, S541 of the above embodiment specifically refers to: the fundamental reactive current component i required by the load Lq (From S42); Compare i Lq with I rem1 The size of the reactive reference current; S542, if the reactive reference current amplitude is less than or equal to the first remaining available capacity, then the reactive current is output in full; calculate the second remaining available capacity after subtracting the reactive reference current amplitude from the first remaining available capacity; if the harmonic reference current amplitude in S42 is greater than the second remaining available capacity, then multiply the harmonic reference current by the ratio of the second remaining available capacity to the harmonic reference current amplitude to limit the amplitude, and obtain the corrected harmonic reference current; in specific implementation, the above embodiment S542 is specifically as follows: if the fundamental reactive current component i Lq The absolute value ≤ I rem1 Set the reactive power reduction factor τ1=1; when the remaining available capacity is greater than or equal to the corresponding demand current amplitude, the system has full compensation capability. At this time, the reactive power reduction factor is 1, which means 100% output according to demand. This is the natural optimal choice under sufficient capacity conditions, aiming to achieve the best compensation effect; calculate the second remaining available capacity. Calculate the total harmonic current amplitude. ;if I h >I rem2 Then set the harmonic reduction coefficient τ2=I rem2 / I h S543. If the amplitude of the reactive reference current is greater than the first remaining available capacity, then the reactive reference current is multiplied by the ratio of the first remaining available capacity to the amplitude of the reactive reference current to limit the amplitude, thereby obtaining the corrected reactive reference current, and the harmonic reference current is set to zero; In specific implementation, the above embodiment S543 specifically means: if the fundamental reactive current component i Lq The absolute value of I rem1 Then set the reactive power reduction coefficient τ1=I rem1 / |i Lq | and forcibly set the harmonic reduction factor τ2=0; the reason for setting the reactive power reduction factor τ1=I rem1 / |i Lq When available capacity is insufficient to fully meet the compensation demand of a certain level, a proportional limit must be applied according to the principle of fair capacity allocation; this proportional value τ1=I rem1 / |i LqThis ensures that, under hard capacity constraints, the output current amplitude strictly does not exceed the upper limit of available capacity, while compensating as much as possible according to demand, making it the optimal allocation scheme under resource constraints. When all available capacity is exhausted to ensure higher priority functions (such as active power balancing or full reactive power compensation), the harmonic reduction coefficient τ2 of lower priority functions (harmonic compensation) must be set to 0, and a complete abandonment command must be executed to ensure the safety of core functions and equipment. S544: The active current component of S41 is resynthesized with the above-modified reactive power and harmonic reference current to obtain the modified final command current. In specific implementation, S544 of the above embodiment is specifically: final command i shdf =ishda+τ2 i Ld - i shqf =τ1 i Lq - +τ2 i Ld - The final command replaces the original command and is sent to S55 for current tracking control. In this embodiment, the reactive power reduction coefficient τ1 and harmonic reduction coefficient τ2 are used to dynamically allocate remaining available capacity when capacity is insufficient, clearly prioritizing reactive power compensation (τ1 calculated first) and harmonic compensation (τ2 calculated later) as a strategy-level priority, rather than fixed proportional coefficients. S55 compares the corrected final command current with the actual parallel output current, and generates the control voltage command for the parallel inverter through PI regulation and grid voltage feedforward decoupling. Specifically, in the above embodiment, S55 specifically employs a PI control plus feedforward decoupling strategy similar to that used on the series side in S3; the synthesized reference current is compared with the actual parallel output current, and the parallel inverter is generated through PI regulation. The voltage command of the converter drives the parallel converter to operate, thereby correcting the grid-side current to a sine wave in phase with the voltage at the PCC point, achieving a power factor close to 1.0 and a THD < 5%. In the above embodiment, when the required compensation current exceeds the rated capacity of the device, a priority-based dynamic weight allocation mechanism is triggered, prioritizing DC voltage regulation, followed by reactive power compensation, and finally harmonic mitigation. This solves the risk of overcurrent shutdown of the device under extreme heavy load conditions in rural power grids. By identifying capacity bottlenecks, priority is given to ensuring the DC voltage regulation function that sustains the system, followed by maximizing reactive power compensation to support the voltage, and finally considering harmonic mitigation. This adaptive current limiting strategy ensures that the device can operate safely and continuously under various operating conditions, maximizing the regulation potential of the equipment.

[0029] Furthermore, to address the problem that fixed PI parameters in traditional systems are difficult to adapt to large fluctuations in rural power grid parameters (such as changes in line impedance and sudden load changes), the above embodiment also includes an adaptive optimization method to maintain the optimal performance of the PI controllers in S3 and S4, comprising the following steps: S6, constructing a comprehensive objective function that includes tracking error and energy loss, and using an improved adaptive particle swarm optimization algorithm to optimize the proportional and integral coefficients of the PI controllers in S3 and S4 online to obtain the globally optimal control parameters; simultaneously monitoring the system fault status and triggering bypass protection in case of an anomaly; S6 in the above embodiment includes the following steps: S61, defining the parameters to be optimized as the voltage loop PI parameters and current loop PI parameters of the series converter in S3 and the parallel converter in S4. The corresponding PI parameters of the converter constitute the particle position vector. In specific implementation, S61 of the above embodiment is as follows: select eight parameters, namely the series voltage loop (Kpv,Kiv), the series current loop (Kpi,Kii), the parallel voltage loop (Kpdc,Kidc), and the parallel current loop (Kpc,Kic), to form an 8-dimensional particle position vector X; set the population size to 30; set the search space: Kp∈[0.1,100], Ki∈[1,5000]; set the maximum number of iterations to ML; S62, construct the fitness function, which is the weighted sum of the integral time absolute error and the control input energy. In specific implementation, S62 of the above embodiment is as follows: define a comprehensive objective function that includes tracking error and energy loss. , where e u The voltage tracking error in S3 (i.e., the error between the compensation voltage reference value in S33 and the actual output voltage), e i The current tracking error in S4 (i.e., the error between the final command current and the actual output current in S55), u out For the controller output; w1, w2, w3 are 0.5, 0.3, and 0.2 respectively; w1=0.5 gives the voltage tracking error the maximum weight, because the primary task of UPQC is to stabilize the load voltage, and voltage quality is directly related to the safety of user equipment; w2=0.3 gives the current tracking error a secondary weight to ensure the accuracy of current compensation on the parallel side and to achieve effective control of reactive power and harmonics; w3=0.2 gives the control energy loss a smaller weight, which aims to prevent the controller output from being too aggressive, causing system oscillation or excessive energy consumption, and to balance economy and stability while ensuring control accuracy.

[0030] S63. Initialize the particle swarm. In each iteration, calculate the fitness value based on the particle position parameters to obtain the current optimal particle position Gbest. S64. Employ a nonlinear dynamic inertia weight adjustment strategy to update particle velocity and position. When the maximum number of iterations or the fitness threshold is reached, output the PI parameter set corresponding to the globally optimal position and assign it to the controllers in S3 and S4. Specifically, in the above embodiment, S64 involves: employing a nonlinear dynamic inertia weight g; setting g... max =0.9, g min =0.4; In the k-th iteration, if the fitness value of a particle is better than the population average fitness, it means that the particle is in the dominant region, and the nonlinear dynamic inertia weight g is reduced to perform a fine search; otherwise, g is increased to escape the local area; the specific formula is g=g max −(g max -g min )×(k / ML) 2The parameters are updated using the standard PSO speed formula. After 100 iterations, the eight PI parameters corresponding to Gbest are output and assigned to the controller register, completing parameter self-tuning. Parameter self-tuning (PSO optimization) is not a real-time control loop, but runs as a background periodic task or event-triggered task. It is performed once during system initial commissioning, when the grid impedance changes significantly (e.g., topology change), or periodically (e.g., every 24 hours). A single optimization takes approximately several seconds to tens of seconds (hundreds of iterations), which is within the time limit of mainstream DSPs (such as TI). This can be accomplished on the C2000 series without affecting microsecond-level real-time PWM control interruption. Furthermore, the system includes fault protection logic: when the DC bus voltage is detected to be >800V (overvoltage), IGBT temperature >85℃ (overtemperature), or instantaneous output current >100A (short circuit), the DSP blocks all PWM signals within 10µs; simultaneously, it outputs a high-level trigger signal to turn on the bidirectional thyristor (SCR) connected in parallel to the primary side of the series transformer; the thyristor turns on within 10ms, bypassing the series converter, allowing the load to seamlessly switch to direct mains power supply mode; after a 3-minute delay after the fault disappears, the system automatically resets, the thyristor turns off, and the device resumes compensation operation. The above embodiment, by introducing an improved adaptive particle swarm optimization algorithm, solves the problem that traditional fixed PI parameters are difficult to adapt to large-scale fluctuations in rural power grid parameters (such as changes in line impedance and sudden load changes); it can find the globally optimal PI parameter combination online, ensuring the control system always operates at its optimal state. The system balances rapid response and system stability, significantly improving the device's environmental adaptability and robustness. A flexible power voltage regulation control system based on power electronic conversion is implemented, comprising: a data acquisition and phase-locked loop module (S1) for acquiring grid voltage, current, and DC voltage, and outputting grid phase information and real-time status data streams; a status determination and mode switching module (S2) for determining the grid voltage range and outputting control mode commands; a series voltage compensation control module (S3) for generating PWM drive signals for the series converter to achieve voltage regulation; a parallel current collaborative control module (S4) for generating PWM drive signals for the parallel converter to achieve reactive power and harmonic compensation; a capacity management and optimization module (S5 and S6) for performing dynamic weight allocation and PI parameter adaptive optimization; and a fault protection and bypass module for monitoring faults and performing bypass switching operations.

[0031] In the description of this specification, references to terms such as "an embodiment," "example," "specific example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0032] The preferred embodiments of the invention disclosed above are merely illustrative of the invention. These preferred embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention.

Claims

1. A flexible power voltage regulation and control method based on power electronic conversion, characterized in that, Includes the following steps: S1. Real-time acquisition of electrical signals at the common coupling point, load side and DC bus side, and generation of fundamental positive sequence component, negative sequence component and harmonic component through phase-locked loop technology and coordinate transformation processing; S2. Based on the grid voltage amplitude information of the components in S1, combined with the preset three-interval voltage threshold and hysteresis comparison logic, a one-dimensional voltage state space mapping is constructed to determine the current grid operating interval in real time and generate control mode commands; S3. In response to the control mode commands in S2, when in an abnormal operating zone, the difference between the load reference voltage vector and the actual grid voltage vector in S1 is calculated, and based on the dual closed-loop control model and feedforward decoupling strategy, the modulation signal of the series converter is generated to drive the series converter to inject compensation voltage vector; S4. Using the multi-objective control function of the parallel converter, based on the components in S1, calculate the active reference current, reactive reference current and harmonic reference current and synthesize them to obtain the synthesized reference current. S5. Determine whether the amplitude of the synthesized reference current during the synthesis process exceeds the rated capacity of the device. If it does not exceed the rated capacity, the synthesized reference current is used as the final command current. Otherwise, the synthesized reference current is corrected to obtain the final command current; The final command current is used to generate the drive signal for the parallel converter.

2. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 1, characterized in that, S1 includes the following steps: S11, configuring a high-frequency A / D conversion module to discretize and acquire the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage to obtain the original digital signal sequence; S12, using a phase-locked loop based on a second-order generalized integrator to perform orthogonal signal generation processing on the grid voltage signal in S11, and locking the fundamental angular frequency and phase angle of the grid voltage through coordinate transformation and PI adjustment; S13, using the phase angle extracted in S12 to construct a Park transformation matrix to convert the voltage and current in the three-phase stationary coordinate system in S11 into DC components in the dq rotating coordinate system; separating the fundamental DC component and harmonic AC component through a low-pass filter and combining them to form a real-time status data stream.

3. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 1, characterized in that, S2 includes the following steps: S21, setting a standard phase voltage reference value, and setting a low-voltage threshold and an overvoltage threshold according to the distribution network operation standard, while setting a hysteresis voltage dead zone to prevent frequent switching; S22, reading the effective value of the grid voltage in the real-time status data stream in S1; if the effective value is less than the low-voltage threshold minus the dead zone value, it is determined to be a low-voltage overload zone, and a boost compensation command is generated; if the effective value is greater than the overvoltage threshold plus the dead zone value, it is determined to be a photovoltaic overvoltage zone, and a buck suppression command is generated; otherwise, it is determined to be a normal operation zone, and a standby command is generated; S23, outputting the command generated in S22 as the control mode command to the series converter to generate a control mode command.

4. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 1, characterized in that, The S3 The process includes the following steps: S31. Based on the rated voltage requirements of the load, set the d-axis reference voltage and q-axis reference voltage in the dq coordinate system; S32. Subtract the actual grid voltage vector in the real-time status data stream of S1 from the d-axis reference voltage and q-axis reference voltage to obtain the compensation voltage reference value that the series converter needs to output; S33. Set the voltage outer loop to use a PI controller and the current inner loop to use a P controller to obtain a double closed-loop control circuit; input the error between the compensation voltage reference value and the actual output voltage, and the error between the reference capacitor current and the actual capacitor current, into the PI controller and the P controller respectively to obtain the reference capacitor current and the initial voltage command; S34. Introduce the grid voltage feedforward quantity and the cross-coupling term between the output filter inductor and the filter capacitor in S1 into the initial voltage command of S33 to eliminate the coupling interference between the dq axes and generate the final dq-axis modulation wave command; S35. Convert the dq-axis modulation wave command generated in S34 into a modulation wave in the three-phase stationary coordinate system through inverse Park transformation, compare it with the high-frequency triangular carrier wave, and generate the PWM pulse signal to drive the IGBT.

5. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 1, characterized in that, S4 includes the following steps: S41, reading the DC bus voltage in S1 and comparing it with the DC bus voltage reference value to obtain the DC bus voltage error; adjusting the DC bus voltage error through a PI controller to obtain the active current component required to maintain energy balance; S42, extracting the fundamental reactive component of the load current from the components in S1 as the reactive reference current, and extracting the harmonic AC component of the load current as the harmonic reference current; S43, subtracting the active current component from the harmonic d-axis component of the harmonic reference current to obtain the d-axis reference current; adding the reactive reference current to the harmonic q-axis component of the harmonic reference current to obtain the q-axis reference current; the d-axis reference current and the q-axis reference current together constitute the composite reference current.

6. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 1, characterized in that, S5 includes the following steps: S51, setting the maximum allowable output current amplitude of the parallel converter; calculating the magnitude of the synthesized reference current synthesized in S43 in real time; S52, determining whether the magnitude is greater than the maximum allowable output current amplitude; if it is greater, initiating current limiting protection and weight redistribution; S53, prioritizing the active current component calculated in S41, deducting the active current component from the maximum allowable output current amplitude, and calculating the first remaining available capacity; S54, introducing a reactive power reduction coefficient and a harmonic reduction coefficient, and using the first remaining available capacity in S53 to proportionally reduce the reactive power reference current and harmonic reference current in S42, generating the corrected final command current; S55, comparing the corrected final command current with the actual parallel output current, and generating the control voltage command for the parallel inverter through PI regulation and grid voltage feedforward decoupling.

7. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 6, characterized in that, The step of generating the corrected final command current in S54 includes: S541, comparing the reactive reference current amplitude in S42 with the first remaining available capacity in S53; S542, if the reactive reference current amplitude is less than or equal to the first remaining available capacity, then the reactive current is output in full; calculating the second remaining available capacity after subtracting the reactive reference current amplitude from the first remaining available capacity; if the harmonic reference current amplitude in S42 is greater than the second remaining available capacity, then multiplying the harmonic reference current by the ratio of the second remaining available capacity to the harmonic reference current amplitude to limit the amplitude, thus obtaining the corrected harmonic reference current; S543, if the reactive reference current amplitude is greater than the first remaining available capacity, then multiplying the reactive reference current by the ratio of the first remaining available capacity to the reactive reference current amplitude to limit the amplitude, thus obtaining the corrected reactive reference current, and setting the harmonic reference current to zero; S544, recombining the active current component from S41 with the above-mentioned corrected reactive and harmonic reference currents to obtain the corrected final command current.

8. The flexible power voltage regulation control method based on power electronic conversion as described in claim 1 further includes an adaptive optimization method for maintaining the optimal performance of the PI controller in S3 and S4, comprising the following steps: S6. Construct a comprehensive objective function that includes tracking error and energy loss. Use an improved adaptive particle swarm optimization algorithm to optimize the proportional and integral coefficients of the PI controller in S3 and S4 online to obtain the globally optimal control parameters. At the same time, monitor the system fault status and trigger bypass protection when an anomaly occurs.

9. The flexible power voltage regulation and control method based on power electronic conversion as described in claim 1, characterized in that, S6 includes the following steps: S61, defining the parameters to be optimized as the voltage loop PI parameters and current loop PI parameters of the series converter in S3 and the corresponding PI parameters of the parallel converter in S4, forming a particle position vector; S62, constructing a fitness function, which is a weighted sum of the integral time absolute error and the control input energy; S63, initializing the particle swarm, and calculating the fitness value based on the particle position parameters in each iteration to obtain the current optimal particle position; S64, using a nonlinear dynamic inertia weight adjustment strategy to update the particle velocity and position; when the maximum number of iterations or the fitness threshold is reached, outputting the PI parameter set corresponding to the globally optimal position and assigning it to the controllers in S3 and S4.

10. A flexible power voltage regulation control system based on power electronic conversion, characterized in that, To implement the flexible power voltage regulation control method based on power electronic conversion as described in any one of claims 1-9, the system comprises: a data acquisition and phase-locked loop module: used to execute S1, acquire grid voltage, current and DC voltage, and output grid phase information and real-time status data stream; a status determination and mode switching module: used to execute S2, determine the grid voltage range and output control mode command; a series voltage compensation control module: used to execute S3, generate PWM drive signal for the series converter to realize voltage regulation; a parallel current collaborative control module: used to execute S4, generate PWM drive signal for the parallel converter to realize reactive power and harmonic compensation; a capacity management and optimization module: used to execute S5 and S6, perform dynamic weight allocation and PI parameter adaptive optimization; and a fault protection and bypass module: used to monitor faults and perform bypass switching operations.

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