Method and system for resisting side channel attack based on power consumption disorder

Abstract

The invention relates to the field of information security, in particular to a side channel attack resisting method and system based on power consumption disorder. A plurality of operator parts are integrated, different cryptographic algorithms are adapted according to the operator parts required by the cryptographic algorithms, the independent LFSR circuit is introduced to carry out power consumption maximum threshold control on operator power consumption disorder, and power consumption step controllability is achieved. The method is a universal side channel attack resisting method for performing power consumption disorder on an operator level, can be compatible and matched with various different cryptographic algorithms, reduces resource occupation, can also control the maximum power consumption when the side channel attack resisting function works, and can improve the service life of the cryptographic algorithm on the basis of not influencing the time delay of the cryptographic algorithm. And the chip power consumption and capability for resisting the side channel attack are optimized.

Description

A method and system for resisting side-channel attacks based on power consumption disorder Technical Field

[0001] This invention relates to the field of information security, specifically to a method and system for resisting side-channel attacks based on power consumption disorder. Background Technology

[0002] With the development of information technology, people are paying more and more attention to information security. Cryptographic security chips have become the core hardware foundation for ensuring the security of data assets. However, in the physical implementation process of cryptographic algorithms, side-channel information related to the internal operation state will inevitably be leaked. Attackers can recover the internal key or intermediate state without destroying the algorithm itself by collecting signals such as power consumption, electromagnetic radiation, and timing generated when the device executes the encryption algorithm and using power consumption analysis and electromagnetic analysis techniques.

[0003] To defend against such attacks, existing cryptographic security chips typically incorporate protection mechanisms at the algorithm or hardware circuit level. At the algorithm level, existing technologies add specific protection methods to different cryptographic algorithms, such as fixed constant time implementation, algorithm masking, and S-box dual-path implementation. When multiple cryptographic algorithms are integrated into a cryptographic security chip, configuring multiple protection methods can lead to excessive resource consumption. At the hardware circuit level, existing technologies often add power protection circuits and inductor dynamic switching circuits around the cryptographic algorithm. However, the operation of these protection circuits can affect algorithm performance and cause significant additional power consumption.

[0004] In summary, existing anti-side-channel attack technologies are mainly based on the algorithm level and hardware circuit level, which have shortcomings such as non-universal protection technology, large resource consumption, low performance, and high power consumption. There is a need to propose a new anti-side-channel attack method and circuit that can be adapted to multiple cryptographic algorithms to reduce resource consumption, and can achieve controllable power consumption without affecting the normal operation of cryptographic algorithms. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a method and system for resisting side-channel attacks based on power consumption disorder. This method is compatible with various cryptographic algorithms, reduces resource consumption, and controls the maximum power consumption when the anti-side-channel function is working.

[0006] To solve the aforementioned technical problem, the present invention adopts the following technical solution: a side-channel attack resistance method based on power consumption disorder, comprising the following steps: S01, issuing an initial enable signal, selecting the required operator components according to the cryptographic algorithm, and outputting the initial enable signal; S02, generating random numbers, and then distributing them to multiple LFSR modules as initial variables according to their addresses, with the number of LFSR modules corresponding one-to-one with the operator components, each LFSR module performing a feedback XOR operation based on the initial variables to generate a single-bit pseudo-random signal, the single-bit pseudo-random signals from multiple LFSR modules forming a pseudo-random sequence, and performing an OR operation with the initial enable signal to generate an operator enable signal corresponding one-to-one with the operator components; S03, the operator components operate according to the operator enable signals, generating the operator component operation results; S04, arbitrating the operation results of multiple operator components based on the initial enable signal, and outputting a valid result.

[0007] Furthermore, the maximum power consumption threshold of the cryptographic algorithm circuit is controlled by controlling the number of LFSR modules involved in the computation.

[0008] Furthermore, LFSR modules that write random numbers participate in the calculation and output pseudo-random signals, while LFSR modules that do not write random numbers do not participate in the calculation and output 0.

[0009] Furthermore, in step S01, the initial enable signal corresponding to the required operator component is 1, and the initial enable signal corresponding to the unused operator component is 0.

[0010] Furthermore, in step S04, the initial enable signal is ANDed with the results of the operations of multiple operator components to obtain a valid result.

[0011] This invention also discloses a side-channel attack resistant system based on power consumption disorder, comprising: an initial enable signal distribution module configured to select the required operator components according to the cryptographic algorithm, generate and output the initial enable signal; a random number generation module configured to generate random numbers and distribute them to the power consumption disorder control module; the power consumption disorder control module including a random number distribution module, an LFSR module, and an OR operation module, wherein the random number distribution module receives externally input random numbers and distributes them to the LFSR modules according to their addresses as initial variables, the number of LFSR modules corresponds one-to-one with the number of operator components, each LFSR module performs a feedback XOR based on the initial variables to generate a single-bit pseudo-random signal, the single-bit pseudo-random signals of multiple LFSR modules form a pseudo-random sequence, and the OR operation module performs an OR operation on the pseudo-random sequence and the initial enable signal to generate an operator enable signal corresponding one-to-one with the operator components; multiple operator components constituting the cryptographic algorithm circuit are configured to perform encryption operations according to the operator enable signals to generate the operation results of the operator components; and an arbitration module configured to arbitrate the operation results of multiple operator components according to the initial enable signal and output a valid result.

[0012] Furthermore, the maximum power consumption threshold of the cryptographic algorithm circuit is controlled by controlling the number of LFSR modules involved in the computation.

[0013] Furthermore, LFSR modules that write random numbers participate in the calculation and output pseudo-random signals, while LFSR modules that do not write random numbers do not participate in the calculation and output 0.

[0014] Furthermore, the initial enable signal generation rule is as follows: the initial enable signal corresponding to the required operator component is 1, and the initial enable signal corresponding to the unnecessary operator component is 0.

[0015] Furthermore, the arbitration module performs an AND operation between the initial enable signal and the results of the operations of multiple operator components to obtain a valid result.

[0016] The beneficial effects of this invention are as follows: This invention proposes a general method for resisting side-channel attacks by implementing power consumption disorder at the operator level. It simultaneously introduces an independent LFSR circuit to control the maximum power consumption threshold of the operator power consumption disorder, achieving controllable power consumption in a stepped manner. This method is compatible with various cryptographic algorithms, reducing resource consumption, and can control the maximum power consumption when the anti-side-channel function is working. It optimizes the chip power consumption and capability against side-channel attacks without affecting the latency of the cryptographic algorithm itself, and does not affect the normal operation of the cryptographic algorithm itself, resulting in high performance. Attached Figure Description

[0017] Figure 1 is a flowchart of the method described in Embodiment 1; Figure 2 is a block diagram of the system described in Embodiment 2; Figure 3 is a block diagram of the power consumption disorder control module. Detailed Implementation

[0018] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0019] Example 1 This example discloses a side-channel attack resistance method based on power consumption disorder. Side-channel attacks require collecting power consumption and electromagnetic signals from the device under test, and then using power consumption analysis and electromagnetic analysis to attack cryptographic algorithms, thereby obtaining internal keys or private information. Therefore, this invention proposes using operator power consumption disorder for side-channel attack resistance, causing the power consumption of the cryptographic algorithm circuit module to fluctuate randomly. Attackers cannot obtain accurate power consumption and electromagnetic signals, thus achieving resistance to side-channel attacks.

[0020] As shown in Figure 1, this method includes the following steps: S01, Initial enable signal is sent out. The required operator components are selected according to the cryptographic algorithm, and the initial enable signal is output. The initial enable signal is a binary sequence with a length equal to the number of operator components. Specifically, the initial enable signal corresponding to the required operator components is 1, and the initial enable signal corresponding to the unnecessary operator components is 0.

[0021] Each operator component is equivalent to a general underlying function. Common cryptographic algorithms can be implemented based on general underlying functions. Multiple operator components constitute a cryptographic algorithm circuit. Different cryptographic algorithms can be implemented by selecting different operator components. This step selects the required operator components according to the cryptographic algorithm, which can adapt to a variety of different cryptographic algorithms. Moreover, the operator components are independent, and the anti-side channel attack method does not affect the normal operation of the cryptographic algorithm itself and will not affect the performance of the cryptographic algorithm itself.

[0022] S02. Generate random numbers and distribute them to multiple LFSR modules as initial variables according to their addresses. The number of LFSR modules corresponds one-to-one with the number of operator components. Each LFSR module performs a feedback XOR operation based on the initial variable to generate a single-bit pseudo-random signal. The single-bit pseudo-random signals from multiple LFSR modules form a pseudo-random sequence. The pseudo-random sequence is ORed with the initial enable signal to generate an operator enable signal that corresponds one-to-one with the operator component.

[0023] This embodiment represents a key step in achieving resistance to side-channel attacks and controllable maximum power consumption threshold. First, a random number is introduced into the initial enable signal, allowing randomness to drive the operator components' actions, resulting in randomized power consumption for the operator components. Consequently, the power consumption of the cryptographic algorithm module exhibits random characteristics to resist side-channel attacks. Second, LFSR modules are introduced. The number of LFSR modules corresponds one-to-one with the operator components and is independently controlled, enabling independent control over the enabling of different operator components. In this embodiment, the maximum power consumption threshold of the cryptographic algorithm circuit is controlled by controlling the number of LFSR modules participating in the computation. LFSR modules with randomly written numbers participate in the computation and output a pseudo-random signal; LFSR modules without randomly written numbers do not participate in the computation and output 0.

[0024] For example, if there are 8 operator components, and only 3 LFSR modules are input with random numbers, the LFSR module can output the power consumption of 3+1 operator components at most. The maximum power consumption can be controlled to be the power consumption of 4 computing components participating in the technology.

[0025] S03. The operator component operates according to the operator enable signal and generates the operation result of the operator component.

[0026] S04. Arbitrate the operation results of multiple operator components based on the initial enable signal and output a valid result. The arbitration rule is to perform an AND operation between the initial enable signal and the operation results of multiple operator components to obtain a valid result, which is the operation result of the required operator component in step S01.

[0027] A complete implementation of a cryptographic algorithm may require iterative computation of operator components. Therefore, the above steps are repeated, and the resulting cryptographic algorithm rules are combined to achieve a complete cryptographic algorithm.

[0028] Example 2 This example discloses a side-channel attack resistance system based on power consumption disorder, as shown in Figure 2, including an initial enable signal sending module, a random number generation module, a power consumption disorder control module, an operator component, and an arbitration module.

[0029] The initial enable signal sending module is configured to select the required operator components according to the cryptographic algorithm, generate and output the initial enable signal En[N:0]. The random number generation module generates and sends random numbers to the power consumption chaos control module. The power consumption chaos control module outputs Gate[N:0] to enable the gate0-N modules respectively. gate0-N are direct enable controls for the corresponding N+1 operator components (gate0-N can be understood as switches for the N+1 operator components, 1 corresponds to the switch being on, and 0 corresponds to the switch being off). The arbitration output module outputs the valid operator component operation results. The N+1 operator components constitute the cryptographic algorithm circuit and are configured to perform encryption operations according to the operator enable signals to generate operator component operation results. The arbitration module is configured to arbitrate the operation results of multiple operator components based on the initial enable signal and output a valid result. Specifically, the arbitration module performs a bitwise AND operation between the initial enable signal and the operation results of multiple operator components to obtain a valid result.

[0030] In this embodiment, the initial enable signal is a binary sequence with the same length as the number of operator components. Specifically, the initial enable signal for the required operator components is 1, and the initial enable signal for the unused operator components is 0.

[0031] In the power consumption disorder control module, the user needs to input a random number to activate the power consumption disorder function (if no random number is input, the default random number is 0). The initial enable signal En[N:0] is sent according to the cryptographic algorithm. The power consumption disorder control module processes the random number and the initial enable signal En[N:0], and outputs Gate[N:0] to the gate0-N module to drive the operator components 0-N. Finally, the arbitration output module arbitrates the operation results of multiple operator components and outputs a valid result.

[0032] In the above process, due to the influence of random numbers in Gate[N:0], the operator components can be driven to perform actions randomly, resulting in randomized power consumption of the operator components. As a result, the power consumption of the cryptographic algorithm module exhibits random characteristics to resist side-channel attacks.

[0033] In the circuit described above, the core component is the power consumption disorder control module. This module's function is to randomly increase the power consumption of other different operator components while ensuring the effective operation of the operator components, thus guaranteeing random power consumption fluctuations at each moment. Simultaneously, to enable the power consumption disorder control module to achieve controllable maximum power consumption thresholds for power consumption disorder and to implement stepped power consumption control under different application scenarios, independent LFSRs corresponding to each operator component are added for control, allowing for independent and controllable enabling of different operator components. Specifically, as shown in Figure 3, the power consumption disorder control module includes a random number distribution module, an LFSR module, and an OR operation module. The random number distribution module receives externally input random numbers and distributes them to the LFSR modules according to their addresses as initial variables. The LFSR modules are pseudo-random modules, with their number corresponding to the number of operator components. Each LFSR module performs a feedback XOR operation based on the initial variable to generate a single-bit pseudo-random signal. The single-bit pseudo-random signals from multiple LFSR modules form a pseudo-random sequence. The OR operation module performs an OR operation between the pseudo-random sequence and the initial enable signal to generate an operator enable signal corresponding to each operator component.

[0034] In the power consumption disorder control module, since Gate[N:0] corresponds to LFSR and is N+1 bits, if some of the operator components need to participate in randomness enabling, multiple random numbers need to be filled into the corresponding LFSR as initial values ​​according to their addresses. For example, if the random number is filled into the initial value of the LFSR0 module, the LFSR0 module will implement feedback processing every cycle and output a single-bit pseudo-random sequence out[0] as the pre-enablement of operator component 0; if the initial value of the LFSR1 module is not filled, the LFSR1 module will always be 0, that is, out[1]==0, and the pre-enablement of operator component 1 will be invalid.

[0035] To ensure that the effective operator components are enabled, the generation function of Gate[N:0] in the power consumption disorder control module is given as: Gate[N:0]=En[N:0]| out[N:0].

[0036] The initial enable signal En[N:0] is ORed with the operator component pre-enable out[N:0] to ensure that, on the basis of the effective operator component actions, the actions of other different operator components are randomly added, so as to generate random fluctuations in the power consumption of the cryptographic algorithm circuit module at each time and increase the resistance to side channels.

[0037] As can be seen from the above function, since each bit of the pre-enabled out[N:0] is controlled by an independent LFSR, when it is necessary to adapt to different working environments and control the maximum power consumption disorder level at different maximum thresholds, the corresponding operator component can be controlled by controlling the LFSR to control whether it participates in randomness enabling, thereby controlling the maximum power consumption threshold of the operator component at each moment.

[0038] In summary, the side-channel attack resistance method and system based on power consumption chaos proposed in this embodiment can be adapted to various cryptographic algorithms, making it a general-purpose side-channel attack resistance technique. This side-channel resistance method is simple to use; it only requires inputting a random number at the address to activate the power consumption chaos circuit, resulting in low resource consumption. Furthermore, the introduced independent LFSR circuit controls the enabling of the operator components, allowing for controllable maximum power consumption thresholds for the side-channel resistance cryptographic algorithm circuit. The addition of this circuit does not affect the normal operation of the cryptographic algorithm and enhances the side-channel resistance capability of the cryptographic security chip.

[0039] The above description is merely the basic principle and preferred embodiment of the present invention. Improvements and substitutions made by those skilled in the art based on the present invention are within the scope of protection of the present invention.

Claims

1. A method for resisting side-channel attacks based on power consumption disorder, characterized in that: Includes the following steps: S01. The initial enable signal is sent out, and the required operator components are selected according to the cryptographic algorithm, and the initial enable signal is output. S02. A random number is generated and then distributed to multiple LFSR modules as initial variables according to their addresses. The number of LFSR modules corresponds one-to-one with the number of operator components. Each LFSR module performs a feedback XOR operation based on the initial variable to generate a single-bit pseudo-random signal. The single-bit pseudo-random signals from multiple LFSR modules form a pseudo-random sequence. The pseudo-random sequence is ORed with the initial enable signal to generate an operator enable signal corresponding one-to-one with the operator component. S03. The operator components operate according to the operator enable signal, generating the operation results of the operator components. S04. The operation results of multiple operator components are arbitrated based on the initial enable signal, and a valid result is output.

2. The side-channel attack resistance method based on power consumption disorder according to claim 1, characterized in that: The maximum power consumption threshold of the cryptographic algorithm circuit is controlled by controlling the number of LFSR modules involved in the computation.

3. The side-channel attack resistance method based on power consumption disorder according to claim 2, characterized in that: LFSR modules that have random numbers written to them participate in the calculation and output a pseudo-random signal; LFSR modules that do not have random numbers written to them do not participate in the calculation and output 0.

4. The side-channel attack resistance method based on power consumption disorder according to claim 1, characterized in that: In step S01, the initial enable signal for the required operator component is 1, and the initial enable signal for the unused operator component is 0.

5. The method for resisting side-channel attacks based on power consumption disorder according to claim 1, characterized in that: In step S04, the initial enable signal is ANDed with the results of multiple operator components to obtain a valid result.

6. A side-channel attack resistant system based on power consumption disorder, characterized in that: include: The initial enable signal sending module is configured to select the required operator components according to the cryptographic algorithm, generate and output the initial enable signal; A random number generation module is configured to generate random numbers and send them to a power consumption disorder control module. The power consumption disorder control module includes a random number distribution module, an LFSR module, and an OR operation module. The random number distribution module receives externally input random numbers and distributes them to the LFSR modules according to their addresses as initial variables. The number of LFSR modules corresponds one-to-one with the number of operator components. Each LFSR module performs a feedback XOR operation based on the initial variable to generate a single-bit pseudo-random signal. The single-bit pseudo-random signals from multiple LFSR modules form a pseudo-random sequence. The OR operation module performs an OR operation between the pseudo-random sequence and the initial enable signal to generate operator enable signals corresponding one-to-one with the operator components. Multiple operator components constituting the cryptographic algorithm circuit are configured to perform encryption operations based on the operator enable signals and generate the operation results of the operator components. The arbitration module is configured to arbitrate the operation results of multiple operator components based on the initial enable signal and output a valid result.

7. The side-channel attack resistance system based on power consumption disorder according to claim 6, characterized in that: The maximum power consumption threshold of the cryptographic algorithm circuit is controlled by controlling the number of LFSR modules involved in the computation.

8. The side-channel attack resistance system based on power consumption disorder according to claim 7, characterized in that: LFSR modules that have random numbers written to them participate in the calculation and output a pseudo-random signal; LFSR modules that do not have random numbers written to them do not participate in the calculation and output 0.

9. The side-channel attack resistance system based on power consumption disorder according to claim 6, characterized in that: The initial enable signal generation rule is as follows: the initial enable signal corresponding to the required operator component is 1, and the initial enable signal corresponding to the unnecessary operator component is 0.

10. The side-channel attack resistance system based on power consumption disorder according to claim 6, characterized in that: The arbitration module performs an AND operation between the initial enable signal and the results of operations on multiple operator components to obtain a valid result.

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