Method for coordinately regulating and controlling signal and power supply in wireless communication equipment

Abstract

The invention discloses a signal and power supply coordinated regulation and control method in wireless communication equipment, which relates to the technical field of wireless communication and comprises the following steps of: constructing a time scale matrix and a priority baseline, establishing a phase locking relationship between a signal domain and a power domain, deducing a conflict track based on the time scale matrix, generating a conflict prior graph and extracting a delay fingerprint; and carrying out deconvolution reconstruction on the delayed fingerprints, mapping a conflict prior graph to a multi-cycle control link, correcting a time sequence error in a feedback path, and outputting a control instruction stream without instruction stacking. A phase locking relation is established through a time scale matrix and a priority baseline, time sequence correction is realized in combination with a conflict prior graph and a delay fingerprint, a cross-domain coupling model is generated by an arbitration mechanism, a convergence boundary is constructed to limit oscillation, and finally closed-loop control is formed through phase transition and dynamic shaping. And the stability and the reliability of the wireless communication equipment in a dynamic environment are improved.

Description

Methods for coordinated control of signal and power supply in wireless communication devices Technical Field

[0001] This invention relates to the field of wireless communication technology, and more specifically to a method for coordinated control of signal and power supply in wireless communication devices. Background Technology

[0002] "Signal and power supply coordination in wireless communication devices" refers to the intelligent linkage management of wireless signal transmission characteristics and power supply status during the operation of wireless communication terminals (such as IoT devices, smartphones, drones, base stations, etc.). AI algorithms are used to coordinate and adjust these two aspects to achieve dynamic optimization of communication performance and energy efficiency. Specifically, the system jointly analyzes the current wireless channel status (such as signal strength, interference level, and transmission rate) and the device's power supply status (such as remaining battery power, battery health, and power path load). It uses artificial intelligence algorithms (such as reinforcement learning, graph neural networks, or fuzzy logic control) to predict future communication needs and energy risks, and then dynamically adjusts transmission power, wake-up mechanisms, frequency band switching strategies, or power allocation methods. For example, when the signal is weak but the power is sufficient, the system can increase power to maintain communication quality; when power is low, the system can reduce the data rate, switch to a low-power communication mode, or delay non-critical data transmission, thereby achieving an adaptive balance between signal quality and energy consumption. This coordinated control mechanism not only improves the device's battery life and communication stability in complex environments but also provides basic architectural support for next-generation intelligent wireless communication.

[0003] Existing technologies have the following shortcomings: In existing technologies, adaptive regulation of signal transmission quality and power supply status in wireless communication devices is typically achieved using an AI collaborative optimization mechanism based on multi-source information fusion. However, in scenarios where communication environments and energy conditions change frequently, existing collaborative mechanisms suffer from insufficient feedback chain response rates. Especially when channel state abrupt changes and critical energy load switching occur concurrently, feedback delay information in the regulation link may stack, leading to the superposition and execution of control commands generated at different times within the same control cycle. When signal gain enhancement commands and power suppression strategies take effect simultaneously without priority arbitration, it will trigger logical conflicts within the controller, causing mutual exclusion between signal output strength adjustment and power load reduction commands. This ultimately results in continuous oscillation of power output between high and low states, forming an unstable and non-convergent state oscillation loop. Prolonged oscillation will trigger the controller's built-in self-protection mechanism, causing the device to enter a frequent soft reset process. This not only severely interferes with normal communication functions but may also lead to high-risk operational consequences such as link interruption and network disconnection, failing to meet the stable operation requirements of high-reliability wireless communication devices in complex dynamic environments.

[0004] The information disclosed in the background section is only intended to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a method for coordinated control of signal and power supply in wireless communication devices, so as to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a method for coordinated control of signal and power supply in a wireless communication device, comprising the following steps: constructing a time-stamped matrix and a priority baseline, establishing a phase-locked relationship between the signal domain and the power domain, deducing the conflict trajectory based on the time-stamped matrix, generating a conflict prior map and extracting a delay fingerprint; performing deconvolution reconstruction on the delay fingerprint, mapping the conflict prior map to a multi-cycle control link, correcting timing errors in the feedback path, and outputting a control command flow without instruction stacking; arbitrating the control command flow without instruction stacking based on the priority baseline, using an instruction arbitrator for sequential rearrangement, setting mutual exclusion rules according to the conflict prior map, calibrating the conflict window, freezing the conflict path, and generating... A cross-domain coupling model is constructed; this model is mapped to the interaction between the signal domain and the power domain, and a convergence boundary is established to limit the oscillation range within the conflict window, thus achieving dynamic stability constraints for the arbitration process. Online measurements are performed under the convergence boundary, and the measured values ​​are mapped to physical monitoring indicators to track VSWR transitions, temperature rise derivatives, and pressure difference reversals. When the indicators exceed the threshold, counterfactual tests are performed to determine the stable region. Based on the stable region determination results, the phase transition engine is invoked to implement micro-delay injection, energy subband translation, and gain trajectory reversal within the boundary margin, triggering dynamic shaping outside the stable region to form a self-triggered dynamic control closed loop, achieving stable coordination between the signal control path and the power supply control path.

[0007] Preferably, the steps for generating a conflict prior graph and extracting delay fingerprints based on the time-stamped matrix to deduce conflict trajectories are as follows: A unified time-stamped matrix and priority baseline are constructed to establish a synchronous reference relationship between the signal control path and the power supply control path. The unified time-stamped matrix consists of high-precision timestamps of multiple key physical events, and the priority baseline forms a unique sorting vector through multi-parameter fusion sorting. A phase-locking relationship between the signal control path and the power supply control path is established based on the unified time-stamped matrix and priority baseline. By calculating the phase offset and introducing nanosecond-level micro-delays, synchronous triggering between key control events is achieved. Based on the phase-locked unified time-stamped matrix, potential conflict trajectories in the control path are deduced, and a conflict prior graph is constructed. Control events serve as nodes in the graph, and high-risk overlap relationships between events constitute directed edges. Edge weights are used to quantify the conflict risk level. Delay fingerprint features are extracted from the conflict prior graph. The delay fingerprint includes three parameters: jump point, fluctuation extreme value, and maximum sustained delay length. Historical fingerprint templates are used to determine whether there is a stacking risk in the feedback path, which is then used for subsequent adjustment strategies.

[0008] The preferred steps for outputting the control command flow without instruction stacking are as follows: Based on the delay fingerprint, perform deconvolution reconstruction to construct a time-axis structured sequence of delay events, establish a delay propagation graph, and restore the starting point, duration, and propagation trend of the actual delay in the control path; fuse the delay propagation graph with the conflict prior graph to generate a multi-cycle control link mapping model, mark cross-cycle residual instructions, and migrate the instructions to the non-conflicting execution window through time rearrangement to ensure the independence of instructions between each control cycle; perform timing error correction on all control paths in the multi-cycle control link, calculate the timing offset based on the difference between the theoretical trigger time and the actual execution time, and generate accurate compensation amounts in conjunction with the physical response characteristics of the control path; output the control command flow after delay reconstruction, time rearrangement, and error correction, ensuring that the control command flow does not overlap within a cycle, does not penetrate between cycles, and carries complete indexes and priority information for subsequent arbitration and closed-loop control execution.

[0009] Preferably, the cross-domain coupling model generation steps are as follows: The control paths in the frozen state are mapped to the physical interaction diagram of the signal control domain and the power supply control domain; a weighted interaction diagram is constructed based on the command correspondence; behavioral coupling relationships between paths are extracted; based on the frozen behavior characteristics of highly coupled paths in the interaction diagram, signal output power offset, voltage recovery delay, control response jitter, and timing overlap are identified, and a convergence boundary range is constructed to limit the oscillation interval within the conflict window; the convergence boundary range is integrated with the interaction diagram to form a control stability constraint in the dynamic arbitration process; convergence risk paths are identified within the scheduling cycle; a scheduling buffer strategy is executed; and a soft-start mechanism is introduced; finally, a cross-domain coupling model with real-time stability constraints is generated.

[0010] Preferably, the scheduling buffer strategy enables a smooth transition of control behavior within the convergence boundary by shifting the scheduling time of convergence risk paths forward or backward, reducing scheduling priority, and introducing a soft-start process, thereby ensuring that the cross-domain coupling model maintains a dynamic and stable state within the regulation cycle.

[0011] Preferably, the steps for constructing convergence boundaries and limiting the oscillation range within the conflict window are as follows: mapping the cross-domain coupling model to the control behavior interaction graph of the signal control path and the power supply control path; constructing the convergence boundary range based on the changes in the physical parameters of the frozen path pairs in the control behavior interaction graph; determining and restricting the path execution state based on the convergence boundaries within the conflict window; and performing a dynamic stability check after each scheduling cycle, adjusting the path priority and scheduling time to ensure continuous and stable convergence of the control path.

[0012] Preferably, the steps for determining the stable region are as follows: Periodic synchronous sampling is performed within the convergence boundary range to collect control behavior data of the control path and construct an execution time series matrix; the control behavior data is mapped to physical monitoring indicators, and the standing wave ratio jump, second derivative of temperature rise, and pressure difference reversal trend are extracted; simulated interference events are injected based on the boundary deviation of the physical indicators, and counterfactual tests are performed; the simulation test results are compared with the boundary parameters to confirm the stability of the region where the path is located; a path test template library is established based on the stability determination results, and test strategies are dynamically configured to achieve continuous verification and adaptive updates of the stable region.

[0013] Preferably, the phase transition engine is invoked to implement micro-delay injection, energy subband translation, and gain trajectory reversal within the boundary margin, triggering dynamic shaping outside the stable region. The self-triggered dynamic control closed-loop steps are as follows: Calculate the remaining margin value of the path state from the physical stability boundary based on the counterfactual test results and determine the transition readiness state; for paths entering the transition readiness state, perform micro-delay injection, energy subband translation, and gain trajectory reversal operations to alleviate control pressure; when fine-tuning is ineffective, trigger dynamic shaping, and achieve dynamic behavior optimization by reconstructing the control path curve structure; establish a self-triggered mechanism to automatically determine whether to enter the transition or shaping process in each control cycle based on the path behavior change trend, completing the closed-loop stable control.

[0014] In the above technical solution, the technical effects and advantages provided by this invention are as follows: This invention ensures a high-precision phase-locked relationship between the signal domain and the power domain by constructing a time-scale matrix and a priority baseline. Furthermore, it utilizes conflict prior maps and delay fingerprints for multi-cycle path reconstruction, effectively reducing residual timing errors in the feedback path. Based on this, a model describing cross-domain dynamic coupling relationships is generated through priority arbitration of the non-stacked control command flow and a dynamic freezing mechanism for the conflict window. This model is then used to construct convergence boundaries at the physical execution level to limit path oscillation amplitude. Finally, through online counterfactual testing and dynamic response judgment in the stable region, the phase transition engine and dynamic shaping mechanism are invoked to autonomously perform fine-tuning and curve reconstruction operations at the edge of the stable domain, forming an intelligent control process with predictive, adaptive, and closed-loop repair capabilities. This method not only improves the controller's anti-interference and stability in dynamic environments and reduces the risk of soft reset frequencies and link interruptions caused by control conflicts, but also enhances the continuous operation capability and communication reliability of wireless communication equipment under varying power supply and channel conditions. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this invention. For those skilled in the art, other drawings can be obtained based on these drawings.

[0016] Figure 1 is a flowchart of the method for coordinated control of signal and power supply in the wireless communication device of the present invention. Detailed Implementation

[0017] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that the description of this disclosure will be more complete and fully convey the concept of the exemplary embodiments to those skilled in the art.

[0018] This invention provides a method for coordinated control of signal and power supply in a wireless communication device, as shown in Figure 1. The method includes the following steps: acquiring a time-stamped matrix and a priority baseline; establishing a phase-locked relationship between the signal domain and the power domain; deducing potential conflict trajectories based on the time-stamped matrix; generating a conflict prior graph; and extracting the corresponding delay fingerprint. To achieve stable coordinated control of the signal control path and the power supply control path in the wireless communication device, a unified time reference and a precise phase alignment mechanism need to be established in the pre-control process stage, and potential conflicts need to be predicted to form a robust control input foundation. Specific steps are as follows: constructing a unified time-stamped matrix and a corresponding priority baseline to establish a full-time-domain synchronization reference between the signal domain and the power domain. In specific implementation, multiple actual physical processes involved in the wireless communication device are selected as reference timing sources, including but not limited to the turn-on start-up time of the RF transmitting circuit, the voltage rising edge capture time of the power amplifier unit, the switching trigger time of the antenna matching network, the carrier synchronization point generation time in the receiving link, the instantaneous trigger time of the power supply conversion of the DC-DC converter, and the charging status flag flip time in the lithium battery management chip. By acquiring high-precision timestamps at the instants these events occur, and using a time synchronization algorithm to convert all timestamps into a unified time axis coordinate system based on the main control crystal oscillator, a time matrix covering all critical control paths in both the signal and power domains is constructed. This matrix is ​​stored in a two-dimensional structure, with each row representing a control channel and each column representing a critical event point within a specific control cycle, with data units at the picosecond level. The priority baseline collects data on the current operating mode of the communication equipment (such as high-frequency transmission, low-power standby, relay enhancement mode, etc.), remaining battery percentage, rate of change of heat generation, and historical control command response efficiency, and establishes corresponding weight functions for multi-parameter fusion sorting to generate a priority vector. The ranking value of each control path is clearly defined and non-overlapping, serving as the basis for subsequent arbitration judgments.

[0019] A time-stamped matrix is ​​a time reference data matrix formed by uniformly collecting timestamps of multiple key physical events related to the signal control path and power supply control path in a wireless communication device, and then arranging them in a structured manner according to the control channel and control cycle. Specifically, the timestamp sources of the time-stamped matrix include key physical events such as the RF transmitter circuit turn-on start-up time, the power amplifier unit voltage rising edge capture time, the antenna matching network switching trigger time, the carrier synchronization point generation time in the receiver link, the DC-DC converter power supply conversion trigger time, and the charging status flag flip time in the battery management chip. These timestamps are then uniformly converted to a unified time axis coordinate system based on the main control crystal oscillator through a time synchronization algorithm, thus forming a two-dimensional time matrix covering the key control paths in both the signal and power domains. Each row corresponds to a control channel, and each column corresponds to a key event point within a control cycle. The matrix data reflects the sequential relationship, relative offset relationship, and intra-cycle distribution relationship of each control event under a unified reference time base. In this invention, the time-stamped matrix serves as the basic timing reference framework, aiming to provide a unified time base for subsequent phase locking, conflict trajectory deduction, delay identification, and instruction rearrangement.

[0020] A priority baseline is a priority reference sequence or ranking benchmark formed by uniformly ranking the importance, urgency, and resource consumption sensitivity of different control paths under the current operating state of a wireless communication device. It serves as an arbitration basis when control conflicts occur between the signal and power domains. The priority baseline is established by collecting and fusing multiple parameters related to the device's operating state, including the current operating mode of the communication device, remaining battery percentage, rate of change in heat generation, and historical control command response efficiency. These parameters are then combined with corresponding weighting functions for multi-parameter fusion and ranking, ultimately generating a priority vector for uniquely ranking each control path. In other words, the priority baseline is not an abstract concept, but a reference benchmark for prioritizing control paths by weighting multiple operating state parameters. Its core functions are: firstly, to establish a synchronous reference relationship between signal control paths and power supply control paths together with the time-stamped matrix; and secondly, to provide the command arbitrator with the order of execution during conflict resolution after outputting a control command stream without command stacking, and further used for freezing paths within the conflict window, identifying convergence risk paths, and dynamically adjusting scheduling priorities.

[0021] Based on the time-stamped matrix, a phase-locked relationship is established between the signal control path and the power supply control path to ensure a clear synchronous mapping relationship between the two types of control events in each control cycle. In the specific execution process, the initial relative phase difference between events in each path is first analyzed, and all sampled timestamp differences are differentially processed to obtain the average phase offset of each control path pair. Based on this, the theoretical synchronization window width is dynamically calculated according to the control frequency, and a phase alignment threshold is set. If the timestamp offset of any control path event exceeds this threshold, a calibration delay is introduced in real time, achieving a nanosecond-level delay of the control trigger point through a micro-delay injector. For example, if there is an 87-picosecond hysteresis between the conduction time point in the signal transmission path and the start-up time point in the power supply boost path, an equal micro-delay is introduced into the transmission path to synchronize the two events, avoiding brief periods of no-load or overload due to inconsistent triggering. Simultaneously, when thermal drift or device aging occurs, the calibration threshold is dynamically adjusted by comparing the phase offset trends of multiple consecutive cycles to maintain the stability of the long-term phase-locked relationship. All calibration operations are performed without affecting control accuracy, ensuring a continuous and coordinated dynamic relationship between signals and power supply behavior.

[0022] Based on the phase-locked time-scaled matrix, potential conflict trajectories in the control path are deduced, and a conflict prior graph is constructed as the basis for prediction. This process includes five sub-steps: First, extracting the trigger time points of all critical control events in the signal and power domains for each control cycle; second, calculating the relative time difference between control commands through cross-analysis and marking event pairs with high temporal overlap in the same control cycle; third, setting conflict judgment thresholds, for example, if two commands are less than 150 picoseconds apart in the same cycle and their priority difference is less than two sorting units, they are considered potential conflicts; fourth, constructing the event pairs that meet the conflict conditions as directed edges between nodes in the graph, where nodes represent specific control events and edge weights represent conflict risk levels, ranging from 0 (no conflict) to 1 (high-risk conflict); fifth, optimizing the structure of the constructed graph by removing redundant edges and generating a minimum support subgraph, which serves as the input structure for control risk prediction. This conflict prior graph can intuitively reflect the existence of multiple sets of cross commands in the control path, where conflicts may occur frequently at certain equipment load critical points or rapid temperature rise stages, serving as the basis for subsequent arbitration, command rearrangement, and freeze strategy design.

[0023] A conflict prior graph is a graph structure model used to characterize potential control conflict risks. It is constructed based on a unified time-scaled matrix after phase locking, analyzing the relative trigger times, overlap relationships, and priority differences of control events in the signal control path and power supply control path within the same or adjacent control cycles. Nodes in the graph represent specific control events, and directed edges between nodes indicate potential high-risk overlap or mutual exclusion relationships between two control events. Edge weights are used to quantify the conflict risk level. The construction process includes extracting the trigger times of key control events, cross-analyzing the relative time differences between instructions, marking event pairs with high time overlap and small priority differences, and establishing event pairs that meet the conflict judgment criteria as edge relationships in the graph. Then, redundant edges are removed through structural optimization to form a graph structure for subsequent arbitration and conflict prediction. Therefore, a conflict prior graph is not a general schematic diagram, but a predictive conflict relationship model with control events as nodes, potential conflict relationships as edges, and conflict risk quantification values ​​as edge weights. Its role in this invention is to reveal in advance the risks of instruction superposition, logical mutual exclusion and timing overlap that may occur in the control path, and to serve as the basis for delayed fingerprint extraction, mutual exclusion rule setting, conflict window marking and freeze strategy execution.

[0024] In the constructed conflict prior graph, delay fingerprint features are extracted to reveal the structural causes of feedback delay and instruction stacking in the control path. The specific method includes: first, focusing on the path containing the edge with the highest conflict weight in the graph and collecting its corresponding delay records; second, periodically denoising and filtering these delay values, retaining three key parameters: transition points, extreme fluctuation values, and maximum sustained delay length; third, encapsulating these parameters into a three-dimensional vector as the delay fingerprint of the path; fourth, using template matching technology to compare the extracted delay fingerprint with stable fingerprint templates established under historical normal control conditions to identify whether it is in a high-risk delay mode; if the maximum transition value in the current fingerprint exceeds 40% of the historical maximum value, or if there is a continuous upward trend in the average delay over three consecutive control cycles, it is determined that the path has a stacking risk, and a warning is issued that the path needs to have its scheduling priority reduced in subsequent control cycles. Through the extraction and analysis of delay fingerprints, the system can identify the potential location and causes of control delay stacking problems in advance, thereby making timely corrections during arbitration or timing adjustment stages to ensure the stability and responsiveness of the overall control process.

[0025] A delay fingerprint is a set of feature parameters extracted from high-risk control paths reflected in a conflict prior graph. These parameters characterize the feedback delay propagation features and determine the presence of instruction stacking risks. Specifically, a delay fingerprint includes at least three parameters: transition points, extreme fluctuation values, and maximum sustained delay length. These parameters are obtained by periodically denoising and filtering the delay records of high-conflict-weighted paths, then further encapsulating them into feature vectors for the corresponding paths. These vectors are then compared with stable fingerprint templates established under historical normal control conditions to determine whether the current feedback path has delay stacking risks or abnormal growth trends. Therefore, a delay fingerprint is not an abstract term without boundaries; essentially, it parameterizes the identifiable features of the control path's delay behavior, forming a feature description that characterizes the delay propagation pattern of that path. Its role in this invention is threefold: first, to identify the structural sources of delay anomalies in the feedback path; second, to serve as the input basis for deconvolution reconstruction and delay propagation graph recovery; and third, to serve as an important basis for determining whether to reduce path scheduling priority and whether there are cross-cycle residual risks.

[0026] Deconvolutional reconstruction based on delay fingerprints maps the conflict prior map to the multi-cycle control link, corrects timing errors in the feedback path, eliminates residual control commands across cycles, and outputs a control command flow without command stacking. To fundamentally resolve the conflict problem caused by feedback delay stacking in control commands across multiple cycles and ensure timing coordination and execution independence between the signal path and the power supply path, deconvolutional reconstruction based on delay fingerprints is required to output a non-overlapping control command flow. Specifically, this includes the following steps: Based on the extracted delay fingerprint, a deconvolutional reconstruction operation is performed to restore the true delay propagation process in the control path and construct a delay propagation map. The delay fingerprint already contains feature values ​​such as the transition point position of the control path, the maximum delay segment length, and the average propagation time variation trend. By selecting a series of key delay samples within consecutive control cycles, a time-axis structured delay event sequence is constructed. Each event includes a sampling timestamp, corresponding control path identifier, delay start position, delay duration, and end position. Next, based on the arrangement of these delayed samples in the time domain, a delay propagation map is constructed. A convolution inversion algorithm is applied to the propagation map to trace the starting point of each transition point in reverse, determining whether it originates from a delay in the instruction from the previous control cycle. The propagation process of delayed events is sliced ​​using a sliding window, and combined with the trend of propagation rate changes, each transition sequence is reconstructed as the response mapping path of the corresponding physical event. After completing the reverse reconstruction, the delay extension range of each control instruction in actual execution is output for subsequent conflict mapping and correction analysis.

[0027] Delay fingerprinting is used to characterize existing or potential delay stacking anomalies in feedback paths. Essentially, it extracts a set of key parameters reflecting anomaly patterns from delay records corresponding to conflicting paths. These key parameters include at least delay jump points, extreme fluctuation values, and maximum sustained delay lengths, used to depict the delay variation of a control path within continuous control cycles and to determine whether the path carries a risk of instruction stacking. Delay event sequences, after identifying stacking risks, are ordered sets of events formed by temporally expanding the actual delay process corresponding to the delay fingerprint. This involves restoring the anomaly information compressed by the delay fingerprint into multiple delay events arranged chronologically. Each delay event corresponds to at least one or more temporal attributes, including a sampling timestamp, control path identifier, delay start position, delay duration, and delay end position. Therefore, the logical relationship between delay fingerprints and delay event sequences is that delay fingerprints are used to identify and summarize delay anomaly characteristics, while delay event sequences are used to expand the actual delay evolution process corresponding to these anomaly characteristics into an event chain that can be analyzed over time.

[0028] A delay propagation graph is a propagation relationship model built upon a delay event sequence. It is used to characterize the sequential transmission relationship, cross-cycle extension relationship, and mutual influence relationship of each delay event in the control path. Specifically, based on the order of each delay event on the time axis, its corresponding control path, and its duration interval in the delay event sequence, propagation relationships between events are established, thus forming a delay propagation graph. By tracing this delay propagation graph backwards, the true starting point of delay jumps can be identified, it can be determined whether the delay event in the current control cycle originates from the residual instruction lag of the previous control cycle, and the propagation trend and expansion range of the delay in multiple control cycles can be further determined. Therefore, there is a clear progressive relationship between delay fingerprints, delay event sequences, and delay propagation graphs: delay fingerprints are the feature extraction results of delay anomalies; delay event sequences are the time-varying unfolding results of the actual delay process corresponding to these features; and delay propagation graphs are the propagation relationship structure further formed based on delay event sequences, used to analyze the true delay starting point, duration path, and cross-cycle residual impact.

[0029] The reconstructed delay propagation graph is fused with the conflict prior graph constructed in the previous step to generate a multi-cycle control link mapping model. This model uses the control cycle as the basic unit and the actual trigger time of the control command as the main axis, rearranging the execution order of commands within all cycles along the timeline. During execution, all delayed reconstructed command trigger points are first listed according to the control path, and their actual execution window start and end time periods are divided. These time periods are then linearly expanded along the timeline. Within any cycle, if a control command overlaps with an incomplete command from the previous cycle, the overlapping area is immediately marked as a cross-cycle residual area. Two processing methods are adopted for control commands within the residual area: one is to postpone the execution of commands with conflict risk in the current cycle to outside the conflict window; the other is to postpone the residual control tasks from the previous cycle to the idle time slot in the current cycle. During this process, the original index of each command time migration must be retained to ensure that its execution logic is correctly parsed in subsequent arbitration steps. Finally, the rearrangement of all control commands in the time dimension under multiple cycles is completed, forming a link mapping structure with strong cycle continuity and minimal cross-interference.

[0030] Timing error correction is performed on the rearranged multi-cycle control links to accurately eliminate offset values ​​caused by delay propagation, ensuring logical consistency of control behavior. During execution, a set of error reference values ​​is constructed for each control path, derived from the theoretical trigger time recorded in the original control plan and the actual execution time recovered from the actual delay propagation path. The difference between these two values ​​yields the timing offset of the current instruction. Subsequently, differentiated correction schemes are adopted based on the control path type. For timing offsets in the power supply path, the physical response factor affected by capacitor charging / discharging rate, voltage ramp-up slope, and load resistance is calculated, and the delay compensation value is corrected accordingly. For offsets in the signal path, physical parameters such as modulation frequency switching time, loop locking completion time, and filter network passband response time are introduced to accurately reconstruct the target time. For paths with error drift lasting more than two cycles, historical statistical features are introduced, and moving average regression is used to slightly advance the execution starting point to pre-compensate for inertial lag in subsequent cycles. After completing error correction for all paths, the effective execution window for each control cycle is regenerated to ensure that instructions are executed as expected within their respective time periods and are no longer affected by the residue from the previous cycle.

[0031] The control command stream, after delay reconstruction, cycle rearrangement, and error correction, is output and serves as the input sequence for subsequent control and execution processes. This command stream must meet three output criteria: First, within each control cycle, the physical trigger times of all commands do not overlap, and the trigger interval is greater than or equal to the set minimum control interval threshold (e.g., 300 picoseconds) to avoid concurrent conflicts; second, each control path in the command sequence appears only once within one cycle, without cycle penetration; third, the command must include its source cycle index, corrected delay value, conflict level marker, and scheduling priority value for use in subsequent arbitration, freezing, and boundary setting stages. Before output, the command stream undergoes integrity verification to confirm no loss, misalignment, or out-of-bounds execution. If residual fluctuations are found in the control paths, the process returns to step two to re-correct the delay propagation graph until the stability output conditions are met.

[0032] The arbitration results of the control command flow under the priority baseline are obtained. An instruction arbitrator is used to rearrange the control command flow. Mutual exclusion rules are set according to the conflict prior graph, and a conflict window is marked. Paths with conflict risk are frozen within the conflict window, generating a cross-domain coupling model. To ensure the consistency of execution between the signal domain and the power domain during scheduling after instruction conflict freezing, the path relationships in the frozen state need to be further modeled as a behavioral cascade structure and mapped to a cross-domain linkage model to limit dynamic oscillation behavior within the conflict window. The specific technical solution is as follows: The constructed frozen control path relationship is used as input and mapped to the physical interaction relationship graph of the signal control domain and the power supply control domain. This interaction relationship graph consists of two dimensions: one dimension is the signal control path, including the transmit power adjustment link, transmit carrier frequency band selection link, signal wake-up threshold setting link, and modulation mode switching link; the other dimension is the power supply control path, including the voltage level switching link, current load control link, power supply path switching link, and backup battery activation link. Each control command in the frozen path is treated as a point pair, and its corresponding channel in the two control dimensions is found. Based on this, a mapping relationship between signal control behavior and power supply response behavior is established. For example, when a transmit power control command and a voltage ramp command conflict within a conflict window and are frozen, the connection weight of this pair of commands in the interaction graph is set to high coupling, and the freeze duration, freeze start and end times, conflict weight level, and execution order upon unfreezing are recorded. In this way, all frozen paths are traversed one by one, and a weighted interaction graph is formed through matrix operations. This graph not only depicts the static mapping between signal control and power supply response but also includes the coupling evolution information of dynamic conflict timing, providing a structured foundation for subsequent boundary construction and stability verification.

[0033] Based on the interaction graph, the freezing behavior features of each pair of highly coupled paths are extracted to construct the convergence boundary range and limit the oscillation interval within the conflict window. First, the basic criteria for oscillation behavior are determined, including the following four indicators: whether the maximum offset of the signal output power within a continuous control cycle exceeds a preset threshold (e.g., 1.5 dB); whether the recovery time of the supply voltage after freezing and unlocking exceeds two scheduling cycles; whether nonlinear jitter occurs in the control response time; and whether the temporal overlap between paths occurs more than three times consecutively. If any of these conditions are met, a potential oscillation trend is identified. For path combinations exhibiting oscillation trends, the control offset trajectory during the evolution of their behavior state is extracted, and the parameter difference before and after freezing, the rate of change of the recovery trajectory, and the minimum number of cycles required for the stable state to converge are calculated. These parameters are then mapped sequentially to the upper and lower bounds of the convergence boundary, constructing the minimum oscillation tolerance interval for each type of path pair in the control domain. For example, if a control path group requires two full scheduling cycles after unfreezing to stably maintain within the target output parameter range, a boundary buffer is set for this path group, limiting the scheduling frequency in the subsequent two cycles to no more than 80% of the original frequency to avoid continuous oscillations accumulating system instability. Simultaneously, the actual operating status within the boundary range is monitored in real time. If a continuous increase in convergence time is detected, the boundary buffer period is automatically extended to maintain the integrity of the stable convergence process of the control chain.

[0034] Based on the constructed interaction graph and convergence boundary parameter set, dynamic control stability constraints are output during the arbitration execution process to ensure that the behavioral linkage between the signal domain and the power domain does not become unstable in a highly dynamic environment. To this end, the scheduling behavior of each frozen path after unfreezing is correlated and matched with the resource allocation table of its respective control cycle. If a path is found to be at a priority disadvantage in resource contention, it is marked as a "convergence risk path," and a proactive scheduling buffer strategy is implemented. This strategy includes three operations: first, shifting or delaying the scheduling time point of the convergence risk path to avoid scheduling overlap with other high-priority paths; second, reducing its scheduling priority within its execution cycle to release scheduling slots for stable paths and reduce concurrent scheduling impact; and third, introducing a soft-start mechanism for signal output or power supply switching processes in actual control behavior, making its parameter adjustment process a smooth curve change to avoid feedback jitter caused by hard abrupt changes. Simultaneously, at the end of each scheduling cycle, the actual response parameters of all paths and the offset values ​​from the preset target are recorded. If the offset values ​​are less than the set convergence threshold for two consecutive cycles, the path group is marked as a "converged path" and removed from the scheduling buffer queue. Through the above-mentioned whole-process control, the signal control behavior and power supply regulation behavior are uniformly managed for stability, and dynamic convergence processing after conflict detection is achieved. This significantly reduces the probability of coordination failure caused by unstable feedback between control paths, and constructs a highly reliable control mechanism with autonomous adjustment capability, resource scheduling coordination and physical feedback controllability.

[0035] The cross-domain coupling model is mapped to the interaction between the signal and power domains, and a convergence boundary is constructed to limit the state oscillation range within the conflict window, thus constraining the dynamic stability of the arbitration execution process. To ensure stable execution of the control path in a dynamic environment, the cross-domain coupling relationship needs to be mapped to the actual control behavior, and a convergence boundary needs to be set to constrain the state oscillation within the conflict window, ensuring the continuity and stability of the arbitration control process. The specific implementation steps are as follows: Based on the constructed cross-domain coupling model, the logical relationships corresponding to the highly coupled control paths are mapped to the physical execution level, forming a control behavior interaction map between the signal and power domains. Specifically, each frozen path pair is extracted from the control command flow, and its control action position in the actual circuit structure is found. For example, the transmit power adjustment command in the signal domain corresponds to the power modulation port at the input of the RF power amplifier, and the voltage boost command in the power supply domain corresponds to the MOSFET turn-on trigger in the boost circuit. While extracting the control action point, parameters closely related to the physical process, such as the control signal turn-on delay, voltage change response time, and current load change rate, are recorded. Next, based on the changes in control response between the start and end times of the freezing and thawing of the paths, the trajectory of path behavior changes is plotted and encoded as a behavioral feature sequence. The behavioral sequences of all path pairs are summarized to create a two-dimensional interaction graph, with the horizontal axis representing the signal control path and the vertical axis representing the power supply control path. Each coordinate point in the graph represents the interaction behavior of a pair of paths under conflict conditions, and the interaction intensity is indicated by color intensity or numerical weight. This graph visually expresses the direct dependency of coupled paths at the physical control level and serves as an important data foundation for subsequently constructing boundary determination criteria.

[0036] Based on the interaction graph, dynamic features of highly coupled path behavior during execution are extracted to construct the convergence boundary range. In the specific implementation, convergence state judgment parameters are first defined, including response completion time after command triggering, maximum fluctuation amplitude of output parameters, number of parameter stabilization cycles within a period, peak duration, and drift amplitude within the stable region. Taking the transmit power control path as an example, the output power is 22 dBmW before freezing, drops to 14 dBmW during freezing, experiences two jumps in the initial thawing phase, gradually recovers to 18 dBmW, and enters a stable region within ±1 dBmW after two cycles. The corresponding power supply path shows a voltage rise time increasing from 320 microseconds to 450 microseconds, and current fluctuation increasing from 80 mA to 130 mA. These data are mapped to a two-dimensional time-parameter sequence. By analyzing the changing trends, fluctuation frequencies, and final stable points, a set of boundary value intervals for convergence judgment is formed. Each set of boundary values ​​includes the maximum allowable rise amplitude, maximum fall amplitude, maximum response delay, and minimum number of stable cycles, constituting a multi-dimensional parameter set for the convergence boundary range. This boundary not only covers steady-state parameter constraints but also considers dynamic response paths, far exceeding the traditional simple constraint method of setting absolute upper limits.

[0037] Based on the established convergence boundary, boundary conditions are used for arbitration execution scheduling within the conflict window to limit the range of state oscillations and proactively constrain behavior. Specifically, at the start of each scheduling cycle, boundary state determination is performed on all path pairs about to be executed. First, the path execution data recorded in the previous cycle is retrieved to check for any out-of-bounds trends. If any parameter exceeds the set boundary within the next cycle after unfreezing, the path is marked as "critical boundary state." Then, two restrictive operations are performed: first, the next instruction trigger time for this path is postponed by 50 to 150 microseconds to avoid the highly sensitive period of the conflict window; second, the control target value setting is tightened by 10% to 20% to prevent drastic parameter jumps from causing further system disturbances. Simultaneously, for path groups that have not yet crossed the boundary but are near the boundary in the current cycle, a pre-freeze mechanism is implemented, i.e., the execution of their non-critical control instructions is temporarily suspended, and their state change frequency is observed to ensure boundary stabilization is completed before entering the execution window. All boundary strategies are executed after arbitration sorting to ensure that state stability requirements are not skipped due to higher priority, thereby maintaining the stable and orderly execution of the scheduling chain.

[0038] To ensure the continued effectiveness of the convergence boundary strategy, a dynamic stability check is performed after each execution cycle to verify whether each path remains within the boundary range and to adjust the arbitration scheduling strategy accordingly. This check analyzes five key dimensions for each path: whether the response latency in the current cycle has significantly increased compared to the previous cycle, whether the output parameters have undergone continuous directional jumps, whether energy consumption has abnormally increased, whether there is overlapping scheduling between paths, and whether the stabilization time after path execution has been prolonged. If any of these indicators exceeds the boundary setpoint or shows a deteriorating trend, the path's stability is deemed to have decreased, and its execution priority and scheduling time window are adjusted in the next round of scheduling. To improve response efficiency, a cross-validation strategy is also introduced. This involves comparing the parameter change trends of other paths within the same cycle to determine if there are systemic boundary disturbances and taking targeted global buffering operations or forced delay measures to maintain the stability of the overall execution environment. This dynamic stability scheduling mechanism differs from the traditional static priority-based execution method, achieving a precise balance between real-time performance and security. It avoids system-level oscillations caused by the instability of a single path, ensuring the robustness and continuity of the coordinated control of signal and power supply paths.

[0039] Online measurements are performed within the convergence boundary range, mapping the measured values ​​to physical monitoring indicators. The amplitude of VSWR jumps, the second derivative of temperature rise, and the reversal trend of differential pressure are continuously tracked. When the physical indicators trigger preset thresholds, counterfactual tests are performed to verify the stable region corresponding to the convergence boundary. To ensure the stability and effectiveness of the control path, continuous online measurements should be performed within the convergence boundary range, quantifying them into physical response indicators. Counterfactual tests are then performed in conjunction with changes in indicator behavior to comprehensively verify whether the current region possesses physical stability. The specific technical steps are as follows: Based on the constructed convergence boundary, periodic real-time sampling is performed to obtain complete measurement data of the current control path during operation. The sampling period is strictly synchronized with the control period. Each sampling records basic control behavior data in five core dimensions: control signal output amplitude, current change trajectory, voltage stability range, load response time, and temperature rise rate. Each dimension of data needs to be precisely labeled in conjunction with the physical attributes of the specific channel. For example, the signal power amplitude variation in the transmission path needs to be recorded with an accuracy of 0.1 dB / mW, the voltage value recorded in the power supply path needs to be recorded with an accuracy of 10 mV, and the temperature measurement accuracy needs to be controlled within ±0.2 degrees Celsius. The sampled data of each control path is collected according to the timestamp to form a continuous data sequence, forming a unified control execution timing matrix, and establishing a correspondence with the boundary parameter intervals for subsequent index mapping.

[0040] The collected control behavior data is mapped item by item to specific physical response indicators according to its dimensional attributes, and key trends are analyzed to extract change characteristics. For example, the amplitude change of the signal echo is used as the standing wave ratio change, the rate of change of the ratio of reflected to transmitted power is calculated, and it is compared with whether there is an instantaneous jump exceeding 20% ​​in the previous cycle; the second derivative of the temperature response is used as a thermal acceleration indicator, and the rate of increase of the temperature difference in the three-point time window is compared to see if it exceeds a set threshold; the difference in the direction of change between voltage and current is constructed as a voltage difference reversal trend, and the power supply output is judged to have entered the non-steady-state control range by detecting its sign conversion frequency and the number of reverse jumps. All of the above indicators need to be classified according to control paths and set with independent mapping models and threshold ranges. For example, the signal path focuses on the standing wave jump and temperature rise derivative, while the power supply path focuses on the voltage difference trend and load response time, thus forming a set of physical stability monitoring indicators with channel attributes.

[0041] When any physical indicator deviates from its trend or reaches a critical threshold, a corresponding counterfactual test should be executed immediately to verify the current path's stable response capability under extreme disturbances. The counterfactual test is not performed by actually interrupting the control flow, but by injecting simulated disturbance events into the control loop. Specifically, after detecting a sudden increase in the VSWR, the simulation reduces the transmit power by 1.5 dB / mW, executing this 0.5 control cycles in advance, and monitors changes in receive quality; when the temperature rise derivative increases for three consecutive cycles, the simulation briefly removes the main heat source load to determine if the temperature can decrease and remain stable within one second; when the differential pressure reversal trend occurs frequently, the stability of the power supply loop is tested by simulating a 10% short-term current disturbance. All simulation operations are completed within the internal simulation channel, with the actual execution path remaining independent. The test results are compared with the actual boundary curve through the feedback curve to determine whether it has sufficient margin and recovery capability.

[0042] A difference analysis is performed between the simulated output results of the counterfactual test and the boundary parameters to confirm the stable region. This process includes three types of behavioral characteristic comparisons: first, the fluctuation response time, i.e., the number of cycles required from the execution of the intervention event to the response parameters returning to the target value range; second, the offset amplitude recovery rate, i.e., whether the difference between the peak deviation value after the test and the normal operating value recovers within two cycles; and third, the degree of cross-influence of indicators, judging whether the change in VSWR triggers a synchronous increase in current peak value or a surge in temperature, or other nonlinear cross-disturbances. If the test results show that the recovery can be completed within 2 cycles after intervention, and all monitored indicators do not show continuous deviation and no cascading oscillation behavior, the region where the current path is located is determined to be a stable region; otherwise, if there is a continuous amplification trend, recovery failure, or cross-path disturbance, the current path is marked as an unstable region, and a collaborative protection mechanism of path priority reduction, execution parameter limiting, and execution window shifting is triggered.

[0043] To enhance testing effectiveness and long-term adaptability, a stable region counterfactual test template library was established, and adaptive matching rules were constructed for different paths. Each control path is bound to a set of preset test templates based on its physical response characteristics. For example, high-power paths are bound to amplitude compression and cold start response test templates, low-voltage paths to short-term power outage recovery templates, and temperature-sensitive paths to thermal excitation templates. The template content includes intervention parameter values, trigger delay, duration, observation window length, and response value offset range. During actual test execution, the optimal template is matched based on the control path's running history, its own boundary state, and the physical indicators of the previous cycle, achieving dynamic test strategy configuration. Through continuous training and optimization of template parameters, a stability verification mechanism with long-term adaptability and evolutionary capabilities is formed, providing data support and strategic basis for subsequent path scheduling strategies and execution boundary maintenance, ultimately forming a boundary-verifiable control framework covering the entire process.

[0044] Based on the stable region determination results of the counterfactual test, the phase transition engine is invoked. Micro-delay injection, energy subband translation, and gain trajectory reversal operations are implemented at the edge of the stable region according to the boundary margin. Dynamic shaping is triggered outside the stable region, forming a self-triggered dynamic control closed loop, achieving continuous and stable coordinated control between the signal control path and the power supply control path. After determining that the current region of the control path is a stable region or a critical stable boundary based on the counterfactual test, to avoid the risk of instability caused by boundary approach, a phase transition strategy needs to be actively introduced. A closed-loop control path is constructed through dynamic fine-tuning and dynamic reconstruction, specifically including the following steps: Based on the changes in various physical indicators obtained from the counterfactual test, the remaining margin values ​​of the current path state from each physical stable boundary are extracted and calculated. These margin values ​​are specific physical quantity differences, including the remaining decibel-milliwatt value of the signal output power relative to the upper limit boundary, the remaining millivolt value of the power supply voltage relative to the lower limit, the remaining milliampere value within the current load variation range, and the remaining degrees Celsius per second squared of the device temperature rise rate from the thermal capacity inflection point. To avoid isolated judgments of indicators, each physical margin needs to be analyzed using the first derivative of the trend changes from the previous two periods to determine whether the current state is trending towards a stable center or deviating towards the boundary. If the trend of most indicators is towards the boundary, and the margin value is less than the set warning threshold (e.g., 5% remaining in the stable interval), then the current path is determined to have entered a transition preparation state, and the next stage of path transition operation is executed.

[0045] After confirming the need for transition control, three types of concrete fine-tuning behaviors are executed according to the physical properties of the control path: micro-delay injection, energy subband shift, and gain trajectory reversal. Micro-delay injection inserts a preset picosecond-level delay signal (typically ranging from 80 to 200 picoseconds) at the original trigger point of the path control command to reduce instantaneous load overlap caused by high-frequency synchronous triggering, making it particularly suitable for high-frequency transmission paths sensitive to timing accuracy. Energy subband shift is applied to the power supply path, shifting the power supply point of the power excitation peak from the middle of the high-load cycle to the lower peak of the adjacent cycle based on the previous sampling results of the load curve, to avoid voltage reversal caused by load overshoot. Gain trajectory reversal is used in the communication gain path. When the gain increase is too rapid or jitter is frequent, an artificial reversal point is inserted into the curve, turning the continuously rising or falling gain trend into a gentle slope before approaching the boundary, forming a natural convergence effect. These three operations, used in combination, not only control the temporal behavior of the adjustment path but also reconstruct the energy density and response direction, effectively enhancing the path's self-steady-state regulation capability.

[0046] If fine-tuning fails to prevent the path from further deviating from the stable edge, or if two consecutive control cycles fail to establish an effective pullback trend, dynamic shaping must be initiated immediately. Dynamic shaping does not involve limiting or forcibly suppressing signal parameters; rather, it reconstructs the dynamic behavior curve structure of the control path itself. Specifically: first, it transforms the rise or fall curve of the control variable from a linear form to a three-segment structure, setting a slow-change start-up segment, a medium-speed response segment, and a plateau stabilization segment, forming a regulation process with a natural buffer; second, it inserts highly responsive charge absorption nodes into the power path, releasing some charge before current surges to maintain the main path voltage at a dynamic median, avoiding overvoltage triggering the protection mechanism; third, it introduces segmental control windows into the signal transmission path, adjusting the waveform energy density distribution by controlling the pulse width to shrink at the boundaries, creating multi-level reflection damping of the signal strength in the physical path. These shaping methods, through structured constraints on path behavior, actively guide its return to the convergence trajectory, providing an effective dynamic recovery buffer at the edge of instability.

[0047] Dynamic shaping refers to a control method that reconstructs the dynamic response curve structure of the control path when fine-tuning techniques such as micro-delay injection, energy subband shifting, and gain trajectory reversal are insufficient to prevent the control path from deviating further from the stable edge. This reconstructs the time response characteristics and physical behavior evolution process, thereby bringing the path back to a convergent state. Dynamic shaping involves reconstructing the rise or fall curve of the controlled variable from a linear form into a three-segment structure with a slow-change start-up segment, a medium-speed response segment, and a plateau stabilization segment; inserting highly responsive charge absorption nodes in the power supply path to release some charge before current surges and smooth main path voltage fluctuations; and introducing segmental control windows in the signal transmission path to adjust the waveform energy density distribution and create a reflection damping effect by shortening the pulse width at the boundaries. In other words, the dynamic shaping in this application does not vaguely refer to optimization or adjustment, but specifically refers to a type of technical measure that reconstructs the dynamic behavior curve and physical response structure of the control path. Its triggering condition is that fine-tuning is ineffective or that no effective pullback trend is formed in multiple consecutive control cycles. Its purpose is to provide a deeper dynamic recovery capability than ordinary limiting or simple suppression.

[0048] To achieve a closed-loop adaptive control logic from path instability identification to correction and recovery, a self-triggered regulation mechanism is established. This mechanism analyzes the linkage between the rate of change of behavior and the trend of stability indicators in each cycle to determine whether to re-enter the transition or reshaping process. The self-triggered mechanism does not rely on centralized control for unified scheduling; instead, it is autonomously triggered by the rate of change of behavioral variables within the path's own dimension, the magnitude of jumps, and historical continuous state judgment rules. For example, if the changes in VSWR, temperature rise derivative, or pressure difference in the current cycle's path show an increasing trend for two consecutive cycles compared to the previous cycle, and the jump magnitude of any indicator exceeds 10%, the transition preprocessing stage is immediately initiated. If all indicator changes tend to converge within five consecutive cycles, and the deviation is below a preset threshold, the next transition evaluation window is automatically delayed. The implementation of this mechanism requires complete recording and real-time calculation of indicator volatility, boundary approach rate, and adjustment effect decay factor in each cycle, forming a path behavior trajectory map. The evolution of behavioral trends determines whether active correction is needed, constituting a self-evolving stability assurance framework throughout the entire process.

[0049] Phase transition is not an isolated abstract result, but rather a procedural control mechanism used in this application to describe the switching of the control path from a high-conflict, high-coupling, and oscillating operating phase state to a low-conflict, low-overlap, and convergent operating phase state when it approaches the stability boundary. As described in the specification, this application first establishes a phase-locked relationship between the signal domain and the power domain using a time-scale matrix and a priority baseline. Based on this, it identifies conflict trajectories, extracts delay fingerprints, corrects timing errors in multi-cycle control links, and, under the constraints of convergence boundary and stability region determination results, further implements micro-delay injection, energy subband shifting, and gain trajectory reversal adjustments on paths at the boundary edge. The purpose is not simply to adjust time, power supply, or gain separately, but to refine and correct the relative interaction relationships between control paths from three dimensions: timing phase, energy distribution phase, and gain evolution phase. This transforms control behaviors that might have been synchronously overlapping, mutually exciting, or continuously approaching the instability boundary into a new cooperative state of peak-shifting release, load shifting, and trajectory reversal, thereby achieving phase transition. In other words, the phase transition in this application should be understood as a transition of the overall dynamic relationship of the control path, rather than being limited to the narrow electrical phase change; micro-delay injection, energy subband translation, and gain trajectory reversal are the three specific execution means that facilitate the transition of this dynamic relationship. The three work together at different physical levels, but serve the same technical goal, even if the path state transitions from the boundary approximation state to the stable convergence state.

[0050] Specifically, micro-delay injection corresponds to picosecond-level fine-tuning of the control command trigger moment. Its function is to break the instantaneous load overlap and timing resonance caused by high-frequency synchronous triggering, so that the signal path and the power supply path are re-staggered in time phase. Energy sub-band shift corresponds to shifting the energy excitation peak in the power supply path from the high load conflict period to the adjacent low peak period. Its essence is to reconfigure the energy release rhythm and load distribution relationship, so that the power supply phase avoids the conflict sensitive window. Gain trajectory reversal is to control the reversal point of the communication gain change curve, so that the gain trend that was originally continuously rising or falling and easily triggered boundary overshooting turns into a gentle slope or reversal state before approaching the boundary, thereby changing the coupling relationship between the gain response phase and the system feedback phase. It can be seen that these three operations act on three different levels: time trigger point, energy action point, and gain change point. However, their common effect is to change the original relative evolution relationship of the control path, reduce the conflict superposition and boundary amplification effect, and make the path enter the new stable operating range after the transition preparation state described in the specification. The so-called phase transition is not a concept that exists independently of specific measures, but a dynamic state transition process triggered and realized by three operations: micro-delay injection, energy subband translation, and gain trajectory reversal. The above three operations have a clear, direct and complete technical relationship with the phase transition.

[0051] This invention establishes a high-precision phase-locked relationship between the signal and power domains by constructing a time-scaled matrix and a priority baseline. Furthermore, it utilizes conflict prior maps and delay fingerprints for multi-cycle path reconstruction, effectively reducing residual timing errors in the feedback path. Based on this, a model describing cross-domain dynamic coupling relationships is generated through priority arbitration of the non-stacked control command flow and a dynamic freezing mechanism for the conflict window. This model is then used to construct convergence boundaries at the physical execution level to limit path oscillation amplitude. Finally, through online counterfactual testing and dynamic response judgment in the stable region, a phase transition engine and dynamic shaping mechanism are invoked to autonomously perform fine-tuning and curve reconstruction operations at the edge of the stable domain, forming an intelligent control process with predictive, adaptive, and closed-loop repair capabilities. This method not only improves the controller's anti-interference and stability in dynamic environments and reduces the risk of soft reset frequencies and link interruptions caused by control conflicts, but also enhances the continuous operation capability and communication reliability of wireless communication equipment under varying power supply and channel conditions.

[0052] The foregoing has only described certain exemplary embodiments of the present invention by way of illustration. Undoubtedly, those skilled in the art can modify the described embodiments in various ways without departing from the spirit and scope of the present invention. Therefore, the foregoing drawings and descriptions are illustrative in nature and should not be construed as limiting the scope of protection of the claims of the present invention.

Claims

1. A method for coordinated control of signal and power supply in wireless communication equipment, characterized in that, Includes the following steps: A time-scaled matrix and priority baseline are constructed to establish a phase-locked relationship between the signal domain and the power domain. Conflict trajectories are deduced based on the time-scaled matrix, generating a conflict prior map and extracting delay fingerprints. The delay fingerprints are deconvolutionally reconstructed, and the conflict prior map is mapped to a multi-cycle control link to correct timing errors in the feedback path, outputting a control command flow without instruction stacking. The control command flow without instruction stacking is arbitrated based on the priority baseline, and an instruction arbitrator is used for order rearrangement. Mutual exclusion rules are set according to the conflict prior map, the conflict window is calibrated, the conflict path is frozen, and a cross-domain coupling model is generated. The cross-domain coupling model is mapped to the interaction relationship between the signal domain and the power domain, and a convergence boundary is constructed to limit the oscillation range within the conflict window. Online measurements are performed at the convergence boundary, and the measurement values ​​are mapped to physical monitoring indicators to track the VSWR transition, temperature rise derivative and pressure difference reversal. When the indicators exceed the threshold, counterfactual tests are performed to determine the stable region. Based on the stable region determination results, the phase transition engine is invoked to implement micro-delay injection, energy subband translation, and gain trajectory reversal within the boundary margin, triggering dynamic shaping outside the stable region and forming a self-triggered dynamic control closed loop.

2. The method for coordinated control of signal and power supply in a wireless communication device according to claim 1, characterized in that, The steps for generating a conflict prior map and extracting delay fingerprints based on the time-stamped matrix to deduce conflict trajectories are as follows: A unified time-stamped matrix and priority baseline are constructed to establish a synchronous reference relationship between the signal control path and the power supply control path; a phase-locking relationship between the signal control path and the power supply control path is established based on the unified time-stamped matrix and priority baseline, and synchronous triggering between key control events is achieved by calculating the phase offset and introducing nanosecond-level micro-delays; potential conflict trajectories in the control path are deduced based on the unified time-stamped matrix after phase locking, and a conflict prior map is constructed; delay fingerprint features are extracted from the conflict prior map, and historical fingerprint templates are used to determine whether there is a stacking risk in the feedback path.

3. The method for coordinated signal and power supply control in a wireless communication device according to claim 2, characterized in that, The steps for outputting the control command flow without instruction stacking are as follows: Based on the delay fingerprint, perform deconvolution reconstruction to construct a time-axis structured sequence of delay events, establish a delay propagation graph, and restore the starting point, duration, and propagation trend of the actual delay in the control path; fuse the delay propagation graph with the conflict prior graph to generate a multi-cycle control link mapping model, mark cross-cycle residual instructions, and migrate the instructions to the non-conflicting execution window through time rearrangement; perform timing error correction on all control paths in the multi-cycle control link, calculate the timing offset based on the difference between the theoretical trigger time and the actual execution time, and generate an accurate compensation amount by combining the physical response characteristics of the control path; output the control command flow after delay reconstruction, time rearrangement, and error correction, ensuring that the control command flow does not overlap within a cycle, does not penetrate between cycles, and carries complete index and priority information.

4. The method for coordinated control of signal and power supply in a wireless communication device according to claim 3, characterized in that, The steps for generating the cross-domain coupling model are as follows: map the control path in the frozen state to the physical interaction diagram of the signal control domain and the power supply control domain, construct a weighted interaction diagram based on the command correspondence, and extract the behavioral coupling relationship between the paths; Based on the freezing behavior characteristics of highly coupled paths in the interaction graph, signal output power offset, voltage recovery delay, control response jitter and timing overlap are identified, and a convergence boundary range is constructed to limit the oscillation interval within the conflict window. The convergence boundary range is integrated with the interaction graph to form the regulation stability constraint in the dynamic arbitration process. Convergence risk paths are identified within the scheduling cycle, a scheduling buffer strategy is executed and a soft-start mechanism is introduced, and finally a cross-domain coupling model with real-time stability constraints is generated.

5. The method for coordinated control of signal and power supply in a wireless communication device according to claim 4, characterized in that, The scheduling buffer strategy enables a smooth transition of control behavior within the convergence boundary by shifting the scheduling time of convergence risk paths forward or backward, reducing scheduling priority, and introducing a soft-start process, thus ensuring that the cross-domain coupled model maintains a dynamic and stable state within the regulation cycle.

6. The method for coordinated control of signal and power supply in a wireless communication device according to claim 4, characterized in that, The steps for constructing convergence boundaries and limiting the oscillation range within the conflict window are as follows: Map the cross-domain coupling model to the control behavior interaction graph of the signal control path and the power supply control path; construct the convergence boundary range based on the changes in the physical parameters of the frozen path pairs in the control behavior interaction graph; within the conflict window, determine and restrict the path execution state based on the convergence boundaries; after each scheduling cycle, perform a dynamic stability check and adjust the path priority and scheduling time to ensure continuous and stable convergence of the control path.

7. The method for coordinated control of signal and power supply in a wireless communication device according to claim 6, characterized in that, The steps for determining the stable region are as follows: Perform periodic synchronous sampling within the convergence boundary range to collect control behavior data of the control path and construct the execution time series matrix; map the control behavior data to physical monitoring indicators and extract the standing wave ratio jump, the second derivative of temperature rise, and the pressure difference reversal trend; inject simulated interference events based on the boundary deviation of the physical indicators and perform counterfactual tests; compare the simulation test results with the boundary parameters to confirm the stability of the region where the path is located. A path test template library is established based on the stability assessment results, and test strategies are dynamically configured to achieve continuous verification and adaptive updates of stable regions.

8. The method for coordinated control of signal and power supply in a wireless communication device according to claim 7, characterized in that, The phase transition engine is invoked to implement micro-delay injection, energy subband translation, and gain trajectory reversal within the boundary margin. Dynamic shaping is triggered outside the stable region, forming a self-triggered dynamic control closed-loop. The steps are as follows: Calculate the remaining margin value of the path state from the physical stability boundary based on counterfactual test results and determine the transition readiness state; for paths entering the transition readiness state, perform micro-delay injection, energy subband translation, and gain trajectory reversal operations to alleviate control pressure; when fine-tuning is ineffective, trigger dynamic shaping, and achieve dynamic behavior optimization by reconstructing the control path curve structure; establish a self-triggered mechanism to automatically determine whether to enter the transition or shaping process in each control cycle based on the path behavior change trend, completing closed-loop stable control.

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