Wireless precision clock beacon device based on ultra wide band technology

Abstract

The invention discloses a wireless precise clock beacon device based on an ultra-wideband technology, which can receive time information of PTP, GNSS, IRIG-B DCLS and FreeRun, realizes time synchronization of local equipment, has a function of outputting IRIG-B DCLS serial time code streams, and can simultaneously realize time synchronization of the IRIG-B DCLS serial time code streams through an ultra-wideband wireless link. And the time information is broadcasted to other wireless equipment nodes, so that a time synchronization function among the plurality of wireless equipment is realized.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to a wireless precision clock beacon device based on ultra-wideband technology. Background Technology

[0002] With the development of Wireless Sensor Network (WSN) and Industrial Internet of Things (IIoT) technologies, their advantages of agility and ease of deployment have led to their increasing application in the aviation and aerospace fields, especially in airborne testing and industrial control.

[0003] Unlike the civilian sector, some applications in the aviation or aerospace fields have high requirements for time consistency across multiple nodes, leading to increasing attention being paid to precision clock synchronization technologies for these scenarios. However, current traditional synchronization technologies such as IRIG-B / DCLS, IEEE1588, and GNSS have significant limitations in practical applications for achieving time consistency across multiple nodes due to factors such as the need for lead wires or unobstructed open skies. Summary of the Invention

[0004] This application provides a wireless precision clock beacon device based on ultra-wideband technology, which can solve the problem that existing technologies have significant limitations in practical applications due to the need for wiring or unobstructed open skies in achieving time consistency across multiple nodes. To achieve the above objective, this application adopts the following technical solution: The first aspect of this application provides a wireless precision clock beacon device based on ultra-wideband technology. The device includes a processor module, an ultra-wideband module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator, and a display module, and the modules are communicatively connected to each other. The processor module is used to generate multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. Ultra-wideband modules are used for pulse transmission and timestamp marking; The satellite timing module is used to receive clock signals from satellites and transmit standard clock information. A precision clock synchronization module is used for time and clock synchronization of Ethernet wireless links; The DCLS time input / output module is used to compare the output of the dual cores in each clock cycle and output an error flag signal when a fault occurs. A voltage-controlled steady oscillator is used to adjust the frequency of the output signal by means of an input control voltage; The display module is used to display current status information.

[0005] In one possible implementation, the precision clock synchronization module is further used to correct the clock delay by means of a preset correction rule to obtain corrected data; wherein the preset correction rule includes average value correction, timestamp filtering, center value correction and weight correction.

[0006] In one possible implementation, the satellite timing module is a uBlox LEA-M8F timing module, which is used to output a 10MHz pulse signal and a second pulse signal.

[0007] In one possible implementation, the device further includes an isolated power supply system module, which includes a protection circuit, a DC filter circuit, an energy storage circuit, and a voltage conversion module. The voltage conversion module is an isolated power supply module, and the protection circuit, DC filter circuit, energy storage circuit, and voltage conversion module are electrically connected in sequence.

[0008] In one possible implementation, the device further includes a digital power system module for generating power outputs of 0.75VDC, 1.0VDC, 1.5VDC, 1.8VDC, and 3.3VDC.

[0009] In one possible implementation, the device operates at temperatures ranging from -40°C to +70°C.

[0010] In one possible implementation, the device has dimensions of less than or equal to 160 mm × 120 mm × 90 mm and a weight of less than or equal to 3 kg.

[0011] The second aspect of this application proposes a method for generating a wireless precision clock beacon device based on ultra-wideband technology. The device includes a processor module, an ultra-wideband module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator, and a display module, all of which are communicatively connected. The processor module is used to generate multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. The ultra-wideband module is used for pulse transmission and timestamp marking. The satellite timing module is used to receive clock signal sources from satellites and transmit standard clock information. The precision clock synchronization module is used for time synchronization and clock synchronization of the Ethernet wireless link. The DCLS time input / output module is used to compare the output of the dual cores in each clock cycle and output an error flag signal when a fault occurs. The voltage-controlled steady oscillator is used to adjust the frequency of the output signal by inputting a control voltage. The display module is used to display the current status information. The method includes: A performance analysis was conducted on current wireless precision clock beacon devices based on ultra-wideband technology, and the analysis results were obtained. The performance analysis included reliability analysis, maintainability analysis, supportability analysis, testability analysis, security analysis, and environmental adaptability analysis. Based on the analysis results, the device is optimized to generate a target wireless precision clock beacon device based on ultra-wideband technology.

[0012] A third aspect of this application provides an electronic device comprising a processor and a memory, wherein the memory stores at least one instruction, at least one program, a code set, or an instruction set, the at least one instruction, the at least one program, the code set, or the instruction set being loaded and executed by the processor to implement the method for generating a wireless precision clock beacon device based on ultra-wideband technology as described in the second aspect.

[0013] A fourth aspect of this application provides a computer-readable storage medium storing at least one instruction, at least one program, a code set, or an instruction set, wherein the at least one instruction, the at least one program, the code set, or the instruction set is loaded and executed by a processor to implement the method for generating a wireless precision clock beacon device based on ultra-wideband technology as described in the second aspect.

[0014] The beneficial effects of the technical solutions provided in this application include at least the following: The wireless precision clock beacon device based on ultra-wideband technology provided in this application includes: a processor module, an ultra-wideband module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator, and a display module, all of which are communicatively connected. The processor module generates multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. The ultra-wideband module performs pulse transmission and timestamp marking. The satellite timing module receives clock signals from satellites and transmits standard clock information. The precision clock synchronization module performs time synchronization and clock synchronization for the Ethernet wireless link. The DCLS time input / output module compares the output of the dual cores in each clock cycle and outputs an error flag signal when a fault occurs. The voltage-controlled steady oscillator adjusts the frequency of the output signal by inputting a control voltage. The display module displays the current status information. The wireless precision clock beacon device based on ultra-wideband technology provided in this application embodiment can receive time information from PTP, GNSS, IRIG-B DCLS, and FreeRun, enabling local device time synchronization. It also has the function of outputting IRIG-B DCLS serial time code stream and can broadcast time information to other wireless device nodes through an ultra-wideband wireless link, thus achieving time synchronization between multiple wireless devices. Attached Figure Description

[0015] Figure 1 A block diagram of a wireless precision clock beacon device based on ultra-wideband technology provided in this application embodiment; Figure 2 This application provides a flowchart of a method for generating a wireless precision clock beacon device based on ultra-wideband technology. Detailed Implementation

[0016] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0017] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more.

[0018] In addition, the use of “based on” or “according to” implies openness and inclusivity, because processes, steps, calculations or other actions “based on” or “according to” one or more conditions or values ​​can in practice be based on additional conditions or values ​​beyond those conditions.

[0019] The embodiments of this application can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate together with a wide range of other general-purpose or special-purpose computing system environments or configurations. Examples of well-known terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments that include any of the above systems.

[0020] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0021] It should be noted that the execution subject of the embodiments of this application can be a computer device or a battery detection system. The following method embodiments will be described with a computer device as the execution subject.

[0022] Figure 1 The block diagram of a wireless precision clock beacon device 100 based on ultra-wideband technology provided in this application embodiment includes a processor module 101, an ultra-wideband module 102, a satellite timing module 103, a precision clock synchronization module 104, a DCLS time input / output module 105, a voltage-controlled steady oscillator 106, and a display module 107, with each module being communicatively connected to the others. Processor module 101 is used to generate multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information and wireless timing status; Ultra-wideband module 102 is used for pulse transmission and timestamp marking; The satellite timing module 103 is used to receive the satellite's clock signal source and transmit standard clock information; The precision clock synchronization module 104 is used for time and clock synchronization of the Ethernet wireless link. DCLS time input / output module 105 is used to compare the output of the dual core in each clock cycle and output an error identification signal when a fault occurs; A voltage-controlled steady oscillator 106 is used to adjust the frequency of the output signal by means of an input control voltage; The display module 107 is used to display the current status information.

[0023] The processor module 101, also known as the SOC module, includes hardware and peripheral hardware (necessary power supply, double-rate synchronous dynamic random access memory, FLASH, etc.), as well as supporting Linux kernel, drivers, application layer software, core algorithms, programmable logic resources integrated within the SOC, phase-locked loop (PLL), and mixed-mode clock manager (MMCM). The ultra-wideband module 102, also known as the UWB module, includes an ultra-wideband physical layer chip based on the DW3000 chip and necessary peripheral hardware. The satellite timing module 103, also known as the GPS / BDS module, includes hardware units based on the uBlox timing module and supporting antennas. The precision clock synchronization module 104, also known as the PTP precision clock synchronization module, mainly consists of Ethernet interface-related components and necessary components such as the MAC and message parsing unit running within programmable logic. The DCLS time input / output module 105 mainly consists of the DCLS hardware interface and a parsing unit running within programmable logic. The voltage-controlled steady oscillator 106, also known as the VCTCXO module, includes the necessary hardware such as the voltage-controlled temperature-compensated crystal oscillator (VCTCXO) and the corresponding digital-to-analog converter (DAC), as well as the supporting drivers and software. The display module 107 mainly consists of a wide-temperature OLED display, and the necessary driver and software components.

[0024] In some optional embodiments, the processor module 101 may be selected from Xilinx's Zynq series, specifically model XC7Z020-CLG484I, which is a processor module integrating a dual-core ARM Cortex A9 processor. To minimize the complexity of software development and improve the flexibility of system design, this application selects a Linux-based operating system as the operating system running on the processor module 101.

[0025] In some alternative embodiments, the precision clock synchronization module 104 primarily implements an Ethernet link interface and an accurate timestamp mechanism. Ethernet data needs to pass through the following steps when being transmitted: Receiving requires: .

[0026] The physical layer, MAC layer, and UDP / IP layer require additional hardware overhead. If the timestamp is obtained directly from the software, then the final timestamp... Ts max As shown in formula (1): (1) in, The timestamp of the access time. The added delay to the physical layer, The added latency to the MAC layer The latency added to UDP / IP. It can be seen that when obtaining a timestamp at the UDP protocol layer, besides... In addition, Ethernet data incurs additional latency as it passes through each layer.

[0027] The above delay and The latency values ​​of the PHY and UDP / IP layers are generally small and have minimal jitter, making them relatively easy to modify through precise measurement and software deviation correction. However, the latency of the MAC and UDP / IP layers exhibits uncertain jitter, making precise timestamp correction difficult to achieve. This affects the calculation of the final time / frequency deviation, hindering the realization of high-precision time correction. To achieve accurate timestamps, the common approach is to timestamp at the PHY and MAC layers.

[0028] Optionally, the precision clock synchronization module 104 is also used to correct the clock delay by means of a preset correction rule to obtain corrected data; wherein the preset correction rule includes average value correction, timestamp filtering, center value correction and weight correction.

[0029] Specifically, the theoretical model of the precision clock synchronization algorithm involves two main steps in the time synchronization process: time synchronization (phase synchronization) and clock synchronization (frequency synchronization). The Precision Time Synchronization Protocol (PTP) achieves the exchange of time information between master and slave devices by transmitting several different data packets over the network. The above theory forms the basis of the PTP algorithm; however, the actual situation is more complex and involves the following uncertainties: 1. The theoretical basis of PTP is the delay symmetry mechanism. In reality, in devices that are not directly connected by network cable (such as those through a switch), the delay of master / slave data packets is not symmetrical. Different network loads can have a significant impact on the delay. In PTPv2, there is a correction function for the time it takes for PTP data packets to pass through switches / routers / devices. Terminal devices can obtain a more accurate correction by acquiring the delay of PTP data packets at each level of the device.

[0030] 2. Changes in the operating temperature of master / slave devices can cause clock drift and aging issues. Time synchronization is a dynamic process rather than a stable state.

[0031] 3. The timestamp may have a large dispersion, which may cause the slave clock to calculate the wrong deviation, affecting the final correction and causing the time / frequency synchronization to diverge.

[0032] Therefore, to address the above situation, stable clock tracking and synchronization are generally achieved through software algorithm optimization. The main methods employed are: 1. Correction for delay: As explained above, delay deviation and jitter have the greatest impact on calculation. Therefore, the delay can be corrected by solving for the delay. The data is adjusted for latency using methods such as average correction.

[0033] 2. Timestamp filtering algorithm: Filters out occasional discrete timestamps to avoid introducing erroneous time parameters into the calculation correction function.

[0034] 3. Average time deviation: The calculated correction value is smoothed by sliding window filtering, normal distribution algorithm, etc. to obtain a stable center value. The center value is used to correct the phase and frequency deviation.

[0035] 4. Weighted Correction Method: The calculated data is corrected according to weights to achieve gradual convergence and avoid time discrepancies caused by a one-time correction.

[0036] In general, achieving high-precision time synchronization in WAN networks is quite challenging, with documentation typically showing a success rate of 1.5 microseconds. However, in airborne LAN networks, especially in airborne test networks, the overall network traffic is relatively stable, the topology is simple, small test systems often have fewer than 8 devices, and large test networks typically have no more than 3 layers of cascaded switches. Based on past experience, with appropriate algorithm modifications, and using the PTPv1 standard, an accuracy better than 100 nanoseconds can be achieved.

[0037] In some alternative embodiments, the satellite timing module 103 adopts uBlox's GPS / BDS solution. Unlike other solutions, this design mainly uses GPS / BDS time information, with positioning and other auxiliary information only serving as the basis for time correction.

[0038] Optionally, the satellite timing module 103 is a uBlox LEA-M8F timing module. The uBlox LEA-M8F timing module is used to output a 10MHz pulse signal and a second pulse signal, which is also known as a 1PPS pulse signal. For the 1PPS signal, an internal pulse width monitoring module is designed to monitor the deviation of the 1PPS signal in real time. The obtained deviation information is used to correct the 1PPS pulse period of the internal real-time clock SRTC module to achieve synchronization with the 1PPS signal of the uBlox module.

[0039] In some optional embodiments, the ultra-wideband (UWB) module 102 employs a wireless carrier communication technology that does not use a sinusoidal carrier but instead transmits data using nanosecond-level non-sinusoidal narrow pulses. It occupies a large spectral range and possesses characteristics such as insensitivity to channel fading, low transmitted signal power spectral density, low intercept rate, and low system complexity, exhibiting good adaptability in airborne and rotating environments. The information carrier in UWB radio is pulse radio. Currently, UWB technology is mainly used in applications such as indoor positioning. To achieve high-precision positioning, taking time-of-flight ranging as an example, it is necessary to accurately mark the departure and arrival times of the signal. Therefore, UWB integration generally has a high-precision timestamp unit.

[0040] Taking the currently available DW1000 / DW3000 as an example, its internal clock resolution is 64 GHz, and its time resolution can reach 15 picoseconds. With such high precision, centimeter-level accuracy can be achieved in ranging applications. To minimize the technical risks in system design, this application selects the DW3000 as the physical layer for this ultra-wideband communication implementation.

[0041] In some alternative embodiments, to reduce the technical risks in this solution, necessary backup clock loops are reserved during the clock system design process, and some hardware components can be eliminated after subsequent verification. The system's clock sources mainly include three: 1. GNSS-driven clock domain: The GNSS selected in this solution has a high-precision VCTCXO internally, which can output a highly stable synchronization clock after being synchronized with GPS.

[0042] 2. Clock domain driven by VCTCXO.

[0043] 3. Normal Clock (FreeRun Clock): Driven by a normal 40MHz clock, all components operate in this mode when there is no GNSS time or PTP clock.

[0044] In some alternative embodiments, a voltage-controlled steady oscillator (VCTCXO) is a highly stable clock element with temperature compensation that supports output frequency adjustment. The hardware selected in this application is the AST3TDA-0000-T5, and its main characteristics are as follows: Nominal frequency: 38.4MHz; Frequency stability across the entire temperature range: -0.28ppm~0.28ppm; Frequency adjustment range: -5ppm~5ppm (0~3.3V, center control voltage 1.65V); Operating temperature range: -40℃~85℃.

[0045] The hardware component of the voltage-controlled steady oscillator 106 includes: a management control and software component MCU, which regulates the output voltage of the DAC. In this application, the MCU is a Zynq SOC processor, and its configuration software is management software running on Linux; a digital-to-analog converter (DAC), specifically the AD5683R, which interacts with the MCU via an SPI interface to output the corresponding voltage signal. This chip integrates a 2.5V reference voltage, which reduces the complexity of the hardware design; a low-pass filter to reduce noise interference and stabilize the output signal; and a voltage-controlled clock chip with temperature compensation.

[0046] In some alternative embodiments, a typical real-time clock uses 32768Hz (2 15 The driving clock of the oscillator can be used to obtain a stable second pulse signal through a 15-bit binary divider. This method, using a 32KHz clock chip crystal oscillator and a real-time clock chip, is widely used in industrial and civilian fields. However, this method is limited by factors such as the offset and aging of the crystal oscillator itself, resulting in very limited time accuracy. It is difficult to achieve high-precision timestamps, and the time resolution can only reach 1 / 32768 (approximately 32.52 microseconds), and it is difficult to correct for this deviation.

[0047] Therefore, real-time clock designs with correction capabilities often employ a VCXO + real-time clock chip. The clock output from the VCXO is fine-tuned by adjusting the output voltage of the DAC via software, thus achieving clock correction. However, this method requires hardware components such as the VCXO, DAC, and filters, resulting in higher costs.

[0048] This application implements an FPGA-based SRTC time unit design by using the logic time within the FPGA plus software correction. Taking the 32768 time counter as an example, a typical 1PPS output is achieved by selecting a 15-bit frequency counter, which outputs a PPS signal when the counter inverts.

[0049] When a 100MHz drive clock is used, the counter is typically cleared when it accumulates to 99,999,999, achieving a time output of 1PPS.

[0050] In some alternative embodiments, the display module 107 is mainly used to display necessary information, including time information, timing mode, link status, etc. Considering that the display interface is a low-speed serial communication interface, directly using the processor module 101 for driving may consume a lot of CPU time. To reduce the runtime of the core processor and to facilitate the replacement of other display components with different resolutions and sizes in the future, the core processor and the display processor are designed separately.

[0051] The processor module 101 sends a set of status information every second through a Universal Asynchronous Receiver / Transmitter (UART) interface. This information may include the current time (year, month, day, hour, minute, second), satellite positioning and timing status information, partial operating status of the device (including internal temperature, junction temperature, etc.), and wireless timing status. Simultaneously, the precise pulse-second information from the device's internal SRTC clock module is sent to the MCU. The MCU operates in pulse-triggered mode. Triggered by an external PPS signal, it receives data from the UART interface, processes and converts the received data, and refreshes the display interface via a serial communication interface.

[0052] Optionally, the OLED display component in the display module 107 can be a white light display component of model HS13L01W2C01. This display component is an OLED display component with an I2C interface, a resolution of 128×64, a display component size of 1.30 inches, and its driver IC is SH1106.

[0053] In some optional embodiments, the wireless precision clock beacon device based on ultra-wideband technology needs to simultaneously support four input clock modes: PTP, GNSS, IRIG-B, and FreeRun, and the output method needs to support three modes: PTP, IRIG, and UWB. For time information, the core is to maintain stable SRTC time information, accurate PPS pulses, and a precise 38.4MHz clock.

[0054] Based on the above requirements, this solution's time synchronization mechanism employs different methods for different input sources: 1. PTP Clock Source Mode: The local frequency offset and time deviation are calculated by correcting the BMC algorithm of PTP. The accurate frequency information output by VCTCXO is corrected to drive SRTC, IRIG-B, and UWB. 2. GNSS Clock Mode: By tracking 10MHz and PPS of GNSS, accurate frequency information is output to control the VCTCXO, driving SRTC, IRIG-B, and UWB. 3. In IRIG-B and FreeRun modes, the main focus is on internally stable timing. The SRTC time and accurate PPS are corrected using the solution in section 3.9.3 to drive UWB. The IRIG-B output is then directly forwarded.

[0055] In some optional embodiments, the device further includes an isolated power supply system module, which includes a protection circuit, a DC filter circuit, an energy storage circuit, and a voltage conversion module. The voltage conversion module is an isolated power supply module, and the protection circuit, DC filter circuit, energy storage circuit, and voltage conversion module are electrically connected in sequence.

[0056] The isolated power supply design mainly converts the +28VDC on the machine into a stable, low-ripple +5VDC power supply, i.e., the primary power supply. In order to meet the power requirements of the equipment and the requirements of electromagnetic compatibility, the electromagnetic interference noise of the power supply system is suppressed in the front stage of the DC / DC converter.

[0057] Power supply systems generate two types of electromagnetic interference noise during normal operation: radiated noise and conducted noise. Radiated noise originates from rapid changes in voltage and current within the modules, and the mechanical structure of the equipment also significantly influences radiated noise. These rapid changes in voltage and current arise from the switching on and off of power switching devices. To reduce radiated noise, absorbers are designed into the equipment to minimize high-frequency oscillations caused by rapidly changing voltage and current during power device switching. Furthermore, the structural design employs a fully enclosed metal structure to prevent radiated noise from escaping through the space and affecting the operation of external electronic equipment.

[0058] The protection circuit implements reverse connection protection to prevent abnormalities caused by short circuits between positive and negative terminals. A pre-installed energy storage element at the front end ensures that the logic state of the back-end equipment remains stable during short-term power outages. The DC filter circuit suppresses external power input noise and prevents internal noise signals from feeding back to the onboard DC grid. A sealed metal casing further prevents additional electromagnetic radiation, thus meeting the electromagnetic compatibility requirements of GJB151B-2013. An energy storage circuit is designed to handle short-term power outages in typical airborne equipment, storing a small amount of electricity to ensure stable power supply to the back-end during such incidents.

[0059] The back-end voltage conversion module converts the filtered 28VDC into high-quality 5VDC (the actual output is designed to be 5.1VDC, taking into account the voltage drop caused by the small resistance in the line). The module has a short-circuit protection mode and a hiccup recovery mode, which protect against abnormal situations and hiccup to recover, avoiding damage to equipment and integrated circuits caused by short-term high current.

[0060] Optionally, the voltage conversion module uses an isolated power supply module that can operate in an environment of -55℃ to +125℃, with a conversion efficiency of up to 87%, and can meet a wide input voltage range (16VDC~50VDC).

[0061] In some alternative embodiments, the device further includes a digital power system module for generating power outputs of 0.75VDC, 1.0VDC, 1.5VDC, 1.8VDC, and 3.3VDC.

[0062] The on-board digital power supply primarily powers the SOC, UWB physical layer chips, and interface chips, requiring various power supply types, including 0.75VDC, 1.0VDC, 1.5VDC, 1.8VDC, and 3.3VDC. Specifically: 1.0VDC and 1.8VDC mainly meet the core requirements of the FPGA, characterized by low power consumption during normal operation but with instantaneous high current demands; 3.3VDC primarily addresses the digital I / O interconnects on the board, serving as the main interface and power supply voltage, requiring higher power; 1.5VDC addresses the needs of the DDR chips, characterized by high stability requirements, otherwise, abnormal data failures may occur. The core of internal control is the SOC component, which has basic timing requirements for power-on sequence. Abnormal power-on sequence may cause initial logic abnormalities in the IC, and in severe cases, lead to abnormal device operation.

[0063] The LTM4622 / 44 chip selected in this application implements the other digital power systems for the entire device. This chip supports a maximum of 2 / 4 outputs, each providing a maximum of 2.5 / 4A, or can provide 8A, 12A, and 16A single-channel current through cascading. The chip also has output enable control terminals, which can control the output of each power supply, thereby controlling the power-on sequence of different power supplies. This design uses a switch-mode power conversion chip with four outputs: 1.0VDC, 1.8VDC, 3.3VDC, and 1.5VDC, each providing a maximum output of 4A.

[0064] In some alternative embodiments, the device operates at temperatures ranging from -40°C to +70°C.

[0065] In some alternative embodiments, the dimensions of the device are less than or equal to 160mm × 120mm × 90mm, and the weight of the device is less than or equal to 3kg.

[0066] In some alternative embodiments, the device should have mounting holes on the housing, and the mounting should be done using a rigid connection method.

[0067] In some alternative embodiments, the nameplate of the device includes the device name, model, serial number, and the manufacturer.

[0068] The wireless precision clock beacon device based on ultra-wideband technology provided in this application includes: a processor module, an ultra-wideband module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator, and a display module, all of which are communicatively connected. The processor module generates multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. The ultra-wideband module performs pulse transmission and timestamp marking. The satellite timing module receives clock signals from satellites and transmits standard clock information. The precision clock synchronization module performs time synchronization and clock synchronization for the Ethernet wireless link. The DCLS time input / output module compares the output of the dual cores in each clock cycle and outputs an error flag signal when a fault occurs. The voltage-controlled steady oscillator adjusts the frequency of the output signal by inputting a control voltage. The display module displays the current status information. The wireless precision clock beacon device based on ultra-wideband technology provided in this application embodiment can receive time information from PTP, GNSS, IRIG-B DCLS, and FreeRun, enabling local device time synchronization. It also has the function of outputting IRIG-B DCLS serial time code stream and can broadcast time information to other wireless device nodes through an ultra-wideband wireless link, thus achieving time synchronization between multiple wireless devices.

[0069] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0070] Figure 2This invention provides a flowchart of a method for generating a wireless precision clock beacon device based on ultra-wideband (UWB) technology. The method is applied to a UWB-based wireless precision clock beacon device, which includes a processor module, an UWB module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator (VCO), and a display module. These modules are communicatively connected. The processor module generates multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. The UWB module performs pulse transmission and timestamp marking. The satellite timing module receives clock signals from a satellite and transmits standard clock information. The precision clock synchronization module performs time synchronization and clock synchronization for the Ethernet wireless link. The DCLS time input / output module compares the output of the dual-core processor in each clock cycle and outputs an error flag signal when a fault occurs. The VCO adjusts the frequency of the output signal by inputting a control voltage. The display module displays the current status information. The method includes: Step 202: Perform performance analysis on the current wireless precision clock beacon device based on ultra-wideband technology and obtain the analysis results.

[0071] Step 204: Optimize the device based on the analysis results to generate the target wireless precision clock beacon device based on ultra-wideband technology.

[0072] The performance analysis includes reliability analysis, maintainability analysis, supportability analysis, testability analysis, safety analysis, and environmental adaptability analysis.

[0073] To ensure the high performance, high quality, and high reliability of the wireless precision clock beacon based on ultra-wideband technology, enabling its long-term, efficient, and secure operation, the following design measures were adopted in the design of the wireless precision clock beacon based on ultra-wideband technology: 1. During the development of hardware equipment, qualified suppliers are required to strictly select components, chips and parts, and choose products with high MTBF (Mean Time Between Failures) and low failure rate. 2. During the system design process, standardized and universal products are selected for hardware components, parts and components. The same / similar components are designed in a unified manner to improve the replaceability of components, parts and components, so as to ensure the maintainability of the whole machine and reduce maintenance time. 3. For common spare parts and consumables used in the system, such as connectors and test cables, a certain number of spare parts are required to prevent replacement in critical situations.

[0074] For maintainability analysis, a wireless precision clock beacon device based on ultra-wideband technology is analyzed, and the following design measures are taken to ensure system maintainability: 1. During the hardware design process, modular design should be adopted as much as possible to facilitate disassembly and maintenance. For component packaging, packaging that is easy to replace and maintain should be selected. 2. Each functional module is designed independently, and separable parts are separated into their own printed circuit boards. In case of failure, the corresponding module can be directly replaced. 3. The wireless precision clock beacon device based on ultra-wideband technology is designed with certain built-in automated testing functions (Build In Test, BIT) provided by the system or equipment. It will output some device status information on the output interface, so as to keep track of the device's operating status at any time, and to follow up on information to judge some fault modes, thereby improving the system's maintainability. 4. Spare parts are provided for all selected connectors in case users need to replace them.

[0075] For the assurance analysis, the wireless precision clock beacon device based on ultra-wideband technology provides clear and concise technical information, ensuring the correct use of this product. During the development process, the equipment manufacturer used aerospace-grade components for input and output plugs and sockets, standard parts for screws and nuts, and ensured that all electronic components and modules used were readily available on the market, thus guaranteeing the equipment's repair and maintenance.

[0076] For test analysis, after the development of hardware and supporting host computer software, the wireless precision clock beacon device based on ultra-wideband technology will undergo specialized joint testing and system-level cascade testing with front-end and back-end connected devices. Test solutions will be provided and tests will be completed.

[0077] Regarding security analysis, system security is a prerequisite for normal system operation. To improve system security, the following measures were taken in the system design: 1. The power input module of the wireless precision clock beacon device based on ultra-wideband technology adopts a wide voltage range module, which has overvoltage, undervoltage, and short circuit protection functions, and is designed with circuit protection. 2. All wireless precision clock beacon devices based on ultra-wideband technology undergo vibration testing in accordance with national military standards to ensure the structural safety of the equipment; 3. All cables used in the system are high-temperature flame-retardant wires; 4. All hardware devices in the system have reverse connection protection measures to prevent accidental operation from affecting the system's safety.

[0078] Based on the environmental adaptability analysis and system requirements, specific requirements for environmental indicators such as temperature are proposed during the design and development of hardware equipment technical solutions. Detailed designs are incorporated into the design scheme to ensure that the product meets the required environmental adaptability.

[0079] The method provided in this application embodiment has similar implementation principles and technical effects to the above-described device embodiments, and will not be repeated here.

[0080] This application also provides an electronic device, which includes a processor and a memory. The memory stores at least one instruction, at least one program, code set, or instruction set. The processor loads and executes the at least one instruction, at least one program, code set, or instruction set to implement the steps of the method embodiments described above.

[0081] The electronic device provided in this application embodiment has a similar implementation principle and technical effect to the above method embodiment, and will not be described again here.

[0082] This application also provides a computer-readable storage medium storing at least one instruction, at least one program, code set, or instruction set, wherein the at least one instruction, at least one program, code set, or instruction set is loaded and executed by a processor to implement the steps of the method embodiments described above.

[0083] The computer-readable storage medium provided in this embodiment is similar in principle and technical effect to the method embodiment described above, and will not be repeated here.

[0084] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When these computer instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks, SSDs).

[0085] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0086] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A wireless precision clock beacon device based on ultra-wideband technology, characterized in that, The device includes a processor module, an ultra-wideband module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator, and a display module, with communication connections between the modules; The processor module is used to generate multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. The ultra-wideband module is used for pulse transmission and timestamp marking; The satellite timing module is used to receive the satellite's clock signal source and transmit standard clock information; The precision clock synchronization module is used for time and clock synchronization of the Ethernet wireless link; The DCLS time input / output module is used to compare the output of the dual cores in each clock cycle and output an error flag signal when a fault occurs. The voltage-controlled steady oscillator is used to adjust the frequency of the output signal by inputting a control voltage; The display module is used to display the current status information.

2. The apparatus according to claim 1, characterized in that, The precision clock synchronization module is also used to correct the clock delay by means of a preset correction rule to obtain corrected data; wherein the preset correction rule includes average value correction, timestamp filtering, center value correction and weight correction.

3. The apparatus according to claim 1, characterized in that, The satellite timing module is a uBlox LEA-M8F timing module, which is used to output a 10MHz pulse signal and a second pulse signal.

4. The apparatus according to claim 1, characterized in that, The device further includes an isolated power supply system module, which includes a protection circuit, a DC filter circuit, an energy storage circuit, and a voltage conversion module. The voltage conversion module is an isolated power supply module, and the protection circuit, the DC filter circuit, the energy storage circuit, and the voltage conversion module are electrically connected in sequence.

5. The apparatus according to claim 1, characterized in that, The device also includes a digital power system module for generating power outputs of 0.75VDC, 1.0VDC, 1.5VDC, 1.8VDC, and 3.3VDC.

6. The apparatus according to claim 1, characterized in that, The operating temperature of the device is -40℃ to +70℃.

7. The apparatus according to claim 1, characterized in that, The device has dimensions of less than or equal to 160 mm × 120 mm × 90 mm and a weight of less than or equal to 3 kg.

8. A method for generating a wireless precision clock beacon device based on ultra-wideband technology, characterized in that, The device includes a processor module, an ultra-wideband module, a satellite timing module, a precision clock synchronization module, a DCLS time input / output module, a voltage-controlled steady oscillator, and a display module, all of which are communicatively connected. The processor module is used to generate multiple sets of current status information, including current time, satellite positioning and timing status information, device operating status information, and wireless timing status. The ultra-wideband module is used for pulse transmission and timestamp marking. The satellite timing module is used to receive the satellite's clock signal source and transmit standard clock information; The precision clock synchronization module is used for time and clock synchronization of the Ethernet wireless link; The DCLS time input / output module is used to compare the output of the dual cores in each clock cycle and output an error flag signal when a fault occurs. The voltage-controlled steady oscillator is used to adjust the frequency of the output signal by inputting a control voltage; The display module is used to display the current status information, and the method includes: A performance analysis was conducted on current wireless precision clock beacon devices based on ultra-wideband technology, and the analysis results were obtained. The performance analysis included reliability analysis, maintainability analysis, supportability analysis, testability analysis, security analysis, and environmental adaptability analysis. Based on the analysis results, the device is optimized to generate a target wireless precision clock beacon device based on ultra-wideband technology.

9. An electronic device, characterized in that, The electronic device includes a processor and a memory, the memory storing at least one instruction, at least one program, a code set, or an instruction set, the at least one instruction, the at least one program, the code set, or the instruction set being loaded and executed by the processor to implement the steps of the method as described in claim 8.

10. A computer-readable storage medium, characterized in that, The storage medium stores at least one instruction, at least one program, code set, or instruction set, wherein the at least one instruction, the at least one program, the code set, or instruction set is loaded and executed by a processor to implement the steps of the method as described in claim 8.

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