High-performance image sensor and forming method thereof

Abstract

The invention discloses a high-performance image sensor and a forming method thereof, and the method comprises the steps: forming a photoelectric conversion unit of the image sensor through employing a plurality of layers of alternately stacked doped layer substrates, combining a deep trench isolation structure and a lateral PN junction structure formed through epitaxy, so as to improve the charge capacity of the photoelectric conversion unit, and improve the performance of the image sensor. And the defective pixel probability in the image sensor pixel array is reduced.

Description

Technical Field

[0001] This invention relates to the field of image sensors, and more particularly to high-performance fin transistors and methods for their fabrication. Background Technology

[0002] With the rapid development of mobile devices, surveillance systems, drones, and other fields, the demand for miniaturized and high-resolution image sensors is increasing. Traditional image sensors, due to their large pixel size, struggle to meet the market's demand for higher resolution and smaller size. Therefore, developing an image sensor design methodology that can achieve high resolution while maintaining a small pixel size has become particularly important, leading to increasingly smaller individual pixel sizes.

[0003] Current Issues: There are two main types of image sensors on the market: CCD (Charge-Coupled Device) and CMOS (Complementary Metal-Oxide-Semiconductor) image sensors. While both types of sensors have made significant progress in many aspects, the following problems still exist in small pixel designs: 1. The trade-off between resolution and size: As pixel size decreases, crosstalk between pixels increases, leading to a decrease in image quality. 2. Noise issues: Small pixel size reduces the photosensitive area of ​​the photodiode, thereby increasing dark current and shot noise, affecting image quality. 3. Manufacturing process challenges: Shrinking pixel size places higher demands on manufacturing processes, such as higher precision and consistency. Therefore, as pixel size continues to shrink, it becomes difficult to achieve low-noise, high-resolution image quality. Summary of the Invention

[0004] To address the problems existing in the prior art, this invention provides a method for forming a high-performance image sensor. The method utilizes alternating stacked multilayer doped substrates, combined with a deep trench isolation structure and a lateral PN junction structure formed by epitaxy, to form the photoelectric conversion unit of the image sensor, thereby improving the charge capacity of the photoelectric conversion unit and reducing the probability of bad pixels in the pixel array of the image sensor.

[0005] In some embodiments, the method includes: forming a first doped layer on the substrate for forming a dark current pinning layer below the charge collection region of the photoelectric conversion unit; forming a second doped layer above the first doped layer for forming a main body portion of the charge collection region of the photoelectric conversion unit; wherein the first doped layer and the second doped layer have opposite doping types.

[0006] In some embodiments, the first doped layer and the second doped layer are formed by epitaxial growth, or by photolithography followed by ion implantation using a large-area photomask pattern that does not have a pixel periodic structure.

[0007] In some embodiments, the method further includes: forming a third doped layer on the second doped layer, the third doped layer having the same doping type as the first doped layer; forming a patterned mask layer on the third doped layer; etching the third doped layer to form a first trench, the remaining third doped layer being used to partially isolate the photoelectric conversion unit; removing the mask layer on top of the third doped layer; forming the fourth doped layer in the first trench and on the top surface of the third doped layer covered by all the original mask layers through an epitaxial process, for forming the remaining portion of the charge collection region of the photoelectric conversion unit and forming a lateral PN junction structure, the fourth doped layer having the same doping type as the second doped layer; and removing the epitaxial layer above the top height of the third doped layer through a planarization or etch-back process to disconnect all photoelectric conversion units.

[0008] In some embodiments, the third doped layer is formed by epitaxial growth or by using a large-area photomask pattern without pixel periodicity. Before the mask layer formed on the third doped layer is patterned, doped ions are formed by photolithography and ion implantation to allow dopant ions to pass through the mask layer.

[0009] In some embodiments, the maximum depth of the first trench reaches or exceeds the top of the second doped layer.

[0010] In some embodiments, the method further includes: performing ion implantation of the same type as the first doped layer through a photolithography-following ion implantation process, penetrating the thickness range of the third doped layer and the second doped layer, to form an ion-doped isolation structure penetrating the third doped layer and the second doped layer from top to bottom, for isolating the upper part of the photoelectric conversion unit, and combined with the back deep trench isolation formed by subsequent processes for isolating the lower part of the photoelectric conversion unit.

[0011] In some embodiments, the method further includes: performing ion implantation of the same type as the first doped layer through a photolithography-following ion implantation process, penetrating the thickness range of the third doped layer to form an upper portion for isolating the photoelectric conversion unit.

[0012] In some embodiments, the method further includes: performing ion implantation of the same type as the first doped layer through a photolithography-following ion implantation process, penetrating the thickness range of the second doped layer, to form a back-side deep trench isolation combination with the one formed by subsequent processes for isolating the lower part of the photoelectric conversion unit.

[0013] In some embodiments, the method further includes: forming a fifth doped layer with the same doping type as the third doped layer on the third doped layer by an epitaxial process, for forming the device of the image sensor; forming different ion-doped regions in the fifth doped layer by a photolithography-after-ion implantation process, and completing the fabrication of the pixel surface transistor structure and all circuits in the image sensor.

[0014] In some embodiments, the method further includes: thinning from the back side to the interior of the first doped layer; etching from the back side of the substrate to form a second trench; filling the second trench with a dielectric material to form the back deep trench isolation structure; the ion-doped isolation structure and the back deep trench isolation structure together constitute the isolation structure of the photoelectric conversion unit.

[0015] In some embodiments, the second trench extends from the back side through the first doped layer and the second doped layer, and stops within the ion-doped isolation structure of the third doped layer.

[0016] In some embodiments, filling the second trench with a dielectric material includes: sequentially forming a first dielectric layer, a high dielectric constant material, and a second dielectric layer in the second trench.

[0017] In some embodiments, the thickness of the first doped layer is between 0.05 micrometers and 0.2 micrometers; the thickness of the second doped layer is greater than 0.05 micrometers; the ion doping concentration of the first doped layer is greater than 1E15 cm-3; the ion doping concentration of the second doped layer is between 1E14 cm-3 and 5E18 cm-3; and the ion doping concentration of the fourth doped layer is higher than that of the second doped layer.

[0018] The present invention also provides a high-performance image sensor formed using the above method.

[0019] The solution of this invention can solve the problems in existing small-pixel image sensors, greatly reduce the manufacturing difficulty, achieve higher image quality, and make it possible to further reduce the pixel size. Attached Figure Description

[0020] Figures 1 to 11 This is a cross-sectional schematic diagram of the image sensor formation process according to an embodiment of the present invention. Detailed Implementation

[0021] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are merely some examples or embodiments of the present invention. For those skilled in the art, these drawings can be applied to other similar scenarios without creative effort. Unless obvious from the context or otherwise specified, the same reference numerals in the drawings represent the same structures or operations.

[0022] This invention provides a method for forming a high-performance image sensor. It utilizes an alternately stacked multilayer doped substrate, combined with a deep trench isolation structure and a lateral PN junction structure formed by epitaxy, to form the photoelectric conversion unit of the image sensor, thereby improving the charge capacity of the photoelectric conversion unit and reducing the probability of bad pixels in the pixel array of the image sensor.

[0023] The following diagram illustrates the formation process of a high-performance image sensor.

[0024] refer to Figure 1 A substrate 11 with alternating stacked multilayer doped layers is provided. The substrate 11 may be a semiconductor material, such as silicon, germanium, silicon-germanium, silicon-germanium-on-insulator (SGOI), or a combination thereof.

[0025] like Figure 1 As shown, the multilayer doped substrate 11 may include a first doped layer 101 and a second doped layer 102.

[0026] The first doped layer 101 and the second doped layer 102 have opposite doping types.

[0027] The first doped layer 101 can be P-type doped. The second doped layer 102 can be N-type doped. Alternatively, the first doped layer 101 can be N-type doped, and the second doped layer 102 can be P-type doped.

[0028] Specifically, a first doped layer 101 can be formed on the substrate 11 to form a dark current pinning layer below the charge collection region of the photoelectric conversion unit (or photodiode).

[0029] The first doped layer 101 can be the original wafer substrate or formed by an epitaxial process.

[0030] The first doped layer 101 can also be formed by ion implantation after photolithography using a large-area photomask pattern that does not have a pixel periodic structure. The large-area photomask pattern without a pixel periodic structure covers the area outside the pixel area of ​​the image sensor with a mask. The dopant ions implanted are implanted into the substrate 11 of the pixel area.

[0031] A second doped layer 102 is formed above the first doped layer 101 to form the main body of the charge collection region of the photoelectric conversion unit.

[0032] The second doped layer 102 can be formed by epitaxial growth. Alternatively, the second doped layer 102 can be formed by photolithography followed by ion implantation using a large-area photomask pattern that does not have a pixel periodic structure. The large-area photomask pattern without a pixel periodic structure is the area outside the pixel region of the image sensor covered by a mask. The dopant ions implanted are implanted into the substrate 11 of the pixel region to form the second doped layer 102.

[0033] refer to Figure 2 A third doped layer 103 is formed on the second doped layer 102, and a patterned mask layer 201 is formed on the third doped layer. The mask layer 201 can be one or more materials such as photoresist, silicon nitride, and silicon oxide.

[0034] The third doped layer 103 has the same doping type as the first doped layer 101.

[0035] The third doped layer 103 can be formed by epitaxial growth.

[0036] The third doped layer 103 can also be formed by photolithography and ion implantation before the mask layer 201 formed on the third doped layer is patterned, using a large-area photomask pattern that does not have a pixel periodic structure. This allows dopant ions to pass through the mask layer 201.

[0037] refer to Figure 4 The third doped layer 103 is etched to form the first trench 103a, and the remaining third doped layer 103 is used to partially isolate the photoelectric conversion unit. The maximum depth of the first trench 103a reaches or exceeds the top of the second doped layer 102.

[0038] refer to Figure 5 Remove the mask layer 201 on top of the third doped layer.

[0039] A fourth doped layer 104 is formed on the top surface of the third doped layer 103 covered by the first trench 103a and all the original mask layers 201 using an epitaxial process. The fourth doped layer 104 is used to form the remaining part of the charge collection region of the photoelectric conversion unit and to form a lateral PN junction structure (i.e., the fourth doped layer 104 and the third doped layer 103 on the sidewall of the first trench 103a form a lateral PN junction structure).

[0040] The fourth doped layer 104 has the same doping type as the second doped layer 102.

[0041] refer to Figure 6By planarization or etch-back process, the epitaxial layer (part of the fourth epitaxial layer 104) above the top height of the third doped layer 103 is removed to disconnect all photoelectric conversion units.

[0042] refer to Figure 7 After photolithography, ion implantation is performed using the same type of doping as the first doped layer 101, penetrating the thickness range of the third doped layer 103 to form an isolation structure 103b for isolating the upper part of the photoelectric conversion unit.

[0043] Apart from Figure 7 In the embodiment shown, in other embodiments, ion implantation of the same type as the first doped layer 101 can be performed through a photolithography-following ion implantation process, penetrating the thickness range of the second doped layer 102 to form a back-side deep trench isolation combination with the subsequent process for isolating the lower part of the photoelectric conversion unit.

[0044] In other embodiments, ion implantation of the same type as the first doped layer 101 can be performed through a photolithography-following ion implantation process, penetrating the thickness range of the third doped layer 103 and the second doped layer 102 to form an ion-doped isolation structure 103b that penetrates from top to bottom through the third doped layer 103 and the second doped layer 102. This structure is used to isolate the upper part of the photoelectric conversion unit and, in conjunction with the back deep trench isolation formed by subsequent processes, to isolate the lower part of the photoelectric conversion unit.

[0045] refer to Figure 8 Through epitaxial processing, a fifth doped layer 105 with the same doping type as the third doped layer 103 is formed on the third doped layer 103 to form an image sensor device.

[0046] refer to Figure 9 Different ion-doped regions (e.g., 105a and 105b) are formed in the fifth doped layer through photolithography followed by ion implantation, and the pixel surface transistor structure and all front-side circuits in the image sensor are fabricated (e.g., metal interconnect layer 106, and bonded to the supporting wafer 107).

[0047] refer to Figure 10 The substrate 11 is flipped over and thinned from the back side to the interior of the first doped layer 101. The thinning process may include etching, chemical mechanical polishing, etc.

[0048] refer to Figure 10 The second trench 108 is formed by etching from the back side of the substrate 11. The second trench 108 extends from the back side through the first doped layer 101 and the second doped layer 102, and stops within the ion-doped isolation structure 103a of the third doped layer 103.

[0049] refer to Figure 9Medium material 109 is filled into the second trench 108 to form a back deep trench isolation structure.

[0050] A first dielectric layer, a high dielectric constant material, and a second dielectric layer can be formed sequentially within the second trench 108.

[0051] The first and second dielectric layers can be silicon oxide. The high dielectric constant material can be one or more of aluminum oxide, tantalum oxide, hafnium oxide, and zirconium oxide.

[0052] The ion-doped isolation structure 103a and the back deep trench isolation structure together form the photoelectric conversion unit 11a (e.g. Figure 9 The isolation structure (the dashed box in the image).

[0053] refer to Figure 9 Furthermore, filters 110 and microlenses 111 can be formed to create a complete image sensor structure.

[0054] In this embodiment, the thickness of the first doped layer 101 ranges from 0.05 micrometers to 0.2 micrometers. The thickness of the second doped layer 102 is greater than 0.05 micrometers. The ion doping concentration of the first doped layer 101 is greater than 1E15 cm⁻³. The ion doping concentration of the second doped layer 102 is between 1E14 cm⁻³ and 5E18 cm⁻³. The ion doping concentration of the fourth doped layer 104 is higher than that of the second doped layer 102.

[0055] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. Therefore, the embodiments should be considered exemplary and not restrictive in any way. Furthermore, it is clear that the word "comprising" does not exclude other elements and steps, and the word "a" does not exclude a plural. Multiple elements recited in the apparatus claims may also be implemented by a single element. The terms "first," "second," etc., are used to denote names and do not indicate any particular order.

Claims

1. A method for forming a high-performance image sensor, characterized in that, The photoelectric conversion unit of the image sensor is formed by using alternating stacked multilayer doped substrates, combined with a deep trench isolation structure and a lateral PN junction structure formed by epitaxy, in order to improve the charge capacity of the photoelectric conversion unit and reduce the probability of bad pixels in the pixel array of the image sensor.

2. The method as described in claim 1, characterized in that, The method includes: A first doped layer is formed on the substrate to form a dark current pinning layer below the charge collection region of the photoelectric conversion unit; A second doped layer is formed above the first doped layer to form the main body of the charge collection region of the photoelectric conversion unit; The first doped layer has the opposite doping type to the second doped layer.

3. The method as described in claim 2, characterized in that, The first doped layer and the second doped layer are formed by epitaxial growth, or by photolithography followed by ion implantation using a large-area photomask pattern that does not have a pixel periodic structure.

4. The method as described in claim 2, characterized in that, The method further includes: A third doped layer is formed on the second doped layer, and the third doped layer has the same doping type as the first doped layer. A patterned mask layer is formed on the third doped layer; The third doped layer is etched to form the first trench, and the remaining third doped layer is used to partially isolate the photoelectric conversion unit; Remove the mask layer on top of the third doped layer; The fourth doped layer is formed in the first trench and on the top surface of the third doped layer covered by all the original mask layers through epitaxial process. It is used to form the remaining part of the charge collection region of the photoelectric conversion unit and to form a lateral PN junction structure. The fourth doped layer has the same doping type as the second doped layer. The epitaxial layer above the top height of the third doped layer is removed by planarization or etch-back process to disconnect all photoelectric conversion units.

5. The method as described in claim 4, characterized in that, The third doped layer is formed by epitaxial growth or by using a large-area photomask pattern without pixel periodic structure. Before the mask layer formed on the third doped layer is patterned, photolithography and ion implantation are performed to allow dopant ions to pass through the mask layer.

6. The method as described in claim 4, characterized in that, The maximum depth of the first trench reaches or exceeds the top of the second doped layer.

7. The method as described in claim 4, characterized in that, Also includes: Following photolithography, an ion implantation process is performed, with the same doping type as the first doped layer, penetrating the thickness range of the third and second doped layers to form an ion-doped isolation structure that runs from top to bottom through the third and second doped layers. This structure is used to isolate the upper part of the photoelectric conversion unit and, in conjunction with the back deep trench isolation formed by subsequent processes, to isolate the lower part of the photoelectric conversion unit.

8. The method as described in claim 4, characterized in that, Also includes: Ion implantation, using the same doping type as the first doped layer, is performed after photolithography to penetrate the thickness of the third doped layer, forming the upper part for isolating the photoelectric conversion unit.

9. The method as described in claim 4, characterized in that, Furthermore, it also includes: Following photolithography, an ion implantation process is performed, with the same doping type as the first doped layer, penetrating the thickness range of the second doped layer to form a back-side deep trench isolation combination with the subsequent process, used to isolate the lower part of the photoelectric conversion unit.

10. The method as described in claim 5, characterized in that, Also includes: A fifth doped layer with the same doping type as the third doped layer is formed on the third doped layer through an epitaxial process, which is used to form the device of the image sensor; By using photolithography followed by ion implantation, different ion-doped regions are formed within the fifth doped layer, and the pixel surface transistor structure and all circuits in the image sensor are fabricated.

11. The method as described in claim 10, characterized in that, Also includes: Thinning from the back side into the interior of the first doped layer; A second trench is formed by etching from the back side of the substrate; The second trench is filled with a medium material to form the back deep trench isolation structure; The ion-doped isolation structure and the back deep trench isolation structure together constitute the isolation structure of the photoelectric conversion unit.

12. The method as described in claim 11, characterized in that, The second trench extends from the back side through the first doped layer and the second doped layer, and stops within the ion-doped isolation structure of the third doped layer.

13. The method as described in claim 11, characterized in that, The medium material filling the second trench includes: A first dielectric layer, a high dielectric constant material, and a second dielectric layer are sequentially formed within the second trench.

14. The method as described in claim 1, characterized in that, The thickness of the first doped layer ranges from 0.05 micrometers to 0.2 micrometers; The thickness of the second doped layer is greater than 0.05 micrometers; The ion doping concentration of the first doped layer is greater than 1E15 cm⁻¹ -3 ; The ion doping concentration of the second doped layer is 1E14 cm⁻¹ -3 Up to 5E18 cm -3 between; The ion doping concentration of the fourth doped layer is higher than that of the second doped layer.

15. A high-performance image sensor, characterized in that, Formed using any of the methods described in claims 1 to 14.

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