Magnetoresistive element and preparation method thereof

Abstract

The embodiment of the invention provides a magnetoresistive element and a preparation method thereof. The magnetoresistive element comprises a first electrode layer, a barrier layer and a second electrode layer which are stacked in sequence, the barrier layer comprises a semiconductor or insulator material; the first electrode layer and the second electrode layer comprise staggered magnetic materials; wherein the staggered magnetic material comprises at least one of RuO2, CrSb, RbV2Te2O and KV2Se2O, and the semiconductor or insulator material comprises one of aluminum oxide, transition metal sulfide, hexagonal boron nitride and magnesium oxide. According to the magnetoresistive element and the preparation method thereof provided by the embodiment of the invention, the adopted material can stably exist in the air, the complex packaging protection requirement is avoided, and the preparation of a magnetoresistive device with lasting performance and stable work is facilitated.

Description

Magnetoresistive elements and their fabrication methods Technical Field

[0001] This application belongs to the field of magnetoresistive element fabrication technology, and particularly relates to a magnetoresistive element and its fabrication method. Background Technology

[0002] Antiferromagnetic materials, due to their zero net magnetic moment and strong robustness to magnetic disturbances, are considered functional materials with disruptive potential in spintronic devices. Their inherent ultrafast dynamic response and resistance to external magnetic field interference have made them a focus of attention in high-density storage, high-frequency signal processing, and low-power computing. However, traditional antiferromagnetic tunnel junctions have long faced core performance bottlenecks in their practical application: early studies showed that the magnetoresistance effect of antiferromagnetic tunnel junctions at room temperature is typically below 0.1%, a value far lower than the commercial standard for ferromagnetic tunnel junctions. Limited by the lack of a spin polarization mechanism and low interface coupling efficiency, antiferromagnetic materials cannot achieve effective information readout through the traditional tunneling magnetoresistance effect, severely restricting their application expansion in memory, sensors, and other fields.

[0003] Current antiferromagnetic / interlaced magnetic tunnel junction technology still faces the problem of low overall magnetoresistance, making it difficult to meet the requirements of high-sensitivity information readout. This severely restricts the leap from laboratory research to industrial application of antiferromagnetic spintronic devices, and breakthroughs are urgently needed through material design innovation, interface engineering optimization, and the exploration of novel spin control mechanisms. Summary of the Invention

[0004] In view of this, embodiments of this application provide a magnetoresistive element and its fabrication method to solve the technical problem of low magnetoresistive effect level of existing magnetoresistive elements.

[0005] In a first aspect, embodiments of this application provide a magnetoresistive element, comprising a first electrode layer, a barrier layer, and a second electrode layer stacked sequentially; the barrier layer comprises a semiconductor or insulating material; the first electrode layer and the second electrode layer comprise interleaved magnetic materials; wherein the interleaved magnetic material comprises at least one of RuO2, CrSb, RbV2Te2O, and KV2Se2O, and the semiconductor or insulating material comprises one of aluminum oxide, transition metal sulfide, hexagonal boron nitride, and magnesium oxide.

[0006] In some embodiments, both the first electrode layer and the second electrode layer are made of KV2Se2O material.

[0007] In some embodiments, the thickness of the first electrode layer and the second electrode layer is greater than or equal to 7.3 angstroms.

[0008] In some embodiments, the barrier layer comprises a multilayer magnesium oxide thin film.

[0009] In some embodiments, the magnesium oxide film has 3 to 9 layers.

[0010] In some embodiments, the thickness of the barrier layer is 4.5 angstroms to 13.5 angstroms.

[0011] Secondly, embodiments of this application provide a method for fabricating a magnetoresistive element, comprising the following steps: providing an interleaved magnetic material as a first electrode layer; depositing a semiconductor or insulating material on one side of the first electrode layer to form a barrier layer; and fabricating a second electrode layer on the barrier layer to obtain the magnetoresistive element.

[0012] In some embodiments, the interleaved magnetic material is KV2Se2O crystal, and the insulator material is magnesium oxide.

[0013] In some embodiments, the barrier layer comprises at least three magnesium oxide films.

[0014] In some embodiments, depositing a semiconductor or insulating material on one side of the first electrode layer to form a barrier layer includes: evaporating magnesium oxide with an electron beam to deposit magnesium oxide on the first electrode layer to form the barrier layer, wherein the barrier layer and the first electrode layer form a heterojunction.

[0015] In some embodiments, the step of fabricating a second electrode layer on the barrier layer to obtain the magnetoresistive element includes: using molecular beam epitaxy to epitaxially grow a second electrode layer on the side of the barrier layer away from the first electrode layer.

[0016] The magnetoresistive element and its fabrication method provided in this application innovatively employ interleaved magnetic materials (RuO2, CrSb, RbV2Te2O, KV2Se2O) as electrodes and design the magnetoresistive element based on the interface spin polarization mechanism, effectively solving the core challenge of antiferromagnetic / interleaved magnetic tunnel junction technology. Specifically, through the high spin splitting characteristics of materials such as KV2Se2O, a breakthrough effect of magnetoresistive effect >100% is achieved, far exceeding the existing technology; based on the interface spin polarization mechanism, the sensitivity of device performance to process parameters is greatly reduced. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 is a schematic diagram of the structure of the magnetoresistive element provided in the embodiment of this application; Figure 2 is a schematic diagram of the structure of the magnetoresistive element provided in the embodiment of this application; Figure 3 is a schematic diagram of the structure of the magnetoresistive element provided in the embodiment of this application; Figure 4 is a graph showing the change of magnetoresistive resistance with the number of magnesium oxide film layers when KV2Se2O is used as the electrode layer and multiple magnesium oxide films are used as the barrier layer in the magnetoresistive element provided in the embodiment of this application; Figure 5 is a graph showing the change of magnetoresistive resistance with bias voltage when KV2Se2O is used as the electrode layer and 5 magnesium oxide films are used as the barrier layer in the magnetoresistive element provided in the embodiment of this application; Figure 6 is a flowchart of the fabrication method of the magnetoresistive element provided in the embodiment of this application.

[0019] The figures in the attached diagram are denoted as follows: 10, first electrode layer; 20, barrier layer; 21, magnesium oxide thin film; 30, second electrode layer; 40, adjustable voltage source; 50, ammeter. Detailed Implementation

[0020] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that the embodiments of this application can also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the embodiments of this application with unnecessary detail.

[0021] It should also be understood that the term "and / or" as used in the specification of embodiments of this application and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0022] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0023] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0024] In addition, in the description of the specification of the embodiments of the present application and the appended claims, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be construed as indicating or implying relative importance.

[0025] The reference to "some embodiments" or "some embodiments" etc. described in the specification of the embodiments of the present application means that specific features, structures or characteristics described in connection with the embodiment are included in one or more embodiments of the embodiments of the present application. Thus, statements such as "in some embodiments", "in some embodiments", "in other some embodiments", "in still other some embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiments, but mean "one or more but not all embodiments", unless otherwise specifically emphasized. The terms "comprising", "including", "having" and their variants all mean "including but not limited to", unless otherwise specifically emphasized. "Plurality" means two or more.

[0026] It should be noted that the Chinese meanings corresponding to the English abbreviations appearing in this article are as follows: Ru - ruthenium; Cs - cesium; Rb - rubidium; Mn - manganese; Sn - tin; Mg - magnesium; Pt - platinum; Te - tellurium; Cr - chromium; Sb - antimony; Ti - titanium; Co - cobalt; Fe - iron; B - boron; K - potassium; Se - selenium; V - vanadium; O - oxygen.

[0027] In recent years, with the in - depth exploration of non - collinear antiferromagnetic structures and interfacial spin transport mechanisms, the performance of antiferromagnetic tunnel junctions has shown breakthrough progress. For example, existing data shows that in the Mn3Sn / MgO / Mn3Sn system, a 2% magnetoresistance was achieved at room temperature by optimizing the barrier layer thickness. It has also been shown that a room - temperature magnetoresistance as high as 100% was observed in Mn3Pt - based heterojunctions. However, the above achievements are still limited by the intrinsic spin - orbit coupling strength of the materials and the interfacial electron - state matching degree, and their performance stability and repeatability have not yet met the requirements of industrial - grade devices.

[0028] As a class of new quantum materials that combine the ferromagnetic spin - polarization characteristics and the antiferromagnetic zero - net - magnetic - moment advantage, the staggered magnets provide a new direction for breaking through the performance limits of traditional antiferromagnetic devices. By breaking the time - reversal symmetry, this type of material can achieve spin - polarized transport without stray fields and high - frequency spin - dynamics responses. However, the experimentally verified staggered magnets are still extremely limited, and only a few systems such as RuO2, MnTe, CrSb, etc. have been reported, and the nature of their magnetic order remains controversial. Taking the RuO2 - based magnetic tunnel junction as an example, although the RuO2 / MgO / RuO2 structure exhibits a 60% magnetoresistance at room temperature, its low - temperature performance (such as only 5% in the RuO2 / TiO2 / CoFeB system) and device stability problems have not been solved.

[0029] In summary, existing antiferromagnetic / interlaced magnetic tunnel junction technology still faces the following core challenges: the overall level of magnetoresistance effect is relatively low, making it difficult to meet the requirements for high-sensitivity information readout. These problems severely restrict the leap from laboratory research to industrial application of antiferromagnetic spintronic devices, and breakthroughs are urgently needed through material design innovation, interface engineering optimization, and the exploration of novel spin control mechanisms.

[0030] The first aspect of this application provides a magnetoresistive element, as shown in FIG1. ​​The magnetoresistive element includes a first electrode layer 10, a barrier layer 20, and a second electrode layer 30 stacked sequentially. The barrier layer 20 includes a semiconductor or insulating material. The first electrode layer 10 and the second electrode layer 30 include interleaved magnetic materials. The interleaved magnetic materials include at least one of RuO2, CrSb, RbV2Te2O, and KV2Se2O, and the semiconductor or insulating materials include one of aluminum oxide, transition metal sulfides, hexagonal boron nitride, and magnesium oxide.

[0031] This approach significantly improves magnetoresistance and device stability by employing interleaved magnetic materials as the electrode layer and combining them with an interfacial spin polarization mechanism. Interleaved magnetic materials exhibit spin splitting at the Fermi level as high as 1.6 eV (e.g., KV₂Se₂O), with spin polarization rates far exceeding those of traditional materials. Based on the interfacial spin polarization mechanism, the difference in spin polarization direction between electrons at the interface between the interleaved magnetic electrode and the barrier layer is amplified, enabling the magnetoresistance effect to exceed 100%. Furthermore, the zero net magnetic moment characteristic of interleaved magnetic materials makes them inherently robust to external magnetic field interference, achieving a dynamic response speed at the picosecond level, suitable for high-frequency signal processing scenarios. Materials such as KV₂Se₂O form long-range magnetic order above room temperature, ensuring stable device performance over a wide temperature range and solving the problems of magnetoresistance <0.1% and poor stability in traditional antiferromagnetic tunnel junctions.

[0032] In applications, the aforementioned interleaved magnetic materials are all typical interleaved magnets that have been experimentally verified recently, and their magnetic ordering nature and spin splitting characteristics have been confirmed. The barrier layer materials mentioned above are all mature semiconductor / insulator materials, exhibiting good interfacial compatibility with the interleaved magnetic electrodes. For example, the lattice matching degree between MgO and RuO2 exceeds 95%. Based on the "effective spin polarization" theory proposed by Shao Dingfu's team, the interfacial spin polarization mechanism does not depend on electrode thickness or layer parity, significantly reducing process sensitivity. The layered structure of transition metal sulfides can tolerate lattice defects, further enhancing interfacial stability. The thorough verification of the material system and the optimization of interface engineering have solved the problem of insufficient verification of traditional antiferromagnetic device material systems.

[0033] In applications, the fabrication process of this solution is highly compatible with existing semiconductor technologies. Interlaced magnetic electrodes can achieve nanoscale thickness control via magnetron sputtering; two-dimensional materials such as KV₂Se₂O can be fabricated using MBE or mechanical exfoliation. The deposition process for the barrier layer material has been widely applied in CMOS processes below 14nm. The barrier layer thickness range covers both direct and indirect tunneling regions, and the magnetoresistance effect can be optimized by adjusting the thickness. The controllability of process parameters and the mature fabrication method solve the problem of traditional antiferromagnetic devices being sensitive to process parameters, providing technical support for industrialization.

[0034] It is worth mentioning that the technical solution of this application has broad prospects for industrial application. Based on the high magnetoresistive effect and zero net magnetic moment characteristics, it can achieve 10 in magnetoresistive random access memory. 6 Write endurance and 10 -9 Year-long data retention meets automotive-grade chip requirements. Picosecond-level response speeds from interleaved magnetic materials enable the design of in-memory computing devices. Zero stray field characteristics prevent magneto-stress accumulation, extending device lifetime by two orders of magnitude and paving a new path for the industrialization of spintronics.

[0035] In applications, the electrode layer, acting as a magnetic electrode, plays a crucial role in providing a spin polarization source. Interlaced magnetic materials, through broken time-reversal symmetry, induce localized spin polarization at the interface, allowing electron tunneling to be controlled by the magnetic order state. Its zero net magnetic moment characteristic ensures a three-order-of-magnetic-moment improvement in the device's resistance to external magnetic field interference, while picosecond-level spin dynamics responses (such as the 1.6 eV spin splitting of KV₂Se₂O) directly enhance signal readout speed. Compared to traditional ferromagnetic electrodes, the electrode layer achieves high spin polarization without an additional magnetizing field, significantly reducing device power consumption. The barrier layer, acting as an electron tunneling channel, plays a crucial role in regulating spin transport efficiency. Optimization of the barrier layer thickness and material composition reduces the sensitivity of magnetoresistance to process parameters.

[0036] In some embodiments, RuO2 is an unconventional antiferromagnetic metal experimentally verified, but its magnetic order remains controversial. It exhibits a magnetoresistance of 60% at room temperature and high catalytic activity, but poor low-temperature performance (RuO2 / TiO2 / CoFeB only 5%). CrSb has a Nair temperature higher than room temperature, maintaining a stable staggered magnetic order at room temperature, making it suitable for practical devices without refrigeration. Near specific high-symmetry points in the Brillouin zone, CrSb exhibits significant spin-momentum locking and band spin splitting, which is beneficial for achieving high spin-polarized currents. RbV2Te2O inherits the d-orbital-dominated electronic structure of the V2O plane, possessing a d-wave staggered magnetic order. Its spin texture exhibits fourfold rotational symmetry, generating highly anisotropic spin polarization, which is beneficial for designing direction-sensitive spin valves. Since Te atoms have stronger spin-orbit coupling than Se, RbV2Te2O can theoretically achieve higher or more robust spin splitting than KV2Se2O (1.6 eV), especially forming multiple spin-polarized bands near the Fermi level. RbV₂Te₂O possesses a van der Waals structure with weak interlayer coupling, allowing for the fabrication of ultrathin (monolayer / few-layer) films via mechanical exfoliation or CVD, making it suitable for flexible electronics and two-dimensional spintronic devices. It is also suitable for photovoltaic devices, but its magnetic order is susceptible to stress. KV₂Se₂O exhibits long-range magnetic order at room temperature, with Fermi level spin splitting reaching 1.6 eV. It boasts room-temperature magnetoresistance >100%, picosecond-level dynamic response, and a two-order-of-magnitude improvement in device stability, making it the preferred material for industrialization.

[0037] In some embodiments, aluminum oxide (ANO) exhibits high insulation resistance and a dielectric constant of 9.83. Atomic layer deposition (ALD) technology is mature, resulting in a low interface state density. It effectively blocks leakage current and improves device reliability, but its spin polarization efficiency is slightly lower than that of magnesium oxide (MgO). Transition metal sulfides have a layered structure with a band gap of 1.8–2.0 eV. They have high tolerance for lattice defects and exhibit a spin filtering effect, significantly reducing process sensitivity and making them suitable for flexible electronic devices. Hexagonal boron nitride (HBO) is an ultrathin insulator with a dielectric constant of 4.9. It has extremely strong surface passivation capabilities, suppressing low interface state density. Device lifetime is extended, and spin polarization efficiency is improved, making it a core material for interface optimization. Magnesium oxide (MgO) is a wide bandgap insulator. It has a lattice matching degree >95% with staggered magnetic electrodes (such as RuO2) and high tunneling efficiency.

[0038] In some embodiments, both the first and second electrode layers are made of KV₂Se₂O material. The dual KV₂Se₂O electrode structure achieves technological breakthroughs through the following mechanisms: maximizing spin polarization efficiency, achieving Fermi level spin splitting of 1.6 eV, and exceeding 100% magnetoresistance; enhancing room temperature stability, with antiparallel c-axis spin alignment ensuring long-range magnetic order, and cycling stability >10. 9This design addresses the challenges of low magnetoresistivity, process sensitivity, and stability in antiferromagnetic devices, providing an industrialization path for room-temperature high-sensitivity spintronic devices. It achieves picosecond-level dynamic response and THz signal processing capabilities, enhances resistance to magnetic disturbances, and optimizes interface compatibility, with a layered structure and magnesium oxide barrier layer matching degree of >95%.

[0039] In some embodiments, the thickness of the first electrode layer 10 and the second electrode layer 30 is greater than or equal to 7.3 Å. Specifically, the thickness of the electrode layers ranges from 7.3 Å to tens of nanometers. When the thickness of the first and second electrode layers is ≥7.3 Å, the magnetic order stability and spin polarization efficiency of the KV₂Se₂O material are significantly improved. 7.3 Å is the critical thickness of the KV₂Se₂O layered structure, ensuring that the material maintains long-range magnetic order (spins are antiparallel along the c-axis) at room temperature, avoiding the destruction of magnetic order by quantum size effects. The increased thickness allows the Fermi level spin splitting to participate more fully in the tunneling process, improving the interface spin polarization efficiency, thereby stabilizing the magnetoresistance above 100%. In addition, a thickness of 7.3 Å and above can effectively suppress interface defects, reduce the interface state density, and reduce the sensitivity of magnetoresistance to process parameters by 80%. This thickness range simultaneously satisfies the balance between quantum tunneling and spin transport, avoiding direct electron conduction caused by excessively thin electrode layers, and preventing spin polarization decay caused by excessively thick layers.

[0040] In applications, by setting the electrode layer thickness to ≥7.3 Å, the challenges of low magnetoresistivity, process sensitivity, and stability in antiferromagnetic devices were solved by maintaining long-range magnetic order at room temperature, maximizing spin splitting contribution, suppressing interface defects, and optimizing tunneling-polarization balance. This design enhances the magnetoresistance effect while ensuring that the device maintains over 95% magnetoresistance stability under complex process conditions, providing key technical support for highly reliable spintronic devices.

[0041] In some embodiments, the barrier layer 20 comprises a multilayer magnesium oxide thin film. In some embodiments, the thickness of the barrier layer 20 is 4.5 Å to 13.5 Å. The lattice constant of magnesium oxide (4.2 Å) has a lattice mismatch of <5% with that of staggered magnetic materials such as KV₂Se₂O. The multilayer structure further reduces interface defects through layer-by-layer stacking, effectively reducing the interface state density and significantly improving spin polarization efficiency. The multilayer magnesium oxide (thickness 4.5~13.5 Å) allows for precise control of tunneling modes. For example, 3~5 layers of magnesium oxide promote direct tunneling and enhance the spin filtering effect; 6~9 layers of magnesium oxide enter the indirect tunneling region, balancing the tunneling probability and spin polarization. The wide bandgap and high insulation resistance of magnesium oxide effectively block non-spin-related electron conduction, reducing leakage current density by three orders of magnitude and significantly improving the device signal-to-noise ratio. The uniform thickness distribution of the multilayer magnesium oxide ensures the consistency of the spin transport path, enabling the device to maintain more than 90% TMR stability under high-frequency signals. The sputtering deposition process for magnesium oxide is compatible with existing CMOS processes, and the multilayer structure can achieve sub-angstrom level precision control through atomic layer deposition, reducing the difficulty of mass production. Specifically, the number of magnesium oxide thin films is 3 to 9. Optionally, the number of magnesium oxide thin films is 3, 4, 5, 6, 7, 8, 9, etc. Preferably, the number of magnesium oxide thin films is 3, 5, or 7. As shown in Figure 2, the number of magnesium oxide layers is 3. By precisely controlling the number of magnesium oxide thin film 21 (barrier layer 20) (3, 5, 7 layers), the tunneling mechanism can be dynamically adjusted to achieve the optimal balance between spin polarization efficiency, leakage current suppression, and high-frequency stability. When the number of magnesium oxide thin films is 3, the focus is on high magnetoresistivity (>100%), 5 layers take into account both performance and reliability, and 7 layers achieve 120~150% magnetoresistivity and 10 -8 A / cm 2 Level leakage current, while increasing by 10 12 Stability at 100 Hz. This design optimizes interface quality and process compatibility through layer selection, providing key technical support for high-density MRAM and 100 Hz communication devices.

[0042] Theoretical calculations show that, using interleaved magnetic KV₂Se₂O material as electrodes (with a thickness of at least 7.3 Å) and a multilayer magnesium oxide barrier layer (thickness ranging from 3 to 9 layers, corresponding to magnesium oxide thicknesses of 4.5 Å to 13.5 Å), as shown in Figure 4, the device exhibits a large magnetoresistance. As the thickness of the MgO barrier layer varies, the magnetoresistance reaches a minimum of 10 when the MgO thickness is 9 layers. 7 On the order of %, when the MgO thickness is 7 layers, the device magnetoresistance reaches a minimum of 10%. 10Regardless of the variation in MgO thickness, the magnetic tunnel junction consistently exhibits a significant magnetoresistance effect on the order of %. As shown in Figure 3, with interleaved magnetic KV₂Se₂O material as electrodes and five layers of magnesium oxide thin film 21 as a barrier layer, a bias voltage is applied to the device. As shown in Figure 5, under a bias voltage of ±20mV, the maximum magnetoresistance of the device reaches 10%. 12 On the order of %, at a bias voltage of ±80mV, the minimum magnetoresistance of the device reaches 10%. 6 On the order of %.

[0043] The magnetoresistive element provided in this application enables room-temperature applications. By utilizing alternating magnetic states at room temperature, the magnetoresistive device can operate in a normal temperature environment, paving the way for the industrialization of the technology. The manufacturing process is simplified, involving only two materials and two identical interfaces, fundamentally reducing the difficulty of device structure design and fabrication. It exhibits stable chemical properties and high device reliability. The materials used are stable in air, avoiding complex packaging and protection requirements, and facilitating the fabrication of practical devices with durable performance and stable operation.

[0044] In some embodiments, as shown in Figure 3, the upper and lower KV2Se2O layers serve as the first electrode layer 10 and the second electrode layer 30, respectively, and must possess magnetic properties. KV2Se2O is an interleaved magnetic material (the Nell vector L is a characteristic parameter of antiferromagnetic order, characterizing the relative orientation of the sublattice magnetic moments). The middle layer serves as an insulating barrier layer 20, through which electrons must pass via quantum tunneling. An external adjustable voltage source 40 provides a bias voltage to drive electron tunneling; a galvanometer 50 detects the tunneling current, reflecting the device's resistance state. The resistance of the tunnel junction is determined by the spin-dependent tunneling probability. Electrons have two states: spin-up and spin-down. The L direction of the interleaved magnetic electrodes polarizes the spin of the tunneling electrons. When the relative orientations of the Nell vector L of the upper and lower electrode layers are different, the device resistance changes significantly: Parallel configuration: Both the first electrode layer 10 and the second electrode layer 30 are along the positive x-axis. In this case, the spin polarization is matched, the electron tunneling probability is high, the device is in a low-resistance state, and the galvanometer 50 detects a large current.

[0045] Antiparallel configuration: The second electrode layer 30 is along the positive x-axis, and the first electrode layer 10 is along the negative x-axis. In this configuration, spin polarization is mismatched, the electron tunneling probability is low, the device is in a high-resistivity state, and the galvanometer 50 detects a small current (close to zero). An external magnetic field is applied to switch the Nell vector L of the first electrode layer 10 and the second electrode layer 30 to either a "parallel" or "antiparallel" configuration. This configuration difference causes a change in tunneling resistance. An adjustable voltage source 40 provides a bias voltage to drive electron tunneling; the galvanometer 50 detects the tunneling current, the magnitude of which directly reflects the resistance state.

[0046] Secondly, this application provides a method for fabricating a magnetoresistive element, as shown in FIG6, comprising the following steps: S10, providing an interleaved magnetic material as a first electrode layer; S20, depositing a semiconductor or insulating material on one side of the first electrode layer to form a barrier layer; S30, fabricating a second electrode layer on the barrier layer to obtain a magnetoresistive element.

[0047] This fabrication method achieves precise interface control through the sequential deposition of staggered magnetic electrodes, multilayer MgO barrier layers, and a symmetrical second electrode: the KV2Se2O electrode ensures high spin polarization and zero net magnetic moment at room temperature, the multilayer MgO optimizes the tunneling mechanism and suppresses leakage current, and the dual-electrode symmetrical structure increases magnetoresistance to 150%. This process is compatible with CMOS fabrication, enabling devices to achieve >10 Ω·cm at room temperature. 9 Subcycle stability, 10 12 The high-frequency response of Hz completely solves the performance bottleneck of antiferromagnetic tunnel junctions, providing industrialization technical support for high-density MRAM and THz communication devices.

[0048] In step S10, a high-quality KV2Se2O bulk crystal is grown by solid-state reaction method, and then a KV2Se2O sheet with controllable thickness (the thickness can be as small as 7.3 angstroms or as large as tens of nanometers) is peeled off from the bulk single crystal by mechanical peeling as the first electrode layer.

[0049] In some embodiments, the interleaved magnetic material is KV₂Se₂O crystal, and the insulator material is magnesium oxide. The combination of KV₂Se₂O crystal and MgO barrier layer solves the problems of low TMR, high leakage current, and process sensitivity of antiferromagnetic tunnel junctions through high spin polarization efficiency, low leakage current, room temperature stability, and process compatibility.

[0050] In some embodiments, the barrier layer comprises at least three magnesium oxide thin films. By precisely controlling the number of magnesium oxide thin films (barrier layers), the tunneling mechanism can be dynamically tuned, achieving an optimal balance between spin polarization efficiency, leakage current suppression, and high-frequency stability.

[0051] In step S20, in some embodiments, a semiconductor or insulating material is deposited on one side of the first electrode layer to form a barrier layer, including: evaporating magnesium oxide with an electron beam to deposit magnesium oxide on the first electrode layer to form a barrier layer, wherein the barrier layer and the first electrode layer form a heterojunction.

[0052] In applications, electron beam evaporation allows for precise control of the deposition rate (1–3 Å / min) and thickness (4.5–13.5 Å) of magnesium oxide, achieving an atomically flat interface. This improves the lattice matching between MgO and the KV₂Se₂O electrode and reduces the interface state density. This significantly enhances spin polarization efficiency, resulting in a substantial increase in magnetoresistance compared to conventional sputtering deposition.

[0053] In step S30, in some embodiments, a second electrode layer is fabricated on the barrier layer to obtain a magnetoresistive element, including: using molecular beam epitaxy (MBE) to epitaxially grow a second electrode layer on the side of the barrier layer away from the first electrode layer. MBE is performed under ultra-high vacuum to avoid impurity contamination and ensure an atomically flat interface between the second electrode layer and the barrier layer. The layer-by-layer growth mode of MBE can eliminate dislocations caused by lattice mismatch, allowing the KV₂Se₂O second electrode to maintain long-range magnetic order (spins antiparallel along the c-axis) at room temperature.

[0054] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0055] The above-described embodiments are only used to illustrate the technical solutions of the embodiments of this application, and are not intended to limit them. Although the embodiments of this application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of the embodiments of this application.

Claims

1. A magnetoresistive element, characterized in that, The device includes a first electrode layer, a barrier layer, and a second electrode layer stacked sequentially; the barrier layer comprises a semiconductor or insulating material; the first electrode layer and the second electrode layer comprise interleaved magnetic materials; wherein the interleaved magnetic material comprises at least one of RuO2, CrSb, RbV2Te2O, and KV2Se2O, and the semiconductor or insulating material comprises one of aluminum oxide, transition metal sulfide, hexagonal boron nitride, and magnesium oxide.

2. The magnetoresistive element as described in claim 1, characterized in that, Both the first electrode layer and the second electrode layer are made of KV2Se2O material.

3. The magnetoresistive element as described in claim 1, characterized in that, The thickness of the first electrode layer and the second electrode layer is greater than or equal to 7.3 angstroms.

4. The magnetoresistive element as described in claim 1, characterized in that, The barrier layer comprises multiple layers of magnesium oxide thin film.

5. The magnetoresistive element as described in claim 4, characterized in that, The magnesium oxide film has 3 to 9 layers.

6. The magnetoresistive element according to any one of claims 1 to 5, characterized in that, The thickness of the barrier layer is 4.5 angstroms to 13.5 angstroms.

7. A method for fabricating a magnetoresistive element, characterized in that, The process includes the following steps: providing an interleaved magnetic material as a first electrode layer; depositing a semiconductor or insulating material on one side of the first electrode layer to form a barrier layer; and fabricating a second electrode layer on the barrier layer to obtain the magnetoresistive element.

8. The preparation method according to claim 7, characterized in that, The interleaved magnetic material is KV2Se2O crystal, and the insulator material is magnesium oxide.

9. The preparation method according to claim 8, characterized in that, The barrier layer comprises at least three layers of magnesium oxide film.

10. The preparation method according to claim 8, characterized in that, The step of depositing a semiconductor or insulating material on one side of the first electrode layer to form a barrier layer includes: using electron beam evaporation of magnesium oxide to deposit magnesium oxide on the first electrode layer to form the barrier layer, wherein the barrier layer and the first electrode layer form a heterojunction; and / or, the step of preparing a second electrode layer on the barrier layer to obtain the magnetoresistive element includes: using molecular beam epitaxy to epitaxially grow a second electrode layer on the side of the barrier layer away from the first electrode layer.

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