Superconducting quantum bit coupling structure, superconducting quantum chip and quantum computer

Abstract

The invention provides a superconducting quantum bit coupling structure, a superconducting quantum chip and a quantum computer, and relates to the technical field of quantum. The superconducting quantum bit coupling structure comprises a first superconducting quantum bit, a second superconducting quantum bit and a coupler, the first superconducting quantum bit is connected with a first node of the coupler through a first bypass capacitor, and the second superconducting quantum bit is connected with a second node of the coupler through a second bypass capacitor; the first Josephson junction and the third bypass capacitor of the coupler meet a target condition, so that when the magnetic flux in a first loop formed by the first Josephson junction, the second Josephson junction and the third Josephson junction of the coupler is 0, the coupling between the first superconducting quantum bit and the second superconducting quantum bit is closed. Therefore, the problem of crosstalk caused by short distance of the quantum bits in the prior art can be solved, coupling closing between the quantum bits when the magnetic flux is 0 is realized, and the precision requirement of magnetic flux regulation and control is reduced.

Description

A superconducting quantum bit coupling structure, a superconducting quantum chip, and a quantum computer Technical Field

[0001] This disclosure relates to the field of quantum technology, and in particular to a superconducting quantum bit coupling structure, a superconducting quantum chip, and a quantum computer. Background Technology

[0002] Quantum computing is a cutting-edge computing paradigm based on the principles of quantum mechanics. Superconducting quantum computing, as one of the closest to practical application, faces the core challenge of achieving high-fidelity and scalable coupling and manipulation of superconducting qubits. Traditional techniques utilize tunable couplers to achieve coupling between superconducting qubits. That is, two grounded superconducting qubits and a bypass capacitor form a coupler with an adjustable frequency. The coupler is a superconducting quantum interference device (SQU). The frequency of the coupler can be adjusted by changing the magnetic flux passing through the SQU. By adjusting the frequency of the coupler, the switching of a two-qubit gate can be effectively realized.

[0003] However, the aforementioned traditional technologies suffer from problems such as incompatibility with modular schemes, large inter-bit crosstalk, high requirements for magnetic flux control precision when coupling is turned off, and poor noise immunity, which limit the large-scale expansion of superconducting quantum computing. Summary of the Invention

[0004] This disclosure provides a superconducting quantum bit coupling structure, a superconducting quantum chip, and a quantum computer to at least solve the above-mentioned technical problems existing in the prior art.

[0005] According to a first aspect of this disclosure, a superconducting quantum bit coupling structure is provided, the structure comprising: a first superconducting quantum bit, a second superconducting quantum bit, and a coupler; the first superconducting quantum bit is connected to a first node of the coupler via a first bypass capacitor, and the second superconducting quantum bit is connected to a second node of the coupler via a second bypass capacitor; a first Josephson junction is disposed between the first node and the second node of the coupler, the first Josephson junction being connected in parallel with a third bypass capacitor; the first node is grounded via a second Josephson junction, the second Josephson junction being connected in parallel with a fourth bypass capacitor; the second node is grounded via a third Josephson junction, the third Josephson junction being connected in parallel with a fifth bypass capacitor; the first Josephson junction and the third bypass capacitor satisfy a target condition such that when the magnetic flux in the first loop formed by the first Josephson junction, the second Josephson junction, and the third Josephson junction is 0, the coupling between the first superconducting quantum bit and the second superconducting quantum bit is closed.

[0006] In one embodiment, the coupler is configured with a first flux control line, which is used to control the magnetic flux in the first loop to control the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

[0007] In one possible implementation, the target condition is: the Josephson energy of the first Josephson junction and the capacitance value of the third bypass capacitor satisfy the following formula:

[0008]

[0009] in, The capacitance value of the third bypass capacitor. For the Josephson energy of the first Josephson junction, For superconducting magnetic flux quantum, The bit frequency of the first superconducting quantum bit. denoted as the bit frequency of the second superconducting quantum bit.

[0010] In one embodiment, the first superconducting quantum bit includes a fourth Josephson junction, a fifth Josephson junction, and a sixth bypass capacitor, wherein the fourth Josephson junction, the fifth Josephson junction, and the sixth bypass capacitor are connected in parallel, and the first superconducting quantum bit is grounded.

[0011] In one embodiment, the first superconducting quantum bit is configured with a second magnetic flux control line, which is used to control the magnetic flux in the second loop formed by the fourth Josephson junction and the fifth Josephson junction in the first superconducting quantum bit, so as to control the bit frequency of the first superconducting quantum bit and the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

[0012] In one embodiment, the second superconducting quantum bit includes a sixth Josephson junction, a seventh Josephson junction, and a seventh bypass capacitor, wherein the sixth Josephson junction, the seventh Josephson junction, and the seventh bypass capacitor are connected in parallel, and the second superconducting quantum bit is grounded.

[0013] In one embodiment, the second superconducting quantum bit is configured with a third magnetic flux control line, which is used to control the magnetic flux in the third loop formed by the sixth Josephson junction and the seventh Josephson junction in the second superconducting quantum bit, so as to control the bit frequency of the second superconducting quantum bit and the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

[0014] In one embodiment, the electrode shape corresponding to the third node in the first superconducting qubit is at least one of square, triangular, cross-shaped, circular, and elliptical; the electrode shape corresponding to the fourth node in the second superconducting qubit is at least one of square, triangular, cross-shaped, circular, and elliptical.

[0015] In one possible implementation, the third bypass capacitor is an interdigitated capacitor, wherein one end of the electrode corresponding to the first node and the electrode corresponding to the third node form the first bypass capacitor, and the other end forms the first interdigitated portion of the interdigitated capacitor.

[0016] In one possible implementation, a second bypass capacitor is formed between one end of the electrode corresponding to the second node and the electrode corresponding to the fourth node, and the other end is the second interdigitated portion of the interdigitated capacitor.

[0017] In one possible implementation, the sixth bypass capacitor is the capacitor formed between the electrode corresponding to the third node in the first superconducting quantum bit and the ground.

[0018] In one embodiment, the seventh bypass capacitor is the capacitor formed between the electrode corresponding to the fourth node in the second superconducting quantum bit and the ground.

[0019] In one possible implementation, the fourth bypass capacitor is the capacitor formed between the electrode corresponding to the first node and the ground; the fifth bypass capacitor is the capacitor formed between the electrode corresponding to the second node and the ground.

[0020] According to a second aspect of this disclosure, a superconducting quantum chip is provided, comprising: the superconducting quantum bit coupling structure described in this disclosure; the superconducting quantum chip is obtained based on flip-chip bonding, the first flip-chip bonding layer of the superconducting quantum chip includes a first superconducting quantum bit, a second superconducting quantum bit, and a coupler in the superconducting quantum bit coupling structure, and the second flip-chip bonding layer includes the measurement and control circuitry of the superconducting quantum bit coupling structure, the measurement and control circuitry including at least a flux control line and a readout cavity.

[0021] According to a third aspect of this disclosure, a quantum computer is provided, comprising: a superconducting quantum chip as described in this disclosure.

[0022] This disclosure discloses a superconducting quantum bit coupling structure, a superconducting quantum chip, and a quantum computer. The superconducting quantum bit coupling structure includes: a first superconducting quantum bit, a second superconducting quantum bit, and a coupler; the first superconducting quantum bit is connected to a first node of the coupler through a first bypass capacitor, and the second superconducting quantum bit is connected to a second node of the coupler through a second bypass capacitor; a first Josephson junction is disposed between the first node and the second node of the coupler, and the first Josephson junction is connected in parallel with a third bypass capacitor; the first node is grounded through the second Josephson junction, and the second Josephson junction is connected in parallel with a fourth bypass capacitor; the second node is grounded through the third Josephson junction, and the third Josephson junction is connected in parallel with a fifth bypass capacitor; the first Josephson junction and the third bypass capacitor satisfy a target condition such that when the magnetic flux in the first loop formed by the first Josephson junction, the second Josephson junction, and the third Josephson junction is 0, the coupling between the first superconducting quantum bit and the second superconducting quantum bit is closed. Therefore, this disclosure eliminates the direct capacitive coupling between superconducting qubits in the prior art, allowing the distance between qubits to be flexibly set without the need for close-range arrangement, thus solving the crosstalk problem caused by close-range qubits in the prior art. At the same time, the structure of this disclosure does not rely on direct physical coupling between qubits, adapting to the long-distance connection requirements of qubits between different modules, solving the problem that the prior art is difficult to be compatible with modular solutions. In addition, by matching the target conditions of the first Josephson junction and the third bypass capacitor, the coupling between qubits is closed when the magnetic flux is 0, without the need to adjust the magnetic flux to a specific non-zero narrow range, nor the need for additional current to maintain the magnetic flux. This reduces the precision requirements of magnetic flux control and improves the robustness to magnetic flux noise, solving the problems of high difficulty in magnetic flux control when coupling is closed and easy error due to magnetic flux noise when qubits are idle in traditional coupling methods.

[0023] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description

[0024] The above and other objects, features, and advantages of exemplary embodiments of the present disclosure will become readily understood by reading the following detailed description with reference to the accompanying drawings. Several embodiments of the present disclosure are illustrated in the drawings by way of example and not limitation, wherein: in the drawings, the same or corresponding reference numerals denote the same or corresponding parts.

[0025] Figure 1 shows a schematic diagram of a superconducting quantum bit coupling structure in the prior art; Figure 2 shows a schematic diagram of a superconducting quantum bit coupling structure according to an embodiment of the present disclosure; Figure 3 shows a schematic diagram of a superconducting quantum bit coupling structure according to an embodiment of the present disclosure. Detailed Implementation

[0026] To make the objectives, features, and advantages of this disclosure more apparent and understandable, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0027] Quantum computing is a cutting-edge computing paradigm based on the principles of quantum mechanics, aiming to overcome the performance bottlenecks of classical computing by leveraging properties such as quantum superposition and entanglement. Unlike traditional computers that use binary bits (0 or 1) as information units, quantum computers achieve parallel processing of information through qubits. The superposition state of qubits allows multiple states to be represented simultaneously, while quantum entanglement creates strong correlations between multiple bits, thereby achieving exponential speedup in specific tasks. Superconducting quantum computing is one of the closest to practical application of quantum computing. Its core device is the superconducting Josephson junction, which constructs qubits through the nonlinear resonant properties of superconducting circuits. Because the design of superconducting circuits is highly compatible with semiconductor processes, and it is easy to achieve high-density integration and large-scale expansion, it is considered the mainstream technology route for realizing a general-purpose quantum computer.

[0028] However, as one of the core technological routes for realizing large-scale quantum computing, superconducting quantum computing faces a significant challenge in achieving high-fidelity, scalable qubit coupling and manipulation. Two-qubit gates are fundamental to constructing quantum logic operations, typically using superconducting quantum interference devices (SQIs) as tunable frequency couplers to connect two qubits, thus enabling the switching of the two-qubit gate. To realize the potential of quantum computing, the system must have a sufficiently low error rate; otherwise, noise and errors will render the quantum algorithm ineffective. Therefore, long-running quantum algorithms require quantum error correction, which necessitates a large number of physical qubits, making the construction of quantum computing hardware extremely challenging. Although superconducting qubits offer a promising platform due to their fast operating speed and ease of fabrication, scaling to more qubits introduces challenges such as manufacturing yield, frequency collisions, and chip-level correlation errors. Adopting a modular approach, including establishing high-fidelity quantum gates between different modules, is an effective way to expand the qubit scale, but this also presents new challenges for coupler design.

[0029] Current technologies primarily utilize tunable couplers to achieve coupling between superconducting qubits, thereby enabling the switching of a two-qubit gate. Figure 1 shows a schematic diagram of a superconducting qubit coupling structure in the prior art. As shown in Figure 1, the existing scheme typically involves two grounded superconducting qubits (i.e., qubit 1 and qubit 2 in Figure 1). These two superconducting qubits can be transmon qubits and bypass capacitors forming a tunable frequency coupler (i.e., the coupler in Figure 1). The coupling path between node 04 of qubit 1, node 05 of the coupler, and node 06 of qubit 2 is formed by three capacitor elements: capacitor 01 is connected between node 04 and node 06, providing coupling between qubit 1 and qubit 2. The qubits are directly capacitively coupled; capacitor 02 connects nodes 04 and 05, transmitting the signal from qubit 1 to the coupler; capacitor 03 connects nodes 05 and 06, transmitting the coupler's response to qubit 2. Each qubit and coupler contains two Josephson junctions and one capacitor, all connected in parallel. The resonant frequency of the qubits and couplers can be adjusted by applying magnetic flux through an external Z-line. Throughout the structure, all devices are grounded at their bottom, and the Z-line is used to independently control the energy levels of each unit, thereby achieving dynamic control of the interaction strength between the two qubits.

[0030] However, current technical solutions have significant drawbacks, making it difficult to meet the modular requirements of superconducting qubits. Because the superconducting qubits in different modules are far apart, the direct capacitive coupling between them (as shown in Figure 1 through capacitor 01) is extremely small. Existing solutions require direct capacitive coupling between qubits, making it difficult to be compatible with modular designs. Furthermore, direct capacitive coupling between two qubits requires them to be very close together, making crosstalk between qubits difficult to overcome. Another major drawback is that existing solutions require adjusting the magnetic flux through the coupler to a specific value to shut down the interaction between qubits. However, in practice, the range of magnetic flux required to shut down the interaction is very small, making it difficult to precisely control the shutdown of the interaction between two qubits. Therefore, errors can occur due to magnetic flux noise when the qubits are idle.

[0031] Figure 2 shows a schematic diagram of a superconducting quantum bit coupling structure according to an embodiment of the present disclosure. As shown in Figure 2, the superconducting quantum bit coupling structure of the present disclosure includes: a first superconducting quantum bit, a second superconducting quantum bit, and a coupler; the first superconducting quantum bit is connected to the first node 5 of the coupler through a first bypass capacitor 1, and the second superconducting quantum bit is connected to the second node 7 of the coupler through a second bypass capacitor 3; a first Josephson junction 6 is provided between the first node 5 and the second node 7 of the coupler, and the first Josephson junction 6 is connected in parallel with the third bypass capacitor 2; the first node 5 is grounded through a second Josephson junction 13, and the second Josephson junction 13 is connected in parallel with the fourth bypass capacitor 12; the second node 7 is grounded through a third Josephson junction 14, and the third Josephson junction 14 is connected in parallel with the fifth bypass capacitor 15; the first Josephson junction 6 and the third bypass capacitor 2 satisfy the target condition that when the magnetic flux in the first loop formed by the first Josephson junction 6, the second Josephson junction 13, and the third Josephson junction 14 is 0, the coupling between the first superconducting quantum bit and the second superconducting quantum bit is closed.

[0032] In this embodiment, the core components of the superconducting quantum bit coupling structure are a first superconducting quantum bit (quantum bit 1 in Figure 2), a second superconducting quantum bit (quantum bit 2 in Figure 2), and a coupler. The three units together constitute a complete quantum bit coupling system. The first and second superconducting quantum bits are the core functional units for realizing quantum information storage and processing. The coupler is an intermediate control unit that connects the two superconducting quantum bits and realizes the opening, closing, and strength adjustment of their coupling. The three units cooperate with each other to complete the coupling control between the superconducting quantum bits. The first and second superconducting quantum bits are not directly coupled through a capacitor. That is, the superconducting quantum bit coupling structure in this disclosure abandons the design of direct capacitive coupling between two quantum bits in the prior art and breaks through the limitation of quantum bit spacing.

[0033] In this embodiment, the first superconducting quantum bit is connected to the coupler via a first bypass capacitor 1 (the capacitance value of the first bypass capacitor 1 can be denoted as...). An electrical connection is established at the first node 5 of the coupler. The second superconducting quantum bit is connected to the coupler via a second bypass capacitor 3 (the capacitance of the second bypass capacitor 3 can be denoted as...). An electrical connection is established at the second node 7 of the coupler; the first bypass capacitor 1 and the second bypass capacitor 3 are dedicated coupling capacitors, serving as the electrical transmission medium between the quantum bit and the coupler, realizing signal transmission between the quantum bit and the coupler, while also playing the role of isolation and impedance matching, avoiding direct electrical interference between the quantum bit and the coupler.

[0034] In this embodiment, a first Josephson junction 6 is connected in series between the first node 5 and the second node 7 of the coupler (the Josephson energy of the first Josephson junction 6 can be denoted as...). The first Josephson junction 6 can be a superconducting Josephson junction, which is the core component for achieving nonlinear resonance characteristics in the coupler. Simultaneously, a third bypass capacitor 2 is connected in parallel across the first Josephson junction 6 (the capacitance of the third bypass capacitor 2 can be denoted as...). The first Josephson junction 6 and the third bypass capacitor 2 are connected in parallel to form the core resonant branch between the first node 5 and the second node 7 in the coupler. The resonant characteristics of this branch are jointly determined by the Josephson energy of the first Josephson junction 6 and the capacitance value of the third bypass capacitor 2. It is the key structure for controlling the coupling between the coupler and the two qubits. The first Josephson junction 6 is made of superconducting material, which can realize the quantum tunneling effect between the superconducting state and the normal state. The capacitance value of the third bypass capacitor 2 needs to meet a specific matching condition with the Josephson energy of the first Josephson junction 6 in order to achieve precise control of the coupling.

[0035] In this embodiment, the first node 5 of the coupler is connected to the second Josephson junction 13 (the Josephson energy of the second Josephson junction 13 is denoted as...). The second Josephson junction 13 is electrically connected to the circuit ground terminal, forming the grounding branch of the first node 5, and a fourth bypass capacitor 12 is connected in parallel across its two ends (the capacitance value of the fourth bypass capacitor 12 is denoted as...). The second Josephson junction 13 is also a superconducting Josephson junction. The grounding branch formed by its parallel connection with the fourth bypass capacitor 12 provides a stable electrical grounding reference for the first node 5. At the same time, the nonlinear characteristics of this branch participate in the construction of the overall resonant characteristics of the coupler. Its Josephson energy and capacitance value must meet the general parameter range of the corresponding quantum bit. For example, for a transmon quantum bit, the Josephson energy of the second Josephson junction 13 can be selected to be the same order of magnitude as that of the Josephson junction in a conventional transmon quantum bit. The capacitance value of the fourth bypass capacitor 12 is also adapted to the conventional parameter range of the superconducting quantum circuit.

[0036] In this embodiment, the second node 7 of the coupler is connected to the third Josephson junction 14 (the Josephus energy of the third Josephson junction 14 is denoted as...). The third Josephson junction 14 is electrically connected to the circuit ground terminal, forming the grounding branch of the second node 7, and a fifth bypass capacitor 15 is connected in parallel across its two ends (the capacitance value of the fifth bypass capacitor 15 is denoted as...). The third Josephson junction 14 is a superconducting Josephson junction. The grounding branch formed by the third Josephson junction 14 and the fifth bypass capacitor 15 provides a stable electrical grounding reference for the second node 7. It forms a symmetrical structure with the grounding branch of the first node 5, which together ensures the electrical stability of the coupler. The parameters of this branch must also meet the general parameter range of the corresponding quantum bit. The parameter selection principle is the same as that of the second Josephson junction 13 and the fourth bypass capacitor 12. For example, the Josephson energy of the third Josephson junction 14 can be the same as or similar to the Josephson energy of the second Josephson junction 13, and the capacitance value of the fifth bypass capacitor 15 can be matched with the capacitance value of the fourth bypass capacitor 12.

[0037] In this embodiment, the first Josephson junction 6, the second Josephson junction 13, and the third Josephson junction 14 form a closed first loop inside the coupler. This first loop is the core physical structure for magnetic flux control. The magnetic flux passing through this loop can be changed externally through the magnetic flux control circuit. The Josephson energy of the first Josephson junction 6 and the capacitance value of the third bypass capacitor 2 must meet a pre-set target condition. This target condition is the precise matching relationship between the two parameters, which is the core technical requirement for achieving coupling closure. When this target condition is met, the magnetic flux passing through the first loop is controlled to 0, and the coupling between the first superconducting quantum bit and the second superconducting quantum bit is completely closed. There is no transmission or interaction of quantum information between them. That is, when the magnetic flux of the first loop is 0, the resonant frequency of the coupler does not overlap with the bit frequencies of the first and second superconducting quantum bits, thus achieving coupling and decoupling between them.

[0038] In this disclosure, by improving the structure between the coupler and the first and second superconducting qubits, the design of direct capacitive coupling between the two qubits in the prior art is abandoned. This eliminates the need for direct capacitive coupling between the two qubits, allowing for a greater distance between them, effectively reducing crosstalk between qubits. It also supports the modular design of superconducting qubits, enabling high-fidelity coupling between different module qubits. Furthermore, the coupling between the two qubits can be closed when the magnetic flux in the first loop is zero, without needing to precisely control the magnetic flux to a specific minimum value, making it easier to implement in practice. When the qubits are idle, only the magnetic flux in the first loop needs to be kept at zero; no additional magnetic flux is required. The coupler is robust to magnetic flux noise, effectively reducing errors caused by magnetic flux noise when the qubits are idle, and improving the stability and fault tolerance of the superconducting quantum computing system.

[0039] In another embodiment, the coupler is configured with a first flux control line 20, which is used to control the magnetic flux in the first loop to control the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

[0040] In this embodiment, a dedicated first flux control line 20 is added to the coupler. This first flux control line 20 is a conventional flux control Z-line in superconducting quantum circuits, fabricated using superconducting materials and integrated into the measurement and control circuit layer of the superconducting quantum chip. It is a dedicated hardware circuit for realizing flux control of the first loop. The core working principle of the first flux control line 20 is based on the electromagnetic induction effect. By changing the magnitude and direction of the current flowing through the first flux control line 20, the strength and direction of the magnetic field generated around it are changed, thereby precisely controlling the value of the magnetic flux passing through the first loop. The change in the magnetic flux of the first loop directly changes the overall resonance characteristics of the coupler, as well as the resonance matching relationship between the coupler and the first and second superconducting qubits, thereby achieving continuous and precise control of the coupling strength between the first and second superconducting qubits. In one example, adjusting the current in the first flux control line 20 so that the magnetic flux through the first loop is 0 closes the coupling between the first and second superconducting qubits. Continuing to adjust the current in the first flux control line 20 increases the magnetic flux through the first loop, gradually opening the coupling between the first and second superconducting qubits. The coupling strength changes accordingly with the increase of magnetic flux. The current can be adjusted to the corresponding value according to the needs of actual quantum logic operations to achieve the target coupling strength. Furthermore, the first flux control line 20 is an independent control circuit that only controls the magnetic flux of the first loop of the coupler, without directly interfering with the resonant characteristics of the first and second superconducting qubits themselves, ensuring the stability of the qubits' states. Moreover, the control method of this circuit is electrical control, compatible with the overall measurement and control system of the superconducting quantum chip, and can achieve automated current adjustment and flux control through an external microwave measurement and control system.

[0041] In this disclosure, a first magnetic flux control line 20 is added to the coupler, which enables active, precise, and independent control of the magnetic flux in the first loop of the coupler. This allows for controllable adjustment of the coupling strength between the first and second superconducting qubits, providing a direct hardware-level control method for the opening, closing, and strength adjustment of the coupling. This method is convenient to operate and has high control precision. The first magnetic flux control line 20 only controls the magnetic flux of the coupler loop, avoiding interference with the characteristics of the qubits themselves and ensuring the stability of the qubits' state. At the same time, the electrical control method of this magnetic flux control line is compatible with the measurement and control technology of superconducting quantum chips, making it easy to integrate and scale up.

[0042] In another embodiment, the target condition satisfied by the first Josephson junction 6 and the third bypass capacitor 2 is: the Josephson energy of the first Josephson junction 6 and the capacitance value of the third bypass capacitor 2 satisfy the following formula 1: Formula 1, where, This is the capacitance value of the third bypass capacitor 2. For the first Josephson knot 6, Josephson energy, For superconducting magnetic flux quantum, The bit frequency of the first superconducting quantum bit. is the bit frequency of the second superconducting quantum bit.

[0043] In this embodiment, the target condition satisfied by the first Josephson junction 6 and the third bypass capacitor 2 is: the relationship between the Josephson energy of the first Josephson junction 6 and the capacitance value of the third bypass capacitor 2 satisfies the above formula 1. Wherein, superconducting magnetic flux quantum... It is derived from Planck's constant h and the unit charge e, specifically as follows: .

[0044] In this disclosure, the Josephson energy of the first Josephson junction 6 and the target condition satisfied by the capacitance value of the third bypass capacitor 2 provide a clear and quantifiable technical basis for the parameter design of the coupler, avoiding the blindness of parameter design and improving the operability and repeatability of device fabrication. Formula 1 is constructed based on the basic physical constants and device characteristic parameters in the field of superconducting quantum mechanics. The parameter values ​​all follow industry-standard practices and are highly compatible with the design and fabrication systems of existing superconducting quantum chips, facilitating process implementation and large-scale production. After achieving precise parameter matching between the first Josephson junction 6 and the third bypass capacitor 2 through this formula, the first Josephson energy of the coupler can be ensured. When the loop magnetic flux is 0, the coupling between the first and second superconducting qubits is completely shut off, and the interval where the magnetic flux is 0 is a relatively large interval near zero. Compared with the existing technology that requires precise control of the magnetic flux to a specific minimum value, the parameter matching of this scheme allows for a wider range of magnetic flux control when the coupling is shut off, making it easier to implement in practice. At the same time, the parameter design based on this formula enables the coupler to have stronger robustness to magnetic flux noise. When the qubit is idle, it is only necessary to keep the first loop magnetic flux at 0, without the need for additional precise magnetic flux control, which effectively reduces qubit errors caused by magnetic flux noise and improves the stability and fault tolerance of the superconducting qubit coupling structure.

[0045] In another embodiment, the first superconducting quantum bit includes a fourth Josephson junction 9, a fifth Josephson junction 10, and a sixth bypass capacitor 11, which are connected in parallel. The first superconducting quantum bit is grounded.

[0046] In this embodiment, the first superconducting qubit can be a transmon type superconducting qubit, which includes a fourth Josephson junction 9, a fifth Josephson junction 10, and a sixth bypass capacitor 11 (the capacitance value of the sixth bypass capacitor 11 can be denoted as...). Furthermore, all three are electrically connected in parallel. The fourth Josephson junction 9 and the fifth Josephson junction 10 can be superconducting Josephson junctions, fabricated using superconducting materials and integrated onto the superconducting quantum chip using micro-nano processes. Their parallel connection enhances the stability of the superconducting tunneling characteristics of the qubit and reduces the impact of fabrication defects of a single Josephson junction on the qubit performance. Their Josephson energy parameters all meet the general parameter range for transmon qubits and can be determined based on the target bit frequency of the first superconducting qubit. The selection process involves adapting the capacitor to the ground. The sixth bypass capacitor 11 serves as the ground bypass capacitor for the first superconducting quantum bit. It is a passive capacitor, and its capacitance value matches the conventional parameter range of the transmon quantum bit. Together with the Josephson energy of the fourth and fifth Josephson junctions 10, it determines the intrinsic resonant frequency of the first superconducting quantum bit. The parallel node of the fourth and fifth Josephson junctions 10 and the sixth bypass capacitor 11 forms the core circuit node of the first superconducting quantum bit (node ​​4 in Figure 2). This node is the signal input / output terminal of the first superconducting quantum bit, used to establish an electrical connection with the first node 5 of the coupler via the first bypass capacitor 1. The other end of the parallel connection is directly connected to the circuit ground, forming the grounding structure of the first superconducting quantum bit. This grounding method provides a stable electrical reference potential for the first superconducting quantum bit, ensuring the stability of its resonant characteristics and avoiding frequency fluctuations caused by potential drift. Simultaneously, the grounding structure is compatible with the overall electrical design of the superconducting quantum circuit, effectively reducing external electromagnetic noise interference to the quantum state of the first superconducting quantum bit.

[0047] In this embodiment, the first superconducting quantum bit adopts a classic transmon quantum bit structure with two Josephson junctions and a bypass capacitor connected in parallel and grounded as a whole. This ensures that the first superconducting quantum bit has mature and stable quantum properties, enabling it to stably carry quantum information and achieve frequency tunability, thus laying the device foundation for high-fidelity quantum bit coupling of the entire coupling structure.

[0048] In another embodiment, the first superconducting quantum bit is configured with a second magnetic flux control line 19, which is used to control the magnetic flux in the second loop formed by the fourth Josephson junction 9 and the fifth Josephson junction 10 in the first superconducting quantum bit, so as to control the bit frequency of the first superconducting quantum bit and the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

[0049] In this embodiment, a dedicated second flux control line 19 is configured for the first superconducting quantum bit. This second flux control line 19 is a conventional flux control Z-line in the field of superconducting quantum circuits, fabricated using superconducting materials and micro / nano processes. Its routing path surrounds the closed second loop formed by the fourth Josephson junction 9 and the fifth Josephson junction 10 within the first superconducting quantum bit. It is an independent hardware circuit for achieving precise flux control of the first superconducting quantum bit. This circuit is independent of the first flux control line 20 of the coupler, and the control process does not generate direct electrical or magnetic interference between them. The fourth Josephson junction 9 and the fifth Josephson junction 10 form a closed superconducting second loop in physical space, and changes in the internal magnetic flux directly alter the nonlinear resonant characteristics of the first superconducting quantum bit. The second magnetic flux control line 19 achieves magnetic flux control based on the principle of electromagnetic induction. By changing the magnitude and direction of the current flowing into the line, the strength and direction of the magnetic field generated around it can be changed, thereby precisely and continuously controlling the magnetic flux value passing through the second loop. Moreover, the range of magnetic flux control can be flexibly set according to the operational requirements of the quantum bit, and the current adjustment can be automatically and precisely controlled by an external microwave measurement and control system.

[0050] The primary function of the second flux control line 19 in controlling the magnetic flux of the second loop is to achieve the control of the bit frequency of the first superconducting quantum bit. Dynamic control is achieved, and simultaneously, the second magnetic flux control line 19 changes the bit frequency of the first superconducting quantum bit by adjusting the magnetic flux. Furthermore, it can indirectly achieve fine-tuning of the coupling strength between the first and second superconducting qubits. The coupling strength between the first and second superconducting qubits is determined by the resonant characteristics of the coupler and the frequency matching degree of the two qubits. With the coupler state fixed, the frequency of the first superconducting qubit can be finely adjusted. This will change the resonant matching relationship between the coupler and the second superconducting quantum bit, thereby achieving a small adjustment of the coupling strength. This fine-tuning method can be combined with the coarse-tuning method of the first magnetic flux control line 20 of the coupler to achieve dual control of coarse-tuning + fine-tuning of the coupling strength between the two quantum bits, making the control precision of the coupling strength higher.

[0051] In this disclosure, a second magnetic flux control line 19 is configured for the first superconducting quantum bit, enabling independent and precise control of the magnetic flux in the second loop of the first superconducting quantum bit. On the one hand, this allows the bit frequency of the first superconducting quantum bit to have dynamic adjustable characteristics, which can be finely adjusted in real time according to the needs of quantum logic operations, improving the flexibility and adaptability of the first superconducting quantum bit and enabling it to be compatible with quantum computing operations with different frequency requirements. On the other hand, by changing the bit frequency, the coupling strength between the two quantum bits is finely adjusted, which complements the coarse adjustment of the first magnetic flux control line 20 of the coupler, achieving high-precision control of the coupling strength, effectively improving the fidelity of the two-qubit gate operation, and meeting the technical requirements of high-fidelity quantum computing.

[0052] In another embodiment, the second superconducting quantum bit includes a sixth Josephson junction 17, a seventh Josephson junction 18, and a seventh bypass capacitor 16, which are connected in parallel, and the second superconducting quantum bit is grounded.

[0053] In this embodiment, the second superconducting qubit can be a transmon-type superconducting qubit of the same type as the first superconducting qubit. It is another core functional unit for realizing quantum information storage and processing, and includes a sixth Josephson junction 17, a seventh Josephson junction 18, and a seventh bypass capacitor 16 (the capacitance value of the seventh bypass capacitor 16 can be denoted as...). Furthermore, the three components are electrically connected in parallel. This parallel structure is a classic hardware structure for Transmon qubits to achieve nonlinear resonance characteristics and stably carry quantum states. It is also the physical basis for ensuring the tunable frequency characteristics of the second superconducting qubit. It forms a symmetrical fit with the structural design of the first superconducting qubit, ensuring the electrical characteristic matching of the entire coupling structure. The sixth Josephson junction 17 and the seventh Josephson junction 18 are both superconducting Josephson junctions fabricated using superconducting materials. Integrating them through the micro-nano fabrication process of superconducting quantum chips, their parallel design effectively improves the process fault tolerance of the second superconducting qubit and reduces the risk of qubit performance degradation or failure due to process defects or material losses in a single Josephson junction. The Josephson energy parameters of both Josephson junctions strictly meet the general parameter range of Transmon qubits, and can be adjusted according to the target bit frequency of the second superconducting qubit. Targeted selection and adaptation are performed; the seventh bypass capacitor 16 is a dedicated grounding bypass capacitor for the second superconducting quantum bit. It is a passive capacitor, and its capacitance value matches the conventional parameter range of the transmon quantum bit. Together with the Josephson energy of the sixth and seventh Josephson junctions 18, it determines the inherent resonant frequency of the second superconducting quantum bit, and is used to regulate the bit frequency. The core fixed parameters are as follows: The parallel common node of the sixth Josephson junction 17, the seventh Josephson junction 18, and the seventh bypass capacitor 16 is the core circuit node of the second superconducting quantum bit (node ​​8 in Figure 2). This node serves as the signal input and output terminal of the second superconducting quantum bit, specifically used to establish an electrical connection with the second node 7 of the coupler through the second bypass capacitor 3, realizing the transmission of quantum signals and electrical signals between the second superconducting quantum bit and the coupler. The other end of the parallel connection is directly connected to the circuit ground, forming a reliable grounding structure for the second superconducting quantum bit. This grounding method provides a stable electrical reference potential for the second superconducting quantum bit, avoiding bit frequency fluctuations caused by potential drift and potential difference. At the same time, it can effectively shield the interference of external electromagnetic noise on the quantum state of the second superconducting quantum bit, ensuring the coherence of the quantum state. In the actual device fabrication process, device parameters of the same order of magnitude as those of the first superconducting quantum bit can be selected for adaptation.

[0054] In this disclosure, the second superconducting quantum bit adopts a classic transmon quantum bit structure with two Josephson junctions and a bypass capacitor connected in parallel and grounded as a whole. This ensures that the second superconducting quantum bit has mature and stable quantum properties, enabling it to stably carry quantum information and have the basic conditions for frequency tunability. It forms a symmetrical and compatible device structure with the first superconducting quantum bit, laying a matching device foundation for the entire coupling structure to achieve high-fidelity quantum bit coupling.

[0055] In another embodiment, the second superconducting quantum bit is configured with a third magnetic flux control line 21, which is used to control the magnetic flux in the third loop formed by the sixth Josephson junction 17 and the seventh Josephson junction 18 in the second superconducting quantum bit, so as to control the bit frequency of the second superconducting quantum bit and the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

[0056] In this embodiment, a dedicated third flux control line 21 is configured for the second superconducting quantum bit. This third flux control line 21 is a standardized flux control Z-line in the field of superconducting quantum circuits, fabricated using superconducting materials such as niobium and aluminum through micro-nano lithography and evaporation processes. It is a hardware circuit for achieving independent and precise flux control of the second superconducting quantum bit. The third flux control line 21, together with the first flux control line 20 of the coupler and the second flux control line 19 of the first superconducting quantum bit, are three independent control lines. Their respective flux control processes are free from direct magnetic and electrical interference, enabling discrete or coordinated control. The sixth Josephson junction 17 and the seventh Josephson junction 18 serve as the core superconducting tunneling devices of the second superconducting quantum bit. They form a closed third loop in physical space. This loop is the core physical structure that enables the second superconducting quantum bit to have frequency-tunable characteristics. Changes in the internal magnetic flux directly alter the nonlinear resonant barrier of the second superconducting quantum bit, thereby changing its inherent resonant characteristics. The third magnetic flux control line 21 achieves magnetic flux control based on the basic physical principle of electromagnetic induction. By changing the magnitude and direction of the current flowing into the line through an external measurement and control system, the strength and direction of the magnetic field generated around the line can be changed simultaneously, thereby accurately and continuously controlling the magnetic flux value passing through the third loop. The magnetic flux control range can be flexibly set according to the bit frequency adjustment requirements of the second superconducting quantum bit.

[0057] The primary technical function of the third flux control line 21 in controlling the magnetic flux of the third loop is to achieve the control of the bit frequency of the second superconducting quantum bit. Dynamic and precise control is achieved, and simultaneously, the third magnetic flux control line 21 changes the bit frequency of the second superconducting quantum bit by adjusting the magnetic flux. Furthermore, it can indirectly achieve fine-tuning of the coupling strength between the first and second superconducting qubits. The coupling strength between the first and second superconducting qubits is determined by the resonant characteristics of the coupler and the frequency resonant matching degree of the two qubits. With the first flux control line 20 of the coupler maintaining a fixed current and the resonant characteristics of the coupler remaining unchanged, the frequency of the second superconducting qubit can be finely adjusted. This will change the resonant matching relationship between the coupler and the first superconducting quantum bit, thereby achieving a small and precise adjustment of the coupling strength between the two quantum bits. This fine-tuning method can form a synergistic control system with the coarse adjustment of the coupling strength of the first magnetic flux control line 20 of the coupler and the fine adjustment of the coupling strength of the second magnetic flux control line 19 of the first superconducting quantum bit, so as to achieve multi-level precise control of the coupling strength.

[0058] In this disclosure, a third magnetic flux control line 21 is configured for the second superconducting quantum bit, enabling independent, precise, and continuous control of the magnetic flux in the third loop of the second superconducting quantum bit. On the one hand, this allows the bit frequency of the second superconducting quantum bit to have dynamic adjustable characteristics, enabling fine-tuning of the frequency according to the real-time requirements of quantum logic operations, thus improving the operational flexibility and system adaptability of the second superconducting quantum bit and making it compatible with different types and frequency requirements of quantum computing operations. On the other hand, by changing the bit frequency, fine-tuning of the coupling strength between the two quantum bits is achieved. This, together with the coarse adjustment of the first magnetic flux control line 20 of the coupler and the fine adjustment of the second magnetic flux control line 19 of the first superconducting quantum bit, forms a multi-level control system, which significantly improves the control precision of the coupling strength, effectively improves the fidelity of the two-qubit gate operation, and meets the core requirements of high-fidelity superconducting quantum computing.

[0059] Figure 3 shows a second schematic diagram of a superconducting quantum bit coupling structure according to an embodiment of the present disclosure. As shown in Figure 3, the electrode shape corresponding to the third node 4 in the first superconducting quantum bit is at least one of square, triangle, cross, circle and ellipse; the electrode shape corresponding to the fourth node 8 in the second superconducting quantum bit is at least one of square, triangle, cross, circle and ellipse.

[0060] In this embodiment, the third node 4 of the first superconducting quantum bit is its core circuit node for external electrical connection, and this node physically corresponds to the core electrode of the first superconducting quantum bit (electrode 22 in Figure 3); the fourth node 8 of the second superconducting quantum bit is its core circuit node for external electrical connection, and this node physically corresponds to the core electrode of the second superconducting quantum bit (electrode 25 in Figure 3). In this disclosure, both electrode 22 corresponding to the third node 4 and electrode 25 corresponding to the fourth node 8 are made of superconducting materials, forming a superconducting electrode structure. Their fabrication process is compatible with the overall micro-nano process of the superconducting quantum chip, and different shapes can be formed and processed using conventional superconducting chip fabrication processes such as photolithography, evaporation, and etching.

[0061] For electrode 22 corresponding to the third node 4 and electrode 25 corresponding to the fourth node 8, their shapes can be selected from at least one of square, triangular, cross-shaped, circular and elliptical. Different shapes can adapt to the layout requirements of superconducting quantum chips. For example, in the scenario of high-density chip integration, square electrodes can be selected, which have a small layout duty cycle and are easy to arrange, and are suitable for dense integration of multiple qubits. In the scenario where it is necessary to increase the coupling area between the electrode and the bypass capacitor and optimize the stability of the capacitor connection, cross-shaped electrodes can be selected, which have multi-directional extension ends, making it easy to achieve precise docking with the capacitor electrode.

[0062] In another embodiment, the third bypass capacitor 2 is an interdigitated capacitor, with one end of the electrode corresponding to the first node 5 forming a first bypass capacitor 1 between the electrode corresponding to the third node 4, and the other end forming a first interdigitated portion of the interdigitated capacitor.

[0063] In this embodiment, the third bypass capacitor 2 is a capacitor connected in parallel with the first Josephson junction 6 between the first node 5 and the second node 7 of the coupler. It can be an interdigitated capacitor structure. Interdigitated capacitors are planar capacitors commonly used in the field of superconducting quantum circuits. They are composed of two sets of interlaced and insulated superconducting interdigitated electrodes. Their capacitance value can be precisely controlled by adjusting the number, length, spacing and electrode width of the interdigitated electrodes. At the same time, interdigitated capacitors have the characteristics of structural stability, small parasitic parameters and low electromagnetic loss, which are suitable for the low noise and high coherence design requirements of superconducting quantum bit coupling structures.

[0064] In this embodiment, the first node 5 of the coupler physically corresponds to the coupler's dedicated superconducting electrode (electrode 23 in Figure 3). This electrode is made of the same superconducting material as the qubit electrode, possessing excellent superconducting and electrical conductivity properties. Furthermore, its fabrication process is completely consistent with that of other superconducting electrodes and interdigitated capacitors on the chip, ensuring the integration and stability of the structure. The electrode corresponding to the first node 5 is a dual-function extension structure. One end of it forms the first bypass capacitor 1 with the electrode corresponding to the third node 4 in the first superconducting qubit (electrode 22 in Figure 3). The other end of the electrode corresponding to the first node 5 is an interdigitated structure end, which is defined as the first interdigitated portion of the interdigitated capacitor, i.e., a set of interdigitated electrodes for the third bypass capacitor 2 between the first and second nodes of the coupler. This interdigitated portion cooperates with the interdigitated portion of the electrode corresponding to the second node 7 of the subsequent coupler to jointly form a complete interdigitated capacitor.

[0065] In this embodiment, the electrode corresponding to the first node 5 is designed as an integrated dual-function structure. One end forms the first bypass capacitor 1 with the electrode corresponding to the third node 4, and the other end serves as the first interdigital part of the interdigital capacitor. This eliminates the need to add independent capacitor components and connecting electrodes, simplifying the structural design of the superconducting quantum chip, significantly improving the chip's integration density, and meeting the needs of large-scale expansion of superconducting quantum bits.

[0066] In another embodiment, a second bypass capacitor 3 is formed between one end of the electrode corresponding to the second node 7 and the electrode corresponding to the fourth node 8, and the other end is the second interdigitated portion of the interdigitated capacitor.

[0067] In this embodiment, the second node 7 of the coupler physically corresponds to the coupler's dedicated superconducting electrode (electrode 24 in Figure 3). This electrode is made of the same superconducting material as the electrode corresponding to the first node 5 and the core electrode of the quantum bit. It has low loss and high superconductivity electrical properties. Its fabrication process is fully compatible with the micro-nano lithography, evaporation, and etching processes of superconducting quantum chips. It can achieve integrated integration with other superconducting structures, ensuring the high efficiency of signal transmission between the coupler and the quantum bit.

[0068] In this embodiment, the electrode 24 corresponding to the second node 7 is an integrated dual-function extension structure. Its first end is arranged opposite to the electrode (electrode 25 in Figure 3) corresponding to the fourth node 8 in the second superconducting quantum bit and has no physical contact. The two are isolated by the insulating layer of the superconducting chip, thereby forming the second bypass capacitor 3. The other end of the electrode 24 corresponding to the second node 7 is an interdigitated structure end, which is defined as the second interdigitated portion of the interdigitated capacitor. It cooperates with the first interdigitated portion of the electrode 23 corresponding to the first node 5 to jointly form the third bypass capacitor 2 between the first and second nodes of the coupler.

[0069] In this disclosure, one end of the electrode corresponding to the second node 7 forms a second bypass capacitor 3 with the electrode corresponding to the fourth node 8, and the other end serves as the second interdigitated part of the interdigitated capacitor, which, together with the first interdigitated part, constitutes a complete third bypass capacitor 2. This eliminates the need for additional independent capacitor components and connecting electrodes, further simplifying the structural layout of the superconducting quantum chip, increasing the chip's integration density, and adapting to the development needs of large-scale, high-density integration of superconducting quantum bits.

[0070] In another embodiment, the sixth bypass capacitor 11 is the capacitor formed between the electrode corresponding to the third node 4 in the first superconducting quantum bit and the ground.

[0071] In this embodiment, the sixth bypass capacitor 11 is a key capacitor connected in parallel with the fourth Josephson junction 9 and the fifth Josephson junction 10 in the first superconducting quantum bit. The electrode 22 corresponding to the third node 4 is the core superconducting electrode that enables the first superconducting quantum bit to achieve external electrical connection. The capacitance formed between the electrode 22 corresponding to the third node 4 and the circuit ground is the sixth bypass capacitor 11. This capacitor belongs to the inter-plane coupling capacitor type and is also the classic ground bypass capacitor structure of the transmon quantum bit in the field of superconducting quantum circuits. That is, the capacitance effect is formed by the electric field effect between the electrode 22 and the ground layer, thus constituting the sixth bypass capacitor 11.

[0072] In this embodiment, the sixth bypass capacitor 11 is directly formed by the electrode corresponding to the third node 4 of the first superconducting quantum bit and the ground, eliminating the design of an independent capacitor device, making the structure of the first superconducting quantum bit simpler, significantly improving the integration density of the device, and adapting to the development needs of high-density and large-scale integration of superconducting quantum chips. This structure capacitor has no additional connection nodes, reducing parasitic resistance and electromagnetic loss, improving the electrical stability of the sixth bypass capacitor 11, thereby ensuring the characteristic stability of the parallel resonant structure of the first superconducting quantum bit, effectively extending the coherence time of the quantum state, and improving the quantum performance of the first superconducting quantum bit.

[0073] In another embodiment, the seventh bypass capacitor 16 is the capacitor formed between the electrode corresponding to the fourth node 8 in the second superconducting quantum bit and the ground.

[0074] In this embodiment, the seventh bypass capacitor 16 is a key capacitor connected in parallel with the sixth Josephson junction 17 and the seventh Josephson junction 18 in the second superconducting quantum bit; the electrode corresponding to the fourth node 8 is the core superconducting electrode for realizing the electrical connection of the second superconducting quantum bit to the outside (electrode 25 in Figure 3), and it is also the core hardware carrier for the second superconducting quantum bit to carry quantum states and establish electrical connection with the coupler. The seventh bypass capacitor 16 is the capacitor formed between the electrode 25 corresponding to the fourth node 8 and the circuit ground. This capacitor belongs to the inter-plane coupling capacitor type, which is the classic ground bypass capacitor structure of transmon quantum bits in the field of superconducting quantum circuits. It forms a symmetrical design with the formation method of the sixth bypass capacitor 11 in the first superconducting quantum bit.

[0075] In this embodiment, the seventh bypass capacitor 16 is directly formed by the electrode corresponding to the fourth node 8 of the second superconducting quantum bit and the ground, eliminating the design of an independent capacitor device. This makes the structure of the second superconducting quantum bit simpler and more compact, significantly improving the integration density of the device. It meets the development needs of high-density and large-scale integration of superconducting quantum chips and also reserves more chip layout space for modular expansion of quantum bits. This structure capacitor has no additional physical connection nodes, reducing parasitic resistance, parasitic inductance and electromagnetic loss, improving the electrical stability of the seventh bypass capacitor 16, thereby ensuring the characteristic stability of the parallel resonant structure of the second superconducting quantum bit, effectively extending the coherence time of the quantum state and improving the quantum performance of the second superconducting quantum bit.

[0076] In another embodiment, the fourth bypass capacitor 12 is the capacitor formed between the electrode corresponding to the first node 5 and the ground; the fifth bypass capacitor 15 is the capacitor formed between the electrode corresponding to the second node 7 and the ground.

[0077] In this embodiment, the fourth bypass capacitor 12 is a capacitor connected in parallel between the first node 5 of the coupler and ground, and in parallel with the second Josephson junction 13; the fifth bypass capacitor 15 is a capacitor connected in parallel between the second node 7 of the coupler and ground, and in parallel with the third Josephson junction 14; the electrode 23 corresponding to the first node 5 is the core superconducting electrode for establishing an electrical connection between the coupler and the first superconducting quantum bit, and the electrode 24 corresponding to the second node 7 is the core superconducting electrode for establishing an electrical connection between the coupler and the second superconducting quantum bit. Both are core hardware carriers of the coupler. This disclosure defines the fourth bypass capacitor 12 and the fifth bypass capacitor 15 as capacitors directly formed between the two electrodes and the circuit ground. These types of capacitors are all inter-plane coupling capacitors, which are the classic ground bypass capacitor forms that adapt to the coupler structure in superconducting quantum circuits, forming a unified structural design logic with the ground bypass capacitor of the superconducting quantum bit.

[0078] This disclosure also provides a superconducting quantum chip, including: the superconducting quantum bit coupling structure of this disclosure; the superconducting quantum chip is obtained based on flip-chip bonding, the first flip-chip bonding layer of the superconducting quantum chip includes a first superconducting quantum bit, a second superconducting quantum bit and a coupler in the superconducting quantum bit coupling structure, and the second flip-chip bonding layer includes the measurement and control circuit of the superconducting quantum bit coupling structure, the measurement and control circuit includes at least a flux control line and a readout cavity.

[0079] In this embodiment, the superconducting quantum chip includes the superconducting quantum bit coupling structure disclosed herein. This coupling structure is the core hardware foundation for the superconducting quantum chip to realize dual-qubit coupling manipulation and construct dual-qubit gates, and it is also the core functional unit for the chip to complete quantum logic operations.

[0080] This superconducting quantum chip is fabricated using a flip-chip bonding process, a mature micro-nano technology for achieving multi-layered structure integration in the field of superconducting quantum chips. Flip-chip bonding vertically bonds different functional layers of the chip, achieving electrical connectivity and physical fixation between layers. Compared to traditional planar integration processes, flip-chip bonding effectively increases chip integration density, reduces electromagnetic interference from planar wiring, and simultaneously achieves physical separation between functional layers and the measurement and control layer, reducing noise interference from measurement and control circuitry to the qubits. The first flip-chip bonded layer of the chip is the quantum functional layer, the core layer that carries quantum states and enables qubit coupling manipulation. This layer fully integrates all physical devices and circuit structures of the first superconducting qubit, the second superconducting qubit, and the coupler in the coupling structure, including all superconducting functional devices such as Josephson junctions, bypass capacitors, interdigital capacitors, qubit electrodes, and coupler electrodes.

[0081] The second flip-chip bonding layer of this superconducting quantum chip is a measurement and control circuit layer, which provides external control and quantum state readout for the coupling structure of the first flip-chip bonding layer. This layer and the first flip-chip bonding layer are precisely electrically connected through flip-chip bonding bumps, without direct large-area physical contact, reducing thermal conduction and electromagnetic crosstalk between the two layers. The measurement and control circuit integrated in this layer is a dedicated control and readout hardware for the coupling structure, and includes at least two core components: a magnetic flux control line and a readout cavity. The magnetic flux control lines include a first magnetic flux control line 20, a second magnetic flux control line 19, and a third magnetic flux control line 21. The layout path of each magnetic flux control line precisely surrounds the corresponding magnetic flux control loop, achieving precise magnetic coupling with the coupling structure of the first flip-chip bonding layer. By inputting current into the magnetic flux control lines through an external measurement and control system, the magnetic flux of the first loop of the coupler, the second loop of the first superconducting quantum bit, and the third loop of the second superconducting quantum bit can be precisely controlled, thereby completing the control of coupling strength and bit frequency. The readout cavity is a superconducting resonant cavity, a classic device for reading the quantum state of quantum bits in superconducting quantum chips. It is coupled with the first and second superconducting quantum bits in the first flip-chip bonding layer, respectively. By detecting the change in the resonant frequency of the readout cavity, non-destructive reading of quantum states such as the ground state and excited state of the quantum bit can be achieved. The resonant frequency of the readout cavity matches the bit frequency of the quantum bit, ensuring high fidelity of quantum state reading.

[0082] In this disclosure, the superconducting quantum chip is fabricated using a flip-chip bonding process, achieving vertical layered integration of the quantum functional layer and the measurement and control circuit layer. This significantly improves the chip's integration density and saves a large amount of layout space compared to planar integration processes, providing process support for the large-scale integration of multiple qubits. At the same time, the physical separation design of the two layers effectively reduces the interference of electromagnetic and thermal noise from the measurement and control circuits on the qubits and couplers in the quantum functional layer, reduces the decoherence loss of quantum states, and significantly improves the coherence time of the qubits and the fidelity of quantum operations.

[0083] This disclosure also provides a quantum computer, including: a superconducting quantum chip as disclosed herein.

[0084] In this embodiment, the quantum computer uses a superconducting quantum chip as its core computing hardware. This superconducting quantum chip serves as the quantum processing unit of the quantum computer and is the core carrier for realizing quantum logic operations and quantum information processing. In practical applications, this superconducting quantum chip can be integrated as a single piece in the quantum computer, or it can be modularly integrated in multiple pieces according to the computational scale requirements of the quantum computer. Multiple chips are interconnected through quantum interconnect devices to realize the transmission of quantum signals, thus constructing a large-scale quantum computing system.

[0085] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly specified.

[0086] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A superconducting quantum bit coupling structure, characterized in that, The structure includes: a first superconducting quantum bit, a second superconducting quantum bit, and a coupler; the first superconducting quantum bit is connected to the first node (5) of the coupler through a first bypass capacitor (1), and the second superconducting quantum bit is connected to the second node (7) of the coupler through a second bypass capacitor (3); a first Josephson junction (6) is provided between the first node (5) and the second node (7) of the coupler, and the first Josephson junction (6) is connected in parallel with a third bypass capacitor (2); the first node (5) is grounded through a second Josephson junction (13). The second Josephson junction (13) is connected in parallel with the fourth bypass capacitor (12); the second node (7) is grounded through the third Josephson junction (14), which is connected in parallel with the fifth bypass capacitor (15); the first Josephson junction (6) and the third bypass capacitor (2) satisfy the target condition that when the magnetic flux in the first loop formed by the first Josephson junction (6), the second Josephson junction (13) and the third Josephson junction (14) is 0, the coupling between the first superconducting quantum bit and the second superconducting quantum bit is turned off.

2. The structure according to claim 1, characterized in that, The coupler is equipped with a first magnetic flux control line (20), which is used to control the magnetic flux in the first loop to control the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

3. The structure according to claim 1, characterized in that, The target condition is that the Josephson energy of the first Josephson junction (6) and the capacitance value of the third bypass capacitor (2) satisfy the following formula: in, The capacitance value of the third bypass capacitor (2) is given. For the Josephson energy of the first Josephson junction (6), For superconducting magnetic flux quantum, The bit frequency of the first superconducting quantum bit. denoted as the bit frequency of the second superconducting quantum bit.

4. The structure according to claim 1, characterized in that, The first superconducting quantum bit includes a fourth Josephson junction (9), a fifth Josephson junction (10), and a sixth bypass capacitor (11), which are connected in parallel. The first superconducting quantum bit is grounded.

5. The structure according to claim 1, characterized in that, The first superconducting quantum bit is configured with a second magnetic flux control line (19), which is used to control the magnetic flux in the second loop formed by the fourth Josephson junction (9) and the fifth Josephson junction (10) in the first superconducting quantum bit, so as to control the bit frequency of the first superconducting quantum bit and the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

6. The structure according to claim 1, characterized in that, The second superconducting quantum bit includes a sixth Josephson junction (17), a seventh Josephson junction (18), and a seventh bypass capacitor (16), which are connected in parallel. The second superconducting quantum bit is grounded.

7. The structure according to claim 1, characterized in that, The second superconducting quantum bit is configured with a third magnetic flux control line (21), which is used to control the magnetic flux in the third loop formed by the sixth Josephson junction (17) and the seventh Josephson junction (18) in the second superconducting quantum bit, so as to control the bit frequency of the second superconducting quantum bit and the coupling strength between the first superconducting quantum bit and the second superconducting quantum bit.

8. The structure according to claim 1, characterized in that, The electrode shape corresponding to the third node (4) in the first superconducting quantum bit is at least one of square, triangle, cross, circle and ellipse; the electrode shape corresponding to the fourth node (8) in the second superconducting quantum bit is at least one of square, triangle, cross, circle and ellipse.

9. The structure according to claim 8, characterized in that, The third bypass capacitor (2) is an interdigitated capacitor. One end of the electrode corresponding to the first node (5) and the electrode corresponding to the third node (4) form the first bypass capacitor (1), and the other end is the first interdigitated part of the interdigitated capacitor.

10. The structure according to claim 9, characterized in that, One end of the electrode corresponding to the second node (7) forms the second bypass capacitor (3) with the electrode corresponding to the fourth node (8), and the other end is the second interdigitated portion of the interdigitated capacitor.

11. The structure according to claim 4, characterized in that, The sixth bypass capacitor (11) is the capacitor formed between the electrode corresponding to the third node (4) in the first superconducting quantum bit and the ground.

12. The structure according to claim 6, characterized in that, The seventh bypass capacitor (16) is the capacitor formed between the electrode corresponding to the fourth node (8) in the second superconducting quantum bit and the ground.

13. The structure according to claim 1, characterized in that, The fourth bypass capacitor (12) is the capacitor formed between the electrode corresponding to the first node (5) and the ground; the fifth bypass capacitor (15) is the capacitor formed between the electrode corresponding to the second node (7) and the ground.

14. A superconducting quantum chip, characterized in that, include: The superconducting quantum bit coupling structure according to any one of claims 1-13; the superconducting quantum chip is obtained based on flip-chip bonding, the first flip-chip bonding layer of the superconducting quantum chip includes a first superconducting quantum bit, a second superconducting quantum bit and a coupler in the superconducting quantum bit coupling structure, and the second flip-chip bonding layer includes the measurement and control circuit of the superconducting quantum bit coupling structure, the measurement and control circuit including at least a flux control line and a readout cavity.

15. A quantum computer, characterized in that, include: A superconducting quantum chip according to claim 14.

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