Pin frame, SSD module and SSD device

Abstract

The invention discloses a lead frame, an SSD module and an SSD device. The scheme comprises a first base island which is used for installing a storage control chip; the second base island is used for installing a Flash; and the pin array is distributed at the periphery of the first base island. Due to the arrangement of the first base island and the second base island, the lead frame can be integrated with the storage control chip and the Flash at the same time, the SSD module can be manufactured by packaging the lead frame, the storage control chip and the Flash do not need to be independently packaged and then assembled into the SSD module, the manufacturing difficulty of the SSD module is reduced, and the packaging cost of the SSD device can be effectively reduced. The pin array in the lead frame is distributed around the first base island, so that the SSD module can be manufactured by adopting QFN packaging, and compared with BGA packaging, the packaging cost of the SSD device can be further reduced, and the profit margin of an SSD manufacturer is improved.

Description

Technical Field

[0001] This invention relates to the field of packaging technology, and in particular to a pin frame, an SSD module, and an SSD device. Background Technology

[0002] NAND Flash (or Flash for short) is the most mainstream storage medium today and is widely used in the manufacture of various types of storage products, such as SSD (Solid State Drive) devices. An SSD device includes components such as a storage controller chip, Flash, and PCB. The storage controller chip runs firmware that manages the Flash and controls the Flash to read and write data. The PCB serves as the substrate for the electrical connection between the storage controller chip and the Flash.

[0003] In related technologies, the storage controller chip and Flash memory are independently packaged using a Ball Grid Array (BGA) and then surface-mounted onto a PCB along with peripheral components (such as resistors and capacitors) to manufacture an SSD device. SSD devices manufactured using this method have the following drawbacks:

[0004] The packaging cost of BGA-packaged memory controller chips and Flash memory is not low. Furthermore, the fact that the memory controller chip and Flash memory are packaged separately also increases the packaging cost of the SSD device. Both of these factors directly impact the profit margins of SSD device manufacturers. Summary of the Invention

[0005] The purpose of this invention is to overcome the shortcomings of the prior art and provide a pin frame, SSD module, and SSD device that can reduce the packaging cost of SSD devices.

[0006] The first aspect of this application provides a lead frame, comprising:

[0007] The first base island is used to install the storage control chip;

[0008] The second base island is used to install Flash;

[0009] A pin array, wherein the pin array is distributed around the first base island.

[0010] Furthermore, in one preferred embodiment, the pin array includes power pins, signal pins, and ground pins, wherein the power pins connected to the Flash extend from one end of the lead frame to the other end of the lead frame and are located between the first base island and the second base island.

[0011] A second aspect of this application provides an SSD module, including: a storage controller chip, Flash memory, and a lead frame as described above;

[0012] The storage control chip is mounted on the first base island, and the Flash is mounted on the second base island. The pads of the storage control chip, the pads of the Flash, and the pin array are wire bonded together by bonding wires and packaged into the QFN packaged SSD module.

[0013] Furthermore, in one preferred embodiment, the pads on which the memory control chip is bonded to the Flash wire are located on one side of the power supply pin; the pads on which the Flash is bonded to the memory control chip wire are located on the other side of the power supply pin.

[0014] Furthermore, in one preferred embodiment, the storage control chip is provided with a gating module, which is used to adjust the signal type of the pads of the storage control chip so that the storage control chip can match the signal type of the pads of the Flash, thereby achieving through wire bonding.

[0015] Further, in one preferred embodiment, the gating module includes a control unit and multiple path selection units. The control terminal of the control unit is connected to the multiple path selection units. Each path selection unit includes a multiplexer and multiple I / O paths. The access terminal of the multiplexer is connected to the I / O port corresponding to the storage control chip. The multiplexer receives a signal from the control unit so that the selection terminal of the multiplexer is connected to one end of one of the I / O paths, and the other end of each I / O path is connected to the pad corresponding to the storage control chip.

[0016] Furthermore, in one preferred embodiment, there are multiple Flash units, which are stacked and staggered to form a stepped storage cell structure, and the pads of the same type of Flash units are connected by bonding wires.

[0017] Furthermore, in one preferred embodiment, the two ends of the power pin are not covered by the colloid.

[0018] A third aspect of this application provides an SSD device, including: a PCB, peripheral components, a housing, and an SSD module as described above;

[0019] The peripheral components and the SSD module are jointly surface-mounted to the PCB, and the PCB is installed inside the housing to form the SSD device.

[0020] Furthermore, in one preferred embodiment, the PCB is provided with gold fingers.

[0021] The technical solution of this application includes: a first base island for mounting a storage controller chip; a second base island for mounting Flash memory; and a pin array distributed around the first base island. Due to the arrangement of the first and second base islands, the lead frame can simultaneously integrate the storage controller chip and Flash memory. The lead frame can be packaged to manufacture an SSD module, eliminating the need for separate packaging and assembly of the storage controller chip and Flash memory into an SSD module. This reduces the manufacturing difficulty of the SSD module and effectively lowers the packaging cost of the SSD device.

[0022] In addition, since the pin array in the lead frame is distributed around the first base island, the SSD module of this application can be manufactured using QFN packaging. Compared with BGA packaging, this can further reduce the packaging cost of the SSD device and increase the profit margin of the SSD device manufacturer. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the lead frame structure shown in one embodiment of this application;

[0025] Figure 2 The diagram shown is a structural schematic of an SSD module (unpackaged) according to an embodiment of this application;

[0026] Figure 3 The diagram shown is a structural schematic of an SSD module (encapsulated) according to an embodiment of this application;

[0027] Figure 4 The diagram shown is a structural schematic of an SSD device according to an embodiment of this application;

[0028] Figure 5 The diagram shown is a connection diagram of the storage control chip, the gating module and the FLASH in one embodiment of this application;

[0029] Figure 6 The diagram shown is a schematic diagram of the path selection unit in one embodiment of this application (PadtoPad not shown);

[0030] Figure 7The diagram shown is a schematic diagram of the path selection unit in one embodiment of this application (PadtoPad). Detailed Implementation

[0031] To facilitate understanding of the present invention, a more complete description of the invention is provided below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0032] It should be noted that when an element is referred to as being "fixed to" another element, it can be directly attached to the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only possible implementation.

[0033] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0034] In related technologies, the memory controller chip and Flash memory are independently packaged using Ball Grid Array (BGA) technology and then surface-mounted onto a PCB along with peripheral components (such as resistors and capacitors) to manufacture an SSD device. SSD devices manufactured using this approach have the following drawbacks: the packaging cost of the BGA-packaged memory controller chip and Flash memory is not low. Furthermore, the fact that the memory controller chip and Flash memory are independently packaged also increases the overall packaging cost of the SSD device. Both of these factors directly impact the profit margins of SSD manufacturers.

[0035] Therefore, in order to solve the above-mentioned technical problems, this application discloses a lead frame that can reduce the packaging cost of SSD devices.

[0036] The technical solution of this application will be described in detail below with reference to the accompanying drawings.

[0037] Figure 1 The diagram shown is a schematic diagram of the lead frame structure in one embodiment of this application.

[0038] Please see Figure 1 and Figure 2A lead frame 100 includes a first base island 110, a second base island 120, and a pin array 130. It should be noted that the lead frame 100, as a chip carrier for integrated circuits, is a key structural component that uses bonding materials (such as gold wire, aluminum wire, or copper wire) to achieve electrical connections between the internal circuit leads of the chip and external leads, forming an electrical circuit and acting as a bridge connecting to external wires. In this embodiment, the chip includes two types of chips: a storage control chip 210 and a Flash 220 (which can also be called a storage chip). When the storage control chip 210 is connected to the Flash 220, the storage control chip 210 can control the Flash 220 to complete data reading and writing operations using its internal firmware.

[0039] The first base island 110 provides a mounting location for the storage control chip 210, which is mounted within the first base island 110. In this embodiment, the bottom of the first base island 110 is a large area of ​​tin-plated copper sheet, which serves as a heat conductor. When the storage control chip 210 is working, it inevitably generates heat, and the tin-plated copper sheet in the first base island 110 can effectively transfer this heat to the outside, thus dissipating heat from the storage control chip 210.

[0040] Similarly, the second base island 120 also provides a mounting location for the Flash 220, which is installed within the second base island 120. In this embodiment, the bottom of the second base island 120 is also a large area of ​​tin-plated copper sheet, which serves as a heat conductor. The heat generated by the Flash 220 during operation is transferred to the outside through the tin-plated copper sheet in the second base island 120, thus completing the heat dissipation of the Flash 220.

[0041] Pin array 130 serves as the pads of lead frame 100, connecting to external devices. It is a common pin for memory controller chip 210 and Flash 220. External devices can communicate with memory controller chip 210 and Flash 220 via pin array 130 to complete data transmission. In this embodiment, pin array 130 is distributed around the first base island 110.

[0042] In this embodiment, due to the arrangement of the first base island 110 and the second base island 120, the lead frame 100 can simultaneously integrate two types of chips: the storage control chip 210 and the Flash 220. The lead frame 100 can be packaged to manufacture an SSD module. The storage control chip 210 and the Flash 220 do not need to be packaged and assembled separately into an SSD module, which reduces the manufacturing difficulty of the SSD module and can effectively reduce the packaging cost of the SSD device.

[0043] Further, as a preferred embodiment, the pin array 130 includes a power supply pin 131, a signal pin 132, and a ground pin 133, wherein the power supply pin 131, which is connected to the Flash 220, extends from one end of the lead frame 100 to the other end of the lead frame 100 and is located between the first base island 110 and the second base island 120.

[0044] In this embodiment, the pin array 130 can be mainly divided into three types according to its type: power supply pin 131, signal pin 132, and ground pin 133. Power supply pin 131 is used to output or input voltage signals to power the storage control chip 60 or Flash 220. Signal pin 132 is a pin connected to external devices, used to send or receive signals such as data, commands, and addresses. Ground pin 133 is the grounding pin for the storage control chip 210 and Flash 220, used to provide a common reference potential, improve circuit stability, and reduce external signal interference.

[0045] In addition, considering that the read / write performance and stability of SSD devices are important factors affecting price, and Flash220 is a major influencing factor, the power supply stability of Flash220 is particularly important. In this embodiment, the power supply pins of the lead frame are optimized in the following two aspects in terms of design distribution and structure.

[0046] 1) Power supply pin 131, which connects to the Flash220, extends from one end of the lead frame 100 to the other end. See also... Figure 2 In this embodiment, the power supply pins 131 connected to the Flash 220 include FVCC and FVCCQ. Both of these power supply pins supply power to the Flash 220. Figure 2Viewed from above, the FVCC and FVCCQ power pins are elongated rectangular strips. Because the power pads for different Flash220 models are distributed in different locations, the power pads for some Flash70 models may be located on pads 1-3, or on pads 1, 10, and 22, or even on pads 20 and 30. This randomness in the power pad distribution means that if the power pins of the leadframe 100 are not designed as elongated rectangular strips, the bonding wire may need to span the entire length of the leadframe to reach the power pin during wire bonding. This excessively long bonding wire significantly increases the difficulty of wire bonding within the leadframe 100, thus reducing the wire bonding yield. In this embodiment, because the power pins extend from one end of the leadframe 100 to the other, even with the high randomness of the Flash220 power pad distribution, through-feed (Pad-to-Pad) wire bonding can still be achieved. For example, if the Flash220 has two power pads, namely pad 1 and pad 30, both pad 1 and pad 30 can be wire-connected to their nearest adjacent power pin 131. This effectively shortens the bonding wire length and improves the wire bonding yield.

[0047] 2) As one of the components affecting the stability of the SSD device, the power output quality of Flash220 is particularly important. In this embodiment, the length of the power pin 131 is longer than that of other types of pins. Such a pin design can improve in many aspects such as current carrying capacity, heat dissipation performance, filtering effect, electromagnetic compatibility and power stability, ensuring that Flash220 can receive a stable and clean power signal.

[0048] It should be noted that, Figure 2 and Figure 3 In the SSD module 200, the number of pins is not the same. Figure 2 and Figure 3 This is for illustrative purposes only. In actual applications, the number of pins in the unpackaged and packaged SSD modules 200 may be the same or different. This is because multiple pins of the same type can be brought out; these pins of the same type only need to be connected together before they are brought out.

[0049] In addition, Figure 2 The diagram only shows pins of types FVCC, FVCCQ, GND, and RXP. However, the SSD module 200 has many other pin types. Due to space limitations, a complete pin illustration of the SSD module 200 cannot be provided here, as this is related to the storage controller chip, Flash memory, and chip design. Common SSD module 200 pin types include: ALE, CLE, CMD, DATA, CE, VCC, and GND.

[0050] Figure 2 The diagram shown is a structural schematic of an SSD module according to one embodiment of this application.

[0051] Please see Figure 2 and Figure 3 An SSD module 200 includes: a storage controller chip 210, a Flash 220, and the aforementioned lead frame 100.

[0052] It should be noted that the storage controller chip 210 internally runs firmware related to the Flash 220. This firmware is essentially the "brain" of the storage controller chip 210, capable of performing corresponding operations based on the instructions and data received by the storage controller chip 210, such as controlling the Flash 220 to complete data reading and writing. The Flash 220 is the data storage location of the SSD module 200. The lead frame 100, as the chip carrier of the integrated circuit, provides the mounting location for the storage controller chip 210 and the Flash 220.

[0053] In this embodiment, the storage control chip 210 is mounted on the first base island 110, and the Flash is mounted on the second base island 120. The pads 211 of the storage control chip 210, the pads 221 of the Flash 220, and the pin array 130 are wire bonded together by the bonding wire 50 and packaged into a QFN packaged SSD module 200.

[0054] It should be noted that, due to the arrangement of the first base island 110 and the second base island 120, the lead frame 100 can integrate both the storage controller chip 210 and the Flash 220. The SSD module 200 can be manufactured by packaging the lead frame 100. The storage controller chip 210 and the Flash 220 do not need to be packaged and assembled separately into the SSD module 200, which reduces the manufacturing difficulty of the SSD module 200 and can effectively reduce the packaging cost of the SSD device.

[0055] In addition, in this embodiment, since the lead frame 100 is a single-layer frame, the cost will be lower compared to lead frames with double or multi-layer frames.

[0056] Furthermore, the SSD module 200 of this application can simplify the production difficulty for SSD device manufacturers. Since the storage controller chip 210 and Flash 220 are integrated into the same lead frame 100 and packaged, the SSD module 200 is equivalent to being packaged into a single chip with data storage function. If SSD device manufacturers want to use the SSD module 200 to process and produce SSD devices, they can directly manufacture them with PCB and peripheral components, which can greatly facilitate the production and manufacturing of application end.

[0057] Please see Figure 5 Furthermore, as a preferred embodiment, the pad 211 for the wire bonding between the memory controller chip 210 and the Flash 220 is located on one side of the power supply pin 131; the pad 221 for the wire bonding between the Flash 220 and the memory controller chip 210 is located on the other side of the power supply pin 131.

[0058] It should be noted that, in order to maximize the wire bonding yield, the pads connecting the memory controller chip 210 and the Flash 220 should be positioned as close as possible to shorten the length of the bonding wire 50, thereby increasing the wire bonding yield and reducing production costs.

[0059] Please see Figure 5 Furthermore, as a preferred embodiment, the storage control chip 210 is provided with a gating module 212. The gating module 212 is used to adjust the signal type of the pad 211 of the storage control chip 210 so that the storage control chip 211 can match the signal type of the pad 221 of the Flash 220 to achieve through wire bonding.

[0060] In practical applications, the pad distribution of Flash220 varies depending on the Flash220 model. However, SSD module manufacturers cannot guarantee a fixed number of Flash220 models purchased within a given timeframe. If the pad distribution of the storage controller chip 210 does not correspond to that of the Flash220 (i.e., straight-through wiring is not possible), cross-wiring is required. For example, if the storage controller chip 210's ALE is located on pad 1 and its CLE is located on pad 20, while the Flash220's ALE is located on pad 20 and its CLE is located on pad 1, then connecting the storage controller chip 210's ALE to the Flash220's ALE, and connecting the storage controller chip 210's CLE to the Flash220's CLE, straight-through wiring is not possible; cross-wiring is the only option. Since wire bonding is a highly precise operation, cross-bonding greatly increases the overall difficulty of wire bonding. Even if the wires are successfully bonded, the two intersecting bonding wires can easily come into contact accidentally. Therefore, cross-bonding should be avoided as much as possible when producing SSD modules 200.

[0061] Therefore, based on the above situation, the storage control chip 220 of this embodiment is internally equipped with a gating module 212. The gating module 212 is used to adjust the signal type of the pads 211 of the storage control chip 210, so that the storage control chip 211 can match the signal type of the pads 221 of the Flash 220, thereby achieving through-wire bonding. Continuing with the above example, the ALE of the storage control chip 210 is located on the first pad, and the CLE is located on the 20th pad. After adjustment by the gating module 212, the pad distribution of the storage control chip 210 changes as follows:

[0062] ALE, before adjustment: pad 1; after adjustment: pad 20.

[0063] CLE, before adjustment: pad 20; after adjustment: pad 1.

[0064] At this point, the pads 211 corresponding to ALE and CLE of the storage control chip 210 correspond to the pads 221 corresponding to ALE and CLE of the Flash 220, enabling straight-through wire bonding. The setting of the gating module 212 can effectively handle the above situation, improve the wire bonding yield, and avoid cross-bonding.

[0065] Further, please refer to Figure 6 and Figure 7 In this embodiment, the selection module 212 includes a control unit 2121 and multiple path selection units 2122. The control terminal of the control unit 2121 is connected to the multiple path selection units 2122. The path selection unit 2122 includes a multiplexer 2122a and multiple I / O paths 2122b. The access terminal of the multiplexer 2122a is connected to the I / O port 213 corresponding to the storage control chip 210. The multiplexer 2122a receives signals from the control unit 2121 so that the selection terminal of the multiplexer 2122a is connected to one end of one of the I / O paths 2122b, and the other end of each I / O path 2122b is connected to the pad 212 corresponding to the storage control chip 210.

[0066] Figure 6 and Figure 7The storage controller chip 210 shown has four I / O ports: ALE, CLE, CMD, and Reset. Following standard internal wiring, the ALE port connects to the first pad, the CLE port to the second pad, the CMD port to the third pad, and the Reset port to the fourth pad. On the Flash 220 side, the first pad is CLE, the second is ALE, the third is CMD, and the fourth is Reset. It can be observed that for the storage controller chip 210 to communicate normally with the Flash 220, the signal types corresponding to the pad positions should be consistent. Furthermore, considering pad-to-pad bonding, given the current pad type distribution of the storage controller chip 210, pad-to-pad bonding is impossible, and the bonding wires for ALE and CLE will overlap. At this point, the control unit 2121 can control the path selection unit 2122 corresponding to ALE and CLE, and control the multiplexer 2122a to select one of the I / O paths 2122b, thereby swapping the pad positions of the ALE and CLE ports. Each multiplexer 2122a corresponds to 4 I / O paths 2122b. The multiplexer 2122a corresponding to ALE selects the second I / O path 2122b for connection, and the multiplexer 2122a corresponding to CLE selects the first I / O path 2122b for connection. The other two ports remain unchanged, thus realizing the swapping of the pad positions of ALE and CLE, making the pad signal types of the storage control chip 210 and Flash 220 match each other, thereby realizing pass-through bonding (Pad to Pad).

[0067] The above examples serve only as illustrative of the principles. In practical applications, the signal types of the storage control chip 210 are diverse, but not limited to the four types listed in the examples above. The number of I / O paths 2122b should be consistent with the number of I / O ports of the storage control chip 210. For example, if the storage control chip 210 has 20 types of I / O ports, then each path selection unit 2122 should have 20 I / O paths 2122b, thus enabling the position switching of the 20 I / O ports.

[0068] Please see Figure 2 Furthermore, as a preferred embodiment, there are multiple Flash 220s, which are stacked and staggered to form a stepped storage cell structure 220a. The same type of pads of the multiple Flash 220s are connected by bonding wires 50.

[0069] It should be noted that in this embodiment, the number of Flash 220s can be multiple. When multiple Flash 220s are integrated into the same lead frame 100, the Flash 220s are stacked and staggered to form a stepped storage cell structure 220a. The staggered distribution allows the pads of the Flash 220s to be exposed for wire bonding via bonding wires 50. Pads of the same type can be connected using bonding wires 50. Integrating multiple Flash 220s can increase the capacity of the SSD module 200.

[0070] Please see Figure 3 Furthermore, in a preferred embodiment, the two ends of the power pin 131 are not covered by the adhesive 131a. It should be noted that after the lead frame 100 is fitted with the storage controller chip 210 and Flash 220, it can be packaged. In this embodiment, QFN packaging is used to package the SSD module 200. Regarding the packaging of the power pin 131 of the lead frame 100, since the power pin 131 is a long rectangular strip, and during the application and installation of the SSD module 200, the power pin 131 only needs to have its two ends exposed for surface mounting, therefore, the portion of the power pin 131 other than its two ends can be covered with adhesive, which can protect the power pin 131.

[0071] In this embodiment, the first base island 110, the second base island 120, and the pin array 130 are distributed around the first base island 110, enabling the SSD module 200 to be packaged using QFN packaging, which is more cost-effective than BGA packaging. Existing SSD modules 220 on the market are individually packaged with the storage controller chip 210 and Flash 220, resulting in high packaging costs (especially when multiple Flash 220 chips are needed, the packaging cost increases significantly). This embodiment integrates the storage controller chip 210 and Flash 220 into the lead frame 100 before unified packaging. This embodiment only requires the cost of one package to produce the SSD module 200, eliminating the need for multiple package costs. Furthermore, the storage controller chip 210 in this embodiment has custom I / O functionality. The pad definition of the storage controller chip 210 can be customized to match the pad definition of the Flash 220, enabling through-hole bonding. This allows the storage controller chip 210 to be compatible with more Flash 220 models.

[0072] Figure 4 The diagram shown is a structural schematic of an SSD device according to an embodiment of this application.

[0073] Please see Figure 4An SSD device 10 includes: a PCB 20, peripheral components (not shown), a housing 30, and an SSD module 200 as described above. The peripheral components and the SSD module 200 are jointly surface-mounted to the PCB 20, and the PCB 20 is mounted inside the housing 30 to form the SSD device 10.

[0074] It should be noted that for descriptions of the functional characteristics and effects of the SSD module 200, lead frame 100, and storage controller chip 210, please refer to the previous text, and will not be repeated here.

[0075] Please see Figure 4 In this embodiment, the PCB20 is provided with a gold finger 21, which is the interface of the SSD device. External devices communicate and interact with the SSD device 10 through the gold finger 21.

[0076] In this embodiment, since the SSD module 200 has been packaged as a whole, the SSD device manufacturer only needs to directly mount the SSD module 200 and peripheral components onto the PCB 20 to produce the SSD device 10. The production process is simple and does not involve too many complicated steps, which greatly improves the production efficiency of the SSD device 10.

[0077] The various embodiments of this application have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or improvement of the technology in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A lead frame, characterized in that, include: The first base island is used to install the storage control chip; The second base island is used to install Flash; A pin array, wherein the pin array is distributed around the first base island.

2. The lead frame according to claim 1, characterized in that, The pin array includes power pins, signal pins, and ground pins, wherein the power pins connected to the Flash extend from one end of the lead frame to the other end of the lead frame and are located between the first base island and the second base island.

3. An SSD module, characterized in that, include: The storage controller chip, the flash memory, and the lead frame as described in claim 1 or 2; The storage control chip is mounted on the first base island, and the Flash is mounted on the second base island. The pads of the storage control chip, the pads of the Flash, and the pin array are wire bonded together by bonding wires and packaged into the QFN packaged SSD module.

4. The SSD module according to claim 3, characterized in that: The pads on which the memory control chip is bonded to the Flash wire are located on one side of the power supply pin; the pads on which the Flash wire is bonded to the memory control chip are located on the other side of the power supply pin.

5. The SSD module according to claim 4, characterized in that, The storage control chip has a gating module inside, which is used to adjust the signal type of the pads of the storage control chip so that the storage control chip can match the signal type of the pads of the Flash, thereby realizing through wire bonding.

6. The SSD module according to claim 5, characterized in that, The selection module includes a control unit and multiple path selection units. The control terminal of the control unit is connected to the multiple path selection units. Each path selection unit includes a multiplexer and multiple I / O paths. The access terminal of the multiplexer is connected to the I / O port corresponding to the storage control chip. The multiplexer receives a signal from the control unit so that the selection terminal of the multiplexer is connected to one end of one of the I / O paths, and the other end of each I / O path is connected to the pad corresponding to the storage control chip.

7. The SSD module according to claim 6, characterized in that, There are multiple Flash memory modules, which are stacked and staggered to form a stepped storage cell structure. The pads of the same type of Flash memory modules are connected by bonding wires.

8. The SSD module according to claim 7, characterized in that, The two ends of the power supply pin are not covered by the colloid.

9. An SSD device, characterized in that, include: PCB, peripheral components, housing, and the SSD module as described in any one of claims 3 to 8; The peripheral components and the SSD module are jointly surface-mounted to the PCB, and the PCB is installed inside the housing to form the SSD device.

10. The SSD device according to claim 9, characterized in that: The PCB has gold fingers.

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