Multi-state output circuit and fault detection device
By designing a three-state signal for the multi-state output circuit, the problem of level contention when multiple devices are connected in parallel is solved, thereby improving the accuracy and reliability of fault detection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN ZHAOWEI MACHINERY&ELECTRONICS CO LTD
- Filing Date
- 2026-02-02
- Publication Date
- 2026-05-05
AI Technical Summary
Existing fault status outputs generally use a binary output mechanism. When multiple devices are connected in parallel to the same diagnostic bus, level contention can easily occur, affecting fault detection efficiency.
The system employs a multi-state output circuit, including a main control module and a multi-state output module. It uses three diagnostic signals (a first preset level signal, a second preset level signal, and a high-impedance signal) to distinguish between the normal, fault, and offline states of the device, thus avoiding level contention.
It enables clear differentiation of equipment status, avoids voltage level competition, and improves the accuracy of fault detection and the reliability of the system.
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Figure CN121979004A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic circuit technology, and more specifically, to a multi-state output circuit and a fault detection device. Background Technology
[0002] Existing fault status outputs generally use a binary output mechanism, with the fault output interface only having two states: high and low. This dual-state output can meet basic requirements when detecting faults in independently operating single devices, but when multiple devices are connected in parallel to the same diagnostic bus and different devices report faults simultaneously, level contention will occur, thus affecting fault detection efficiency. Summary of the Invention
[0003] In view of this, the purpose of this application is to overcome the shortcomings of the prior art and provide a multi-state output circuit and a fault detection device. This application provides the following technical solution: In a first aspect, this application provides a multi-state output circuit, the circuit comprising: a main control module and a multi-state output module; The multi-state output module is electrically connected to the power supply, the main control module, and the fault diagnosis bus, respectively. The main control module is also electrically connected to the device under test; The main control module is used to send control signals to the multi-state output module in response to the working state of the device under test; The multi-state output module is used to determine a diagnostic signal based on the control signal and send the diagnostic signal to the fault diagnosis bus. The diagnostic signal includes: a first preset level signal, a second preset level signal, or a high impedance signal.
[0004] In one embodiment, the control signal includes: a first control signal and a second control signal; The main control module is used to send the first control signal and the second control signal to the multi-state output module in response to the working state of the device under test; The multi-state output module is used to send the first preset level signal to the fault diagnosis bus if the first control signal is at a first preset level and the second control signal is at a second preset level. The fault diagnosis bus determines the working state of the device under test as normal based on the first preset level signal.
[0005] In one embodiment, the multi-state output module is further configured to send a second preset level signal to the fault diagnosis bus if the first control signal is the second preset level and the first control signal is the first preset level, and the fault diagnosis bus determines the working state of the device under test as a fault state based on the first preset level signal.
[0006] In one embodiment, the control signal includes: a first control signal and a second control signal; The main control module is used to send the first control signal and the second control signal to the multi-state output module in response to the working state of the device under test; The multi-state output module is used to send a second preset level signal to the fault diagnosis bus if the first control signal is a second preset level and the second control signal is a first preset level. The fault diagnosis bus determines the working state of the device under test as normal based on the second preset level signal.
[0007] In one embodiment, the multi-state output module is further configured to send the first preset level signal to the fault diagnosis bus if the first control signal is the first preset level and the second control signal is the second preset level, and the fault diagnosis bus determines the working state of the device under test as a fault state based on the first preset level signal.
[0008] In one embodiment, the multi-state output module is further configured to send the high-impedance signal to the fault diagnosis bus if the first control signal is at the second preset level and the second control signal is at the second preset level, and the fault diagnosis bus determines that the working state of the device under test is offline based on the high-impedance signal.
[0009] In one embodiment, the multi-state output module includes: a first switch, a second switch, and a third switch; The input terminal of the first switching transistor is electrically connected to the power supply, the output terminal of the first switching transistor is electrically connected to the fault diagnosis bus and the input terminal of the third switching transistor, and the control terminal of the first switching transistor is electrically connected to the input terminal of the second switching transistor. The output terminal of the second switching transistor is grounded, and the control terminal of the second switching transistor is electrically connected to the main control module. The output terminal of the third switch is grounded, and the control terminal of the third switch is electrically connected to the main control module. The main control module is used to respond to the working state of the device under test by sending the first control signal to the control terminal of the first switch and the second control signal to the control terminal of the second switch. The second switch is configured to be turned on when the first control signal is at the first preset level, and turned off when the first control signal is at the second preset level; The third switch is configured to be turned on when the second control signal is at the first preset level, and turned off when the second control signal is at the second preset level. The first switch is configured to be turned on when the second switch is turned on and the third switch is turned off, and the output of the first switch sends a first preset level signal to the fault diagnosis bus; to be turned off when the second switch is turned off and the third switch is turned on, and the output of the first switch sends a second preset level signal to the fault diagnosis bus; and to send a high impedance signal to the fault diagnosis bus when the second switch is turned off and the third switch is turned off.
[0010] In one embodiment, the multi-state output module further includes: a first current-limiting resistor, a second current-limiting resistor, and a third current-limiting resistor; The first current-limiting resistor is electrically connected to the control terminal of the first switching transistor and the input terminal of the second switching transistor, respectively. The second current-limiting resistor is electrically connected to the control terminals of the main control module and the second switching transistor, respectively; The third current-limiting resistor is electrically connected to the control terminals of the main control module and the third switching transistor, respectively.
[0011] In one embodiment, the multi-state output module further includes: a first voltage divider resistor, a second voltage divider resistor, and a third voltage divider resistor; The first end of the first voltage divider resistor is electrically connected to the power supply and the input terminal of the first switching transistor, respectively, and the second end of the first voltage divider resistor is electrically connected to the control terminal of the first switching transistor. The first end of the second voltage divider resistor is electrically connected to the control terminal of the second switching transistor, the second end of the second voltage divider resistor is electrically connected to the output terminal of the second switching transistor, and the second end of the second voltage divider resistor is also grounded. The first end of the third voltage divider resistor is electrically connected to the control terminal of the third switch transistor, the second end of the third voltage divider resistor is electrically connected to the output terminal of the third switch transistor, and the third end of the third voltage divider resistor is also grounded.
[0012] Secondly, this application provides a fault detection device, the device comprising: a power supply and the multi-state output circuit described in any of the foregoing embodiments.
[0013] This application provides a multi-state output circuit and fault diagnosis device. The circuit includes a main control module and a multi-state output module. The multi-state output module is electrically connected to a power supply, the main control module, and a fault diagnosis bus. The main control module is also electrically connected to the device under test. The main control module is used to send a control signal to the multi-state output module in response to the working state of the device under test. The multi-state output module is used to determine a diagnostic signal based on the control signal and send the diagnostic signal to the fault diagnosis bus. The diagnostic signal includes a first preset level signal, a second preset level signal, or a high-impedance signal. This application achieves tri-state output of the diagnostic signal, avoiding level competition when multiple devices are connected in parallel to the fault diagnosis bus, improving fault detection accuracy, and adapting to scenarios where multiple devices share the fault diagnosis bus.
[0014] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description
[0015] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 A schematic diagram of a multi-state output circuit provided in an embodiment of this application is shown; Figure 2 A circuit diagram of a polymorphic output module provided in an embodiment of this application is shown; Figure 3 A schematic diagram of the fault detection device provided in an embodiment of this application is shown.
[0017] Explanation of key component symbols: 100 - Multi-state output circuit; 110 - Main control module; 120 - Multi-state output module; 200 - Power supply; 300 - Device under test; 400 - Fault diagnosis bus; Q1 - First switching transistor; Q2 - Second switching transistor; Q3 - Third switching transistor; R1 - First current limiting resistor; R2 - Second current limiting resistor; R3 - Third current limiting resistor; R4 - First voltage divider resistor; R5 - Second voltage divider resistor; R6 - Third voltage divider resistor; 500 - Fault detection device. Detailed Implementation
[0018] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.
[0019] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.
[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the template description is for the purpose of describing particular embodiments only and is not intended to limit the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0021] Example 1 Existing fault detection circuits typically employ binary output, meaning the fault output terminal can only present two states: high and low, indicating the normal or faulty state of the device under test, respectively. This dual-state output exhibits significant drawbacks in multi-device systems sharing a diagnostic bus: when different devices report faults simultaneously, level contention occurs. For further details, please refer to [link to relevant documentation]. Figure 1 This application provides a multi-state output circuit 100, including a main control module 110 and a multi-state output module 120; the multi-state output module 120 is electrically connected to a power supply 200, the main control module 110 and a fault diagnosis bus 400 respectively; the main control module 110 is also electrically connected to a device under test 300; The main control module 110 is used to send control signals to the multi-state output module 120 in response to the working state of the device under test 300. The multi-state output module 120 is used to determine a diagnostic signal based on the control signal and send the diagnostic signal to the fault diagnosis bus 400. The diagnostic signal includes: a first preset level signal, a second preset level signal, or a high impedance signal.
[0022] In this embodiment, the main control module 110 monitors the working status of the device under test 300 in real time and sends a control signal to the multi-state output module 120 according to the working status of the device under test 300, so as to control the multi-state output module 120 to output diagnostic signals representing different working states of the device under test 300 according to the control signal. The diagnostic signals include: a first preset level signal, a second preset level signal and a high impedance state signal.
[0023] It is understandable that traditional dual-state output can only output a high or low level. When multiple devices under test 300 are connected in parallel to the same fault diagnosis bus 400, if some devices output a high level and some devices output a low level, level contention will occur. In this embodiment, a "high impedance state" is added by the multi-state output module 120 to disconnect the device under test 300 from the fault diagnosis bus 400. When multiple devices under test 300 are connected in parallel to the same diagnostic bus, devices that are not faulty or do not need to report status output a high impedance state and are disconnected from the fault diagnosis bus 400. Only devices that need to report status output a high or low level signal, thereby avoiding level contention caused by multiple devices reporting status at the same time.
[0024] It should be noted that the operating states of the device under test 300 include: normal state, fault state, or offline state. The first preset level signal, the second preset level signal, and the high impedance signal output by the multi-state output module 120 correspond to different operating states of the device under test 300, respectively.
[0025] In one embodiment, the control signal includes: a first control signal and a second control signal; The main control module 110 is used to send the first control signal and the second control signal to the multi-state output module 120 in response to the working state of the device under test 300. The multi-state output module 120 is used to send the first preset level signal to the fault diagnosis bus 400 if the first control signal is at a first preset level and the second control signal is at a second preset level. The fault diagnosis bus 400 determines that the working state of the device under test 300 is normal based on the first preset level signal.
[0026] In this embodiment, the multi-state output module 120 includes two input terminals, one is the ERR-PNP terminal and the other is the ERR-NPN terminal. The main control module 110 sends a first control signal to the ERR-PNP terminal and a second control signal to the ERR-NPN terminal according to the working state of the device under test 300.
[0027] If the polymorphic output module 120 operates in PNP (Positive-Negative-Positive) mode, when the device under test 300 is in a normal state, the main control module 110 sets ERR-PNP to the first preset level (high level) and ERR-NPN to the second preset level (low level). At this time, the polymorphic output module 120 outputs the first preset level signal (high level) by default. The fault diagnosis bus 400 can determine that the device under test 300 is in a normal state based on the high-level signal.
[0028] In one embodiment, the multi-state output module 120 is further configured to send a second preset level signal to the fault diagnosis bus 400 if the first control signal is the second preset level and the first control signal is the first preset level, and the fault diagnosis bus 400 determines the working state of the device under test 300 as a fault state based on the first preset level signal.
[0029] If the multi-state output module 120 operates in PNP mode, when the device under test 300 is in a fault state, the main control module 110 sets ERR-PNP to the second preset level (low level) and ERR-NPN to the first preset level (high level). At this time, the multi-state output module 120 outputs the second preset level signal by default, i.e., a low level signal. The fault diagnosis bus 400 can determine that the device under test 300 is in a fault state based on the low level signal.
[0030] In one embodiment, the control signal includes: a first control signal and a second control signal; The main control module 110 is used to send the first control signal and the second control signal to the multi-state output module 120 in response to the working state of the device under test 300. The multi-state output module 120 is used to send a second preset level signal to the fault diagnosis bus 400 if the first control signal is a second preset level and the second control signal is a first preset level. The fault diagnosis bus 400 determines that the working state of the device under test 300 is normal based on the second preset level signal.
[0031] In this embodiment, if the polymorphic output module 120 operates in NPN (-Positive-Negative) mode, when the device under test 300 is in a normal state, the main control module 110 sets ERR-PNP to the second preset level (low level) and ERR-NPN to the first preset level (high level). At this time, the polymorphic output module 120 outputs the second preset level signal by default, i.e., a low level signal. The fault diagnosis bus 400 can determine that the device under test 300 is in a normal state based on the low level signal.
[0032] In one embodiment, the multi-state output module 120 is further configured to send the first preset level signal to the fault diagnosis bus 400 if the first control signal is the first preset level and the second control signal is the second preset level, and the fault diagnosis bus 400 determines the working state of the device under test 300 as a fault state based on the first preset level signal.
[0033] If the multi-state output module 120 operates in NPN mode, when the device under test 300 is in a fault state, the main control module 110 sets ERR-PNP to the first preset level (high level) and ERR-NPN to the second preset level (low level). At this time, the multi-state output module 120 outputs the first preset level signal (high level) by default. The fault diagnosis bus 400 can determine that the device under test 300 is in a fault state based on the high-level signal.
[0034] In one embodiment, the multi-state output module 120 is further configured to send the high-impedance signal to the fault diagnosis bus 400 if the first control signal is the second preset level and the second control signal is the second preset level, and the fault diagnosis bus 400 determines that the working state of the device under test 300 is offline based on the high-impedance signal.
[0035] In this embodiment, regardless of whether the multi-state output module 120 is operating in PNP mode or NPN mode, when both the first control signal and the second control signal are at the second preset level, i.e., low level, the multi-state output module 120 defaults to a high impedance state. At this time, the device under test 300 is disconnected from the fault diagnosis bus 400, and the status output signals of other devices connected in parallel with the device under test 300 on the same fault diagnosis bus 400 do not affect this device.
[0036] In one implementation, please refer to Figure 2 The multi-state output module 120 includes: a first switch Q1, a second switch Q2, and a third switch Q3; The input terminal of the first switch Q1 is electrically connected to the power supply 200, the output terminal of the first switch Q1 is electrically connected to the fault diagnosis bus 400 and the input terminal of the third switch Q3, and the control terminal of the first switch Q1 is electrically connected to the input terminal of the second switch Q2. The output terminal of the second switch Q2 is grounded, and the control terminal of the second switch Q2 is electrically connected to the main control module 110. The output terminal of the third switch Q3 is grounded, and the control terminal of the third switch Q3 is electrically connected to the main control module 110. The main control module 110 is used to send the first control signal to the control terminal of the first switch Q1 and the second control signal to the control terminal of the second switch Q2 in response to the working state of the device under test 300. The second switch Q2 is used to turn on when the first control signal is the first preset level and turn off when the first control signal is the second preset level; The third switch Q3 is used to turn on when the second control signal is the first preset level and turn off when the second control signal is the second preset level; The first switch Q1 is configured to be turned on when the second switch Q2 is turned on and the third switch Q3 is turned off, and the output of the first switch Q1 sends the first preset level signal to the fault diagnosis bus 400; to be turned off when the second switch Q2 is turned off and the third switch Q3 is turned on, and the output of the first switch Q1 sends the second preset level signal to the fault diagnosis bus 400; and to send a high impedance signal to the fault diagnosis bus 400 when the second switch Q2 is turned off and the third switch Q3 is turned off.
[0037] In this embodiment, please refer to Figure 2 , Figure 2 VIN represents the power supply 200, ERROR represents the output terminal of the multi-state output module 120, and the ERR-PNP terminal and ERR-NPN terminal are electrically connected to the main control module 110 respectively.
[0038] The main control module 110 responds to the working status of the device under test 300 by sending a first control signal and a second control signal to the control terminals of the second switch Q2 and the third switch Q3, respectively. The second switch Q2 is turned on when the first control signal is at a first preset level and turned off when it is at a second preset level. The third switch Q3 is turned on when the second control signal is at a first preset level and turned off when it is at a second preset level. Thus, a three-state output is achieved through the combination of switch states: when the second switch Q2 is turned on and the third switch Q3 is turned off, the first switch Q1 is turned on and sends a first preset level signal to the fault diagnosis bus 400; when the second switch Q2 is turned off and the third switch Q3 is turned on, the first switch Q1 is turned off and sends a second preset level signal; when both switches are turned off, the first switch Q1 outputs a high-impedance signal.
[0039] It is understandable that by combining the switching transistors, the multi-state output of the diagnostic signal of the multi-state output module 120 is realized. This not only satisfies the clear distinction between the three states of normal, fault, and offline, but also avoids level competition of output signals from different devices in the scenario of multiple devices sharing the diagnostic bus in parallel, thus ensuring the stability of the bus signal and improving the accuracy of fault diagnosis and system reliability.
[0040] In one embodiment, the multi-state output module 120 further includes: a first current-limiting resistor R1, a second current-limiting resistor R2, and a third current-limiting resistor R3; The first current-limiting resistor R1 is electrically connected to the control terminal of the first switch Q1 and the input terminal of the second switch Q2, respectively. The second current-limiting resistor R2 is electrically connected to the control terminals of the main control module 110 and the second switching transistor Q2, respectively; The third current-limiting resistor R3 is electrically connected to the control terminals of the main control module 110 and the third switching transistor Q3, respectively.
[0041] In this embodiment, circuit protection and signal stabilization are achieved based on the current limiting characteristics of each current limiting resistor: the second current limiting resistor R2 and the third current limiting resistor R3 can limit the drive current output from the main control module 110 to the control terminals of the second switch Q2 and the third switch Q3, so as to avoid the switch tubes being burned out due to excessive current; the first current limiting resistor R1 is used to limit the current flowing through the input terminal of the second switch Q2, so as to prevent the switch tube from being damaged or malfunctioning due to current overload.
[0042] It is understandable that by using current limiting protection, the operational safety and service life of each switch in the multi-state output module 120 are ensured, as well as the stability of control signal transmission, thereby maintaining the accuracy of the three-state output logic and providing further assurance for the reliability of fault diagnosis in multi-device parallel scenarios.
[0043] In one embodiment, the multi-state output module 120 further includes: a first voltage divider resistor R4, a second voltage divider resistor R5, and a third voltage divider resistor R6; The first end of the first voltage divider resistor R4 is electrically connected to the input terminal of the power supply 200 and the first switch Q1, respectively, and the second end of the first voltage divider resistor R4 is electrically connected to the control terminal of the first switch Q1. The first end of the second voltage divider resistor R5 is electrically connected to the control terminal of the second switch Q2, the second end of the second voltage divider resistor R5 is electrically connected to the output terminal of the second switch Q2, and the second end of the second voltage divider resistor R5 is also grounded. The first end of the third voltage divider resistor R6 is electrically connected to the control terminal of the third switch Q3, the second end of the third voltage divider resistor R6 is electrically connected to the output terminal of the third switch Q3, and the third end of the third voltage divider resistor R6 is also grounded.
[0044] In this embodiment, the first voltage divider resistor R4 provides a suitable bias voltage to the control terminal of the first switch Q1, ensuring accurate switching between its on and off states. The second voltage divider resistor R5 and the third voltage divider resistor R6 provide stable voltages to the control terminals of the second switch Q2 and the third switch Q3, respectively, preventing false triggering of the switches due to fluctuations in the control signal voltage. Furthermore, the grounding design further stabilizes the voltage level signal. In addition, the multi-state output module 120 also includes a fuse F1 for overcurrent protection of the output terminal of the multi-state output module 120.
[0045] It is understandable that by using voltage divider configuration, the reliability and switching accuracy of the working state of each switch are ensured, and output signal disorder caused by abnormal voltage is avoided. It also further consolidates the stability of the three-state output logic, ensures the accuracy of fault detection when multiple devices are connected in parallel and share the diagnostic bus, and improves the overall anti-interference capability and operational reliability of the circuit.
[0046] The multi-state output circuit 100 provided in this application embodiment includes: a main control module 110 and a multi-state output module 120; the multi-state output module 120 is electrically connected to a power supply 200, the main control module 110, and a fault diagnosis bus 400; the main control module 110 is also electrically connected to a device under test 300; the main control module 110 is used to send a control signal to the multi-state output module 120 in response to the working state of the device under test 300; the multi-state output module 120 is used to determine a diagnostic signal according to the control signal and send the diagnostic signal to the fault diagnosis bus 400, the diagnostic signal including: a first preset level signal, a second preset level signal, or a high impedance state signal. This application realizes the tri-state output of the diagnostic signal, avoids level competition when multiple devices are connected in parallel to the fault diagnosis bus 400, improves the fault detection accuracy, and adapts to scenarios where multiple devices share the fault diagnosis bus 400.
[0047] Example 2 In addition, please see Figure 3 This application also provides a fault detection device 500, including: a power supply 200 and the multi-state output circuit 100 described in Embodiment 1.
[0048] The power supply 200 is electrically connected to the multi-state output circuit 100, which is also electrically connected to the fault diagnosis bus 400. The device under test 300 is electrically connected to the multi-state output circuit 100. The multi-state output circuit 100 outputs different operating states of the device under test 300 to the fault diagnosis bus 400, and the fault diagnosis bus 400 performs fault diagnosis based on the different signals output by the multi-state output circuit 100.
[0049] The fault detection device 500 provided in this application embodiment can achieve the functions of the fault detection device 500 provided in Embodiment 1 above. To avoid repetition, it will not be described again here.
[0050] This application implements a three-state output of diagnostic signals, avoiding level contention when multiple devices are connected in parallel to the fault diagnosis bus 400, improving fault detection accuracy, and adapting to scenarios where multiple devices share the fault diagnosis bus 400.
[0051] In all examples shown and described herein, any specific values should be interpreted as merely exemplary and not as limitations; therefore, other examples of exemplary embodiments may have different values.
[0052] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0053] The above-described embodiments are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention.
Claims
1. A multi-state output circuit, characterized in that, The circuit includes: a main control module and a multi-state output module; The multi-state output module is electrically connected to the power supply, the main control module, and the fault diagnosis bus, respectively. The main control module is also electrically connected to the device under test; The main control module is used to send control signals to the multi-state output module in response to the working state of the device under test; The multi-state output module is used to determine a diagnostic signal based on the control signal and send the diagnostic signal to the fault diagnosis bus. The diagnostic signal includes: a first preset level signal, a second preset level signal, or a high impedance signal.
2. The multi-state output circuit according to claim 1, characterized in that, The control signal includes: a first control signal and a second control signal; The main control module is used to send the first control signal and the second control signal to the multi-state output module in response to the working state of the device under test; The multi-state output module is used to send the first preset level signal to the fault diagnosis bus if the first control signal is at a first preset level and the second control signal is at a second preset level. The fault diagnosis bus determines the working state of the device under test as normal based on the first preset level signal.
3. The multi-state output circuit according to claim 2, characterized in that, The multi-state output module is further configured to send a second preset level signal to the fault diagnosis bus if the first control signal is the second preset level and the first control signal is the first preset level. The fault diagnosis bus determines the working state of the device under test as a fault state based on the first preset level signal.
4. The multi-state output circuit according to claim 1, characterized in that, The control signal includes: a first control signal and a second control signal; The main control module is used to send the first control signal and the second control signal to the multi-state output module in response to the working state of the device under test; The multi-state output module is used to send a second preset level signal to the fault diagnosis bus if the first control signal is a second preset level and the second control signal is a first preset level. The fault diagnosis bus determines the working state of the device under test as normal based on the second preset level signal.
5. The multi-state output circuit according to claim 4, characterized in that, The multi-state output module is further configured to send the first preset level signal to the fault diagnosis bus if the first control signal is the first preset level and the second control signal is the second preset level, and the fault diagnosis bus determines the working state of the device under test as a fault state based on the first preset level signal.
6. The multi-state output circuit according to any one of claims 2-5, characterized in that, The multi-state output module is further configured to send the high-impedance signal to the fault diagnosis bus if the first control signal is at the second preset level and the second control signal is at the second preset level, and the fault diagnosis bus determines the working state of the device under test as offline based on the high-impedance signal.
7. The multi-state output circuit according to claim 6, characterized in that, The multi-state output module includes: a first switch, a second switch, and a third switch; The input terminal of the first switching transistor is electrically connected to the power supply, the output terminal of the first switching transistor is electrically connected to the fault diagnosis bus and the input terminal of the third switching transistor, and the control terminal of the first switching transistor is electrically connected to the input terminal of the second switching transistor. The output terminal of the second switching transistor is grounded, and the control terminal of the second switching transistor is electrically connected to the main control module. The output terminal of the third switch is grounded, and the control terminal of the third switch is electrically connected to the main control module. The main control module is used to respond to the working state of the device under test by sending the first control signal to the control terminal of the first switch and the second control signal to the control terminal of the second switch. The second switch is configured to be turned on when the first control signal is at the first preset level, and turned off when the first control signal is at the second preset level; The third switch is configured to be turned on when the second control signal is at the first preset level, and turned off when the second control signal is at the second preset level. The first switch is configured to be turned on when the second switch is turned on and the third switch is turned off, and the output of the first switch sends a first preset level signal to the fault diagnosis bus; to be turned off when the second switch is turned off and the third switch is turned on, and the output of the first switch sends a second preset level signal to the fault diagnosis bus; and to send a high impedance signal to the fault diagnosis bus when the second switch is turned off and the third switch is turned off.
8. The multi-state output circuit according to claim 7, characterized in that, The multi-state output module further includes: a first current-limiting resistor, a second current-limiting resistor, and a third current-limiting resistor; The first current-limiting resistor is electrically connected to the control terminal of the first switching transistor and the input terminal of the second switching transistor, respectively. The second current-limiting resistor is electrically connected to the control terminals of the main control module and the second switching transistor, respectively; The third current-limiting resistor is electrically connected to the control terminals of the main control module and the third switching transistor, respectively.
9. The multi-state output circuit according to claim 8, characterized in that, The multi-state output module further includes: a first voltage divider resistor, a second voltage divider resistor, and a third voltage divider resistor; The first end of the first voltage divider resistor is electrically connected to the power supply and the input terminal of the first switching transistor, respectively, and the second end of the first voltage divider resistor is electrically connected to the control terminal of the first switching transistor. The first end of the second voltage divider resistor is electrically connected to the control terminal of the second switching transistor, the second end of the second voltage divider resistor is electrically connected to the output terminal of the second switching transistor, and the second end of the second voltage divider resistor is also grounded. The first end of the third voltage divider resistor is electrically connected to the control terminal of the third switch transistor, the second end of the third voltage divider resistor is electrically connected to the output terminal of the third switch transistor, and the third end of the third voltage divider resistor is also grounded.
10. A fault detection device, characterized in that, The device includes: a power supply and the multi-state output circuit according to any one of claims 1-9.