Long-distance high-precision timing system and method based on time-triggered Ethernet

Abstract

According to the long-distance high-precision time service system and method based on the time-triggered Ethernet, absolute time synchronization of one master and multiple slaves in a domain is achieved on the basis of being compatible with the standard of the time-triggered Ethernet, the system and method can be used for the single time reference of the whole network, a plurality of time synchronization master nodes can also be arranged according to subsystems, and the time synchronization efficiency is improved. The subsystems use respective time reference sources and time formats and do not interfere with one another; the redundancy time synchronization based on the priority can be conveniently realized only by deploying a plurality of time synchronization master nodes using the same time format in the whole network, and a plurality of time reference redundancies can be set and work simultaneously, so that the synchronization reliability is improved.

Description

Technical Field

[0001] This invention belongs to the field of time synchronization technology, specifically relating to a long-distance high-precision time synchronization system and method based on time-triggered Ethernet. Background Technology

[0002] In embedded distributed measurement and control systems, industrial automation, and other fields, system devices are connected via Ethernet or other buses to form a network. All network nodes typically need to establish a unified time reference as the foundation for system collaboration, real-time data recording and analysis, and distributed computing. Based on their roles in the time synchronization process, network nodes are divided into master clocks and slave clocks. The master clock provides an absolute or relative time reference and transmits time to the slave clocks via the bus. Currently, commonly used time synchronization methods include bus network synchronization such as NTP, serial port time synchronization such as IRIG-B code, PPS second pulse + bus synchronization frame, and PTP, etc. Each method achieves different synchronization accuracy, implementation methods, and economics, and each has its applicable scenarios. NTP is suitable for systems with standard Ethernet connections. It requires no special hardware, but the software implementation is relatively complex. It is economical, but the synchronization accuracy is only at the sub-second level. Serial port timing methods, such as IRIG-B code, require dedicated hardware interface circuits on the end device. They are technically simpler, economical, and achieve synchronization accuracy at the millisecond level. The PPS second pulse + bus synchronization frame method requires dedicated interface circuits on the end device and dedicated connection cables in the system. It has a large hardware overhead, but is technically simple and economical, achieving synchronization accuracy at the sub-microsecond level. PTP and other synchronization methods based on 1588v2 do not require hardware second pulse synchronization signals, but require underlying chips that support 1588v2. They are technically complex and costly, but can achieve synchronization accuracy at the sub-microsecond level.

[0003] Time-triggered Ethernet (TTE) is a high-determinism communication bus based on the AS6802 protocol. It is a novel bus technology in the field of embedded distributed measurement and control, primarily used in high-end equipment such as aviation and aerospace. The AS6802 protocol, based on the 1588v2 protocol, uses multiple selected TTE end nodes as synchronization masters (SMs) to provide clock sources. It utilizes a fault-tolerant clock synchronization algorithm to generate a global synchronization clock from the clock information of multiple SMs and broadcasts it, thereby achieving high-precision relative synchronization of all nodes in the network. However, it cannot achieve absolute time synchronization of all nodes in the network. Patents CN111083776A, "TTE Time Synchronization Method Based on 1588 and AS6802 Protocols," and CN118487748A, "A Time-triggered Ethernet Clock Synchronization Method and System Based on an External Clock Source," while achieving absolute time synchronization of the entire network, modify the TTE PCF synchronization frame format and synchronization mechanism, making them incompatible with the original standard. Summary of the Invention

[0004] The purpose of this invention is to solve the problems existing in the prior art, including: 1) While being compatible with the existing AS6802 standard and TTE bus specification, adding absolute time, quasi-second pulse reception, relative clock capture and alignment, and frame transmission functions to the master clock node to achieve alignment of absolute time with the global clock of the TTE network; adding absolute time and quasi-second pulse recovery functions to the slave clock node; and the master clock node transmitting absolute time to the slave clock node through TT frame messages to solve the problem of absolute time synchronization between the master and slave clock nodes; 2) Utilizing the TT frame multicast mechanism, selective time synchronization can be performed, transmitting absolute time to multiple selected device nodes to solve the problem of one master clock node synchronizing time synchronization with multiple slave clock nodes; 3) In complex network systems, each subsystem can freely choose UTC, ATI, or other different formats of absolute time for time synchronization as needed. The time synchronization process of each subsystem is parallel and independent, without coupling or mutual influence, solving the problem of independent time synchronization using different time bases or formats in different domains of complex systems.

[0005] This invention provides a high-precision time synchronization system and method based on time-triggered Ethernet. The system includes:

[0006] Time-triggered Ethernet (TTE) serves as the time transmission bus for timing. It adopts the SAE AS6802 distributed fault-tolerant clock synchronization mechanism, which does not require a dedicated hard pulse signal. It can achieve clock synchronization of all network nodes within 100ns and, based on this global synchronization clock, enables mixed communication of three key message levels: TT frames, RC frames, and BE frames from high to low.

[0007] Time Synchronization Master Node: The remote time synchronization method based on time-triggered Ethernet first selects individual network nodes as time sources according to system usage requirements. The time synchronization master node is equipped with an external absolute time input interface, which can be connected to GNSS or other time reference sources to obtain accurate UTC or TAI time, etc.

[0008] Time synchronization slave node: corresponds to several nodes that receive time and correct their own time.

[0009] A time synchronization master node transmits time information to multiple time synchronization slave nodes via multicast messages. There can be any number of slave nodes. Note that the time synchronization master and slave nodes are independent of the master / slave settings of the TTE bus and AS6802, and can be selected according to the system's time synchronization requirements.

[0010] After receiving the external input time T1, the time synchronization master node immediately locks the exact second, records the cluster cycle accumulation value CP1, the integrated cycle accumulation value IP1, and the local transparent clock TC1 corresponding to the TTE global synchronization clock at this moment. The deviation between the absolute time and the TTE global synchronization clock can be known through the TTE bus global clock synchronization mechanism, thereby determining the absolute time value corresponding to any global synchronization clock.

[0011] The time synchronization master node frames the absolute time T1, cluster period cumulative count CP1, integration period cumulative count IP1, and node transparent clock cumulative count TC1 to transmit the time information to all time synchronization slave nodes of the selected multicast group; or, the time synchronization master node calculates the difference between the absolute time and the TTE global synchronization clock (T1-CP1-IP1-TC1) and then sends the time difference to the time synchronization slave nodes through a multicast message.

[0012] After receiving the time message, the time synchronization slave node queries the cluster cycle cumulative count CP2, the integrated cycle cumulative count IP2, and the node transparent clock cumulative count TC2 of the local global synchronization clock. Based on the received time message and the local global synchronization clock, it recovers the absolute time value T2 = T1 + CP2 + IP2 + TC2 - CP1 - IP1 - TC1. The time synchronization slave node then corrects its own time value accordingly, thereby achieving long-distance high-precision time synchronization between the time master and slave nodes.

[0013] The method of sending the difference in time synchronization frames ignores the global clock error caused by the time synchronization master node's time synchronization action and the time synchronization slave node's time synchronization action spanning multiple integration cycles. The process is simple and easy to implement. The method of sending all data such as the cluster cycle number, integration cycle number, transparent clock value, and UTC / ATI time in the time synchronization frames can compensate for the global clock error caused by recording the correction values ​​of multiple integration synchronizations. The design is quite complex, but the accuracy is higher.

[0014] Time synchronization begins with setting a timer within the node. The timer is calibrated based on the synchronized time and maintained according to the local crystal oscillator until the next calibration. The timer is divided into two parts: those at or above the second level and those below. Timers at or above the second level can use a real-time clock or an epoch-based second timer. The real-time clock includes values ​​for year, month, day, hour, minute, and second, while the second timer records the number of seconds from the epoch to the current moment. Timers below the second level provide high-precision timing down to the microsecond or even nanosecond level. During time synchronization, this timer is reset and restarted. It is also reset and restarted after one second, while the real-time clock or second timer increments by one second.

[0015] There are two ways to use time synchronization slave nodes: First, the application software accesses the timer through the TTE end system read / write interface, uses the read enable signal to trigger the recording of the current time, and transmits the recorded time to the application software through the TTE access interface; Second, the timer is set to output B code or C code to the serial port. When the countdown reaches the whole second, it immediately triggers the output of the second pulse square wave signal, and then the slave timer outputs the current time to the serial port.

[0016] A single time synchronization master node is typically set up for the entire network, with all subsystems using the same time base. Alternatively, multiple time synchronization master nodes can be set up, with each subsystem selecting its own time base to achieve independent time synchronization between systems. Multiple time synchronization master nodes can also serve as redundant time bases, simultaneously providing time synchronization slave nodes. The slave nodes select the time base according to a preset optimization strategy based on the time base accuracy level, time synchronization master node address, or virtual link number carried in the time message, achieving highly reliable redundant time synchronization.

[0017] The beneficial effects of this invention are as follows:

[0018] 1. This invention achieves absolute time synchronization of one master and multiple slaves within a domain based on compatibility with the time-triggered Ethernet standard, with a timing accuracy better than 800ns, covering all network nodes, simplifying system design, and is suitable for distributed control systems based on time-triggered Ethernet bus;

[0019] 2. This invention can be used for a single time reference across the entire network, or multiple time synchronization master nodes can be set up according to subsystems. Each subsystem uses its own time reference source and time format, without interfering with each other.

[0020] 3. This invention only requires deploying multiple time synchronization master nodes using the same time format across the entire network to easily achieve priority-based redundant time synchronization. Multiple time base redundancies can be set and work simultaneously, improving synchronization reliability. Compared with the 1588V2 master-slave redundancy mechanism, there is no switching process, simplifying the design.

[0021] 4. This invention proposes a method to eliminate errors caused by TTE network clock synchronization by continuously integrating and accumulating the synchronization deviation of the global synchronization clock of the TTE network, which can effectively improve the timing accuracy. Attached Figure Description

[0022] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0023] Figure 1 This is a flowchart of the time synchronization master node time synchronization process of the present invention;

[0024] Figure 2 This is a flowchart of the time synchronization slave node time synchronization process of the present invention;

[0025] Figure 3 This is a schematic diagram of the composition principle of the time synchronization master node of the present invention;

[0026] Figure 4 This is a schematic diagram of the time synchronization slave node composition principle of the present invention. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0028] This embodiment provides a high-precision time synchronization system based on time-triggered Ethernet, such as... Figure 3-4 As shown, TTE end nodes add a time synchronization master module or a time synchronization slave module within the end system. The TTE end node selected as the time reference adds a time synchronization master module, while the TTE end node awaiting time synchronization and calibration adds a time synchronization slave module. The time synchronization master node provides a hardware input interface for receiving second pulse signals and UTC / ATI time codes, receiving accurate world time from devices such as GNSS receivers. The time synchronization slave node is equipped with a second pulse output circuit and a UTC / ATI time code output serial port, providing accurate world time to the slave node's local application.

[0029] After the TTE network and its switching nodes and end nodes complete synchronization using the AS6802 protocol, that is, after the global synchronization clock module in the time synchronization master node receives the compressed PCF frame and stably establishes the global synchronization clock, it sends an enable signal to the time synchronization master module. After receiving the enable signal, the time synchronization master module begins to wait for external second pulse input. Before being enabled, the time synchronization master module does not process externally input second pulses and absolute time codes.

[0030] This embodiment provides a high-precision time synchronization method based on time-triggered Ethernet. For example... Figure 1-2As shown, when the time synchronization master module captures the second pulse signal, it immediately triggers the global synchronization clock module to record the current value of the global synchronization clock, temporarily storing the cluster cycle count, integrated cycle count, and transparent clock value of the global synchronization clock into the corresponding registers. After receiving the second pulse, the time synchronization master module waits for UTC / ATI time input via the serial port. If it does not receive the absolute time after a certain delay, it restarts and enters the initial state, waiting for the next second pulse. If it receives the UTC / ATI time code before the delay ends, the time synchronization master module reads the cluster cycle count, integrated cycle count, and transparent clock value recorded by the second pulse trigger, and stores the recorded cluster cycle count, integrated cycle count, and transparent clock value into the corresponding registers. The transparent clock value is converted into a timing value t1 relative to the TTE clock synchronization start time 0: cluster cycle number x cluster cycle + integration cycle number x integration cycle + transparent clock value; the received UTC / ATI time is converted into a time value t2 in seconds; t2-t1 is used to obtain the difference between the synchronization start time and the UTC / ATI time epoch; the time synchronization master module sends a time synchronization frame composed of the cluster cycle number, integration cycle number, transparent clock value, UTC / ATI time, and preset time base priority to the time synchronization slave node; the time synchronization frame can be transmitted in any of the TT, RC, or BE modes, with RC and BE frames completing time synchronization as quickly as possible.

[0031] After receiving the time synchronization frame from the node, the cluster cycle number and integration cycle number before the next quasi-second moment are calculated as the synchronization time pre-trigger point. When the synchronization time pre-trigger point is reached, the cumulative deviation of multiple integrated synchronization clock corrections is calculated, and the deviation plus the time difference is loaded into the time comparator. When the global synchronization clock is equal to the set time value, the quasi-second pulse signal is triggered and then the time code is output on the serial port.

[0032] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A long-distance, high-precision time synchronization system based on time-triggered Ethernet, characterized in that, The system includes: Time synchronization master node: The remote time synchronization method based on time-triggered Ethernet first selects individual network nodes as time sources according to the system usage requirements; the time synchronization master node is equipped with an external absolute time input interface to connect to GNSS or other time reference sources to obtain accurate UTC or TAI time, etc. Time synchronization slave node: There are one or more nodes that receive time and correct their own time. A time synchronization master node transmits time information to multiple time synchronization slave nodes via multicast messages. There can be any number of slave nodes. Note that the time synchronization master node and time synchronization slave node are independent of the master and slave synchronization settings of the TTE bus and AS6802, and can be selected according to the system's time synchronization requirements. Time-triggered Ethernet, as a time transmission bus, adopts the SAE AS6802 distributed fault-tolerant clock synchronization mechanism. It does not require a dedicated hard pulse signal and can realize clock synchronization of all network nodes within 100ns. Based on this global synchronization clock, it realizes mixed communication of three key message levels: TT frame, RC frame, and BE frame from high to low.

2. The long-distance high-precision time synchronization system based on time-triggered Ethernet according to claim 1, characterized in that, The time synchronization master node is equipped with an external absolute time input interface to connect to GNSS or other time reference sources to obtain accurate UTC or TAI time.

3. A long-distance, high-precision time synchronization system based on time-triggered Ethernet according to claim 2, characterized in that, After receiving the external input time T1, the time synchronization master node immediately locks the exact second, records the cluster cycle accumulation value CP1, the integrated cycle accumulation value IP1, and the local transparent clock TC1 corresponding to the TTE global synchronization clock at this moment. The deviation between the absolute time and the TTE global synchronization clock can be known through the TTE bus global clock synchronization mechanism, thereby determining the absolute time value corresponding to any global synchronization clock.

4. A long-distance, high-precision time synchronization system based on time-triggered Ethernet according to claim 3, characterized in that, The time synchronization master node frames the absolute time T1, cluster cycle cumulative count CP1, integration cycle cumulative count IP1, and node transparent clock cumulative count TC1 to transmit the time information to all time synchronization slave nodes of the selected multicast group; or, the time synchronization master node calculates the difference between the absolute time and the TTE global synchronization clock: T1-CP1-IP1-TC1, and then sends the time difference to the time synchronization slave nodes through a multicast message.

5. A long-distance, high-precision time synchronization system based on time-triggered Ethernet according to claim 4, characterized in that, After receiving the time message, the time synchronization slave node queries the cluster cycle cumulative count CP2, the integrated cycle cumulative count IP2, and the node transparent clock cumulative count TC2 of the local global synchronization clock. Based on the received time message and the local global synchronization clock, it recovers the absolute time value: T2 = T1 + CP2 + IP2 + TC2 - CP1 - IP1 - TC1. The time synchronization slave node then corrects its own time value accordingly, thereby achieving long-distance high-precision time synchronization between the time master and slave nodes.

6. A long-distance, high-precision time synchronization system based on time-triggered Ethernet according to claim 1, characterized in that, Time synchronization starts by setting a timer within the node, calibrating the timer according to the time synchronization time, and maintaining the local crystal oscillator time until the next time synchronization.

7. A long-distance high-precision time synchronization system based on time-triggered Ethernet according to claim 6, characterized in that, There are two application methods for time synchronization slave nodes: The application software accesses the timer through the TTE end system read / write interface, triggers the recording of the current time using the read enable signal, and transmits the recorded time to the application software through the TTE access interface; The timer is set to output B code or C code to the serial port. When the countdown reaches the whole second, it immediately triggers the output of the second pulse square wave signal, and the slave timer outputs the current time to the serial port.

8. A long-distance high-precision time synchronization system based on time-triggered Ethernet according to any one of claims 1-7, characterized in that, The timing accuracy is better than 800ns.

9. A time synchronization method for a long-distance high-precision time synchronization system based on time-triggered Ethernet as described in any one of claims 1-8, characterized in that, Upon receiving the second pulse signal, the time synchronization master node immediately triggers the global synchronization clock module to record the current value of the global synchronization clock, temporarily storing the cluster cycle count, integrated cycle count, and transparent clock value of the global synchronization clock in the corresponding registers. After receiving the second pulse, the time synchronization master node waits for UTC / ATI time input via the serial port. If it does not receive the absolute time after a certain delay, it restarts and enters the initial state, waiting for the next second pulse. If it receives the UTC / ATI time code before the delay ends, the time synchronization master node reads the cluster cycle count, integrated cycle count, and transparent clock value recorded by the second pulse trigger, and stores the recorded cluster cycle count, integrated cycle count, and transparent clock value in the registers. The transparent clock value is converted into a timing value t1 relative to the TTE clock synchronization start time 0: cluster cycle number x cluster cycle + integration cycle number x integration cycle + transparent clock value; the received UTC / ATI time is converted into a time value t2 in seconds; t2-t1 is used to obtain the difference between the synchronization start time and the UTC / ATI time epoch; the time synchronization master node sends a time synchronization frame composed of the cluster cycle number, integration cycle number, transparent clock value, UTC / ATI time, and preset time base priority to the time synchronization slave node; the time synchronization frame can be transmitted in any of the TT, RC, or BE modes, and the RC and BE frames should complete the time synchronization as quickly as possible.

10. The method according to claim 9, characterized in that, After receiving the time synchronization frame from the node, the cluster cycle number and integration cycle number before the next quasi-second moment are calculated as the synchronization time pre-trigger point. When the synchronization time pre-trigger point is reached, the cumulative deviation of multiple integrated synchronization clock corrections is calculated, and the deviation plus the time difference is loaded into the time comparator. When the global synchronization clock is equal to the set time value, the quasi-second pulse signal is triggered and then the time code is output on the serial port.

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