Light emitting diode and preparation method thereof

Abstract

The invention provides a light emitting diode and a preparation method thereof, and belongs to the technical field of semiconductors. The light-emitting diode comprises an n-type semiconductor layer, a multi-quantum well layer and a p-type semiconductor layer which are stacked in sequence. The multi-quantum well layer comprises at least one superlattice structure and at least two first structures, and each side of the superlattice structure is provided with one first structure; each first structure comprises at least one quantum well layer and at least one quantum barrier layer, and the quantum well layers and the quantum barrier layers are alternately stacked in the first structures; the superlattice structure comprises a plurality of first sub-layers and a plurality of second sub-layers, the first sub-layers and the second sub-layers are alternately stacked, and forbidden bandwidths of the first sub-layers and the second sub-layers are different. The brightness of the light emitting diode can be improved.

Description

Technical Field

[0001] This disclosure belongs to the field of semiconductor technology, and specifically relates to a light-emitting diode and its fabrication method. Background Technology

[0002] As an energy-saving device, light-emitting diodes (LEDs) are widely used in full-color displays, lighting, automotive lights, and other fields.

[0003] In related technologies, light-emitting diodes (LEDs) include a multi-quantum-well layer and n-type and p-type semiconductor layers located on both sides of the multi-quantum-well layer. The multi-quantum-well layer comprises a periodic structure formed by alternating multiple quantum well layers and multiple quantum barrier layers. Both the quantum well layers and the quantum barrier layers are AlGaInP layers. The Al content in the quantum well layers is lower than the Al content in the quantum barrier layers.

[0004] However, due to the small band order of AlGaInP's conduction and valence bands, the quantum well layer has limited ability to confine charge carriers. Especially at high temperatures or high current densities, charge carriers are prone to escape and form leakage currents, leading to a decrease in radiative recombination efficiency. Summary of the Invention

[0005] This disclosure provides a light-emitting diode (LED) and its fabrication method, which can improve the brightness of the LED. The technical solution is as follows: This disclosure provides a light-emitting diode (LED) comprising an n-type semiconductor layer, a multiple quantum well layer, and a p-type semiconductor layer stacked sequentially. The multiple quantum well layer includes at least one superlattice structure and at least two first structures, with one first structure on each side of the superlattice structure. Each first structure includes at least one quantum well layer and at least one quantum barrier layer, wherein the quantum well layer and the quantum barrier layer are stacked alternately in the first structure. The superlattice structure includes a plurality of first sublayers and a plurality of second sublayers, wherein the first sublayers and the second sublayers are stacked alternately, and the bandgap widths of the first sublayers and the second sublayers are different.

[0006] In another implementation of this disclosure, the first sub-layer and the second sub-layer contain different types of elements or contain the same types of elements but with different amounts of the same element components. Both the first sub-layer and the second sub-layer include element P and at least one group III element.

[0007] In another implementation of this disclosure, the first sub-layer is an AlGaP, AlInP, GaInP, or AlGaInP layer; the second sub-layer is a GaP layer.

[0008] In another implementation of this disclosure, the number of the first sub-layer is 5 to 10, and the number of the second sub-layer is 5 to 10.

[0009] In another implementation of this disclosure, both the first sub-layer and the second sub-layer are AlGaP layers, the Al content of the first sub-layer is higher than the Al content of the second sub-layer, and the absolute value of the difference in Al content between the first sub-layer and the second sub-layer is not less than 0.2.

[0010] In another implementation of this disclosure, the thickness of the first sublayer is 0.5 nm to 1.5 nm; the thickness of the second sublayer is 0.5 nm to 1.5 nm.

[0011] In another implementation of this disclosure, in the plurality of first sub-layers, the content of the same element in each first sub-layer is fixed or gradually changes layer by layer along the direction toward the n-type semiconductor layer; and / or; in the plurality of second sub-layers, the content of the same element in each second sub-layer is fixed or gradually changes layer by layer along the direction toward the n-type semiconductor layer.

[0012] In another implementation of this disclosure, the number of quantum well layers is 10 to 30, and the number of quantum barrier layers is 10 to 30.

[0013] In another implementation of this disclosure, the n-type semiconductor layer includes an n-type confinement layer, which is an AlInP layer with a doping concentration of 4 × 10⁻⁶. 17 ~6×10 17 / cm 3 .

[0014] On the other hand, this disclosure also provides a method for fabricating a light-emitting diode, the method comprising: forming an n-type semiconductor layer, a multiple quantum well layer, and a p-type semiconductor layer stacked sequentially; the multiple quantum well layer comprising at least one superlattice structure and at least two first structures, each side of the superlattice structure having one first structure; each first structure comprising at least one quantum well layer and at least one quantum barrier layer, wherein the quantum well layer and the quantum barrier layer are stacked alternately in the first structure; the superlattice structure comprising a plurality of first sublayers and a plurality of second sublayers, the first sublayers and the second sublayers being stacked alternately, the first sublayers and the second sublayers having different bandgap widths.

[0015] The beneficial effects of the technical solutions provided in this disclosure are: Because the multi-quantum-well layer in this light-emitting diode includes at least one superlattice structure, and the superlattice structure comprises multiple alternating first and second sublayers, this design allows for the introduction of a superlattice structure into the multi-quantum-well layer. The difference in band gaps between the first and second sublayers within the superlattice structure creates a periodic band structure of potential wells and barriers, resulting in a quantum confinement effect. Furthermore, by simultaneously introducing the superlattice structure and setting lattice matching or slight mismatch between the first and second sublayers, structural stability can be ensured, while piezoelectric polarization can be introduced through slight mismatch. Thus, the band structure of the multi-quantum-well layer can be adjusted through the quantum confinement and polarization effects generated by the superlattice structure formed by the first and second sublayers, helping to more effectively confine charge carriers within the multi-quantum-well layer and improve radiative recombination efficiency. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure; Figure 2 This is a schematic diagram of another light-emitting diode structure provided in an embodiment of this disclosure; Figure 3 This is a flowchart of a method for fabricating a light-emitting diode according to an embodiment of this disclosure; Figure 4 This is a flowchart of another method for fabricating a light-emitting diode provided in this embodiment.

[0018] The symbols in the diagram represent the following meanings: 1. Multiple quantum well layers; 11. Superlattice structure; 111. First sublayer; 112. Second sublayer; 12. First structure; 121. Quantum well layer; 122. Quantum barrier layer; 2. n-type semiconductor layer; 21. n-type ohmic contact layer; 22. n-type current spreading layer; 23. n-type confinement layer; 3. p-type semiconductor layer; 31. p-type confinement layer; 32. p-type current spreading layer; 33. p-type ohmic contact layer; 5. Growth substrate; 6. Etching stop layer. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0020] This disclosure provides a light-emitting diode, such as... Figure 1 As shown, the light-emitting diode includes an n-type semiconductor layer 2, a multiple quantum well layer 1, and a p-type semiconductor layer 3 stacked sequentially.

[0021] The multi-quantum well layer 1 includes at least one superlattice structure 11 and at least two first structures 12, with one first structure 12 on each side of the superlattice structure 11.

[0022] Each first structure 12 includes at least one quantum well layer 121 and at least one quantum barrier layer 122, wherein the quantum well layer 121 and the quantum barrier layer 122 are stacked alternately in the first structure 12.

[0023] The superlattice structure 11 includes multiple first sublayers 111 and multiple second sublayers 112, with the first sublayers 111 and the second sublayers 112 stacked alternately, and the band gaps of the first sublayers 111 and the second sublayers 112 being different.

[0024] Because the multi-quantum-well layer 1 in this light-emitting diode includes at least a first superlattice structure 11, and the superlattice structure 11 includes multiple alternating layers of first sub-layers 111 and second sub-layers 112, this design allows for the introduction of the superlattice structure 11 into the multi-quantum-well layer 1. By creating different band gaps in the first sub-layers 111 and second sub-layers 112 within the superlattice structure 11, a periodic band structure of potential wells and barriers is formed, resulting in a quantum confinement effect. Simultaneously with the introduction of the superlattice structure, lattice matching or slight mismatch between the first sub-layers 111 and second sub-layers 112 can be achieved. This ensures structural stability while introducing piezoelectric polarization through slight mismatch. Therefore, the band structure of the multi-quantum-well layer 1 can be adjusted through the quantum confinement and polarization effects generated by the superlattice structure formed by the first sub-layers 111 and second sub-layers 112, helping to more effectively confine charge carriers within the multi-quantum-well layer 1 and improve radiative recombination efficiency.

[0025] In this embodiment, both the quantum well layer 121 and the quantum barrier layer 122 are AlGaInP layers, which enables the light-emitting diode to efficiently produce red light in the wavelength range of 620nm to 660nm. This wavelength range is highly compatible with the requirements of automotive red light lighting and signaling applications (such as high-mounted brake lights and taillights), therefore, the light-emitting diode provided in this embodiment can be used in automotive red light chips.

[0026] In this embodiment, there is one superlattice structure 11, and the quantum well layers 121 and quantum barrier layers 122 located on both sides of the superlattice structure 11 can be arranged in pairs, or the number of quantum barrier layers 122 can be one more than the number of quantum well layers 121. Furthermore, the two first structures located on both sides of the superlattice structure 11 can be the same or different. For example, one side's first structure can include only one quantum well layer 121 and one quantum barrier layer 122, or it can include five quantum well layers 121 and five quantum barrier layers 122. The other side's first structure can include 15 quantum well layers 121 and 15 quantum barrier layers 122. The specific configuration can be flexibly set according to requirements.

[0027] Optionally, the first sublayer 111 and the second sublayer 112 may contain different types of elements or contain the same types of elements but with different contents of the same element. Both the first sublayer 111 and the second sublayer 112 may contain element P and at least one group III element.

[0028] Since both the first and second sublayers include P element and at least one group III element, they are typical group III-V compound semiconductors. The lattice constant can be adjusted by changing the Al / Ga / In composition (e.g., the lattice constant decreases when the Al content increases), to achieve lattice matching or slight mismatch between the first sublayer 111 and the second sublayer 112. This ensures structural stability and introduces piezoelectric polarization through slight mismatch. Thus, the band structure of the multi-quantum well layer 1 can be adjusted by the quantum confinement and polarization effects generated by the superlattice structure formed by the first sublayer 111 and the second sublayer 112. This helps to more effectively confine charge carriers within the multi-quantum well layer 1 and improve radiative recombination efficiency.

[0029] Optionally, the number of the first sub-layer 111 is 5 to 10. The number of the second sub-layer 112 is 5 to 10.

[0030] In the above implementation, the first sublayer 111 or the second sublayer 112 has 5 to 10 layers, which makes the superlattice structure 11 sufficiently thick to form an effective and stable high barrier and a sufficiently strong polarization field, significantly improving carrier confinement and injection efficiency. At the same time, stress accumulation has not yet reached the critical point of inducing a large number of crystal defects, the material quality remains at a high level, and the increase in series resistance is within an acceptable range.

[0031] If the number of first sublayer 111 or second sublayer 112 is greater than 10, the excessive number of layers will cause stress to accumulate continuously. When a certain critical thickness is exceeded, the stress will be released through the formation of dislocations and defects. These defects will become non-radiative recombination centers, severely reducing luminescence efficiency. Conversely, if the number of first sublayer 111 or second sublayer 112 is less than 5, the superlattice structure has too few layers, and the resulting equivalent barrier is not thick or high enough. Charge carriers can still easily pass through this weak barrier through tunneling or thermal emission, significantly reducing the confinement effect.

[0032] For example, the number of first sublayers 111 is 6, 8, or 9. The number of second sublayers 112 is 6, 8, or 9. This allows the superlattice structure 11 to achieve optimal performance without introducing significant side effects.

[0033] Optionally, the first sub-layer 111 is an AlGaP, AlInP, GaInP, or AlGaInP layer.

[0034] In the above implementations, the ternary or quaternary alloys such as AlGaP, AlInP, GaInP, or AlGaInP can all be adjusted by adjusting the Al / In / Ga ratio to form a material with a wider bandgap than the multi-quantum-well layer 1 (AlGaInP), thereby constituting an effective carrier confinement barrier.

[0035] Optionally, the second sub-layer is a GaP layer.

[0036] In the above implementation, setting the second sublayer 112 as a GaP layer not only simplifies the formation process of the second sublayer 112, but also, since GaP is a very stable and easy-to-grow III-V semiconductor material, it does not easily react with impurities such as oxygen, and can form a high-quality crystal interface.

[0037] For example, when the first sublayer 111 is AlGaP and the second sublayer is GaP, the resulting superlattice is AlGaP / GaP. In this case, the lattice mismatch between AlGaP and GaP is small, the stress is controllable, and it is easy to grow high-quality crystals. This combination can achieve a good balance between barrier height and material quality.

[0038] When the first sublayer 111 is AlInP and the second sublayer is GaP, the resulting superlattice is AlInP / GaP. In this case, the structure can provide an extremely high conduction band barrier, which has a very strong ability to confine electrons.

[0039] When the first sublayer 111 is a GaInP layer, and the second sublayer is a GaP layer, the resulting superlattice is AlInP / GaP. In this case, the structure provides an extremely high valence band barrier, offering stronger hole confinement capabilities. Simultaneously, it may exhibit better matching with the active region GaInP quantum well.

[0040] When the first sublayer 111 is an AlGaInP layer, the second sublayer is a GaP layer, forming a superlattice of AlGaInP / GaP. At this point, the structure offers the greatest degree of freedom for manipulation. By adjusting the ratio of Al, Ga, and In elements, the lattice constant and band gap can be controlled independently and precisely, thereby achieving strain compensation or a good match between the band gap and the lattice constant.

[0041] Optionally, the first sublayer 111 and the second sublayer 112 may contain the same types of elements but with different proportions of the same elements. That is, the first sublayer 111 and the second sublayer 112 can be ternary or quaternary alloys with the same types of elements, such as AlGaP layers. In this case, only the proportions of the same elements in the first sublayer 111 and the second sublayer 112 are different. For example, the Al content in the first sublayer is higher than the Al content in the second sublayer, and the absolute value of the difference in Al content between the two is not less than 0.2. This structure can also provide an extremely high conduction band barrier, which has a strong ability to confine electrons.

[0042] Optionally, the first sublayer 111 and the second sublayer 112 have the same thickness.

[0043] In the above implementation, the first sublayer 111 and the second sublayer 112 have the same thickness, which means that the process parameters are simple. Simpler process parameters mean a lower probability of error and better batch repeatability.

[0044] Optionally, the thickness of the first sublayer 111 is 0.5 nm to 1.5 nm. The thickness of the second sublayer 112 is 0.5 nm to 1.5 nm.

[0045] In the above implementation, when the thickness of the first sublayer 111 and the second sublayer 112 is as thin as 0.5 nm to 1.5 nm (only a few atomic layers), the movement of charge carriers in the vertical plane is strongly restricted, and their energy is completely quantized. This can effectively increase the equivalent effective barrier of the superlattice structure, thereby enhancing the ability to confine electrons and holes in the multi-quantum-well layer and effectively preventing charge carrier leakage.

[0046] Furthermore, since the polarization field originates from the lattice mismatch and stress at the first / second sublayer interface, with a fixed total thickness (total logarithm), the thinner each sublayer, the greater the number of interfaces per unit distance. This thickness design allows for the maximum number of interfaces to be packed into the finite total thickness of the superlattice structure 11. The polarization fields of these interfaces superimpose to generate an extremely strong and uniform built-in electric field in the superlattice region, thereby most effectively tilting the energy bands, assisting hole injection, and blocking electrons.

[0047] For example, the thickness of the first sublayer 111 is 1 nm. The thickness of the second sublayer 112 is 1 nm.

[0048] This can stimulate the superlattice structure to improve the quantum confinement capability and polarization effect of the superlattice structure 11. Moreover, the process also ensures the growth of stable thin films with high crystal quality and sharp interfaces.

[0049] Optionally, in the plurality of second sub-layers 112, the content of the same element in each first sub-layer 111 remains fixed or gradually changes layer by layer along the direction toward the n-type semiconductor layer 2.

[0050] In the multiple second sub-layers 112, the content of the same element in each second sub-layer 112 is fixed or gradually changes layer by layer along the direction toward the n-type semiconductor layer 2.

[0051] In the above implementation, setting the content of the same element in each first sub-layer 111 to a fixed value simplifies the process. Similarly, setting the content of the same element in each second sub-layer 112 to a fixed value simplifies the process.

[0052] By setting the content of the same element in each first sub-layer 111 to a gradual change, or by setting the content of the same element in the second sub-layer 112 to a gradual change, performance upgrades can be achieved through the gradual changes within the first sub-layer 111 and the second sub-layer 112, without having to reconstruct the overall structure to remain unchanged.

[0053] For example, if the first sublayer is AlInP, the Al composition can be changed so that the Al composition content in each first sublayer gradually increases along the direction toward the n-type semiconductor layer 2, so that the Al composition content in the AlInP layer closest to the n-type semiconductor layer 2 is the highest, so as to provide a high barrier to prevent carriers from escaping, while the Al composition content away from the n-type semiconductor layer 2 transitions smoothly, improving carrier injection efficiency.

[0054] In other examples, the composition content of the same element in each of the first sublayers 111 monotonically varies every fixed period (cross-period variation). The superlattice structure 11 includes multiple periods, each period including at least two first sublayers 111 and at least two second sublayers 112. Within the same period, the composition content of the same element in the first and second sublayers is the same, and in each subsequent period, the composition content of the same element in the first sublayer is higher than that in the previous period. Similarly, in each subsequent period, the composition content of the same element in the second sublayer is higher than that in the previous period.

[0055] Optionally, in the multiple quantum well layer 1, the number of quantum well layers 121 is 10 to 30, and the number of quantum barrier layers 122 is 10 to 30.

[0056] In the above implementation, the setup implies a sufficient number of quantum well layers and quantum barrier layers, which means a larger overall volume for the multi-quantum-well-layer 1. This design allows carriers (electrons and holes) to recombine across more quantum well layers at the same current density. This avoids the efficiency roll-off caused by excessively high carrier density, enabling the device to maintain high luminous efficiency even at higher injection currents, thus achieving higher output optical power. Furthermore, when the number of quantum well layers and quantum barrier layers increases to 10-30, it effectively creates a longer "ladder" for hole injection. For holes, more wells provide more trapping opportunities, facilitating their transport and distribution forward (towards the n-region). For electrons, more wells also increase the probability of electrons recombinating with holes, reducing the risk of electrons directly leaking into the p-region.

[0057] Optionally, the thickness of the quantum well layer 121 is 4 nm to 8 nm.

[0058] In the above implementation, when the thickness of the quantum well layer 121 is set to be in the range of 4nm to 8nm, the charge carriers (electrons and holes) are confined in a very narrow potential well, and their energy is quantized, forming discrete energy levels. This significantly increases the probability of spatial overlap of the electron and hole wave functions, and wave function overlap is a prerequisite for radiative recombination (luminescence). If the thickness of the quantum well layer 121 is too small, the quantum confinement effect will be too strong, the ground state energy level of the charge carriers will be significantly raised, and the emission wavelength will undergo an undesirable blue shift. More importantly, if the thickness of the quantum well layer 121 is too small, the charge carrier wave function will easily tunnel or leak out of the potential well, and it will be very sensitive to interface fluctuations (fluctuations within an atomic layer), resulting in non-uniformity in emission wavelength and efficiency.

[0059] The thickness of the quantum barrier layer 122 is 5nm~10nm.

[0060] In the above implementation, the thickness of the quantum barrier layer 122, ranging from 5 nm to 10 nm, is sufficient to form an effective barrier between two adjacent quantum well layers 121. This thickness prevents charge carriers from easily moving from one quantum well to another through simple quantum tunneling, thus ensuring that each quantum well layer 121 can independently trap and recombine charge carriers. If the quantum barrier layer 122 is too thin, the charge carrier wavefunctions of adjacent quantum well layers 121 will be strongly coupled, a phenomenon known as coupled multiple quantum wells. This leads to energy level broadening, a broadened emission spectrum, an indistinct peak wavelength, and the concentration of charge carriers in a few quantum well layers 121 rather than a uniform distribution, reducing the overall recombination efficiency.

[0061] Moreover, in the AlGaInP system, there is usually a small lattice mismatch between the quantum well layer 121 and the quantum barrier layer 122. The 5nm~10nm quantum barrier layer 122 can serve as an effective stress buffer layer, absorbing and releasing the stress from the quantum well layer 121, preventing the stress from accumulating to a level sufficient to cause defects.

[0062] Figure 2 This is a schematic diagram of another light-emitting diode structure provided in this disclosure embodiment, combined with... Figure 2 Optionally, the n-type semiconductor layer 2 includes an n-type ohmic contact layer 21, an n-type current spreading layer 22 and an n-type confinement layer 23 stacked sequentially, wherein the side of the n-type confinement layer 23 away from the n-type current spreading layer 22 is connected to the multi-quantum well layer 1.

[0063] In the above implementation, the n-type ohmic contact layer 21 is used to achieve ohmic contact. The n-type current spreading layer 22 is used to rapidly and uniformly spread the injected point or line current in the lateral direction (parallel to the surface of the substrate), enabling it to be uniformly injected into the entire light-emitting layer, thereby avoiding current congestion, achieving uniform light emission, and improving device performance and reliability. Without the n-type current spreading layer 22, the current would take the shortest path with the least resistance, resulting in a highly non-uniform current density distribution. The n-type confinement layer 23 is used to effectively confine charge carriers, thereby improving recombination efficiency.

[0064] Optionally, the n-type ohmic contact layer 21 is an n-type GaAs layer with a thickness of 50nm~100nm.

[0065] In the above implementation, the thickness of the n-type ohmic contact layer 21 is 50nm~100nm. This thickness ensures that the resistance of the n-type ohmic contact layer 21 is low, providing a sufficient and low-resistance path for charge carriers and ensuring the formation of excellent ohmic contacts. If the thickness is too thin, it may lead to excessively high series resistance, affecting current injection efficiency. On the other hand, if the thickness is too large, it may lead to defects in the crystal (such as dislocations), and the processing time is longer, which is not conducive to improving efficiency.

[0066] For example, the thickness of the n-type ohmic contact layer 21 is 60nm, 80nm, 90nm, etc. This ensures low resistance and stable and reliable ohmic contact of the n-type ohmic contact layer 21, while avoiding affecting the process due to excessive thickness.

[0067] Optionally, the n-type ohmic contact layer 21 is silicon doped with a doping concentration of 3 × 10⁻⁶. 18 ~7×10 18 / cm 3 .

[0068] In the above implementation, the n-doped source used when forming the n-type ohmic contact layer 21 is a silicon source.

[0069] In III-V semiconductors such as GaAs and AlAs, silicon atoms (Si) occupy the positions of group III elements (such as Ga and Al). Since silicon is a group IV element with four valence electrons, while group III elements only have three, there is one extra free electron. This free electron becomes a charge carrier, thus achieving n-type doping.

[0070] Common silicon sources include SiH4 and Si2H6. Because SiH4 and Si2H6 can decompose at appropriate temperatures and provide silicon atoms, and the doping concentration can be precisely controlled by adjusting the gas flow rate, they are well-suited for large-scale production.

[0071] In addition, the doping concentration in the n-type ohmic contact layer 21 is set to 3 × 10⁻⁶. 18 ~7×10 18 / cm 3 This indicates that within the n-type ohmic contact layer 21, there are 3 × 10⁻⁶ units per cubic centimeter of volume. 18 ~7×10 18 One free electron. This is represented by heavy doping. Through heavy doping, an extremely thin depletion region is formed on the surface of the n-type semiconductor layer, allowing electrons to easily pass through via quantum tunneling, thereby forming a linear, low-resistance ohmic contact that ensures efficient and low-loss current injection.

[0072] For example, the n-type current extension layer 22 is an n-type AlGaInP layer, and the Al content is 30%~80%.

[0073] In the above implementation, the reason for choosing an n-type AlGaInP layer as the n-type current spreading layer 22 is that the n-type AlGaInP layer has a low resistivity, acting as a conductive platform, allowing the current to diffuse laterally before reaching the multi-quantum well layer 1. Moreover, the AlGaInP material can achieve good lattice matching with the underlying n-type confinement layer 23 and the multi-quantum well layer 1, enabling the growth of a high-quality, low-defect single-crystal layer, thereby obtaining low resistivity.

[0074] Optionally, the n-type current spreading layer 22 is silicon-doped, wherein the dopant is SiH4 / Si2H6 and the doping concentration is 1×10⁻⁶. 18 ~1.5×10 18 / cm 3 .

[0075] In the above implementation, SiH4 and Si2H6 can rapidly decompose at high temperatures, releasing Si atoms. These Si atoms can stably replace Ga / Al atoms in the crystal lattice, providing free electrons. Moreover, the above doping concentration should ensure that the conductivity of the n-type current extension layer 22 is sufficiently high, avoiding a decrease in overall device efficiency due to heat generation.

[0076] Optionally, the thickness of the n-type current spreading layer 22 is 2.5 μm to 4 μm.

[0077] The 2.5μm~4μm thick n-type current spreading layer 22 can provide sufficient lateral transport path, allowing the current to diffuse evenly from the electrode contact point to the entire active region, avoiding current concentration below the electrode (excessive local current density will cause heat generation, reduced luminous efficiency, or even burn out the active region).

[0078] Optionally, the n-type confinement layer 23 is an n-type AlInP layer.

[0079] Because the band gap of AlInP is wider than that of the multiple quantum well layer 1 (AlGaInP layer), this band gap difference is represented by a conduction band level on the band structure. Therefore, electrons injected from the n-type semiconductor layer 2 will encounter this energy barrier formed by the AlInP layer when they reach the multiple quantum well layer 1. Electrons will find it difficult to overcome this barrier and continue diffusing forward. Electrons are effectively confined within the multiple quantum well layer 1 region, thus greatly increasing the probability of electrons recombinating with holes injected from the p-region within the multiple quantum well layer 1 and emitting light. Without the n-type confinement layer 23, a large number of electrons would pass through the multiple quantum well layer 1 and continue diffusing towards the p-type semiconductor layer 3. These electrons would eventually recombine in the non-light-emitting layer, causing carrier leakage. Carrier leakage significantly reduces the internal quantum efficiency of the light-emitting diode and causes the efficiency to decrease rapidly with increasing current.

[0080] For example, the thickness of the n-type confinement layer 23 is 200~400 nm, the dopant is SiH4 / Si2H6, and the doping concentration is 4×10⁻⁶. 17 ~6×10 17 / cm 3 .

[0081] The n-type confinement layer 23 is used to confine electrons within the intermediate multi-quantum-well layer 1. A thickness of 300–500 nm ensures a sufficiently wide potential barrier, effectively confining electrons and improving carrier recombination efficiency (reducing non-radiative recombination). SiH4 (silane) and Si2H6 (disilane) are commonly used n-type doping sources in III-V semiconductors (such as AlGaInP). After decomposition, they stably provide Si atoms (replacing Ga / Al atoms and providing free electrons), exhibiting high doping efficiency and good uniformity. Setting the above doping concentration ensures that the conductivity of the n-type confinement layer 23 is sufficiently high (reducing current transport losses) without increasing crystal defects due to excessive doping (defects reduce carrier mobility).

[0082] The doping concentration of the n-type confinement layer 23 is significantly reduced (originally generally greater than 1×10⁻⁶). 18 / cm 3 This effectively reduces the probability of doping elements diffusing into the multi-quantum-well layer, reducing the edge light decay cycles of the light-emitting diode from 10 cycles to 2 cycles, and improving the utilization rate by 10%.

[0083] Edge light decay refers to the phenomenon where the brightness at the edges of a light-emitting diode (LED) chip is lower than that of the center area when the chip is powered on. The number of turns is a visual quantitative indicator used to assess the severity of edge light decay.

[0084] The packaged LED is placed under an optical testing machine (such as an integrating sphere, a light distribution profiler, or a luminance meter with microscopic imaging) and lit up at its rated current. The luminous morphology of the LED is observed using a high-resolution camera or microscope. A series of alternating bright and dark concentric rings can be seen between the bright center and the completely dark edge of the LED. The changes in brightness of these rings visually reflect the brightness decay of the LED from the center to the edge. Each complete bright-dark-bright or dark-bright-dark cycle is counted as one revolution. The more revolutions, the less stable the brightness decay process, meaning the worse the luminous uniformity of the LED and the more severe the efficiency loss in the edge region.

[0085] Optionally, the p-type semiconductor layer 3 includes a p-type confinement layer 31, a p-type current spreading layer 32, and a p-type ohmic contact layer 33 stacked sequentially. The p-type confinement layer 31 is located between the multi-quantum well layer 1 and the p-type current spreading layer 32.

[0086] The p-type confinement layer 31 is a p-type AlInP layer. The p-type current spreading layer 32 is a p-type GaP layer. The p-type ohmic contact layer 33 is a p-type GaP layer.

[0087] In the above implementation, the p-type confinement layer 31 is made of AlInP material with a wide bandgap, which can create a bandgap difference between the p-type confinement layer 31 and the multi-quantum well layer 1, thereby increasing the probability of holes and electrons meeting and recombinating in the multi-quantum well layer 1.

[0088] The p-type current spreading layer 32 is used to uniformly spread the injected current, whether in a point or line configuration, laterally, ensuring that the current is evenly injected into the entire multi-quantum well layer 1. The p-type current spreading layer 32 is made of p-type GaP material, which gives it low resistivity and high conductivity. This makes the p-type current spreading layer 32 an excellent lateral conductive layer, allowing the current to rapidly diffuse laterally before reaching the multi-quantum well layer 1, avoiding localized current congestion, and thus ensuring uniform and efficient light emission.

[0089] For example, the thickness of the p-type confinement layer 31 is 300~500 nm, the dopant is magnesia-diocene (molecular formula Mg(C5H5)2, Cp2Mg), and the doping concentration is 1×10⁻⁶. 18 ~1.5×10 18 / cm 3 .

[0090] The thickness of the p-type current spreading layer 32 is 0.5µm~2µm, and the dopant is Cp2Mg with a doping concentration of 1×10⁻⁶. 18 ~5×10 18 / cm 3 .

[0091] The thickness of the p-type ohmic contact layer 33 is 50nm~200nm, and the dopant is Cp2Mg with a doping concentration of 3×10⁻⁶. 19 ~9×10 19 / cm 3 .

[0092] To improve the light decay of LEDs, the doping concentration of the p-type confinement layer can be further increased. Alternatively, the design of the isolation layer between the p-type confinement layer and the multiple quantum well layer can be optimized, which can suppress the diffusion of dopants and carrier leakage, thereby improving the reliability of the LED.

[0093] Optionally, the light-emitting diode further includes a growth substrate 5 and an etch stop layer 6, which is stacked on and connected to the growth substrate 5. The side of the etch stop layer 6 furthest from the growth substrate 5 is connected to the n-type ohmic contact layer 21.

[0094] In the above implementation, the growth substrate 5 is the growth platform for the epitaxial layer of the entire light-emitting diode, and at the same time undertakes core functions such as physical support, lattice matching, and thermal or electrical conduction, which directly affects the quality of the epitaxial layer and the reliability of the device.

[0095] The etching stop layer 6 is used to create a difference in etching rate between the etching stop layer 6 and the adjacent layers when a certain layer needs to be etched in a subsequent process (such as peeling off the growth substrate 5), so that etching stops when the etching stop layer 6 is reached.

[0096] In this embodiment, the growth substrate 5 is a GaAs substrate. The etching stop layer 6 is an n-type GaInP layer with a thickness of 150~200nm and a doping concentration of 4×10⁻⁶. 18 ~8×10 18 / cm 3 .

[0097] In the above implementation, the lattice constants between the GaAs substrate and the GaInP layer can be well matched. The 150~200nm etch stop layer 6 of GaInP can completely block the upward extension of dislocations in the GaAs substrate, which greatly reduces the dislocation density of the upper n-type ohmic contact layer 21 (n-type GaAs layer) and the multi-quantum well layer 1, thereby improving the crystal quality.

[0098] Optionally, the light-emitting diode also includes a carrier substrate, and the p-type semiconductor layer 3 is connected to the carrier substrate.

[0099] The above setup allows the light-emitting diode to be used in a flip-chip process. At this point, the growth substrate 5 (GaAs substrate) is peeled off. After peeling, the p-type semiconductor layer 3 of the light-emitting diode is bonded to a new support substrate for support and heat dissipation via a bonding layer.

[0100] The substrate can be sapphire, AlN, or SiC, which have efficient heat dissipation capabilities and excellent insulation properties.

[0101] In other words, the light-emitting diode provided in this embodiment is a thin-film flip-chip structure. After the epitaxial wafer of the light-emitting diode is fabricated, the p-type semiconductor layer 3 of the epitaxial wafer is placed downwards and bonded to the carrier substrate to obtain a thin-film flip-chip red light-emitting diode device with uniform light emission, good heat dissipation, and high reliability. In other examples, the light-emitting diode provided in this embodiment can also be applied to traditional upright or vertical structure chips.

[0102] This disclosure also provides a method for fabricating a light-emitting diode, such as... Figure 3 As shown, the preparation method includes: S301: Forming an n-type semiconductor layer, a multiple quantum well layer, and a p-type semiconductor layer stacked sequentially.

[0103] The multi-quantum-well layer comprises at least one superlattice structure and at least two first structures, with one first structure on each side of the superlattice structure.

[0104] Each first structure includes at least one quantum well layer and at least one quantum barrier layer, wherein the quantum well layer and the quantum barrier layer are stacked alternately in the first structure.

[0105] The superlattice structure consists of multiple first sublayers and multiple second sublayers, which are stacked alternately, and the band gaps of the first and second sublayers are different.

[0106] The above preparation methods have the same beneficial effects as the aforementioned light-emitting diodes, and will not be repeated here.

[0107] This disclosure also provides another method for fabricating a light-emitting diode, such as... Figure 4 As shown, the preparation method includes: S401: Forming an etch stop layer on the growth substrate.

[0108] For example, the growth substrate 5 can be a GaAs substrate. The growth substrate 5 serves as the base for epitaxial layer growth, providing physical support; at the same time, GaAs is a group III-V semiconductor, and its lattice constant can achieve good matching with the subsequent GaAs buffer layer, providing a high-quality growth substrate for the epitaxial layer.

[0109] For example, the thickness of the etch stop layer 6 is 150~200 nm, the doping source is a silicon source, and the doping concentration is 4×10⁻⁶. 18 ~8×10 18 / cm 3 .

[0110] In this embodiment, a metal-organic chemical vapor deposition (MOCVD) process is used to form an etch stop layer 6 on the growth substrate 5. Specifically, the process involves introducing trimethylgallium (TMGa) and trimethylindium (TMIn) as Ga and In sources into the reaction chamber, while phosphine (PH3) is introduced as a P source. By adjusting the flow rate of the source gases and the growth time, the thickness of the etch stop layer 6 is made to be 150-200 nm (e.g., 180 nm). The composition of GaInP is controlled by adjusting the flow rate ratio of TMGa to TMIn. Simultaneously, dopant SiH4 / Si2H6 is introduced. By adjusting the dopant gas flow rate, the doping concentration of the GaInP layer is made to be 4 × 10⁻⁶. 18 ~8×10 18 / cm 3 This ensures that charge carriers can be transported smoothly.

[0111] S402: An n-type semiconductor layer is formed on the etch stop layer.

[0112] Optionally, S402 includes the following steps: 4021: Forms an n-type ohmic contact layer.

[0113] In this embodiment, the n-type ohmic contact layer 21 is still formed using a metal-organic chemical vapor deposition process. SiH4 or Si2H6 is introduced into the reaction chamber as an n-type dopant, resulting in a doping concentration of 3 × 10⁻⁶. 18 ~7×10 18 / cm 3 During growth, trimethylgallium (TMGa) is introduced as the Ga source and arsine (AsH3) is introduced as the As source; the growth time is controlled to achieve a thickness of 50 nm to 100 nm.

[0114] 4022: Form an n-type current extension layer.

[0115] In this embodiment, the n-type current extension layer is also formed using a metal-organic chemical vapor deposition process. TMAl, TMGa, TMIn, and PH3 are introduced into the reaction chamber, while a SiH4 or Si2H6 doping source is simultaneously introduced, controlling the doping concentration to 1×10⁻⁶. 18 ~1.5×10 18 / cm 3 Furthermore, the reaction time is controlled to achieve a thickness of 2.5μm to 4μm.

[0116] 4023: Forms an n-type confinement layer.

[0117] In this embodiment, the growth process of the n-type confinement layer is similar to that of the n-type current spread layer, except that the Ga source is turned off and a SiH4 or Si2H6 doping source is introduced into the reaction chamber to control the doping concentration to 4×10⁻⁶. 17 ~6×10 17 / cm 3 Furthermore, the reaction time is controlled to achieve a thickness of 200nm~400nm.

[0118] S403: Fabrication of multiple quantum well layers.

[0119] In this embodiment, the multiple quantum well layer is also formed using a metal-organic chemical vapor deposition process.

[0120] Optionally, step S403 includes: 4031: Alternately grow the first number of quantum well layers and quantum barrier layers to obtain the first part.

[0121] Both the quantum well layer and the quantum barrier layer are Al x Ga （1-x） InP layers, where x in the quantum well layer is less than the x value in the quantum barrier layer. The thickness of the quantum well layer is 4–8 nm, and the thickness of the quantum barrier layer is 5–10 nm.

[0122] In this embodiment, the first quantity is 1. That is, a pair of quantum well layers and quantum barrier layers are first formed. Then, a superlattice structure can be formed on the pair of quantum well layers and quantum barrier layers.

[0123] 4032: A superlattice structure is formed on the first part.

[0124] Step 4032 can be achieved by alternately growing the first sublayer and the second sublayer. The number of second periodic structures formed by the first and second sublayers is 5 to 10. The thickness of both the first and second sublayers is 1 nm.

[0125] The first sublayer 111 is an AlGaP, AlInP, GaInP, or AlGaInP layer. The second sublayer is a GaP layer.

[0126] The growth process of the first and second sublayers can be referred to in the previous text, and will not be repeated here.

[0127] 4033: Continue to grow a second number of quantum well layers and quantum barrier layers alternately on the superlattice structure to finally obtain a multi-quantum well layer.

[0128] Finally, the number of periodic structures formed by quantum well layers and quantum barrier layers is 10 to 30.

[0129] S404: A p-type semiconductor layer is formed on a multi-quantum-well layer.

[0130] Optionally, S404 includes the following steps: 4041: Form a p-type confinement layer on a multi-quantum-well layer.

[0131] The p-type confinement layer is also formed using a metal-organic chemical vapor deposition process. TMAl, TMIn, and PH3 are introduced into the reaction chamber, along with a Cp2Mg dopant source, with the doping concentration controlled at 1×10⁻⁶. 18 ~1.5×10 18 / cm 3 And control the reaction time to make the thickness 300-500nm.

[0132] 4042: A p-type current spreading layer is formed on the p-type confinement layer.

[0133] The p-type current-spreading layer is also formed using a metal-organic chemical vapor deposition process. TMGa and PH3 are introduced into the reaction chamber, along with a Cp2Mg doping source, with the doping concentration controlled at 1×10⁻⁶. 18 ~5×10 18 / cm 3 And control the reaction time to make the thickness 0.5~2μm.

[0134] 4043: A p-type ohmic contact layer is formed on the p-type current extension layer.

[0135] The p-type ohmic contact layer is also formed using a metal-organic chemical vapor deposition process. TMGa and PH3 are introduced into the reaction chamber, along with a Cp2Mg doping source, with the doping concentration controlled at 3 × 10⁻⁶. 19 ~9×10 19 / cm 3 And control the reaction time to make the thickness 50~200nm.

[0136] The above steps will yield the epitaxial layer of the light-emitting diode.

[0137] Then, the epitaxial layer can be bonded to the sapphire substrate to form electrodes, so that the light-emitting diode can be flip-chip applied in different devices, such as red light-emitting diode chips for vehicles.

[0138] In this embodiment, by inserting an AlGaP / GaP superlattice structure into the AlGaInP multi-quantum-well layer, the tensile strain of AlGaP and the compressive strain of GaP compensate for each other, providing a certain strain adjustment capability. This alleviates the lattice mismatch between the potential barriers in the multi-quantum-well layer, reducing dislocation density and the formation of non-radiative recombination centers. Furthermore, the quantum confinement and polarization effects generated by the superlattice structure can adjust the band structure of the multi-quantum-well layer, helping to more effectively confine charge carriers within the multi-quantum-well layer and improve radiative recombination efficiency. Simultaneously, the AlGaP / GaP superlattice structure also improves the vertical output capability of charge carriers; some charge carriers are conducted through tunneling, thereby reducing the forward conduction voltage of the device and increasing optical gain.

[0139] The light-emitting diode provided in this embodiment can be used as a red-light vehicle-mounted light-emitting diode. Through multiple mechanisms such as strain modulation, bandgap optimization, carrier confinement and injection optimization, the light extraction efficiency and output power of the light-emitting diode can be effectively improved.

[0140] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode comprises an n-type semiconductor layer (2), a multiple quantum well layer (1), and a p-type semiconductor layer (3) stacked sequentially. The multi-quantum well layer (1) includes at least one superlattice structure (11) and at least two first structures (12), with one first structure (12) on each side of the superlattice structure (11). Each of the first structures (12) includes at least one quantum well layer (121) and at least one quantum barrier layer (122), wherein the quantum well layer (121) and the quantum barrier layer (122) are stacked alternately in the first structure (12); The superlattice structure (11) includes multiple first sublayers (111) and multiple second sublayers (112), the first sublayers (111) and the second sublayers (112) are stacked alternately, and the band gaps of the first sublayers (111) and the second sublayers (112) are different.

2. The light-emitting diode according to claim 1, characterized in that, The first sublayer (111) and the second sublayer (112) contain different types of elements or contain the same types of elements but with different contents of the same element components. Both the first sublayer (111) and the second sublayer (112) contain the element P and at least one group III element.

3. The light-emitting diode according to claim 2, characterized in that, The first sub-layer (111) is an AlGaP, AlInP, GaInP or AlGaInP layer; The second sub-layer (112) is a GaP layer.

4. The light-emitting diode according to claim 2, characterized in that, The first sublayer (111) and the second sublayer (112) are both AlGaP layers. The Al composition of the first sublayer (111) is higher than that of the second sublayer (112), and the absolute value of the difference in Al composition between the first sublayer (111) and the second sublayer (112) is not less than 0.

2.

5. The light-emitting diode according to any one of claims 1-4, characterized in that, The number of the first sub-layer (111) is 5 to 10, and the number of the second sub-layer (112) is 5 to 10.

6. The light-emitting diode according to any one of claims 1-4, characterized in that, The thickness of the first sublayer (111) is 0.5 nm to 1.5 nm; The thickness of the second sublayer (112) is 0.5nm~1.5nm.

7. The light-emitting diode according to any one of claims 1-4, characterized in that, In the plurality of first sub-layers (112), the content of the same element in each first sub-layer (111) is fixed or gradually changes layer by layer along the direction toward the n-type semiconductor layer (2); and / or; In the plurality of second sub-layers (112), the content of the same element in each second sub-layer (112) is fixed or gradually changes layer by layer along the direction toward the n-type semiconductor layer (2).

8. The light-emitting diode according to any one of claims 1-4, characterized in that, In the multiple quantum well layer (1), the number of quantum well layers (121) is 10 to 30, and the number of quantum barrier layers (122) is 10 to 30.

9. The light-emitting diode according to any one of claims 1-4, characterized in that, The n-type semiconductor layer (2) includes an n-type confinement layer (23), which is an AlInP layer with a doping concentration of 4 × 10⁻⁶. 17 ~6×10 17 / cm 3 .

10. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes: Forming an n-type semiconductor layer, a multiple quantum well layer, and a p-type semiconductor layer stacked sequentially; The multi-quantum-well layer includes at least one superlattice structure and at least two first structures, with one first structure on each side of the superlattice structure; Each of the first structures includes at least one quantum well layer and at least one quantum barrier layer, wherein the quantum well layer and the quantum barrier layer are stacked alternately in the first structure; The superlattice structure includes multiple first sublayers and multiple second sublayers, with the first and second sublayers stacked alternately, and the band gaps of the first and second sublayers being different.

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