Semiconductor structure manufacturing method and semiconductor structure

Abstract

The embodiment of the invention discloses a semiconductor structure manufacturing method and a semiconductor structure. The semiconductor structure manufacturing method comprises the steps of forming a first metal pattern on the surface of a substrate; circularly using oxygen plasma and hydrogen plasma to perform first treatment on the side wall of the first metal pattern so as to reduce the roughness; forming a dielectric layer made of a low dielectric constant material on the surface of the substrate, and covering the top of the first metal pattern; forming a through hole of which the bottom is connected with the top of the first metal pattern on the surface of the dielectric layer; carrying out second treatment on the side wall of the through hole by using nitrogen free radicals so as to modify the surface of the low-dielectric-constant material on the side wall of the through hole; forming a tantalum layer on the side wall of the through hole; and filling a second metal layer electrically connected with the first metal pattern in the through hole. According to the embodiment of the invention, the risk of short circuit or open circuit can be reduced, the adhesion of rear-section metal interconnection is enhanced, and lower resistance and interconnection stability are realized.

Description

Technical Field

[0001] This application relates to the field of semiconductor processing technology, and in particular to a method for fabricating a semiconductor structure and a semiconductor structure. Background Technology

[0002] Traditional double damascus etching processes face multiple limitations in the miniaturization era, including difficulty in further reducing effective resistance and RC delay, as well as challenges in patterning and filling at high aspect ratios. To address these limitations, the industry has explored the following evolutionary path: for the most critical and densely patterned bottom metal layers (such as M1 and M2), a subtractive patterning process (depositing metal first, then etching the pattern) is adopted; while for upper vias and metal layers with wider pattern sizes, the mature additive damascus patterning process is still used. Currently, ruthenium (Ru) is the best material for the bottom metal layer suitable for the subtractive process; however, after etching, ruthenium often suffers from poor sidewall roughness, which can easily lead to short circuits or open circuits and affect overlay accuracy. Furthermore, copper (Cu) metal vias used for interconnection typically require a combination of tantalum nitride (TaN) and tantalum (Ta) as a diffusion barrier layer. However, as the pattern density of the underlying metal layer increases, the diameter of the vias also decreases. This results in the diffusion barrier layer's thickness accounting for an increasingly larger proportion of the total Cu metal via diameter, and its resistance becoming a significant portion of the overall via resistance. This becomes a major reason why subsequent contact resistance and RC delay are difficult to further reduce. Therefore, it is necessary to investigate a process method that can significantly improve these problems. Summary of the Invention

[0003] The purpose of this application is to overcome the aforementioned problems in the prior art and to provide a method for fabricating a semiconductor structure and a semiconductor structure.

[0004] To achieve the above objectives, the technical solution of this application is as follows: According to a first aspect of this application, embodiments of this application provide a method for fabricating a semiconductor structure, including: Provide substrate; A first metal layer is formed on the surface of the substrate, the material of the first metal layer including ruthenium; The first metal layer is patterned to form a first metal pattern, and the sidewalls of the first metal pattern have a first roughness. The sidewalls of the first metal pattern are subjected to a first treatment by cyclically using plasma of an oxidizing first gas and plasma of a reducing second gas. The sidewalls of the first metal pattern after the first treatment have a second roughness, which is less than the first roughness. A dielectric layer is formed on the surface of the substrate to cover the top of the first metal pattern, and the material of the dielectric layer includes a low dielectric constant material; A through hole is formed on the surface of the dielectric layer, with the bottom of the hole connecting to the top of the first metal pattern; A second treatment is performed on the sidewalls of the via using nitrogen free radicals excited by metastable particles to modify the surface of the low dielectric constant material on the sidewalls of the via. A tantalum layer is formed on the sidewall of the through hole after the second treatment; A second metal layer electrically connected to the first metal pattern is filled into the through-hole within the tantalum layer.

[0005] In some embodiments, when performing the first process, the plasma of the oxidizing first gas and the plasma of the reducing second gas are sequentially cycled multiple times, or the plasma of the reducing second gas and the plasma of the oxidizing first gas are sequentially cycled multiple times, and the plasma of the reducing second gas is used in the last cycle.

[0006] In some embodiments, ruthenium material on the surface of protrusions on the sidewall of the first metal pattern is preferentially oxidized using plasma of the oxidizing first gas to generate volatile ruthenium tetroxide, thereby removing at least a portion of the protrusions and smoothing the sidewall of the first metal pattern. Then, ruthenium dioxide on the sidewall of the first metal pattern is reduced using plasma of the reducing second gas to reset the surface chemical state. During the first process, the roughness of the sidewall of the first metal pattern is reduced by repeatedly using plasma of the oxidizing first gas and plasma of the reducing second gas.

[0007] In some embodiments, each time the first gas is used, the flow rate is 50 sccm to 200 sccm, the temperature is 10°C to 125°C, the pressure is 5 mTorr to 20 mTorr, the source power is 500 W to 1000 W, the bias power is 0 W to 30 W, and the time is 5 s to 30 s.

[0008] In some embodiments, each time the second gas is used, the flow rate is 100 sccm to 300 sccm, the temperature is 10°C to 80°C, the pressure is 10 mTorr to 30 mTorr, the source power is 800 W to 1500 W, the bias power is 0 W to 30 W, and the time is 10 s to 60 s.

[0009] In some embodiments, the first gas includes oxygen.

[0010] In some embodiments, the second gas includes hydrogen.

[0011] In some embodiments, by performing the second treatment, nitrogen free radicals react with the bonding bonds on the surface of the low dielectric constant material on the sidewall of the through hole to form a nitrogen-rich surface layer, thereby modifying the surface of the low dielectric constant material on the sidewall of the through hole to improve the adhesion and interfacial diffusion blocking ability of the low dielectric constant material surface on the sidewall of the through hole.

[0012] In some embodiments, the low dielectric constant material includes silicon-based low dielectric constant materials.

[0013] In some embodiments, the nitrogen free radicals are obtained by exciting nitrogen gas with helium metastable particles and filtering out charged particles therein. The helium metastable particles are obtained by exciting helium gas and filtering out charged particles therein. During the second treatment, the flow rate of helium gas is 1000 sccm to 9000 sccm, the nitrogen gas flow rate: helium gas flow rate = 1:1 to 10:1, the temperature is 50℃ to 200℃, the source power is 1W to 100W, the pressure is 10mTorr to 1000mTorr, the time is 5s to 300s, and ion filtering is turned on while the bias power is turned off.

[0014] In some embodiments, after forming the tantalum layer, the method further includes: using hydrogen radicals excited by metastable particles to perform a third treatment on the surface of the tantalum layer to reduce the surface state density.

[0015] In some embodiments, the hydrogen radicals are obtained by exciting hydrogen gas with helium metastable particles and filtering out charged particles therein. The helium metastable particles are obtained by exciting helium gas and filtering out charged particles therein. During the third treatment, argon gas is added to the hydrogen gas to adjust the concentration of the hydrogen gas. The flow rate of the helium gas is 1000 sccm to 2000 sccm, the flow rate of the mixed gas of hydrogen and argon is 0.1:1 to 2:1, the flow rate of hydrogen gas is 1:1 to 1:3, the temperature is 100℃ to 200℃, the source power is 100W to 500W, the pressure is 10mTorr to 1000mTorr, the time is 5s to 300s, and the ion filter is turned on while the bias power is turned off.

[0016] According to a second aspect of this application, embodiments of this application also provide a semiconductor structure obtained using a semiconductor structure fabrication method as provided in any of the embodiments of the first aspect above.

[0017] The embodiments of this application may have, or at least have, the following advantages: (1) By using plasma of an oxidizing first gas and plasma of a reducing second gas in a cycle, the sidewall of the first metal pattern with a large roughness (first roughness) is subjected to a first treatment. The plasma of the oxidizing first gas can be used to preferentially oxidize the surface of the protrusions on the rough sidewall of the first metal pattern of ruthenium material to generate volatile ruthenium tetroxide, thereby removing at least part of the protrusions and smoothing the sidewall of the first metal pattern. The plasma of the reducing second gas can be used to reduce the ruthenium dioxide on the sidewall of the first metal pattern that would prevent the oxidation from continuing (generating ruthenium), thereby resetting the surface chemical state and providing a fresh surface of ruthenium material to be oxidized, thus avoiding the "self-limiting stagnation" phenomenon caused by the accumulation of ruthenium dioxide. By repeatedly using plasma of an oxidizing first gas and plasma of a reducing second gas to perform an oxidation-reduction cycle, the roughness of the sidewall of the first metal pattern can be effectively reduced (reduced to a smaller second roughness), ultimately making the sidewall of the first metal pattern smoother, improving the linewidth uniformity, thereby significantly reducing the risk of short circuits or open circuits, ensuring good connection with the upper metal via, and helping to improve the aspect ratio of the first metal pattern to reduce resistance.

[0018] (2) By using nitrogen free radicals excited by metastable particles to perform a second treatment on the sidewalls of the via, nitrogen free radicals (nitrogen atoms) can be adsorbed onto the surface of the low dielectric constant material on the sidewalls of the via at low energy to form dangling bonds (which can prevent nitrogen atoms from entering the interior of the low dielectric constant material and causing an increase in the dielectric constant (k) value). This optimizes the surface state (surface energy) and enhances the adhesion between tantalum and the sidewall surface of the low dielectric constant material. This facilitates a more continuous and uniform film formation of the tantalum layer, which acts as a diffusion barrier layer, on the sidewalls of the via, thereby reducing the contact resistance. Furthermore, by reacting the nitrogen free radicals with the bonding bonds on the surface of the low dielectric constant material on the sidewalls of the via, a dense nitrogen-rich surface layer is formed on the surface of the low dielectric constant material on the sidewalls of the via. This reduces the defect channels on the surface and improves the ability of the surface to block interfacial diffusion. It can effectively prevent the diffusion of metal (such as Cu) atoms, moisture or other impurities into the porous low dielectric constant material in subsequent processes, preventing the degradation of electrical properties (such as an increase in k value, increased leakage current, etc.). By performing a second treatment, nanoscale, uniform shallow surface modification of low dielectric constant materials is achieved, maintaining the low-k characteristics of the dielectric layer while constructing an effective sealing barrier.

[0019] (3) By using hydrogen free radicals excited by metastable particles to perform a third treatment on the surface of the tantalum layer, the oxide layer and impurities can be removed at low energy and low temperature, the surface of the tantalum layer can be cleaned, and active hydrogen atoms can be used to combine with the cleaned Ta surface atoms to form Ta-H bonds, making the surface "hydrogen terminalized". This can effectively passivate the dangling bonds and highly active sites on the surface, reduce the surface state density, provide a more ideal nucleation surface for subsequent film deposition, help grow a denser, more uniform, and higher crystal quality film, and further reduce the contact resistance and RC delay.

[0020] (4) By enhancing the adhesion and barrier diffusion ability of the via sidewall surface of the low dielectric constant material, the deposition quality of the tantalum layer is improved, so that only a single tantalum layer can be used to serve as a diffusion barrier layer, eliminating the need for tantalum nitride in the diffusion barrier layer (i.e., replacing the original diffusion barrier layer of TaN and Ta combination with a single Ta layer diffusion barrier layer). Therefore, the total thickness of the diffusion barrier layer can be reduced, thereby effectively reducing the proportion of the resistance of the diffusion barrier layer in the entire via, and thus significantly reducing the contact resistance and RC delay in the later stage.

[0021] The process steps in this application are highly compatible, which can reduce the risk of short circuits or open circuits, enhance the adhesion of downstream metal interconnects, achieve lower resistance and interconnect stability, and well meet the technical requirements of advanced nodes.

[0022] Other advantages of this application will be described in the following detailed description. Attached Figure Description

[0023] Figure 1 This is a flowchart of a semiconductor structure fabrication method provided in a preferred embodiment of this application.

[0024] Figure 2 This is a schematic diagram of a first metal layer formed on the surface of a substrate, according to a preferred embodiment of this application.

[0025] Figure 3 This is a schematic diagram of a first metal pattern formed by patterning a first metal layer, which is a preferred embodiment of this application.

[0026] Figure 4 This is a schematic diagram of a preferred embodiment of the present application after forming a dielectric layer on the surface of a substrate that covers the top of a first metal pattern.

[0027] Figure 5 This is a schematic diagram of a via formed on the surface of a dielectric layer, provided as a preferred embodiment of this application.

[0028] Figure 6This is a schematic diagram of an organic hydrophobic layer formed on the bottom of a through-hole, according to a preferred embodiment of this application.

[0029] Figure 7 This is a schematic diagram of a tantalum layer formed on the sidewall of a through-hole, according to a preferred embodiment of this application.

[0030] Figure 8 This is a schematic diagram of a preferred embodiment of the present application after the removal of the organic hydrophobic layer.

[0031] Figure 9 This is a schematic diagram of a via filled with a second metal layer, provided as a preferred embodiment of the present application.

[0032] In the figure: 10. Substrate; 11. First metal layer; 111. First metal pattern; 12. Dielectric layer; 13. Via; 14. Organic hydrophobic layer; 15. Tantalum layer; 16. Second metal layer. Detailed Implementation

[0033] To address the issues of poor sidewall roughness in existing subtractive etching methods for ruthenium as the bottom metal layer, which can lead to short circuits or open circuits and affect overlay accuracy, and the decreasing diameter of vias due to increasing pattern density in the bottom metal layer, the thickness of the diffusion barrier layer (combining tantalum nitride (TaN) and tantalum (Ta)) is becoming increasingly significant as a proportion of the total Cu metal via diameter. This also increases the resistance of the diffusion barrier layer within the via, making it difficult to further reduce contact resistance and RC delay. Therefore, this application provides a semiconductor structure fabrication method, including: Provide substrate; A first metal layer is formed on the surface of the substrate, the material of the first metal layer including ruthenium; The first metal layer is patterned to form a first metal pattern, and the sidewalls of the first metal pattern have a first roughness. The sidewalls of the first metal pattern are subjected to a first treatment by cyclically using plasma of an oxidizing first gas and plasma of a reducing second gas. The sidewalls of the first metal pattern after the first treatment have a second roughness, which is less than the first roughness. A dielectric layer is formed on the surface of the substrate to cover the top of the first metal pattern, and the material of the dielectric layer includes a low dielectric constant material; A through hole is formed on the surface of the dielectric layer, with the bottom of the hole connecting to the top of the first metal pattern; A second treatment is performed on the sidewalls of the via using nitrogen free radicals excited by metastable particles to modify the surface of the low dielectric constant material on the sidewalls of the via. A tantalum layer is formed on the sidewall of the through hole after the second treatment; A second metal layer electrically connected to the first metal pattern is filled into the through-hole within the tantalum layer.

[0034] This application embodiment uses a plasma of a first oxidizing gas and a second reducing gas to perform a first treatment on the sidewalls of the first metal pattern. This effectively reduces the roughness of the sidewalls, smooths them, and improves linewidth uniformity, thereby significantly reducing the risk of short circuits or open circuits. It ensures good connection with the upper metal via and helps to increase the aspect ratio of the first metal pattern to reduce resistance. Furthermore, by using nitrogen free radicals excited by metastable particles to perform a second treatment on the sidewalls of the via, the adhesion of the low dielectric constant material to the sidewall surface and its ability to block interfacial diffusion are enhanced. This improves the deposition quality of the tantalum layer, allowing a single tantalum layer to function as a diffusion barrier layer, eliminating the need for tantalum nitride. This reduces the total thickness of the diffusion barrier layer, effectively reducing its proportion of the overall resistance in the via, and significantly reducing subsequent contact resistance and RC delay.

[0035] This application also provides a semiconductor structure obtained using the semiconductor structure fabrication method described above.

[0036] The specific embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0037] refer to Figure 1 In a first aspect, embodiments of this application provide a method for fabricating a semiconductor structure, which may sequentially include the following steps: Step S11: Provide a substrate.

[0038] refer to Figure 2 In some embodiments, a substrate 10 is used for further forming the semiconductor structure provided in the embodiments of this application on the substrate 10. The substrate 10 may include any suitable type of semiconductor substrate and material. For example, the substrate 10 may include a silicon (Si) substrate, a germanium (Ge) substrate, or a germanium-silicon (SiGe) substrate, or a III / V compound semiconductor substrate, such as a gallium arsenide (GaAs) substrate, an indium gallium arsenide (InGaAs) substrate, or similar materials.

[0039] In some embodiments, substrate 10 may include a wafer.

[0040] Step S12: Form a first metal pattern on the surface of the substrate.

[0041] refer to Figure 2In some embodiments, a deposition process may be used to form a first metal layer 11 on the surface of the substrate 10.

[0042] In some embodiments, the material of the first metal layer 11 includes ruthenium. For example, the material of the first metal layer 11 is ruthenium.

[0043] refer to Figure 3 In some embodiments, the first metal layer 11 is patterned, forming a first metal pattern 111 of ruthenium material on the surface of the substrate 10. Figure 3 The example shown is only exemplarily the case where one first metal pattern 111 is formed on the surface of substrate 10. It is understood that the number of first metal patterns formed is not limited to this. Figure 3 The diagram shows a first metal pattern 111. When multiple first metal patterns are formed, there is a gap between any two adjacent first metal patterns. The sidewalls of the first metal pattern 111 have a first roughness.

[0044] In some embodiments, photolithography and dry etching processes can be used to form the first metal pattern 111 (i.e., the first metal pattern 111 can be formed using a "subtractive" method).

[0045] In some embodiments, a mixture of oxygen and chlorine gas can be used to perform plasma dry etching on the first metal layer 11 of the ruthenium material to form a first metal pattern 111.

[0046] In some embodiments, when performing plasma dry etching on the first metal layer 11, the flow rate ratio between the introduced chlorine gas and the oxygen gas is 0.1 to 0.2 (chlorine gas flow rate: oxygen flow rate = 1:10 to 2:10). For example, the chlorine gas to oxygen flow rate ratio can be 0.1, 0.11, 0.12, 0.13, 0.14, 0.15, 0.16, 0.17, 0.18, 0.19, or 0.2, or any value between any two of the aforementioned flow rate ratios.

[0047] In some embodiments, when performing plasma dry etching on the first metal layer 11, the total flow rate of oxygen and chlorine is 30 sccm to 500 sccm. For example, the total flow rate of oxygen and chlorine can be 30 sccm, 40 sccm, 50 sccm, 60 sccm, 80 sccm, 100 sccm, 110 sccm, 150 sccm, 180 sccm, 200 sccm, 250 sccm, 270 sccm, 300 sccm, 350 sccm, 400 sccm, 450 sccm, or 500 sccm, or any value between any two of the aforementioned flow rate values.

[0048] In some embodiments, when performing plasma dry etching on the first metal layer 11, the temperature is 100°C to 300°C. For example, the temperature can be 100°C, 110°C, 125°C, 150°C, 175°C, 190°C, 200°C, 250°C, 285°C, or 300°C, or any value between any two of the aforementioned temperature values.

[0049] In some embodiments, when performing plasma dry etching on the first metal layer 11, the source power is 1000W to 2000W. For example, the source power can be 1000W, 1100W, 1200W, 1300W, 1400W, 1500W, 1600W, 1700W, 1800W, 1900W, or 2000W, or any value between any two of the aforementioned power values.

[0050] In some embodiments, when performing plasma dry etching on the first metal layer 11, the bias power is 150W to 250W. For example, the bias power can be 150W, 160W, 170W, 180W, 190W, 200W, 210W, 220W, 230W, 240W, or 250W, or any value between any two of the aforementioned power values.

[0051] In some embodiments, when performing plasma dry etching on the first metal layer 11, the pressure is 10 mTorr to 100 mTorr. For example, the pressure can be 10 mTorr, 15 mTorr, 20 mTorr, 25 mTorr, 30 mTorr, 40 mTorr, 50 mTorr, 60 mTorr, 70 mTorr, 80 mTorr, 90 mTorr, or 100 mTorr, or any value between any two of the aforementioned pressure values.

[0052] Thus, through the coordinated control of the above-mentioned flow rate and flow ratio, temperature, power, pressure, etc., a first metal pattern 111 with a certain aspect ratio can be obtained.

[0053] Step S13: Use oxygen plasma and hydrogen plasma in a cycle to perform a first treatment on the sidewalls of the first metal pattern to reduce roughness.

[0054] In etching gas systems using oxygen and chlorine, non-volatile byproducts (RuO2 / RuCl) are easily generated during the etching process. xResidual ruthenium (such as linewidth roughness (LWR) and line edge roughness (LER)) results in poor sidewall roughness after etching, which can easily lead to short circuits or open circuits and affect overlay accuracy. Therefore, the roughness of the sidewalls of the first metal pattern 111 can be reduced by the process method provided in this application embodiment to improve the above-mentioned problems and ensure that the processed first metal pattern 111 can be well connected to the upper metal via. Furthermore, by improving the roughness of the sidewalls of the first metal pattern 111, the uniformity of the linewidth can be ensured, thus enabling the formation of a first metal pattern 111 with a higher aspect ratio, which is beneficial for reducing resistance.

[0055] refer to Figure 3 In some embodiments, a first treatment is performed on the sidewalls of the first metal pattern 111 using a plasma of an oxidizing first gas and a plasma of a reducing second gas in a cyclic manner. The sidewalls of the first metal pattern 111 after the first treatment have a second roughness, which is less than the first roughness.

[0056] In some embodiments, the first gas includes oxygen.

[0057] In some embodiments, the second gas includes hydrogen.

[0058] In some embodiments, oxygen plasma (a plasma of an oxidizing first gas) and hydrogen plasma (a plasma of a reducing second gas) are used cyclically to perform a first treatment on the sidewalls of the first metal pattern 111.

[0059] In some embodiments, oxygen plasma and hydrogen plasma are used in a cycle multiple times to perform a first treatment on the sidewalls of the first metal pattern 111 (i.e., the first treatment is performed in a cycle of sidewall treatment with oxygen plasma - sidewall treatment with hydrogen plasma - sidewall treatment with oxygen plasma - sidewall treatment with hydrogen plasma), and at the last time of the cycle, hydrogen plasma is used for treatment (i.e., sidewall treatment with hydrogen plasma is used as the last treatment step to end the first treatment).

[0060] In some embodiments, hydrogen plasma and oxygen plasma are used in a cycle multiple times to perform a first treatment on the sidewalls of the first metal pattern 111 (i.e., the first treatment is performed in a cycle of sidewall treatment with hydrogen plasma - sidewall treatment with oxygen plasma - sidewall treatment with hydrogen plasma - sidewall treatment with oxygen plasma), and at the last time of the cycle, hydrogen plasma is used for treatment (i.e., sidewall treatment with hydrogen plasma is used as the last treatment step to end the first treatment).

[0061] In some embodiments, a first oxidation-reduction cycle-based treatment is performed on the sidewalls of a first metal pattern 111 with a large first roughness by cyclically using oxygen plasma (a plasma of an oxidizing first gas) and hydrogen plasma (a plasma of a reducing second gas). The oxygen plasma preferentially oxidizes the ruthenium material on the surface of protrusions present on the rough sidewalls of the first metal pattern 111. During oxidation using oxygen plasma, the ruthenium material on the sidewalls of the first metal pattern 111 reacts with the ruthenium material, oxidizing the surface ruthenium to volatile ruthenium tetroxide (RuO4) for removal. This removes at least a portion of the protrusions and produces a smoothing effect similar to "peak shaving and valley filling," smoothing the sidewalls of the first metal pattern 111. Simultaneously, the oxidation reaction may also generate solid ruthenium dioxide (RuO2), and once dense ruthenium dioxide is formed on the surface, the oxidation to ruthenium tetroxide reaction stops. Therefore, hydrogen plasma can be used to reduce ruthenium dioxide present on the sidewalls of the first metal pattern 111, reducing ruthenium dioxide to ruthenium. This is equivalent to "resetting" the surface chemical state, thus continuously providing a surface of fresh ruthenium material to be oxidized, avoiding the "self-limiting stagnation" phenomenon caused by the accumulation of ruthenium dioxide. By repeatedly using plasma of an oxidizing first gas and a reducing second gas in a redox cycle, the roughness of the sidewalls of the first metal pattern 111 can be reduced to a smaller second roughness, effectively reducing the roughness of the sidewalls of the first metal pattern 111. This smooths the sidewalls of the first metal pattern 111, improves linewidth uniformity, significantly reduces the risk of short circuits or open circuits, ensures good connection with the upper metal vias, and helps to improve the aspect ratio of the first metal pattern 111, thereby reducing resistance.

[0062] The oxidation removal of Ru follows a reaction path of Ru → RuO2 (intermediate state) → RuO4 (volatile state). If RuO2 accumulates too thickly on the sidewall surface, it will block the oxygen plasma from contacting the underlying Ru, as the energy barrier for RuO4 formation on the RuO2 surface is significantly increased, making the reaction difficult. Therefore, once the Ru surface is covered by RuO2, the oxidation reaction slows down in a "self-limiting" manner. Utilizing this characteristic, the amount of oxidation can be reduced in each cycle through time control, while maintaining the surface in a metallic Ru state (short-term hydrogen plasma treatment resets the surface chemical state, removing any potentially accumulated RuO2). This ensures efficient RuO4 formation in each oxygen plasma treatment step, avoiding the "self-limiting stagnation" caused by RuO2 accumulation. Furthermore, the oxidation thickness can be controlled to the atomic level, preventing grain steps caused by prolonged oxidation and ensuring the sidewall surface remains microscopically smooth, achieving precise control over reducing sidewall surface roughness.

[0063] In some embodiments, during the first process, the flow rate of the first gas (oxygen) used each time is 50 sccm to 200 sccm. For example, the flow rate of the first gas (oxygen) can be 50 sccm, 60 sccm, 80 sccm, 100 sccm, 110 sccm, 150 sccm, 180 sccm or 200 sccm, or any value between any two of the aforementioned flow rates.

[0064] In some embodiments, during the first treatment, the temperature at which the first gas (oxygen) is used each time is between 10°C and 125°C. For example, the temperature can be 10°C, 20°C, 30°C, 40°C, 50°C, 60°C, 70°C, 80°C, 90°C, 100°C, 110°C, 120°C, or 125°C, or any value between any two of the aforementioned temperature values. RuO4 begins to decompose at around 125°C, reverting to solid RuO2. This means that if the oxidation temperature is too low, the reaction rate will be too slow; while if the oxidation temperature is too high (especially above 125°C), the newly generated RuO4 may not have enough time to be removed and will decompose on the sidewall surface or within the cavity, thus promoting the accumulation of RuO2. Because the oxidation reaction is selective: the oxidation reaction proceeds much more smoothly on the surface of metallic Ru than on the surface of RuO2, maintaining a window of about 80℃ to 100℃ can quickly remove volatile RuO4 and prevent the sidewall surface from being covered by a large amount of dense RuO2, thereby ensuring that the oxidation reaction can proceed continuously and efficiently.

[0065] In some embodiments, during the first treatment, the pressure of the first gas (oxygen) used each time is 5 mTorr to 20 mTorr. For example, the pressure may be 5 mTorr, 6 mTorr, 7 mTorr, 8 mTorr, 9 mTorr, 10 mTorr, 12 mTorr, 15 mTorr, 18 mTorr, or 20 mTorr, or any value between any two of the aforementioned pressure values.

[0066] In some embodiments, when performing the first process, the source power is 500W to 1000W each time the first gas (oxygen) is used. For example, the source power may be 500W, 550W, 600W, 650W, 700W, 750W, 800W, 850W, 900W, 950W, or 1000W, or any value between any two of the aforementioned power values.

[0067] In some embodiments, during the first process, the bias power is 0W to 30W each time the first gas (oxygen) is used. For example, the bias power may be 0W, 1W, 2W, 5W, 10W, 15W, 20W, 25W or 30W, or any value between any two of the aforementioned power values.

[0068] In some embodiments, the time for each use of the first gas (oxygen) during the first treatment is 5s to 30s. For example, the time can be 5s, 6s, 7s, 8s, 9s, 10s, 12s, 15s, 18s, 20s, 22s, 25s, 28s or 30s, or any value between any two of the aforementioned time values.

[0069] In some embodiments, during the first process, the flow rate of the second gas (hydrogen) used each time is 100 sccm to 300 sccm. For example, the flow rate of the second gas (hydrogen) may be 100 sccm, 110 sccm, 120 sccm, 150 sccm, 180 sccm, 200 sccm, 210 sccm, 250 sccm, 290 sccm, or 300 sccm, or any value between any two of the aforementioned flow rates.

[0070] In some embodiments, during the first process, the temperature of the second gas (hydrogen) used each time is between 10°C and 80°C. For example, the temperature may be 10°C, 20°C, 30°C, 40°C, 50°C, 60°C, 70°C, or 80°C, or any value between any two of the aforementioned temperature values.

[0071] In some embodiments, during the first process, the pressure of the second gas (hydrogen) used each time is 10 mTorr to 30 mTorr. For example, the pressure may be 10 mTorr, 12 mTorr, 15 mTorr, 18 mTorr, 20 mTorr, 25 mTorr, 28 mTorr, or 30 mTorr, or any value between any two of the aforementioned pressure values.

[0072] In some embodiments, when performing the first process, the source power for each use of the second gas (hydrogen) is 800W to 1500W. For example, the source power may be 800W, 900W, 1000W, 1100W, 1200W, 1300W, 1400W, or 1500W, or any value between any two of the aforementioned power values.

[0073] In some embodiments, during the first process, the bias power when using the second gas (hydrogen) is 0W to 30W each time. For example, the bias power can be 0W, 1W, 2W, 5W, 8W, 10W, 12W, 15W, 20W, 25W or 30W, or any value between any two of the aforementioned power values.

[0074] In some embodiments, during the first process, the time for each use of the second gas (hydrogen) is 10s to 60s. For example, the time can be 10s, 11s, 13s, 15s, 18s, 20s, 25s, 30s, 35s, 40s, 45s, 50s, 55s, or 60s, or any value between any two of the aforementioned time values.

[0075] In some embodiments, the oxygen plasma and hydrogen plasma are cycled 2 to 100 times during the first treatment. However, this is not a limitation and can be adjusted according to the roughness.

[0076] In some embodiments, during the first treatment, to determine the optimal time for the oxidation-reduction cycle, initial conditions for the oxidation step can be, for example, a pressure of 10 mTorr, a source power of 500 W, a bias power of 0 W, and an oxygen usage time of 15 s. Initial conditions for the reduction step can be, for example, a pressure of 10 mTorr, a source power of 1000 W, a bias power of 0 W, and a hydrogen usage time of 30 s. When optimizing the oxidation time, the initial conditions for the reduction step can be fixed, and the time for the oxidation step can be varied (e.g., 5 s, 10 s, 15 s, 20 s, 30 s, etc.). The oxidation removal rate (EPC) at each time point is measured using an ellipsometry, and the time corresponding to the point where the oxidation removal rate begins to saturate is the optimal time for the oxidation step. When optimizing the reduction time, the optimal time for the oxidation step can be fixed, while the time for the reduction step can be changed (e.g., 10s, 20s, 30s, 40s, 50s, 60s, etc.). By observing the surface state (X-ray photoelectron spectroscopy (XPS) to measure the residual oxygen content), the shortest time that can reduce the oxygen peak to the minimum and stabilize the amount of oxidation removal is found, which is the optimal time for the reduction step.

[0077] Thus, through the coordinated control of the above-mentioned flow rate, temperature, source power, bias power, pressure, time, etc., the roughness of the sidewall of the first metal pattern 111 is effectively reduced, resulting in a first metal pattern 111 with smoothed sidewalls and uniform linewidth after the first processing.

[0078] Step S14: Form a dielectric layer of low dielectric constant material on the surface of the substrate to cover the top of the first metal pattern.

[0079] Ruthenium is chemically inert, which can lead to poor adhesion with materials with low dielectric constants. Therefore, after improving the sidewall roughness of the first metal pattern 111, the adhesion between the first metal pattern 111 and the subsequently deposited low dielectric constant material dielectric layer can be further improved through the following process method provided in the embodiments of this application. This achieves high-quality adhesion between the first metal pattern 111 and the subsequently deposited low dielectric constant material dielectric layer, eliminating problems such as delamination due to weak adhesion, resulting in high contact resistance and leakage.

[0080] refer to Figure 3 In some embodiments, a fourth treatment may be performed on the exposed surfaces (top and side surfaces) of the first metal pattern 111 using a plasma of hydrocarbon gas to form a carbon-containing compound layer or a hydrocarbon-containing compound layer (not shown) on the surface of the first metal pattern 111.

[0081] In some embodiments, the hydrocarbon gas may include CH4. An inert gas (e.g., He) may be used as a diluent. When CH4 is dissociated in plasma, it generates a series of active groups (e.g., CH3, CH2, CH radicals), which are the main precursors for carbon deposition. The hydrocarbon radicals and ions in the CH4 plasma can form a nanoscale-thick amorphous hydrocarbon film (aC:H) on the Ru surface of the first metal pattern 111 through adsorption, implantation, and cross-linking reactions.

[0082] Then, the surface of the first metal pattern 111 having the above-mentioned compound layer can be treated a fifth time using the vapor of the coupling agent, and selective grafting can be achieved under infrared heating to form a monolayer adhesion-promoting layer (retaining C-containing dangling bonds) (not shown) on the surface of the first metal pattern 111, establishing an organic-inorganic interface bridge on the surface of the Ru material first metal pattern 111 to achieve high-quality adhesion with the dielectric layer of the subsequently deposited low dielectric constant material.

[0083] In some embodiments, the coupling agent may include aminosilane or vinylsilane, etc.

[0084] refer to Figure 4 In some embodiments, a deposition process can be used to form a dielectric layer 12 on the surface of the substrate 10, and the dielectric layer 12 has a sufficient deposition thickness to completely cover the top of the first metal pattern 111, so that the first metal pattern 111 is entirely located in the dielectric layer 12 and below the surface (top surface) of the dielectric layer 12. The height distance between the surface of the dielectric layer 12 and the top of the first metal pattern 111 is the height of the via to be formed subsequently.

[0085] When there are multiple first metal patterns, the deposited dielectric layer can completely fill the gap between adjacent first metal patterns, or fill it to form a seal between adjacent first metal patterns, so as to form an air gap between adjacent first metal patterns.

[0086] In some embodiments, the material of the dielectric layer 12 may include a low dielectric constant material (or an ultra-low dielectric constant material), etc.

[0087] In some embodiments, the material of the dielectric layer 12 includes a silicon-based low dielectric constant material (or a silicon-based ultra-low dielectric constant material), such as SiCN, SiOCH, etc.

[0088] By performing the fourth and fifth treatments on the surface of the first metal pattern 111, a monolayer adhesion-promoting layer is formed on the surface of the first metal pattern 111, establishing an organic-inorganic interface bridge on the surface of the Ru material first metal pattern 111. This achieves high-quality adhesion between the dielectric layer 12 of the low dielectric constant material and the first metal pattern 111, eliminating the problems of high contact resistance and leakage caused by delamination due to weak adhesion between them in the past.

[0089] Step S15: Form a through hole on the surface of the dielectric layer, with the bottom connected to the top of the first metal pattern.

[0090] refer to Figure 5 In some embodiments, patterning processes, such as photolithography and etching, can be used to form a through-hole 13 on the surface of the dielectric layer 12, with the bottom connected to the top of the first metal pattern 111.

[0091] A metal through-hole can be formed by filling the through-hole 13 with metal. The metal used to fill the through-hole 13 (the second metal layer) may include copper (Cu) or the like.

[0092] Step S16: Use nitrogen free radicals to perform a second treatment on the sidewalls of the via to modify the surface of the low dielectric constant material on the sidewalls of the via.

[0093] For back-end logic processes, the diffusion barrier layer in copper (Cu) vias typically uses a two-layer structure combining tantalum nitride (TaN) and tantalum (Ta). At advanced nodes, as the pattern density of the first metal pattern increases, the diameter of the via decreases, requiring increasingly thinner overall films of the TaN and Ta combination diffusion barrier layer. This results in poorer interfacial affinity of the diffusion barrier layer, often leading to pitting and peeling defects, causing low yields and making it difficult to further reduce the total thickness of the diffusion barrier layer. Furthermore, since the diffusion barrier layer is deposited not only on the sidewalls of the via but also on the bottom, for small-sized vias at advanced nodes, this portion deposited at the bottom further increases contact resistance. These problems lead to severe RC delay, making it difficult to reduce back-end contact resistance. Therefore, the process methods provided in this application can improve these problems, effectively reducing the total thickness of the diffusion barrier layer, lowering back-end contact resistance and RC delay, and improving interconnect reliability and stability.

[0094] refer to Figure 6 In some embodiments, a vapor-phase self-assembly process can be used, and organic molecules containing thiols (-SH) or silicon (Si) can be used as precursors. A diluent gas can be added to selectively form a monolayer organic hydrophobic layer 14 on the exposed surface of the first metal pattern 111 at the bottom of the via 13. This layer is used to prevent tantalum layer deposition on the bottom of the via 13 by inhibiting tantalum layer deposition on the surface of the organic hydrophobic layer 14 during subsequent tantalum layer deposition, thereby avoiding an increase in the interfacial contact resistance between the upper and lower layers.

[0095] In some embodiments, the thiol-containing organic molecule may include alkyl thiols, such as n-octanethiol C8H17-SH.

[0096] In some embodiments, the silicon-containing organic molecule may include organosilanes (-SiH3) (e.g., aminosilanes, chlorosilanes, alkoxysilanes, etc.) or other molecules containing silicon functional groups.

[0097] In some embodiments, the diluent gas may include at least one of nitrogen, hydrogen, and inert gases (such as argon, helium, etc.).

[0098] refer to Figure 6 In some embodiments, nitrogen radicals excited by metastable particles can be used to perform a second treatment on the sidewalls of the via 13 to improve the adhesion and interfacial diffusion resistance of the low dielectric constant material surface on the sidewalls by modifying the surface of the low dielectric constant material on the sidewalls.

[0099] In some embodiments, by performing a second treatment, nitrogen atoms (active nitrogen species in plasma (mainly nitrogen free radicals)) are adsorbed onto the surface of the low dielectric constant material on the sidewall of the via 13 to form dangling bonds, which can optimize the surface state (surface energy). Therefore, it can enhance the adhesion between tantalum and the low dielectric constant material on the sidewall surface of the via 13, which is beneficial to improving the continuity and uniformity of the subsequently deposited tantalum layer on the sidewall of the via 13. This allows the tantalum layer to be deposited more continuously and uniformly on the surface-modified sidewall of the via 13, thereby reducing the contact resistance.

[0100] Furthermore, through a second treatment, nitrogen atoms (nitrogen free radicals) react with the bonding bonds (such as Si-CH3 or Si-H) on the surface of the low dielectric constant material on the sidewall of the through-hole 13 at low energy, forming a nitrogen-rich surface layer on the surface of the low dielectric constant material on the sidewall of the through-hole 13. This reduces defect channels, blocks interfacial diffusion, and effectively prevents the diffusion of metal (such as Cu) atoms, moisture, or other impurities into the porous low dielectric constant material in subsequent processes, thus preventing the degradation of electrical properties (such as increased k-value, increased leakage current, etc.).

[0101] The essence of low-k materials: The "low-k" characteristic of advanced low-k materials (such as SiOCH) originates from their chemical and physical structures. Chemically, it involves replacing the highly polar Si-OH groups in traditional SiO2 with low-polarity Si-CH3 groups, thereby reducing the material's electronic polarizability. Physically, it involves introducing nanoscale pores. Since the k-value of air is approximately 1, it lowers the overall effective dielectric constant. The essence of the second treatment of the sidewalls of the through-hole 13 using nitrogen free radicals excited by metastable particles in this application embodiment is to allow nitrogen atoms to adsorb onto the surface of the low-k material on the sidewalls of the through-hole 13 at low energy, forming dangling bonds. This replaces or covers the Si-CH3 groups on the surface of the low-k material with highly polar, dense Si-N bonds, preventing deep penetration of nitrogen atoms and thus avoiding a sharp increase in the overall k-value of the low-k material.

[0102] By performing a second treatment, the low-k material on the sidewall of the through-hole 13 is superficially modified, causing the reaction to occur only on the surface of the low-k material, forming an extremely thin "skin". This skin can seal the openings of the pores on the surface of the low-k material, but it does not change the structure and stress state of the low-k material itself. Thus, while constructing an effective sealing barrier, the overall low-k characteristics of the medium layer 12 are maintained.

[0103] Furthermore, during the etching process to form the via 13, the plasma damages the low-k material on the sidewalls of the via 13, forming a "modified damage layer". This damage layer can be repaired and stabilized by using nitrogen free radicals excited by metastable particles to perform a second treatment on the sidewalls of the via 13.

[0104] In some embodiments, the nitrogen radicals required for the second treatment can be obtained by exciting nitrogen gas with helium metastable particles and filtering out charged particles therein. The helium metastable particles can be obtained by exciting helium gas and filtering out charged particles therein.

[0105] In some embodiments, during the second process, the flow rate ratio between the nitrogen flow rate and the helium flow rate is 1 to 10 (nitrogen flow rate: helium flow rate = 1:1 to 10:1). For example, the nitrogen to helium flow rate ratio can be 1, 2, 3, 4, 5, 6, 7, 8, 9 or 10, or any value between any two of the aforementioned flow rate ratios.

[0106] In some embodiments, during the second processing, the helium flow rate is between 1000 sccm and 9000 sccm. For example, the helium flow rate can be 1000 sccm, 2000 sccm, 3000 sccm, 4000 sccm, 5000 sccm, 6000 sccm, 7000 sccm, 8000 sccm, or 9000 sccm, or any value between any two of the aforementioned flow rate values.

[0107] In some embodiments, the temperature during the second processing is 50°C to 200°C. For example, the temperature may be 50°C, 60°C, 70°C, 80°C, 90°C, 100°C, 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, or 200°C, or any value between any two of the aforementioned temperature values.

[0108] In some embodiments, when performing the second processing, the source power is 1W to 100W. For example, the source power may be 1W, 2W, 3W, 4W, 5W, 10W, 20W, 30W, 40W, 50W, 60W, 70W, 80W, 90W, or 100W, or any value between any two of the aforementioned power values.

[0109] In some embodiments, the pressure during the second processing is 10 mTorr to 1000 mTorr. For example, the pressure may be 10 mTorr, 20 mTorr, 30 mTorr, 40 mTorr, 50 mTorr, 80 mTorr, 100 mTorr, 200 mTorr, 500 mTorr, 900 mTorr, or 1000 mTorr, or any value between any two of the aforementioned pressure values.

[0110] In some embodiments, the time for performing the second processing is 5s to 300s. For example, the time can be 5s, 6s, 7s, 8s, 9s, 10s, 20s, 50s, 100s, 150s, 200s, 250s, 280s, or 300s, or any value between any two of the aforementioned time values.

[0111] In some embodiments, during the second processing, ion filtering is turned on and bias power is turned off.

[0112] By synergistically controlling the flow ratio, flow rate, temperature, source power, pressure, and time, lower-energy nitrogen free radicals are obtained (achieving a completely isotropic reaction, reducing violent reactions on the structural surface or sputtering reactions on some sidewalls). This enables ultra-low-energy surface modification treatment of the low-dielectric-constant material on the sidewall of via 13, enhancing the adhesion between the subsequently deposited tantalum and the low-dielectric-constant material on the sidewall surface of via 13, and constructing an effective sealing barrier.

[0113] Step S17: Form a tantalum layer on the sidewall of the through hole.

[0114] refer to Figure 7 In some embodiments, a deposition process can be used to form a tantalum layer 15 on the sidewalls of the surface-modified via 13 (the tantalum layer can be simultaneously deposited on the surface of the dielectric layer 12 other than the via 13). Figure 7 (The details are omitted here), allowing the deposited tantalum layer 15 to directly contact the low dielectric constant material on the sidewalls after the second surface treatment. Furthermore, by utilizing the monolayer organic hydrophobic layer 14 deposited on the bottom of the via 13, the deposition of the tantalum layer 15 on the bottom region of the via 13 occupied by the organic hydrophobic layer 14 can be suppressed, and the tantalum layer 15 can be selectively formed on the sidewalls of the via 13 outside the region occupied by the organic hydrophobic layer 14, thereby preventing the tantalum layer 15 from depositing on the surface of the first metal pattern 111 in the bottom region of the via 13 occupied by the organic hydrophobic layer 14.

[0115] In some embodiments, an atomic layer deposition process may be used to conformally form a tantalum layer 15 on the sidewall of the second-processed via 13.

[0116] By using nitrogen free radicals excited by metastable particles to perform a second surface modification on the low-dielectric-constant material on the sidewall of via 13, the adhesion between tantalum and the sidewall surface of the low-dielectric-constant material can be greatly enhanced. This allows the tantalum layer 15 to form a continuous and uniform film on the surface of the surface-modified low-dielectric-constant material on the sidewall, effectively eliminating film pits and peeling defects and improving yield. Furthermore, since the deposition quality of the tantalum layer 15 is significantly improved, it can play an effective diffusion barrier role. This allows the use of a single tantalum layer 15 to serve as the diffusion barrier layer independently, eliminating the need for tantalum nitride in the diffusion barrier layer. This reduces the total thickness of the diffusion barrier layer and effectively reduces the proportion of the diffusion barrier layer's resistance in the overall resistance of via 13.

[0117] refer to Figure 8 In some embodiments, the organic hydrophobic layer 14 can be removed by thermal decomposition. By heating the substrate 10, the organic hydrophobic layer 14 can be heated and thermally decomposed at a high temperature (e.g., 300°C to 400°C), decomposing into gaseous small molecules (such as CH4, C2H4, H2S, etc.), which can be completely removed by vacuuming out the reaction chamber.

[0118] refer to Figure 8 In some embodiments, hydrogen radicals excited by metastable particles can be used to perform a third treatment on the surface of the tantalum layer 15 to reduce the surface state density.

[0119] A third treatment of the tantalum layer 15 surface using metastable particle-excited hydrogen radicals can remove oxide layers and impurities at low energy and low temperature, thus cleaning the surface of the tantalum layer 15. Ta metal surfaces readily form non-stoichiometric tantalum oxide (TaO) with very poor conductivity in air. x Using active hydrogen atoms (hydrogen radicals) in low-temperature hydrogen plasma, TaO generated on the surface of tantalum layer 15 can be... x The process reduces the tantalum layer to metallic Ta and removes residual C impurities or CH-based polymers from the Ta deposition surface (hydrogen radicals can break these bonds, forming volatile CH compounds). Furthermore, active hydrogen atoms can combine with cleaned Ta surface atoms (especially residual oxygen or unsaturated bonds) to form Ta-H bonds, effectively "passivating" dangling bonds and highly active sites, thus reducing surface state density. A clean, uniform, and hydrogen-terminated tantalum layer provides a more ideal nucleation surface for subsequent film deposition, contributing to the growth of denser, more uniform, and higher-crystal-quality films, thereby further reducing contact resistance and RC delay.

[0120] In some embodiments, the hydrogen radicals required for the third treatment can be obtained by exciting hydrogen gas with helium metastable particles and filtering out charged particles therein. The helium metastable particles can be obtained by exciting helium gas and filtering out charged particles therein.

[0121] In some embodiments, during the third processing, argon gas is also added to the hydrogen to adjust the hydrogen concentration. By adding argon gas to the hydrogen, excess hydrogen atoms on the surface of the tantalum layer 15 can be removed, preventing the formation of compounds due to excessive hydrogen atom content reacting with Ta.

[0122] In some embodiments, during the third process, the flow rate ratio between the introduced hydrogen and argon is: hydrogen flow rate : argon flow rate = 1:1 to 1:3. For example, the flow rate ratio of hydrogen to argon can be 1:1, 1:1.1, 1:1.2, 1:1.3, 1:1.5, 1:1.8, 1:2, 1:2.1, 1:2.5, 1:2.9, or 1:3, etc., and the flow rate ratio of argon can vary continuously between 1 and 3.

[0123] In some embodiments, during the third process, the flow rate ratio between the flow rate of the hydrogen and argon mixture and the flow rate of helium is 0.1 to 2 (hydrogen and argon mixture flow rate: helium flow rate = 0.1:1 to 2:1). For example, the flow rate ratio of the hydrogen and argon mixture to helium can be 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9, or 2, or any value between any two of the aforementioned flow rate ratios.

[0124] In some embodiments, during the third processing, the helium flow rate is 1000 sccm to 2000 sccm. For example, the helium flow rate can be 1000 sccm, 1100 sccm, 1200 sccm, 1300 sccm, 1400 sccm, 1500 sccm, 1600 sccm, 1700 sccm, 1800 sccm, 1900 sccm, or 2000 sccm, or any value between any two of the aforementioned flow rates.

[0125] In some embodiments, the temperature during the third processing is 100°C to 200°C. For example, the temperature may be 100°C, 105°C, 110°C, 120°C, 130°C, 140°C, 150°C, 160°C, 170°C, 180°C, 190°C, or 200°C, or any value between any two of the aforementioned temperature values.

[0126] In some embodiments, when performing the third processing, the source power is 100W to 500W. For example, the source power may be 100W, 110W, 130W, 150W, 170W, 200W, 250W, 300W, 350W, 400W, 450W, or 500W, or any value between any two of the aforementioned power values.

[0127] In some embodiments, the pressure during the third processing is 10 mTorr to 1000 mTorr. For example, the pressure may be 10 mTorr, 30 mTorr, 50 mTorr, 70 mTorr, 90 mTorr, 100 mTorr, 200 mTorr, 500 mTorr, 800 mTorr, or 1000 mTorr, or any value between any two of the aforementioned pressure values.

[0128] In some embodiments, the time for performing the third processing is 5s to 300s. For example, the time can be 5s, 6s, 7s, 8s, 9s, 10s, 30s, 50s, 70s, 100s, 150s, 200s, 250s, 290s, or 300s, or any value between any two of the aforementioned time values.

[0129] In some embodiments, during the third processing, ion filtering is turned on and bias power is turned off.

[0130] By synergistically controlling the flow ratio, flow rate, temperature, source power, pressure, and time, lower energy and lower temperature hydrogen radicals can be obtained (achieving a completely isotropic reaction and reducing violent reactions on the structural surface or sputtering reactions on some sidewalls), thus achieving cleaning and passivation of the tantalum layer 15 surface and providing a more ideal nucleation surface for subsequent film deposition.

[0131] In some embodiments, during the third processing, hydrogen free radicals can also be used to simultaneously clean and activate the exposed surface of the first metal pattern 111 at the bottom of the via 13, which can improve the electrical connection performance between the first metal pattern 111 material and the second metal layer material subsequently deposited in the via 13, and further reduce the interface contact resistance.

[0132] Step S18: Fill the through hole with a second metal layer that electrically connects to the first metal pattern.

[0133] refer to Figure 9In some embodiments, a deposition process can be used to fill the vias 13 within the tantalum layer 15 with a second metal layer 16, thus completely filling the vias 13. This allows the filled second metal layer 16 to directly contact the tantalum layer 15 after its surface has undergone a third treatment. This results in the growth of a denser, more uniform, and higher-quality second metal layer 16 film, further reducing contact resistance. Furthermore, the filled second metal layer 16 directly contacts the surface of the first metal pattern 111 exposed at the bottom of the via 13, eliminating the problem of increased contact resistance caused by the deposition of a diffusion barrier layer at the bottom of the via in existing processes. This also improves the interfacial contact quality between the second metal layer 16 and the first metal pattern 111, further reducing contact resistance.

[0134] In some embodiments, the material of the second metal layer 16 includes copper.

[0135] Subsequently, a planarization process (such as chemical mechanical polishing) can be used to remove excess metal material deposited on the surface of the dielectric layer 12, forming copper metal vias in the dielectric layer 12. An upper metal pattern can also be formed on the surface of the dielectric layer 12, as well as an upper dielectric layer covering the upper metal pattern.

[0136] By using nitrogen radicals excited by metastable particles to perform a second treatment on the sidewalls of via 13, the adhesion of tantalum and low-dielectric-constant materials to the sidewall surface is enhanced, improving the deposition quality of the tantalum layer 15 and constructing an effective sealing barrier that can effectively prevent Cu atoms from diffusing into the porous low-dielectric-constant material. A third treatment using hydrogen radicals excited by metastable particles to perform a third treatment on the surface of the tantalum layer 15 deposited on the sidewalls provides a more ideal nucleation surface for the deposition of the second metal layer 16, enabling the growth of a denser, more uniform, and higher-crystal-quality copper film. Therefore, using only a single tantalum layer 15 can independently serve as a diffusion barrier layer, reducing the total thickness of the diffusion barrier layer and its proportion of the overall resistance of the via 13. This reduces the subsequent contact resistance and RC delay, effectively meeting the technical requirements at lower nodes. Furthermore, by reducing the sidewall roughness of the first metal pattern 111, the linewidth uniformity of the first metal pattern 111 is improved, enabling the second metal layer 16 to achieve a high-quality direct electrical connection with the first metal pattern 111, resulting in lower resistance and better interconnect reliability.

[0137] In a second aspect, embodiments of this application also provide a semiconductor structure obtained using a semiconductor structure fabrication method as provided in any of the embodiments of the first aspect described above.

[0138] refer to Figure 9In some embodiments, the semiconductor structure is disposed on a substrate 10. A first metal pattern 111 of ruthenium material is disposed on the surface of the substrate 10. A dielectric layer 12 of low dielectric constant material is also disposed on the surface of the substrate 10, and the first metal pattern 111 is located in the dielectric layer 12. The surface of the dielectric layer 12 is higher than the top surface of the first metal pattern 111, and a through-hole 13 with its bottom connected to the top surface of the first metal pattern 111 is disposed on the surface of the dielectric layer 12. A tantalum layer 15 is disposed on the sidewall of the through-hole 13, and a second metal layer 16 directly electrically connected to the top surface of the first metal pattern 111 is filled in the through-hole 13 within the tantalum layer 15, forming a metal through-hole connecting the first metal pattern 111.

[0139] In some embodiments, one side surface (outer surface) of the tantalum layer 15 is in direct contact with a low dielectric constant material on the sidewall of the via 13, and the other side surface (inner surface) of the tantalum layer 15 is in direct contact with a second metal layer 16 filling the via 13.

[0140] In some embodiments, a diffusion barrier layer is provided between the second metal layer 16 and the dielectric layer 12. The diffusion barrier layer is formed of a tantalum layer 15 (the material of the diffusion barrier layer is tantalum. The diffusion barrier layer does not contain a film layer of materials other than tantalum layer 15, such as tantalum nitride layer).

[0141] In this process, the sidewalls of the first metal pattern 111 undergo a first treatment to reduce roughness, thereby improving the linewidth uniformity of the first metal pattern 111, reducing the risk of short circuits or open circuits, avoiding impact on overlay accuracy, ensuring good connection with the upper metal via, and facilitating an increase in the aspect ratio of the first metal pattern 111 to reduce resistance. The surface of the low-dielectric-constant material on the sidewalls of the via 13 undergoes a second treatment to modify the surface, enhancing adhesion and reducing defect channels. The tantalum layer 15, serving as a diffusion barrier layer, is directly deposited on the surface of the low-dielectric-constant material on the modified sidewalls via its outer surface, improving the uniformity and density of the tantalum layer 15 deposition. Furthermore, the inner surface of the tantalum layer 15 undergoes a third treatment to reduce the surface state density, providing a more ideal nucleation surface. The second metal layer 16 is then deposited and filled effectively on the inner surface of the tantalum layer 15 after the surface state density has been reduced. Thus, by using only the tantalum layer 15 as the diffusion barrier layer, the total thickness of the diffusion barrier layer is reduced (compared to the overall film thickness of the diffusion barrier layer using a combination of TaN and Ta), thereby effectively reducing the proportion of the resistance of the diffusion barrier layer in the total resistance of the via 13, thereby reducing the downstream contact resistance and RC delay.

[0142] In some embodiments, during the fabrication of the semiconductor structure, a monolayer adhesion-promoting layer is formed on the surface of the first metal pattern 111 by performing a fourth and a fifth treatment on the surface of the first metal pattern 111. This establishes an organic-inorganic interface bridge on the surface of the first metal pattern 111 of Ru material, thereby achieving high-quality adhesion between the Ru material and the dielectric layer 12 of the low dielectric constant material. This helps to eliminate problems such as high contact resistance and leakage caused by delamination due to weak adhesion between the materials.

[0143] In some embodiments, when fabricating a semiconductor structure, by first forming a monolayer organic hydrophobic layer 14 on the exposed surface of the first metal pattern 111 at the bottom of the via 13, the deposition of the subsequent tantalum layer 15 on the bottom of the via 13 can be suppressed. After removing the organic hydrophobic layer 14, the second metal layer 16 subsequently filled in the via 13 can be directly electrically connected to the first metal pattern 111 below, thereby further reducing the contact resistance.

[0144] In a third aspect, embodiments of this application also provide a plasma processing apparatus for performing the semiconductor structure fabrication method corresponding to the above embodiments to form the semiconductor structure corresponding to the above embodiments. The plasma processing apparatus includes inductively coupled plasma (ICP) etching equipment or capacitively coupled plasma (CCP) etching equipment, etc.

[0145] In other aspects, embodiments of this application also provide an electronic device, including a semiconductor structure obtained using the semiconductor structure fabrication method of the above embodiments. The electronic device can be a storage device, mobile phone, computer, tablet computer, electronic instrument, television, artificial intelligence device, etc.

[0146] In summary, this embodiment of the application, by recycling plasma of an oxidizing first gas and plasma of a reducing second gas to perform a first treatment on the sidewalls of the first metal pattern 111, can effectively reduce the roughness of the sidewalls of the first metal pattern 111, making the sidewalls smooth, improving the linewidth uniformity, significantly reducing the risk of short circuits or open circuits, ensuring good connection with the upper metal via, and facilitating an increase in the aspect ratio of the first metal pattern 111 to reduce resistance. Furthermore, by using nitrogen free radicals excited by metastable particles to perform a second treatment on the sidewalls of the via 13, the adhesion of the low dielectric constant material to the sidewall surface of the via 13 and its ability to block interfacial diffusion can be enhanced, improving the deposition quality of the tantalum layer 15. This allows a single tantalum layer 15 to function as a diffusion barrier layer, eliminating the need for tantalum nitride in the diffusion barrier layer. Therefore, the total thickness of the diffusion barrier layer can be reduced, effectively reducing the proportion of the diffusion barrier layer's resistance in the overall via 13 resistance, thereby significantly reducing the subsequent contact resistance and RC delay. The process steps in the embodiments of this application are highly compatible, enabling lower resistance and improved interconnect reliability and stability, which well meets the technical requirements of advanced nodes.

[0147] The above are merely preferred embodiments of this application. These embodiments are not intended to limit the scope of protection of this application. Therefore, any equivalent changes made based on the description and drawings of this application should also be included within the scope of protection of this application.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, include: Provide substrate; A first metal layer is formed on the surface of the substrate, the material of the first metal layer including ruthenium; The first metal layer is patterned to form a first metal pattern, and the sidewalls of the first metal pattern have a first roughness. The sidewalls of the first metal pattern are subjected to a first treatment by cyclically using plasma of an oxidizing first gas and plasma of a reducing second gas. The sidewalls of the first metal pattern after the first treatment have a second roughness, which is less than the first roughness. A dielectric layer is formed on the surface of the substrate to cover the top of the first metal pattern, and the material of the dielectric layer includes a low dielectric constant material; A through hole is formed on the surface of the dielectric layer, with the bottom of the hole connecting to the top of the first metal pattern; A second treatment is performed on the sidewalls of the via using nitrogen free radicals excited by metastable particles to modify the surface of the low dielectric constant material on the sidewalls of the via. A tantalum layer is formed on the sidewall of the through hole after the second treatment; A second metal layer electrically connected to the first metal pattern is filled into the through-hole within the tantalum layer.

2. The semiconductor structure fabrication method according to claim 1, characterized in that, During the first process, the plasma of the oxidizing first gas and the plasma of the reducing second gas are used in sequence multiple times, or the plasma of the reducing second gas and the plasma of the oxidizing first gas are used in sequence multiple times, and the plasma of the reducing second gas is used in the last cycle.

3. The semiconductor structure fabrication method according to claim 1, characterized in that, By using plasma of the first oxidizing gas, the ruthenium material on the surface of the protrusions on the sidewall of the first metal pattern is preferentially oxidized to generate volatile ruthenium tetroxide, thereby removing at least a portion of the protrusions and smoothing the sidewall of the first metal pattern. Then, by using plasma of the second reducing gas, the ruthenium dioxide present on the sidewall of the first metal pattern is reduced to reset the surface chemical state. During the first process, the roughness of the sidewall of the first metal pattern is reduced by repeatedly using plasma of the first oxidizing gas and plasma of the second reducing gas.

4. The semiconductor structure fabrication method according to claim 1, characterized in that, Each time the first gas is used, the flow rate is 50 sccm to 200 sccm, the temperature is 10℃ to 125℃, the pressure is 5 mTorr to 20 mTorr, the source power is 500W to 1000W, the bias power is 0W to 30W, and the time is 5s to 30s; and / or, each time the second gas is used, the flow rate is 100 sccm to 300 sccm, the temperature is 10℃ to 80℃, the pressure is 10 mTorr to 30 mTorr, the source power is 800W to 1500W, the bias power is 0W to 30W, and the time is 10s to 60s.

5. The semiconductor structure fabrication method according to claim 1, characterized in that, The first gas includes oxygen; and / or the second gas includes hydrogen.

6. The semiconductor structure fabrication method according to claim 1, characterized in that, By performing the second treatment, nitrogen free radicals react with the bonding bonds on the surface of the low dielectric constant material on the sidewall of the via to form a nitrogen-rich surface layer, thereby modifying the surface of the low dielectric constant material on the sidewall of the via to improve the adhesion and interfacial diffusion blocking ability of the low dielectric constant material surface on the sidewall of the via; and / or, the low dielectric constant material includes a silicon-based low dielectric constant material.

7. The semiconductor structure fabrication method according to claim 1, characterized in that, The nitrogen free radicals are obtained by exciting nitrogen gas with helium metastable particles and filtering out charged particles. The helium metastable particles are obtained by exciting helium gas and filtering out charged particles. During the second treatment, the helium flow rate is 1000 sccm to 9000 sccm, the nitrogen flow rate: helium flow rate = 1:1 to 10:1, the temperature is 50℃ to 200℃, the source power is 1W to 100W, the pressure is 10mTorr to 1000mTorr, the time is 5s to 300s, and the ion filter is turned on while the bias power is turned off.

8. The semiconductor structure fabrication method according to claim 1, characterized in that, After the tantalum layer is formed, the process further includes: using hydrogen radicals excited by metastable particles to perform a third treatment on the surface of the tantalum layer to reduce the surface state density.

9. The semiconductor structure fabrication method according to claim 8, characterized in that, The hydrogen radicals are obtained by exciting hydrogen gas with helium metastable particles and filtering out charged particles. The helium metastable particles are obtained by exciting helium gas and filtering out charged particles. During the third treatment, argon gas is added to the hydrogen gas to adjust its concentration. The helium flow rate is 1000 sccm to 2000 sccm, the hydrogen-argon mixture flow rate:helium flow rate = 0.1:1 to 2:1, the hydrogen flow rate:argon flow rate = 1:1 to 1:3, the temperature is 100℃ to 200℃, the source power is 100W to 500W, the pressure is 10mTorr to 1000mTorr, the time is 5s to 300s, and the ion filter is turned on while the bias power is turned off.

10. A semiconductor structure, characterized in that, Obtained using the semiconductor structure fabrication method as described in any one of claims 1-9.

Images