Double Type-C interface circuit and display device
By designing a dual Type-C interface circuit, the problems of insufficient functional compatibility, low resource utilization, and security risks in existing equipment are solved. It achieves functional complementarity, resource reuse, and security interlocking, thereby improving the user experience and signal stability of the equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN G WORLD TECH INC CO
- Filing Date
- 2026-02-28
- Publication Date
- 2026-05-08
AI Technical Summary
Existing dual Type-C interface devices suffer from insufficient functional compatibility, low resource utilization, prominent security risks, and poor signal stability. They cannot simultaneously support fast charging, high-speed data transmission, and DP projection functions, and lack hardware-level interlocking mechanisms, making them prone to power conflicts and signal interference.
A dual Type-C interface circuit was designed, including a dual Type-C interface module, a signal switching module, a DP projection module, a charging management module, a detection and device identification module, a dual interface interlock control module, and a main control module. The combination of these modules achieves functional complementarity, resource reuse, and safety interlock, avoiding power or signal conflicts.
It achieves functional complementarity between dual Type-C interface devices, improves resource utilization, ensures security and signal stability, avoids power conflicts and signal interference, and enhances the user experience of the devices.
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Abstract
Description
Technical Field
[0001] This invention generally relates to the field of electronic device technology, and specifically to a dual Type-C interface circuit and display device. Background Technology
[0002] With the increasing multifunctionality of consumer electronic devices, the Type-C interface, with its advantages of reversible plug compatibility, high-speed data transmission, flexible power supply, and screen projection expansion, has become the mainstream interface for devices such as tablets, laptops, and portable monitors. To meet the needs of simultaneous connection and parallel use of multiple devices, dual Type-C interface devices are becoming increasingly common, with applications covering complex scenarios such as data transfer between two devices, simultaneous charging and screen projection, and expansion with multiple peripherals. The circuit design of existing dual Type-C interface devices mostly adopts an architecture of "independent channel + simple switching," meaning that each Type-C interface is equipped with independent signal processing, power management, and device identification modules. Basic function switching is achieved through main control software logic, and some solutions also introduce simple signal multiplexing circuits to save hardware resources.
[0003] However, existing technologies have several problems that urgently need to be addressed: First, functional compatibility is insufficient. Most dual Type-C interfaces cannot simultaneously support fast charging, high-speed data transmission, and DP projection, resulting in a "functional mutual exclusion" phenomenon. For example, when one interface is used for charging, the projection function of the other interface will be restricted. Second, resource utilization is low. The independent channel design leads to the repeated occupation of the high-speed signal channel and power management resources of the main control chip, resulting in high hardware costs and limited motherboard layout space. Third, safety hazards are prominent. When both interfaces are connected to power supply devices at the same time, there is a lack of hardware-level interlocking mechanisms, which can easily lead to power conflicts, voltage spikes, and other problems, potentially damaging the internal circuitry of the device. Fourth, signal stability is poor. High-speed signals (such as USB 3.2 data and DP projection video signals) are easily interfered with during switching and multiplexing, resulting in signal reflection and distortion, which affects data transmission rate and projection image quality. Summary of the Invention
[0004] To address the technical problem that existing dual Type-C interface circuit systems and devices cannot achieve "functional complementarity, resource reuse, and security interlocking," a dual Type-C interface circuit is provided.
[0005] To address this, the present invention provides a dual Type-C interface circuit, comprising a dual Type-C interface module, a dual Type-C interface signal switching module, a DP projection module, a charging management module, a detection and device identification module, a device access detection module, a dual-interface interlock control module, and a main control module. The input terminal of the dual Type-C interface module is used to connect to an external device. The output terminal of the dual Type-C interface module is connected to the input terminals of the dual Type-C interface signal switching module, the charging management module, the detection and device identification module, and the device access detection module, respectively. The dual Type-C interface module is also interconnected with the dual-interface interlock control module. The input terminal of the main control module is connected to the output terminals of the DP projection module, the charging management module, the detection and device identification module, and the device access detection module, respectively. The output terminal of the dual Type-C interface signal switching module is connected to the input terminal of the DP projection module. In this scenario, the DP projection module enables the projection function of the display device, the dual-interface interlock control module enables the "mutually exclusive operation" of the two Type-C interfaces to avoid power or signal conflicts when two Type-C interfaces are connected to the device at the same time, the device access detection module can identify whether the device has been connected, and the detection and device identification module can identify the type of the connected device.
[0006] In addition, in the dual Type-C interface circuit according to the first aspect of the present invention, the dual Type-C interface circuit may optionally include a signal preprocessing module disposed between the dual Type-C interface module and the dual Type-C interface signal switching module.
[0007] In addition, in the dual Type-C interface circuit according to the first aspect of the present invention, the dual Type-C interface circuit may optionally include a power protection module disposed between the dual Type-C interface module and the charging management module.
[0008] In addition, in the dual Type-C interface circuit according to the first aspect of the present invention, the dual Type-C interface module may optionally include a P0 Type-C interface submodule and a P1 Type-C interface submodule arranged in parallel.
[0009] In addition, in the dual Type-C interface circuit involved in the first aspect of the present invention, optionally, the detection and device identification module includes a P0 detection and device identification submodule and a P1 detection and device identification submodule.
[0010] In addition, in the dual Type-C interface circuit according to the first aspect of the present invention, optionally, the signal preprocessing module includes a P0 signal preprocessing submodule and a P1 signal preprocessing submodule arranged in parallel.
[0011] In addition, the dual Type-C interface circuit according to the first aspect of the present invention may optionally include a P0 power supply output module disposed between the P0 Type-C interface and the main control module, and a P1 power supply output module disposed between the P1 Type-C interface and the main control module.
[0012] In addition, in the dual Type-C interface circuit involved in the first aspect of the present invention, optionally, the device access detection module includes a P0 device access detection submodule and a P1 device access detection submodule arranged in parallel.
[0013] In addition, in the dual Type-C interface circuit involved in the first aspect of the present invention, optionally, the power protection module includes a P0 power protection sub-module and a P1 power protection sub-module arranged in parallel, and the P0 power protection sub-module includes a power switch chip and a voltage divider circuit connected to the overvoltage detection terminal of the power switch chip.
[0014] A second aspect of the present invention provides a display device including the dual Type-C interface circuit described in the first aspect.
[0015] According to the present invention, a dual Type-C interface circuit that features "complementary functions, resource reuse, and security interlocking" can be provided. Attached Figure Description
[0016] The invention will now be explained in further detail by way of example only with reference to the accompanying drawings.
[0017] Figure 1 This is a structural schematic diagram showing one angle of the display device involved in the example of the present invention.
[0018] Figure 2 This is a functional block diagram illustrating an example of a dual Type-C interface circuit involved in an example of the present invention.
[0019] Figure 3 This is a functional block diagram illustrating another example of the dual Type-C interface circuit involved in the present invention.
[0020] Figure 4 This is a functional block diagram of the P0 Type-C interface involved in the example of the present invention.
[0021] Figure 5 This is a functional block diagram of the P1 Type-C interface involved in the example of the present invention.
[0022] Figure 6 This is a circuit diagram illustrating the P0 Type-C interface submodule involved in the example of the present invention.
[0023] Figure 7 This is a circuit diagram illustrating the P1 Type-C interface submodule involved in the example of the present invention.
[0024] Figure 8 This is a circuit diagram illustrating the signal preprocessing module involved in an example of the present invention.
[0025] Figure 9 This is a circuit diagram illustrating the dual Type-C interface signal switching module involved in the example of the present invention.
[0026] Figure 10 This is a functional block diagram illustrating the screen projection implementation involved in the example of the present invention.
[0027] Figure 11 This is a circuit diagram illustrating the P0 power protection submodule involved in an example of the present invention.
[0028] Figure 12 This is a circuit diagram illustrating the P1 detection and device identification submodule involved in an example of the present invention.
[0029] Figure 13 This is a circuit diagram illustrating the P0 device access detection submodule involved in the example of the present invention.
[0030] Figure 14 This is a circuit diagram illustrating the dual-interface interlock control module involved in the example of the present invention.
[0031] Figure 15 This is a circuit diagram illustrating the P0 power supply output module according to an example of the present invention.
[0032] Figure reference numerals: Display device…1; Dual Type-C interface circuit…2; Main control module…3; Dual Type-C interface module…21; P0 Type-C interface sub-module…21a; P1 Type-C interface submodule…21b; Dual Type-C interface signal switching module…22; DP projection module…23; DP projection multiplexing submodule…23a; Charging management module…24; Detection and device identification module…25; P0 detection and device identification submodule…25a; P1 detection and device identification submodule…25b; Device access detection module…26; P0 device access detection submodule…26a; P1 device access detection submodule…26b; Dual interface interlock control module…27; Signal preprocessing module…28; P0 signal preprocessing submodule…28a; P1 signal preprocessing submodule…28b; Power protection module…29; P0 power protection submodule…29a; P1 power protection submodule…29b; P0 power output module…41a; P1 power output module…41b; Housing…10; Support component…20. Detailed Implementation
[0033] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same reference numerals are used for the same parts, and repeated descriptions are omitted. Furthermore, the drawings are merely schematic diagrams, and the proportions of the parts or the shapes of the parts may differ from the actual figures.
[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. The terms "comprising" and "having," and any variations thereof, referring to a process, method, system, product, or apparatus that includes or has a series of steps or units, are not necessarily limited to those explicitly listed, but may include or have other steps or units not explicitly listed or inherent to these processes, methods, products, or apparatuses. All methods described in this invention can be performed in any suitable order unless otherwise indicated herein or clearly contradicted by the context.
[0035] Furthermore, the subheadings and similar terms used in the following description of this invention are not intended to limit the content or scope of this invention; they are merely for reading guidance. Such subheadings should not be construed as dividing the content of the article, nor should the content under a subheading be limited to the scope of that subheading.
[0036] The electrical control aspect of this invention refers to the assembly and / or connection of working modules according to electrical wiring requirements to achieve control of equipment (e.g., mechanical equipment). In some examples, the working module may include switching devices, measuring devices, protection devices, and auxiliary devices.
[0037] Figure 1 This is a structural schematic diagram showing one angle of the display device involved in the example of the present invention.
[0038] Reference Figure 1 This invention provides a display device 1 with dual Type-C interfaces, which can be used to display images, text, audio and video information, etc. In some examples, the display device 1 can be a tablet computer (or a personal mobile phone), a mobile phone, a laptop, etc. Preferably, the display device 1 of this invention is a personal mobile phone.
[0039] The display device 1 of the present invention may have dual Type-C interfaces 40 (i.e., two Type-C interfaces). The display device 1 of the present invention can connect to external devices. For example, it can connect to external devices such as USB flash drives and mobile phones to achieve data transmission and can also charge these external devices. It can also connect to a charger to charge the display device 1. Furthermore, it can connect to computers, laptops, portable screens, etc., to achieve screen mirroring functionality from these devices, i.e., to the display device 1.
[0040] In some examples, the display device 1 includes a housing 10, a display screen disposed on the front of the housing 10, a support member 20 disposed on the back of the housing 10 and rotatably connected to the housing 10, dual Type-C interfaces 40 disposed on the side of the housing 10, and dual Type-C interface circuitry 2 disposed within the housing 10. The dual Type-C interfaces 40 may include a P0 Type-C interface 40a and a P1 Type-C interface 40b.
[0041] Figure 2 This is a functional block diagram illustrating an example of the dual Type-C interface circuit 2 involved in the present invention.
[0042] Reference Figure 2 In some examples, the dual Type-C interface circuit 2 may include a dual Type-C interface module 21, a dual Type-C interface signal switching module 22, a DP projection module 23, a charging management module 24, a detection and device identification module 25, a device access detection module 26, a dual interface interlock control module 27, and a main control module 3.
[0043] In some examples, the input of the dual Type-C interface module 21 can be used to connect to external devices, and the output of the dual Type-C interface module 21 can be connected to the input of the dual Type-C interface signal switching module 22, the charging management module 24, the detection and device identification module 25, and the device access detection module 26, respectively.
[0044] In some examples, the dual Type-C interface module 21 can also be interconnected with the dual interface interlock control module 27.
[0045] In some examples, the input of the main control module 3 can be connected to the output of the DP projection module 23, the charging management module 24, the detection and device identification module 25, and the device access detection module 26, respectively.
[0046] In some examples, the output of the dual Type-C interface signal switching module 22 is connected to the input of the DP projection module 23.
[0047] In this case, the DP projection module 23 enables external devices to project their screens onto the display device 1. The dual-interface interlock control module 27 enables the two Type-C interfaces to operate in a mutually exclusive manner, avoiding power or signal conflicts when two Type-C interfaces are connected to external devices at the same time. The device access detection module 26 can identify whether an external device has been connected. The detection and device identification module 25 can identify the type of external device connected.
[0048] Figure 3 This is a functional block diagram illustrating another example of the dual Type-C interface circuit 2 involved in the example of the present invention.
[0049] Reference Figure 3 In some examples, the dual Type-C interface circuit 2 may also include a signal preprocessing module 28 disposed between the dual Type-C interface module 21 and the dual Type-C interface signal switching module 22. The signal preprocessing module 28 can be used to perform preprocessing such as noise reduction and impedance calibration on the signals of the two Type-C interfaces to ensure the stability of the signals (screen projection signals or data transmission).
[0050] In some examples, the dual Type-C interface circuit 2 may also include a power protection module 29 disposed between the dual Type-C interface module 21 and the charging management module 24. The power protection module 29 can be used to ensure the safe transmission of the voltage input from the external device to the charging management module 24 when the external device is charging the display device 1. In addition, the power protection module 29 can also implement overvoltage protection, connection detection, and other functions.
[0051] Figure 4 This diagram illustrates the functional modules of the P0 Type-C interface 40a as described in this invention. The functional modules of the P0 Type-C interface 40a can be referred to as the P0 Type-C interface circuit. Figure 4 It can also be called the functional block diagram of the P0 Type-C interface circuit.
[0052] Reference Figure 4The output of the P0 Type-C interface submodule 21a can be connected to the inputs of the P0 signal preprocessing submodule 28a, the P0 power protection submodule 29a, the P0 detection and device identification submodule 25a, and the P0 device access detection submodule 26a, respectively. The output of the P0 signal preprocessing submodule 28a can be connected to the input of the dual Type-C interface signal switching module 22. The output of the P0 power protection submodule 29a can be connected to the input of the charging management module 24. The input of the main control module 3 can be connected to the outputs of the P0 DP projection submodule 23a, the charging management module 24, the P0 detection and device identification submodule 25a, and the P0 device access detection submodule 26a, respectively. The output of the dual Type-C interface signal switching module 22 is connected to the input of the P0 DP projection submodule 23a.
[0053] In this case, in the circuit module involved in the P0 Type-C interface 40a, the P0 DP projection submodule 23a can realize the projection function of the external device to the display device 1 at the P0 Type-C interface 40a. The P0 device access detection submodule 26a can identify whether the external device has been connected at the P0 Type-C interface 40a. The P0 detection and device identification module 25a can identify the type of the external device connected at the P0 Type-C interface 40a.
[0054] In some examples, the P0 Type-C interface circuit may also include a P0 power supply output module 41a. The output of the main control module 3 can be connected to the P0 Type-C interface submodule 21a via the P0 power supply output module 41a. The P0 power supply output module 41a can provide power to external devices (such as USB flash drives, headphones, etc.).
[0055] Figure 5 This diagram illustrates the functional modules involved in the P1 Type-C interface 40b according to an example of the present invention. The functional modules involved in the P1 Type-C interface 40b can be referred to as the P1 Type-C interface circuit. Figure 5 It can also be called the functional block diagram of the P1 Type-C interface circuit.
[0056] Reference Figure 5In some examples, the output of the P1 Type-C interface submodule 21b can be connected to the P1 signal preprocessing submodule 28b, the P1 power protection submodule 29b, the P1 detection and device identification submodule 25b, and the P1 device access detection submodule 26b, respectively. The output of the P1 signal preprocessing submodule 28b can be connected to the input of the dual Type-C interface signal switching module 22. The output of the P1 power protection submodule 29b can be connected to the charging management module 24. The input of the main control module 3 can be connected to the outputs of the dual Type-C interface signal switching module 22, the charging management module 24, the P1 detection and device identification submodule 25b, and the P1 device access detection submodule 26b, respectively.
[0057] In some examples, a P1DP projection submodule can also be set between the dual Type-C interface signal switching module 22 and the main control module 3. This enables external devices to project their screens onto the display device 1 via the P1 Type-C interface.
[0058] In this case, in the circuit module involved in the P1 Type-C interface 40b, the P1 device access detection submodule 26b can identify whether an external device has been connected at the P0 Type-C interface 40a, and the P1 detection and device identification submodule 25b can identify the type of the external device connected at the P1 Type-C interface 40b.
[0059] In some examples, the P1 Type-C interface circuit may also include a P1 power supply output module 41b. The output of the main control module 3 can be connected to the P1 Type-C interface submodule 21b via the P1 power supply output module 41b. The P1 power supply output module 41b can provide power to external devices (such as USB flash drives, headphones, etc.).
[0060] The composition and function of each module are described in detail below with reference to the circuit diagram.
[0061] In some examples, a dual Type-C interface module may include a P0 Type-C interface submodule 21a and a P1 Type-C interface submodule 21b.
[0062] Figure 6 This is a circuit diagram of the P0 Type-C interface submodule 21a involved in the example of the present invention.
[0063] P0 Type-C interface submodule 21a is used to realize the mechanical and electrical connection between external devices (chargers / monitors / USB flash drives, etc.) and display device 1.
[0064] In some examples, the P0 Type-C interface submodule 21a may include a Type-C female connector J2801, which is the physical interface. The corresponding pins of the Type-C female connector J2801 can be connected to the power supply VBUS_P0, USB differential signal pins (USB_P0_DP, USB_P0_DN), auxiliary signal pins (AUX-, AUX+), CC detection pins (CC1, CC2), etc.
[0065] Specifically, pins 1, 2, 3, 4, 31, 32, and 33 of the Type-C female connector J2801 can be interconnected and connected to the power supply VBUS_P0. Pin 6 of the Type-C female connector J2801 can be connected to the USB differential signal pin USB_P0_DP, and pin 7 of the Type-C female connector J2801 can be connected to the USB differential signal pin USB_P0_DN.
[0066] In some examples, the P0 Type-C interface submodule 21a may include a surge protection device EOS, which protects against 300V surges from the VBUS power supply (such as high-voltage surges when plugging and unplugging a charger) to prevent damage to the internal circuitry. The surge protection device EOS can be connected to pin 1 of the Type-C female connector J2801.
[0067] In some examples, the P0 Type-C interface submodule 21a may include TVS diodes (Transient Voltage Suppressor Diodes) (D2801, D2802, T2901~T2904, T2905, T2906, etc.) for providing comprehensive electrostatic discharge (ESD) / overvoltage protection to the power, signal, and auxiliary pins of the P0 Type-C interface. The two pins of the anode of diodes D2801 and D2802 are grounded, and the cathodes of diodes D2801 and D2802 are interconnected with pin 1 of the Type-C female connector J2801. The anodes of diodes T2901, T2902, T2903, and T2904 are grounded. The cathode of diode T2901 is connected to pin 6 of Type-C connector J2801, the cathode of diode T2902 is connected to pin 7 of Type-C connector J2801, the cathode of diode T2903 is connected to pin 9 of Type-C connector J2801, and the cathode of diode T2904 is connected to pin 11 of Type-C connector J2801. The anodes of diodes T2905 and T2906 are grounded. The cathode of diode T2905 is connected to pin 17 of Type-C connector J2801, and the cathode of diode T2906 is connected to pin 16 of Type-C connector J2801.
[0068] Specifically, TVS diodes D2801 and D2802 are used to provide secondary overvoltage protection for the VBUS power pin (VBUS_P0) of the P0 interface; together with the surge protection device EOS (±300V), after the surge protection device EOS absorbs the high-power surge, it further clamps the VBUS voltage to prevent residual high voltage from entering the subsequent charging management module 24, and at the same time protects against instantaneous voltage surges when plugging and unplugging the charger.
[0069] TVS diodes T2901 and T2902 are used to protect the USB differential signal pins (USB_P0_DP, USB_P0_DN) of the P0 interface, preventing damage to the high-speed signal channel from static electricity from the human body and voltage surges during device insertion and removal, and ensuring the stability of data transmission or DP projection signals.
[0070] TVS diodes T2903 and T2904 are used to protect the auxiliary signal pins (AUX-, AUX+) of the P0 Type-C interface, providing electrostatic discharge protection for the AUX auxiliary signal of the P0 Type-C interface to avoid signal interference or pin damage.
[0071] TVS diodes T2905 and T2906 are used to protect the CC detection pins (CC1, CC2) of the P0 interface. The CC pins are the core channel for external device identification. The TVS diodes can prevent electrostatic discharge from damaging the CC detection chip (AW35615) and ensure the reliability of device type identification.
[0072] In some examples, the P0 Type-C interface submodule 21a may include capacitor C2801, which is used for power filtering of power supply VBUS_P0 to reduce voltage fluctuations. One end of capacitor C2801 is grounded, and the other end is connected to pin 1 of the Type-C female connector J2801.
[0073] The USB differential signal pins USB_P0_DP and USB_P0_DN are used to connect to the dual Type-C differential signal preprocessing circuit. Figure 8 ).
[0074] The CC detection pins CC1 / CC2 are used to connect to the AW35615CSR (CC detection chip, used to identify device type).
[0075] Figure 7 This is a circuit diagram of the P1 Type-C interface submodule 21b involved in the example of the present invention.
[0076] Reference Figure 7 The P1 Type-C interface submodule 21b is used to realize the mechanical and electrical connection between external devices (chargers, monitors, USB flash drives, etc.) and display device 1.
[0077] The P1 Type-C interface submodule 21b may include modules for power input / protection, signal distribution, CC detection, and electrostatic discharge protection, and serves as the connection hub between the P1 Type-C interface and other modules in the system.
[0078] The P1 Type-C interface submodule 21b may include a Type-C female connector J2901, which is the signal conversion core of the P1 Type-C interface.
[0079] The Type-C female connector J2901 connects to the basic signals of P1 (USB_P1_DP, USB_P1_DN, USB_P1_SBU1, USB_P1_SBU2) on the left side and outputs high-speed differential signals (such as Lane3, Lane2, etc.) on the right side, realizing the conversion of "basic signal → high-speed signal". Pins 1, 2, 3, 4, 31, 32, and 33 of the Type-C female connector J2901 are interconnected.
[0080] In some examples, the P1 Type-C interface submodule 21b may include a VBUS power input pin VBUS_P1, which is used to carry charging / supply current.
[0081] In some examples, the P1 Type-C interface submodule 21b may include a surge protection device EOS, which absorbs transient high voltages of ±300V (such as surges from plugging and unplugging a charger) to protect the power supply circuitry. The surge protection device EOS may be connected to pin 1 of the Type-C female connector J2901.
[0082] In some examples, the P1 Type-C interface submodule 21b may include capacitor C309, which is used to stabilize the VBUS voltage and reduce power supply noise. One end of capacitor C309 is grounded, and the other end is connected to pin 1 of the Type-C female connector J2901.
[0083] In some examples, the P1 Type-C interface submodule 21b may include TVS diodes D2901 and D2902, which are used for secondary overvoltage protection of the VBUS power supply, forming a "primary + secondary" power protection system in conjunction with the surge protection device EOS. The two pins of the anode of TVS diodes D2901 and D2902 are grounded, and the cathode of TVS diodes D2901 and D2902 is connected to pin 1 of the Type-C female connector J2901.
[0084] In some examples, the P1 Type-C interface submodule 21b may include TVS diodes T2801, T2802, T2803, and T2804, which are used to protect the signal pins (USB_P1_DP, USB_P1_DN, USB_P1_SBU1, USB_P1_SBU2) of the Type-C female connector J2901, absorbing electrostatic discharge and preventing damage to the signal pins. The anodes of TVS diodes T2801, T2802, T2803, and T2804 are grounded. The cathode of TVS diode T2801 is connected to pin 6 of the Type-C female connector J2901, the cathode of TVS diode T2802 is connected to pin 7 of the Type-C female connector J2901, the cathode of TVS diode T2803 is connected to pin 9 of the Type-C female connector J2901, and the cathode of TVS diode T2804 is connected to pin 11 of the Type-C female connector J2901.
[0085] MT6375_PD_CC1 and MT6375_PD_CC2 are the CC detection pins of the P1 interface, which reuse the CC function of the MT6375 charging chip to realize device type identification (such as identifying chargers and displays).
[0086] The auxiliary pins USB_P1_SBU1 and USB_P1_SBU2 can also support extended functions such as audio and FM antenna.
[0087] In some examples, P0 Type-C interface submodule 21a and P1 Type-C interface submodule 21b can be configured in parallel.
[0088] In some examples, the signal preprocessing module 28 may include a P0 signal preprocessing submodule 28a and a P1 signal preprocessing submodule 28b.
[0089] Figure 8 This diagram illustrates a circuit diagram of the signal preprocessing module 28 according to an example of the present invention. It includes circuit diagrams of the P0 signal preprocessing submodule 28a and the P1 signal preprocessing submodule 28b. The P0 signal preprocessing submodule 28a and the P1 signal preprocessing submodule 28b can be configured in parallel.
[0090] Reference Figure 8 The P0 signal preprocessing submodule 28a may include a BEAD1600 ferrite bead and a BEAD1601 ferrite bead. Both are used to filter high-frequency noise (such as WiFi interference) in the signal, avoiding signal interference during Type-C interface screen mirroring.
[0091] The P0 signal preprocessing submodule 28a may include resistors R1610 and R1609. Resistor R1610 is used to prevent the signal output to the signal pin USB_P0_CHG_DM from being reflected or distorted. Resistor R1609 is used to prevent the signal output to the signal pin USB_P0_CHG_DP from being reflected or distorted.
[0092] The P1 signal preprocessing submodule 28b may include BEAD1603 and BEAD1604 ferrite beads. These are used to filter high-frequency noise (such as WiFi interference) in the signal, avoiding signal interference when using the Type-C interface for screen mirroring.
[0093] The P1 signal preprocessing submodule 28b may include resistors R1652 and R1651. Resistor R1652 is used to prevent the signal output to the signal pin USB_P1_CHG_DM from being reflected or distorted. Resistor R1651 is used to prevent the signal output to the signal pin USB_P1_CHG_DP from being reflected or distorted.
[0094] Figure 9 This is a circuit diagram of the dual Type-C interface signal switching module 22 involved in the example of the present invention.
[0095] Reference Figure 9 The dual Type-C interface signal switching module 22 can be a signal multiplexing and switching circuit for two Type-C interfaces, used to realize the sharing of main control resources between the two interfaces.
[0096] In some examples, the dual Type-C interface signal switching module 22 may include an analog switch U1608, which is a two-to-one switch that controls the signal path through the S signal terminal and the / OE signal terminal. Specifically, when S=0, pins 4 (HSD1+) and 5 (HSD1-) of the analog switch U1608 are turned on, selecting the signal of the P0 Type-C interface (e.g., when a USB flash drive or monitor is plugged into the P0 Type-C interface, the signal goes through the P0 Type-C interface path); when S=1, pins 6 (HSD2-) and 7 (HSD2+) of the analog switch U1608 are turned on, selecting the signal of the P1 Type-C interface (e.g., when a USB flash drive or monitor is plugged into the P1 Type-C interface, the signal goes through the P1 Type-C interface path); when / OE=1, all paths are closed (no device is connected, saving power).
[0097] The model number of the analog switch U1608 can be U_SGM7227_UTQFN.
[0098] In some examples, the dual Type-C interface signal switching module 22 may include capacitor C1680, which is used to filter the power supply of analog switch U1608 to ensure stable switching. One end of capacitor C1680 is connected to pin 8 (OE) of analog switch U1608 and ground, and the other end is connected to power supply EXT_VDD3V3.
[0099] Figure 8 The preprocessed signal from the P0 signal preprocessing submodule 28a can be transmitted to pins 4 and 5 of the analog switch U1608. Figure 8 The signal preprocessed by the P1 signal preprocessing submodule 28b can be transmitted to pins 6 and 7 of the analog switch U1608. Both signals are then processed by the analog switch U1608 and output to pins 1 and 2.
[0100] Figure 10 This is a functional block diagram illustrating the screen projection implementation involved in the example of the present invention.
[0101] In some examples, the screen projection function from an external device to the display device 1 can be implemented through the P0 Type-C interface 40a and the P0 Type-C interface submodule 21a.
[0102] Reference Figure 10 The dual Type-C interface circuit 2 may also include a CC detection chip 5, an interface conversion chip 51, and an audio output module 52.
[0103] In some examples, the output of the P0 Type-C interface submodule 21a can be connected to the DP projection module 23. The first output of the DP projection module 23 can be connected to the interface conversion chip 51, and the output of the interface conversion chip 51 can be connected to the main control module 3. The second output of the DP projection module 23 can be connected to the audio output module 52, and the output of the audio output module 52 can be connected to the main control module 3. The P0 Type-C interface submodule 21a is interconnected with the CC detection chip 50, and the CC detection chip 50 is interconnected with the main control module.
[0104] In some instances, the P0 Type-C interface submodule 21a is responsible for receiving high-definition audio and video signals transmitted by external devices (such as computers and mobile phones) via the DP protocol.
[0105] In some instances, the signals transmitted by the P0 Type-C interface submodule 21a may include a DP Data Lane (four high-speed video data channels), an AUX channel (for device negotiation and control), and a CC channel (for detecting and configuring the connection status of the P0 Type-C interface). The CC channel can be connected to a CC detection chip 50. In some examples, the CC detection chip 50 can be an AW35615 chip, which is a CC logic control chip responsible for managing the connection detection, role recognition, and power negotiation of the Type-C interface.
[0106] In some examples, the DP projection module 23 may include: decoding the DP signal input from the P0 Type-C interface 40a, converting it into a format recognizable by the interface conversion chip 51, and then outputting it to the main control module 3; and transmitting audio signals to the main control module 3 through the audio output module 52.
[0107] In some examples, the data output to the interface conversion chip 51 may include a Clock and a Data Lane.
[0108] In some examples, the DP projection module 23 can be an LT7911D projection chip. In some examples, the interface conversion chip 51 can be a MIPI CSI-1 bridge chip. In some examples, the main control module 3 can be a main control chip MT8391.
[0109] In some examples, the CC detection chip 50 can be interconnected with the main control module 3 via an I2C bus.
[0110] Figure 11 This is a circuit diagram of the P0 power protection submodule 29a according to an example of the present invention.
[0111] Reference Figure 11 The P0 power protection submodule 29a is the core circuit of the display device 1 that receives external power charging through the P0 Type-C interface 40a. It is responsible for safely transmitting the voltage input from the external charger to the charging management module 24, and at the same time realizes functions such as overvoltage protection and access detection.
[0112] In some examples, the P0 power protection submodule 29a may include a power switch chip U2802. The core function of the power switch chip U2802 is to control the "on / off" of the VBUS power supply. It can support a maximum current of 5A (meeting fast charging requirements).
[0113] Pins B2, C2, D2, E1, E2, and B3 of the power switch chip U2802 can be interconnected and connected to the power supply VBUS_P0.
[0114] The pin connections of the power switch chip U2802 include at least one of the following: the power input terminal VBUS_P0 is used to connect to the VBUS power supply of an external charger; the power output terminals VBUS1 to VBUS5 are used to connect to the VBUS input of the charging management module 24; the enable terminal EN_L is used to receive the enable signal from the main control module 3 to control the chip to turn on / off; and the overvoltage detection terminal OVLO is used to connect to a voltage divider circuit to detect whether the VBUS voltage exceeds the limit. The main control enable signal TYPEC_P0_EN is output by the main control module 3 and is used to control the power path to turn on / off.
[0115] In some examples, the P0 power protection submodule 29a may include MOSFETs Q2802 and Q2805, which are used to amplify the master control enable signal and drive the EN_L pin of the power switch chip U2802. The gate of MOSFET Q2802, the drain of MOSFET Q2805, and the master control enable signal TYPEC_P0_EN are interconnected. The gate of MOSFET Q2805 is connected to the drive signal USB_DRV_VBUS. The source of MOSFET Q2802 is grounded, and the source of MOSFET Q2805 is also grounded.
[0116] In some examples, the P0 power protection submodule 29a may include resistors R2807 and R2808, which are used to connect the power supply VIO18_PMU to provide operating voltage for the MOSFET.
[0117] In some examples, the P0 power protection submodule 29a may include a resistor R2809, which is a pull-down resistor for the MOSFET to ensure stable signal levels when the signal is idle.
[0118] In some examples, the P0 power protection submodule 29a may include a voltage divider circuit composed of resistors R2811 and R2810, which is used to detect the VBUS voltage. When the VBUS voltage exceeds the threshold, the voltage divider signal triggers the OVLO pin of the power switch chip U2802, and the chip automatically cuts off the power supply path to achieve overvoltage protection. One end of resistor R2811 and one end of resistor R2810 are interconnected and connected to pin B3 of the power switch chip U2802, the other end of resistor R2810 is connected to the power supply VBUS_P0, and the other end of resistor R2811 is grounded.
[0119] In some examples, the P0 power protection submodule 29a may include capacitor C2808, which is a filter capacitor for the VBUS power supply used to stabilize the input voltage. One end of capacitor C2808 is connected to pin B2 of the power switch chip U2802, and the other end is grounded.
[0120] In some examples, the P0 power protection submodule 29a may include capacitor C2814, which is a filter capacitor for the detection signal to ensure the stability of the TYPEC_P0_PRESENT_1 signal level. One end of capacitor C2814 is connected to pin A1 of the power switch chip U2802, and the other end is grounded.
[0121] In some examples, the P0 power protection submodule 29a may include resistor R2812, which is a pull-up resistor for the TYPEC_P0_PRESENT_1 signal to ensure the validity of the signal output. One end of resistor R2812 is connected to pin A2 of the power switch chip U2802, and the other end is connected to the power supply VIO18_PMU.
[0122] When the charger is connected to the P0 Type-C interface 40a, the TYPEC_P0_PRESENT_1 signal outputs a high level, feeding back the status "P0 Type-C interface 40a is charging" to the main controller.
[0123] The VBUS power from the external charger is input through the power input terminal VBUS_P0, filtered by capacitor C2808, and then enters the power switch chip U2802. The main control module 3 outputs the TYPEC_P0_EN_N signal, which is amplified by MOSFETs Q2802 and Q2805 and drives the EN_L pin of the power switch chip U2802 to turn on the power supply. The voltage divider circuit composed of resistors R2811 and R2810 monitors the VBUS voltage in real time. If the voltage exceeds the limit, it triggers the OVLO pin of the power switch chip U2802 to cut off the power. After the external charger is connected, the TYPEC_P0_PRESENT_1 signal outputs a high level to feed back the charging status to the main control module. Pins VBUS1 to VBUS5 of the power switch chip U2802 deliver stable VBUS power to the charging management module 24 to complete the charging process.
[0124] In some examples, the circuit structure of the P1 power protection submodule 29b can be identical to that of the P0 power protection submodule 29a. In other words, the two differ only in their corresponding interfaces, device numbers, and output signals; their functional logic and operating principles are completely identical.
[0125] In some examples, the P0 power protection submodule 29a and the P1 power protection submodule 29b can be configured in parallel. They are responsible for power protection of the P0 Type-C interface 40a and the P1 Type-C interface 40b, respectively.
[0126] Figure 12 This is a circuit diagram showing the P1 detection and device identification submodule 25b involved in the example of the present invention.
[0127] Reference Figure 12The P1 detection and device identification submodule 25b is the "CC detection and power control circuit" of the P1 Type-C interface 40b. Its core function is to identify the type of device connected to the P1 Type-C interface (such as a charger, USB flash drive or monitor) and control the power path of the interface. It is a key module for the P1 Type-C interface to realize "intelligent adaptation of peripherals".
[0128] The CC pin of the P1 Type-C interface 40b performs three tasks through signal interaction: ① Detecting device access: Determining whether an external device (such as a charger or USB flash drive) is plugged into the P1 Type-C interface; ② Identifying device type: Distinguishing between a "charger", a "data device (USB flash drive)", or a "display device (monitor)"; ③ Controlling power path: Turning on / adjusting the interface's power output according to the device type (e.g., turning on the charging power when a charger is plugged in).
[0129] In some examples, the P1 detection and device identification submodule 25b may include a detection chip U2903, which communicates with peripherals via the CC1 and CC2 pins, identifies the device type, and outputs control signals.
[0130] Specifically, the VCONN pin of the detection chip U2903 can be used to power the E-Marker chip (the identifier of high-speed peripherals) of the P1 Type-C interface, ensuring that high-speed devices (such as USB 3.2 flash drives) can be recognized.
[0131] In some examples, the P1 detection and device identification submodule 25b may include a power supply chip U2902, which provides a stable operating power supply (EXT_VDD3V3) to the detection chip U2903 to ensure the reliability of the detection function.
[0132] In some examples, the P1 detection and device identification submodule 25b may include capacitors C2913 and C2914, which are power supply filters used to reduce the interference of voltage fluctuations on the detection chip. One end of capacitor C2913 is grounded, and the other end is connected to pin 4 of the power chip U2902; one end of capacitor C2913 is grounded, and the other end is connected to pin 1 of the power chip U2902.
[0133] The I2C communication pins SDA and SCL of the detection chip U2903 are used to enable the CC detection chip U2903 to communicate with the main control module 3 and tell the main control module 3 the "external device type".
[0134] The interrupt signal pin INT_N of the detection chip U2903 is used to send an "interrupt signal" to the main control module 3 when an external device is inserted / removed from the P1 Type-C interface 40b, so that the main control module 3 can respond in time (such as starting the charging process when the charger is plugged in).
[0135] In some examples, the P0 detection and device identification submodule 25a can perform the same functions as the P1 detection and device identification submodule 25b. The P0 detection and device identification submodule 25a can be an AW35615CSR detection chip.
[0136] Figure 13 This is a circuit diagram of the P0 device access detection submodule 26a according to an example of the present invention.
[0137] Reference Figure 13 The P0 device access detection submodule 26a is used to detect whether the P0 Type-C interface 40a is connected to an external device (such as a charger or USB flash drive), and feeds back the "access status" to the main control module 3.
[0138] In some examples, the P0 device access detection submodule 26a may include a MOSFET Q2901, which is a state switching switch. When the power supply VBUS_P0 has voltage, the MOSFET Q2901 is turned on.
[0139] In some examples, the P0 device access detection submodule 26a may include resistors R1664 and R2925. These are used to divide the high voltage (e.g., 5V / 20V) of VBUS_P0, converting it to a safe level recognizable by the MOSFET Q2901 (to prevent high voltage damage to the MOSFET). One end of resistor R1664 is connected to the power supply VBUS_P0, and the other end of resistor R1664, one end of resistor R2925, and the gate interconnect of the MOSFET Q2901 are also connected.
[0140] In some examples, the P0 device access detection submodule 26a may include resistors R2922 and R2923, which form a voltage divider resistor to divide the power supply VIO18_PMU (system low voltage), providing a stable control level for the gate of MOSFET Q2901 and ensuring reliable turn-on / off of the MOSFET. One end of resistor R2922 is connected to the power supply VIO18_PMU, and the other end of resistor R2922 is connected to the drain of MOSFET Q2901; one end of resistor R2923 is connected to the source of MOSFET Q2901, and the other end of resistor R2923 is grounded.
[0141] The detection signal USB1_VBUS_VALID is used to provide feedback information to the main control module 3. When this signal is "low level", it means that the P0 Type-C interface 40a has been connected to the device.
[0142] In some examples, the circuit structure of the P1 device access detection submodule 26b can be the same as that of the P0 device access detection submodule 26a. In other words, the two differ only in their corresponding interfaces, device numbers, and output signals; their functional logic and working principles are completely identical.
[0143] In some examples, the P0 device access detection submodule 26a and the P1 device access detection submodule 26b can be configured in parallel. They can respectively handle device access detection for the P0 Type-C interface 40a and the P1 Type-C interface 40b.
[0144] Figure 14 This is a circuit diagram of the dual-interface interlock control module 27 involved in the example of the present invention.
[0145] Reference Figure 14 The dual-interface interlock control module 27 is a "hardware interlock selection circuit" for dual Type-C interfaces. It is the core anti-conflict module for the dual Type-C interfaces of display device 1. It realizes the "mutual exclusion operation" of the two Type-C interfaces P0 and P1 through hardware logic to avoid power / signal conflicts when the devices are connected at the same time.
[0146] Specifically, when an external device is connected to the P0 Type-C interface 40a, the power / signal path to the P1 Type-C interface 40b is automatically cut off; when a device is connected to the P1 Type-C interface 40b, the path to the P0 Type-C interface is automatically cut off. This avoids power short circuits (e.g., when two chargers are supplying power simultaneously) and signal interference (e.g., when two peripherals are transmitting data simultaneously) caused by the simultaneous operation of both interfaces.
[0147] Interlocking core: The MOSFET Q2804 is turned on / off by controlling the voltage states of VBUS_P0 and VBUS_P1: If the P0 Type-C interface is connected to the charger (i.e., VBUS_P0 has voltage), the MOSFET Q2804 is turned on, pulling down the TYPEC_P1_EN_N voltage, thereby cutting off the power path of the P1 Type-C interface; if the P1 Type-C interface 40b is connected to the charger (i.e., VBUS_P1 has voltage), the TYPEC_P0_EN_N voltage will be pulled down similarly, cutting off the path of the P0 Type-C interface 40a.
[0148] In some examples, the dual-interface interlock control module 27 may include diodes D2806 and D2808, which are used to isolate the VBUS power supply of P0 Type-C interface 40a and P1 Type-C interface 40b, prevent the VBUS power supply from flowing back into the interlock circuit, and protect the MOSFET and control signal.
[0149] In some examples, the dual-interface interlock control module 27 may also include diodes D2807 and D2809. Diodes D2807 and D2809 are marked "NC" (not connected) and actually serve as redundant isolation.
[0150] The anode of diode D2806 is connected to power supply VBUS_P0, and the cathode is connected to the gate of MOSFET Q2804. The anode of diode D2808 is connected to power supply VBUS_P1, and the cathode is connected to the drain of MOSFET Q2804.
[0151] In some examples, the dual-interface interlock control module 27 may include resistors R2831 and R2832, which form a voltage divider circuit to divide the voltage of the P0 Type-C interface, converting the high voltage into a safe trigger voltage for the MOSFET Q2804. When there is voltage on the P0 Type-C interface 40a VBUS, the voltage divider signal triggers the MOSFET Q2804 to conduct and cuts off the enable signal of the other interface.
[0152] One end of resistor R2831 is connected to the cathode of diode D2806. One end of resistor R2832 is grounded. The other ends of resistors R2831 and R2832 are interconnected with the gate of MOSFET Q2804.
[0153] Similarly, resistors R2836 and R2837 form a voltage divider circuit to divide the voltage of the P1 Type-C interface 40b, converting the high voltage into the safe trigger voltage of the MOSFET Q2804. Further details are omitted here.
[0154] One end of resistor R2836 is connected to the cathode of diode D2808. One end of resistor R2837 is grounded. The other ends of resistors R2836 and R2837 are interconnected with the drain of MOSFET Q2804. The source of MOSFET Q2804 is grounded.
[0155] In some examples, the dual-interface interlock control module 27 may include capacitors C2812 and C2813, which are used to filter the interlock control signal to prevent false triggering caused by high-frequency noise.
[0156] VIO18_PMU is the system power supply, providing a stable operating level for the interlock circuit.
[0157] Figure 15 This is a circuit diagram showing the P0 power supply output module 41a according to an example of the present invention.
[0158] Reference Figure 15The P0 power supply output module 41a is an "external power supply step-down circuit" for the P0 Type-C interface 40a. Its core function is to step down the VBAT battery voltage inside the display device 1 and convert it to the external power supply voltage VBUS_P0 (supporting the P0 Type-C interface 40a to power peripherals). For example, it can step down the VBAT_8V battery voltage to the VBUS_P0 5.1V external power supply voltage.
[0159] In some examples, the power conversion chip U2801 can be a DC-DC buck converter. The power conversion chip U2801 can be used to step down an 8V input voltage to a 5.1V output.
[0160] The VIN pin (pin 5) of the U2801 power converter chip can be used to input the VBAT_8V battery voltage. The EN pin (pin 4) of the U2801 power converter chip can be used to receive the USB1_DRV_VBUS signal to control the chip's start and stop. The LX pin (pin 6) of the U2801 power converter chip can be used to connect an inductor to achieve voltage conversion. The FB pin (pin 3) of the U2801 power converter chip can be used to adjust the output voltage through a voltage divider resistor. The GND pin (pin 2) and BS pin (pin 1) of the U2801 power converter chip are used to ensure stable chip operation.
[0161] In some examples, the P0 power supply output module 41a may include a capacitor C2802, which is used as an input filter capacitor to stabilize the VBAT_8V voltage and reduce power supply noise.
[0162] In some examples, the P0 power supply output module 41a may include a resistor R2801 for connecting the input power link, while also providing debugging flexibility.
[0163] In some examples, the P0 power output module 41a may include a voltage divider circuit consisting of resistors R2909 and R2803, which, together with the enable pin EN, controls the chip to be enabled (the power conversion chip U2801 is started when the USB1_DRV_VBUS signal is triggered).
[0164] In some examples, the P0 power supply output module 41a may include an inductor L2800, which is an energy storage inductor that works with the switching action of the power conversion chip U2801 to achieve voltage reduction.
[0165] In some examples, the P0 power supply output module 41a may include a capacitor C2803, which is a bootstrap capacitor to increase the switching voltage range of pin LX and ensure conversion efficiency.
[0166] In some examples, the P0 power supply output module 41a may include a diode D2805, which is a freewheeling diode used to provide a current path during the discharge phase of the inductor L2800 to avoid voltage spikes.
[0167] In some examples, the P0 power supply output module 41a may include capacitors C2804, C2805, C2806, and C2807, which are output filter capacitors. These can be used to smooth the 5.1V output voltage and reduce ripple.
[0168] In some examples, the P0 power supply output module 41a may include a voltage divider feedback circuit consisting of resistors R2804 and R2805. It can stabilize the output voltage at 5.1V via the feedback pin FB.
[0169] In some examples, the P0 power supply output module 41a may include a resistor R2806, which is an output pull-down resistor to ensure that the output voltage level is stable when idle.
[0170] The USB1_DRV_VBUS signal is the enable signal output by the main control module 3, which is used to control the start and stop of the power conversion chip U2801 (this signal triggers the chip to work when the P0 Type-C interface needs to supply power externally).
[0171] Pin 1 of the power converter chip U2801 is connected to one end of capacitor C2803; the other end of capacitor C2803, pin 6 of the power converter chip U2801, and one end of inductor L2800 are interconnected; the other end of inductor L2800, one end of capacitor C2804, one end of resistor R2804, one end of capacitor C2805, one end of capacitor C2806, one end of capacitor C2807, and the anode of diode D2805 are interconnected; the cathode of diode D2805 is connected to one end of resistor R2806 and connected to signal VBUS_P0; the other end of resistor R2806 is grounded; pin 3 of the power converter chip U2801, the other end of capacitor C2804, and the other end of resistor R2804 are interconnected. One end of resistor R2805 is interconnected; the other end of resistor R2805 is grounded; the other ends of capacitors C2805, C2806, and C2807 are grounded; pin 2 of power conversion chip U2801 is grounded; pin 5 of power conversion chip U2801, one end of resistor R2801, and one end of capacitor C2802 are interconnected and connected to power supply VBAT; the other end of capacitor C2802 is grounded; pin 4 of power conversion chip U2801, the other end of resistor R2801, one end of resistor R2803, and one end of resistor R2909 are interconnected; the other end of resistor R2803 is grounded; the other end of resistor R2909 is connected to signal USB1_DRV_VBUS.
[0172] When the P0 Type-C interface 40a needs to supply power to a peripheral device, the USB1_DRV_VBUS signal triggers the power conversion chip U2801 to start. The power supply VBAT_8V is converted to 5.1V by the power conversion chip U2801 and the inductor L2800, filtered and output through VBUS_P0 to enable the P0 interface to supply power to the external device.
[0173] In some examples, the circuit structure of the P1 power output module 41b can be the same as that of the P0 power output module 41a; a detailed description of the P1 power output module 41b is omitted here. In other words, the two differ only in their corresponding interfaces, device numbers, and output signals; their functional logic and operating principles are completely identical.
[0174] In some examples, the P0 power output module 41a and the P1 power output module 41b can be configured in parallel. They can respectively provide power to the P0 Type-C interface 40a and the P1 Type-C interface 40b.
[0175] While the invention has been specifically described above in conjunction with the accompanying drawings and examples, it is to be understood that the above description does not limit the invention in any way. Those skilled in the art can make modifications and variations to the invention as needed without departing from its essential spirit and scope, and all such modifications and variations fall within the scope of the invention.
Claims
1. A dual Type-C interface circuit, characterized in that, The system includes a dual Type-C interface module, a dual Type-C interface signal switching module, a DP projection module, a charging management module, a detection and device identification module, a device access detection module, a dual-interface interlock control module, and a main control module. The input terminals of the dual Type-C interface modules are used to connect to external devices. The output terminals of the dual Type-C interface modules are respectively connected to the input terminals of the dual Type-C interface signal switching module, the charging management module, the detection and device identification module, and the device access detection module. The dual Type-C interface modules are also interconnected with the dual-interface interlock control module. The input terminals of the main control module are respectively connected to the output terminals of the DP projection module, the charging management module, the detection and device identification module, and the device access detection module. The output terminal of the dual Type-C interface signal switching module is connected to the input terminal of the DP projection module.
2. The dual Type-C interface circuit according to claim 1, characterized in that, The dual Type-C interface circuit also includes a signal preprocessing module disposed between the dual Type-C interface module and the dual Type-C interface signal switching module.
3. The dual Type-C interface circuit according to claim 1, characterized in that, The dual Type-C interface circuit also includes a power protection module disposed between the dual Type-C interface module and the charging management module.
4. The dual Type-C interface circuit according to claim 1, characterized in that, The dual Type-C interface module includes a P0 Type-C interface submodule and a P1 Type-C interface submodule configured in parallel.
5. The dual Type-C interface circuit according to claim 1, characterized in that, The detection and equipment identification module includes a P0 detection and equipment identification submodule and a P1 detection and equipment identification submodule.
6. The dual Type-C interface circuit according to claim 1, characterized in that, The signal preprocessing module includes a P0 signal preprocessing submodule and a P1 signal preprocessing submodule that are configured in parallel.
7. The dual Type-C interface circuit according to claim 1, characterized in that, It also includes a P0 power supply output module located between the P0 Type-C interface and the main control module, and a P1 power supply output module located between the P1 Type-C interface and the main control module.
8. The dual Type-C interface circuit according to claim 1, characterized in that, The device access detection module includes a P0 device access detection submodule and a P1 device access detection submodule, which are set up in parallel.
9. The dual Type-C interface circuit according to claim 1, characterized in that, The power protection module includes a P0 power protection submodule and a P1 power protection submodule arranged in parallel. The P0 power protection submodule includes a power switch chip and a voltage divider circuit connected to the overvoltage detection terminal of the power switch chip.
10. A display device, characterized in that, Includes the dual Type-C interface circuit as described in any one of claims 1-9.