Preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric property
By preparing island-shaped ZnO intermediate layers at the p-Si/n-ZnO heterojunction interface, and combining magnetron sputtering and annealing, the performance degradation caused by the interaction at the Si/ZnO interface was solved, and the optoelectronic performance was improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- JINGCHU UNIV OF TECH
- Filing Date
- 2026-01-20
- Publication Date
- 2026-05-08
AI Technical Summary
The Si/ZnO heterojunction interface suffers from reduced device performance due to interactions, thermal mismatch, and lattice mismatch, resulting in negative phenomena such as interface states, carrier recombination, and increased leakage current.
Intrinsic ZnO was prepared on p-Si using magnetron sputtering, and island-shaped ZnO intermediate layers were formed through oxidation annealing and reduction annealing to improve lattice matching, thus preparing n-ZnO thin films and forming pin junctions to enhance photoelectric properties.
It effectively suppresses Si/ZnO interface interactions, improves lattice matching, significantly enhances optoelectronic performance, strengthens photogenerated carrier transport, and improves device performance.
Smart Images
Figure CN122002948A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of heterojunction optoelectronic technology, specifically to a method for preparing p-Si / n-ZnO interface modification to enhance optoelectronic performance. Background Technology
[0002] p-Si / n-ZnO heterojunctions have advantages such as simple structure, green nature, abundant raw materials, low cost, stable physicochemical properties, and broadened spectrum, and are widely used in micro / nano / optoelectronic devices and systems such as solar cells, photodiodes, detectors, and acoustic waves.
[0003] Among them, the device performance is mainly affected by the Si / ZnO heterostructure interface:
[0004] First, the Si / ZnO interface interaction will severely degrade device performance;
[0005] Second, there is a large thermal mismatch and lattice mismatch between Si and ZnO;
[0006] Third, the Si / ZnO interface is a sudden interface. These factors will generate a large number of interface states, causing a series of negative phenomena such as carrier recombination, increased leakage current and Fermi level pinning, which will seriously affect the device performance.
[0007] Therefore, this invention proposes a method for preparing Si / ZnO interface modification to enhance photoelectric performance. The rationality of this preparation method is verified by simulation. The preparation is simple, low-cost, and improves the photoelectric performance of the device. Summary of the Invention
[0008] To address the shortcomings of existing technologies, this invention provides a method for preparing p-Si / n-ZnO interface modification to enhance photoelectric performance. This method has the advantages of simple preparation, low cost, and improved photoelectric performance of devices, thus solving the problem of reduced device performance.
[0009] To achieve the above objectives, the present invention provides the following technical solution: a method for preparing p-Si / n-ZnO interface modification for enhancing photoelectric properties, comprising the following steps:
[0010] 1) Clean the Si by washing it with acetone, anhydrous ethanol and deionized water for 20 minutes each;
[0011] 2) Using magnetron sputtering technology, p-Si is placed in a magnetron sputtering chamber to prepare intrinsic ZnO on p-Si;
[0012] 3) The prepared Si-based ZnO was subjected to oxidative annealing;
[0013] 4) Based on step 3), n-ZnO is prepared using magnetron sputtering technology;
[0014] 5) The prepared p-Si / n-ZnO heterojunction was subjected to reduction annealing;
[0015] 6) Obtain p-Si / n-ZnO heterojunction materials with enhanced optoelectronic properties after interface modification.
[0016] Furthermore, in step 1), p-Si(100) is placed in an ultrasonic cleaning device, and acetone, anhydrous ethanol and deionized water completely cover Si, each cleaning for 20 minutes.
[0017] Furthermore, in step 2), magnetron sputtering technology is used to place p-Si into the magnetron sputtering chamber, achieving a vacuum level of 1.2 × 10⁻⁶. -5 Torr was used to prepare intrinsic ZnO.
[0018] Furthermore, in step 3), the prepared Si-based ZnO is subjected to oxidative annealing at a temperature of 400℃~500℃.
[0019] Furthermore, in step 4), magnetron sputtering technology is used to prepare n-ZnO, which is Al-doped ZnO, and the thickness of the n-ZnO film is 90-120 nm.
[0020] Furthermore, in step 5), the prepared p-Si / n-ZnO heterojunction is subjected to reduction annealing at a temperature of 450℃~550℃ and then cooled to room temperature in the furnace.
[0021] Furthermore, in step 3), the surface morphology of intrinsic ZnO is an island-like structure in the early stage of film formation, and has ZnO(002) diffraction peaks.
[0022] Furthermore, in step 6), intrinsic ZnO with an island-like structure is selected as the intermediate layer of p-Si / n-ZnO, and then it is subjected to oxidation annealing.
[0023] Furthermore, during the oxidation annealing and reduction annealing processes, the annealing environment is an inert gas atmosphere or a vacuum environment.
[0024] Furthermore, the island-shaped ZnO oxidation can act as an i-ZnO layer, and the built-in voltage of the pin junction with a certain effect is longer, which helps to generate more photogenerated carriers.
[0025] Compared with the prior art, the technical solution of this application has the following beneficial effects:
[0026] The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties involves placing p-Si(100) in an ultrasonic cleaning device, where acetone, anhydrous ethanol, and deionized water completely cover the Si, each for 20 minutes. Then, using magnetron sputtering technology, the p-Si is placed in a magnetron sputtering chamber with a vacuum of 1.2 × 10⁻⁵ Torr to prepare intrinsic ZnO. The surface morphology of intrinsic ZnO is an island-like structure in the early stages of thin film formation, and it exhibits ZnO(002) diffraction peaks. The prepared Si-based ZnO is then subjected to oxidation annealing. The furnace temperature is 400°C~500°C. Based on the above, n-ZnO is prepared by magnetron sputtering. The n-ZnO is Al-doped ZnO with a film thickness of 90-120 nm. The prepared p-Si / n-ZnO heterojunction is then subjected to reduction annealing at a temperature of 450°C~550°C and cooled to room temperature in the furnace. Finally, a p-Si / n-ZnO heterojunction material with enhanced photoelectric properties after interface modification is obtained. This material can suppress Si / ZnO interface interactions, improve lattice matching, and significantly improve photoelectric properties. Attached Figure Description
[0027] Figure 1 This is a flowchart of the preparation process of the present invention;
[0028] Figure 2 This is the intrinsic ZnO:FAM diagram of the island-like structure of the present invention;
[0029] Figure 3 The intrinsic ZnO:XRD pattern of the island-like structure of the present invention;
[0030] Figure 4 This is a diagram of the p-Si / n-ZnO structure after interface modification according to the present invention;
[0031] Figure 5 This is a SEM image of p-Si / n-ZnO after interface modification according to the present invention;
[0032] Figure 6 The diagram illustrates the interface modification process in the three stages of this invention. Detailed Implementation
[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0034] Please see Figure 1The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties in this embodiment includes the following steps:
[0035] 1) Clean the Si by washing it with acetone, anhydrous ethanol and deionized water for 20 minutes each;
[0036] 2) Using magnetron sputtering technology, p-Si is placed in a magnetron sputtering chamber to prepare intrinsic ZnO on p-Si;
[0037] 3) The prepared Si-based ZnO was subjected to oxidative annealing;
[0038] 4) Based on step 3), n-ZnO is prepared using magnetron sputtering technology;
[0039] 5) The prepared p-Si / n-ZnO heterojunction was subjected to reduction annealing;
[0040] 6) Obtain p-Si / n-ZnO heterojunction materials with enhanced optoelectronic properties after interface modification.
[0041] Understandably, in step 1), p-Si(100) is placed in an ultrasonic cleaning device, and acetone, anhydrous ethanol, and deionized water completely cover the Si, each for 20 minutes. In step 2), magnetron sputtering technology is used to place p-Si into a magnetron sputtering chamber, achieving a vacuum level of 1.2 × 10⁻⁶. -5 Torr, used to prepare intrinsic ZnO;
[0042] In step 3), the prepared Si-based ZnO is oxidized and annealed at a temperature of 400℃~500℃. In step 3), the surface morphology of the intrinsic ZnO is an island-like structure in the early stage of film formation and has ZnO(002) diffraction peaks. In step 4), n-ZnO is prepared by magnetron sputtering. The n-ZnO is Al-doped ZnO and the thickness of the n-ZnO film is 90-120nm.
[0043] In step 5), the prepared p-Si / n-ZnO heterojunction is subjected to reduction annealing at a temperature of 450℃~550℃ and then cooled to room temperature in the furnace. In step 6), intrinsic ZnO with an island-like structure is selected as the intermediate layer of p-Si / n-ZnO and then subjected to oxidation annealing.
[0044] During oxidation annealing and reduction annealing, the annealing environment is an inert gas atmosphere or a vacuum environment. During oxidation annealing and reduction annealing, the annealing environment is an inert gas atmosphere or a vacuum environment. Island-shaped ZnO oxidation can act as an i-ZnO layer. The built-in voltage of the pin junction with a certain effect is longer, which helps to generate more photogenerated carriers.
[0045] Please see Figures 2 to 3In this embodiment, Figure 2 As shown in (1-a), the Si-based ZnO prepared in step 2 has isolated island-like structures connected together to form a "continuous, undulating" island-like structure. Figure 3 (1-b) indicates that Si-based ZnO has a very obvious (002) preferred orientation, indicating that the film at this growth stage has a ZnO crystal structure, but the ZnO film has not been fully formed.
[0046] Please see Figures 4 to 6 In this embodiment, the p-Si / n-ZnO structure prepared by this method after interface modification is shown. Based on the simulation studies corresponding to this method, it can be concluded that this method selects intrinsic ZnO with an island-like structure as the intermediate layer of p-Si / n-ZnO, and then performs oxidative annealing on it, instead of selecting a specific thickness after film formation as in existing technologies. The main reasons are as follows:
[0047] (1) In the prior art, Si and n-ZnO thin films are in surface-to-surface contact. Due to the large lattice mismatch and thermal mismatch between Si and ZnO, problems will occur at the Si / ZnO interface (e.g. Figure 6 The region within the box (a) generates tensile stress and matching defects, which are inevitably hindered by the sub-interface connected to it. This results in compressive stress and lattice distortion in the n-ZnO film adjacent to the Si / ZnO interface and on the sub-surface of Si. In other words, the negative effects of the Si / ZnO interface further affect the p-Si layer and the n-ZnO film. The intrinsic ZnO with its island-like structure can avoid these negative factors, thus improving its photoelectric properties.
[0048] (2) Selecting intrinsic ZnO with an island-like structure as the intermediate layer, during the oxidation annealing process, such as Figure 5 The high oxygen concentration in region I significantly reduces the degree of Si / ZnO interface interaction. Furthermore, Si atoms in regions I and II can react with O atoms and reach saturation, which greatly inhibits the diffusion of Si in ZnO.
[0049] (3) The intrinsic ZnO with island-like structures deposited on the Si surface can prevent the bare Si surface from being completely oxidized;
[0050] (4) During the oxidation annealing process, due to Figure 6 (b) The blank area in region II means that the stress caused by the large lattice mismatch and thermal mismatch between Si and ZnO in region I can be fully released. If an AZO film is deposited on the basis of the intrinsic ZnO with the Si / island structure, these stresses will not remain in the inner film connected to the interface.
[0051] (5) After oxidation annealing, the surface region II of Si is oxidized, and the resulting silicon oxides are distributed at the Si / AZO interface in the form of "point contacts," such as... Figure 6 As shown in (c), this can greatly mitigate the negative effects of lattice mismatch and thermal mismatch;
[0052] (6) The intrinsic ZnO with island structure is selected as the intermediate layer. In the Si / island ZnO oxide / AZO structure, "island ZnO oxide" can act as i-ZnO layer. The built-in voltage of the pin junction with a certain effect is longer, which helps to generate more photogenerated carriers.
[0053] Oxidation treatment of island-shaped ZnO is for Figure 5 The white stripes in the middle and Figure 6 (c) is a schematic diagram. It plays a role in suppressing the interaction between p-Si / n-ZnO interfaces, reducing the interface states caused by lattice mismatch and thermal mismatch, suppressing the recombination of photogenerated carriers, which helps to generate photocurrent and enhance photoelectric performance.
[0054] The working principle of the above embodiments is as follows:
[0055] p-Si(100) was placed in an ultrasonic cleaning device, and acetone, anhydrous ethanol, and deionized water were used to completely cover the Si. Each cleaning session lasted 20 minutes. Then, p-Si was placed in a magnetron sputtering chamber with a vacuum of 1.2 × 10⁻⁵ Torr to prepare intrinsic ZnO. The surface morphology of intrinsic ZnO was an island-like structure in the early stage of film formation, and it had ZnO(002) diffraction peaks. The prepared Si-based ZnO was then subjected to oxidation annealing. The annealing temperature is 400°C~500°C. Based on the above, n-ZnO is prepared by magnetron sputtering. The n-ZnO is Al-doped ZnO and the thickness of the n-ZnO film is 90-120nm. The prepared p-Si / n-ZnO heterojunction is then subjected to reduction annealing at a temperature of 450°C~550°C and cooled to room temperature in the furnace. Finally, the p-Si / n-ZnO heterojunction material with enhanced optoelectronic properties after interface modification is obtained.
[0056] Testing method for photoelectric performance: The photovoltaic testing platform of Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, was used, and the irradiance of the light source was measured. The standard AM1.5 solar spectrum distribution was observed at a test temperature of 25±2°C. The open-circuit voltage of the interface-modified p-Si / n-ZnO heterojunction solar cell was measured. Short-circuit current density Conversion efficiency is (Open-circuit voltage of unmodified p-Si / n-ZnO heterojunction solar cells) Short-circuit current density Conversion efficiency is ).
[0057] The p-Si / n-ZnO interface-modified heterojunction prepared by this method can be used for photoelectric conversion efficiency testing, improving photoelectric performance. Furthermore, the preparation is simple and low-cost.
[0058] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0059] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A method for preparing p-Si / n-ZnO interface modification for enhancing photoelectric properties, characterized in that, Includes the following steps: 1) Clean the Si by washing it with acetone, anhydrous ethanol and deionized water for 20 minutes each; 2) Using magnetron sputtering technology, p-Si is placed in a magnetron sputtering chamber to prepare intrinsic ZnO on p-Si; 3) The prepared Si-based ZnO was subjected to oxidative annealing; 4) Based on step 3), n-ZnO is prepared using magnetron sputtering technology; 5) The prepared p-Si / n-ZnO heterojunction was subjected to reduction annealing; 6) Obtain p-Si / n-ZnO heterojunction materials with enhanced optoelectronic properties after interface modification.
2. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 1, characterized in that: In step 1), p-Si(100) is placed in an ultrasonic cleaning device, and acetone, anhydrous ethanol and deionized water completely cover Si, each cleaning for 20 minutes.
3. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 1, characterized in that: In step 2), magnetron sputtering technology is used to place p-Si into the magnetron sputtering chamber, achieving a vacuum level of 1.2 × 10⁻⁶. -5 Torr was used to prepare intrinsic ZnO.
4. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 1, characterized in that: In step 3), the prepared Si-based ZnO is subjected to oxidation annealing at a temperature of 400℃~500℃.
5. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 1, characterized in that: In step 4), magnetron sputtering is used to prepare n-ZnO, which is Al-doped ZnO, and the thickness of the n-ZnO film is 90-120 nm.
6. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 1, characterized in that: In step 5), the prepared p-Si / n-ZnO heterojunction is subjected to reduction annealing at a temperature of 450℃~550℃ and then cooled to room temperature in the furnace.
7. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 3, characterized in that: In step 3), the surface morphology of intrinsic ZnO is an island-like structure in the early stage of film formation, and it has ZnO(002) diffraction peaks.
8. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 1, characterized in that: In step 6), intrinsic ZnO with an island-like structure is selected as the intermediate layer of p-Si / n-ZnO, and then it is subjected to oxidation annealing.
9. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 8, characterized in that: During the oxidation annealing and reduction annealing processes, the annealing environment is an inert gas atmosphere or a vacuum environment.
10. The preparation method of p-Si / n-ZnO interface modification for enhancing photoelectric properties according to claim 8, characterized in that: The island-shaped ZnO oxidation can act as an i-ZnO layer, and the built-in voltage of the pin junction with a certain effect is longer, which helps to generate more photogenerated carriers.