On-chip current detection circuit and method

Abstract

The invention provides an on-chip current detection circuit and method. The circuit comprises an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor and a second resistor. The first transistor, the second transistor and the first resistor are respectively connected with the operational amplifier circuit, the first transistor is connected with the first resistor, the second transistor is connected with the second resistor, and the second resistor is connected with the third transistor; accurate voltage is input into the negative input end of the operational amplifier circuit, and the voltage of the positive input end of the operational amplifier circuit is equal to the accurate voltage according to the virtual short and virtual off characteristics of the operational amplifier circuit. Calculating a first current flowing through the first transistor according to the voltage of the positive input end and the first resistor; the number ratio of transistors is set, and a second current is calculated; the current on the power supply VDD is measured through the second current, so that the magnitude of the current in the radio frequency chip is measured; the complexity of circuit design is greatly reduced, the current can be measured by setting the number ratio of the transistors, and feedback is not needed.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to on-chip current detection circuits and methods. Background Technology

[0002] In many high-precision integrated circuits, very precise on-chip current is required. However, not all chips can be connected to high-precision resistors. The characteristic of on-chip resistance changing with process and temperature causes on-chip current to change with process and temperature. This is a non-ideal factor in chip design. Therefore, on-chip current often needs to be measurable and adjustable. How to detect current, especially the tiny current on low-power chips, is one of the problems.

[0003] Reference Figure 1 The circuit includes a driving MOSFET, a clamping unit, a measurement unit, an input current source, and an output current source. This circuit includes feedback, introducing an additional loop that affects stability; the circuit structure is complex and has a large area. For currents that fluctuate with process technology, the variation range is typically large, making this structure over-designed. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide an on-chip current detection circuit and method, which greatly reduces the complexity of circuit design and allows the measurement of current magnitude to be completed by setting the ratio of the number of transistors, without the need for feedback.

[0005] In a first aspect, embodiments of the present invention provide an on-chip current detection circuit, the detection circuit including an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor; The first transistor, the second transistor, and the first resistor are respectively connected to the operational amplifier circuit. The first transistor is connected to the first resistor, the second transistor is connected to the second resistor, and the second resistor is connected to the third transistor. The negative input terminal of the operational amplifier circuit receives a precise voltage. Based on the virtual short and virtual open characteristics of the operational amplifier circuit, the voltage at the positive input terminal of the operational amplifier circuit is equal to the precise voltage. Calculate the first current flowing through the first transistor based on the voltage at the positive input terminal and the first resistance; The transistor count ratio is set, and a second current is calculated based on the transistor count ratio. The current on the power supply VDD is measured using the second current to measure the magnitude of the internal current of the RF chip.

[0006] Furthermore, the negative input terminal of the operational amplifier circuit is connected to the precise voltage, the positive input terminal of the operational amplifier circuit is connected to the drain of the first transistor and one end of the first resistor, the output terminal of the operational amplifier circuit is connected to the gate of the first transistor and the gate of the second transistor, and the other end of the first resistor is grounded.

[0007] Furthermore, the source of the first transistor is connected to the power supply VDD, the source of the second transistor is connected to the power supply VDD, and the drain of the second transistor is connected to one end of the second resistor.

[0008] Furthermore, the other end of the second resistor is connected to the drain of the third transistor, the source of the third transistor is grounded, and the gate of the third transistor is connected to the current test mode enable signal.

[0009] Furthermore, when measuring current, the current test mode enable signal is set to 1; when the RF chip is working normally, the current test mode enable signal is set to 0.

[0010] Furthermore, the ratio of the number of transistors is the ratio of the number of the first transistor to the number of the second transistor.

[0011] Furthermore, the ratio of the number of transistors is 1:100.

[0012] Secondly, embodiments of the present invention provide an on-chip current detection method, applied to the on-chip current detection circuit described above, wherein the detection circuit includes an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor; the method includes: The negative input terminal of the operational amplifier circuit receives a precise voltage. Based on the virtual short and virtual open characteristics of the operational amplifier circuit, the voltage at the positive input terminal of the operational amplifier circuit is equal to the precise voltage. Calculate the first current flowing through the first transistor based on the voltage at the positive input terminal and the first resistance; Set the transistor ratio, and calculate the second current based on the transistor ratio; The magnitude of the internal current of the RF chip is measured by measuring the current on the power supply VDD using the second current measurement.

[0013] Thirdly, embodiments of the present invention provide an electronic device, including a memory and a processor, wherein the memory stores a computer program that can run on the processor, and the processor executes the computer program to implement the method described above.

[0014] Fourthly, embodiments of the present invention provide a computer-readable medium having processor-executable non-volatile program code that causes the processor to perform the method described above.

[0015] This invention provides an on-chip current detection circuit and method. The detection circuit includes an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor. The first transistor, the second transistor, and the first resistor are respectively connected to the operational amplifier circuit. The first transistor is connected to the first resistor, the second transistor is connected to the second resistor, and the second resistor is connected to the third transistor. A precise voltage is input to the negative input terminal of the operational amplifier circuit. Based on the virtual short and virtual open characteristics of the operational amplifier circuit, the voltage at the positive input terminal of the operational amplifier circuit is equal to the precise voltage. A first current flowing through the first transistor is calculated based on the voltage at the positive input terminal and the first resistor. A transistor ratio is set, and a second current is calculated based on the transistor ratio. The current on the power supply VDD is measured using the second current, thereby measuring the magnitude of the current inside the RF chip. This greatly reduces the complexity of circuit design, as the current measurement can be completed simply by setting the transistor ratio, without the need for feedback.

[0016] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention are realized and obtained in accordance with the structures particularly pointed out in the description, claims and drawings.

[0017] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0018] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 Circuit diagrams provided for existing technologies; Figure 2 This is a schematic diagram of the on-chip current detection circuit provided in Embodiment 1 of the present invention; Figure 3 This is a schematic diagram of the on-chip current detection circuit structure provided in Embodiment 1 of the present invention; Figure 4 This is a flowchart of the on-chip current detection method provided in Embodiment 2 of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] Reference Figure 1 The circuit includes a driving MOSFET, a clamping unit, a measuring unit, an input current source, and an output current source; it is used to detect the first current I1 flowing through the second terminal of the MOSFET under test. The first terminal of the MOSFET under test is connected to the power supply voltage, and the control terminal is connected to an external control signal; the detection circuit includes a driving MOSFET, a clamping unit 1, a measuring unit 2, an input current source I3, and an output current source I4.

[0022] Among them, the MOS transistor under test is a PMOS transistor, with the control terminal as the gate, the first terminal as the source, and the second terminal as the drain. The MOS transistor under test is the first PMOS transistor MP1, with the control terminal as the gate, the first terminal as the source, and the second terminal as the drain. The driving MOS transistor is the second PMOS transistor MP2, with the control terminal as the gate, the first terminal as the source, and the second terminal as the drain. The basic structural unit used by the first PMOS transistor MP1 and the second PMOS transistor MP2 has the same size to ensure that the intrinsic transistor characteristics of the two MOS transistors are similar. The ratio of the first PMOS transistor MP1 to the second PMOS transistor MP2 is (10~1000). The first terminal of the second PMOS transistor MP2 is connected to the power supply voltage VDD, and the control terminal is connected to the control terminal of the first PMOS transistor MP1 to ensure that VGS1 of the first PMOS transistor MP1 and VGS2 of the second PMOS transistor MP2 are equal. Clamping unit 1 is connected to the first PMOS transistor MP1. The second terminal of P1 is connected to the second terminal of the second PMOS transistor MP2, respectively. The clamping unit 1 is used to clamp the first voltage VD1 of the second terminal of the first PMOS transistor MP1 and the second voltage VD2 of the second terminal of the second PMOS transistor MP2, ensuring that VDS1 of the first PMOS transistor MP1 and VDS2 of the second PMOS transistor MP2 are equal. The input terminal of the input current source I3 is connected to the power supply voltage, and the output terminal is connected to the second terminal of the second PMOS transistor MP2. The input terminal of the output current source I4 is connected to the clamping unit 1. The clamping unit 1 includes an operational amplifier A1 and a third MOS transistor M3. The first input terminal of the operational amplifier A1 is connected to the second terminal of the first PMOS transistor MP1, and the second input terminal is connected to the second terminal of the second PMOS transistor MP2. The control terminal of the third MOS transistor M3 is connected to the output terminal of the operational amplifier A1, the first terminal is connected to the second terminal of the second PMOS transistor MP2, and the second terminal outputs a second current I2. The current flowing through the input current source I3 is equal to the current flowing through the output current source I4. When the second current I2 passes through the loop formed by the second PMOS transistor MP2, the operational amplifier A1, and the third MOS transistor M3, the current flowing through the input current source I3 is increased to ensure that the current value in the loop is the sum of the current flowing through the input current source I3 and the second current I2, thereby enhancing the stability of the loop.

[0023] The measurement unit 2 is connected to the input terminals of the clamping unit 1 and the output current source I4, respectively. The measurement unit 2 is used to detect the second current I2 output by the clamping unit 1.

[0024] The measuring unit 2 includes a first resistor R1. The first end of the first resistor R1 is connected to the second end of the third MOS transistor M3, and the second end is connected to the reference potential GND. The current I2 flowing through the first resistor R1 is obtained by measuring the voltage drop of the first resistor R1. The pull-up current on the first PMOS transistor MP1 is calculated according to the ratio of the first PMOS transistor MP1 and the second PMOS transistor MP2. The pull-up current flows out from the second end of the first PMOS transistor MP1.

[0025] Figure 1 The circuitry includes feedback, introducing additional loops and affecting stability; the structure is complex and has a large area, and the range of variation for currents that fluctuate with process technology is usually large, making the design of this structure problematic.

[0026] This application greatly reduces the complexity of the original circuit scheme, enabling the circuit to measure the current magnitude using only a 1:100 current mirror without requiring feedback.

[0027] To facilitate understanding of this embodiment, the embodiments of the present invention will be described in detail below.

[0028] Example 1: Figure 2 This is a schematic diagram of an on-chip current detection circuit provided in Embodiment 1 of the present invention.

[0029] Reference Figure 2 The detection circuit includes an operational amplifier circuit AMP, a first transistor Q1, a second transistor Q2, a third transistor Q3, a first resistor R1, and a second resistor R2; The first transistor Q1, the second transistor Q2, and the first resistor R1 are connected to the operational amplifier circuit AMP. The first transistor Q1 is connected to the first resistor R1, the second transistor Q2 is connected to the second resistor R2, and the second resistor R2 is connected to the third transistor Q3. The negative input terminal of the op-amp circuit AMP receives a precise voltage. Based on the virtual short and virtual open characteristics of the op-amp circuit AMP, the voltage at the positive input terminal of the op-amp circuit AMP is equal to the precise voltage. Calculate the first current I1 flowing through the first transistor Q1 based on the voltage V1 at the positive input terminal and the first resistor R1. The transistor ratio is set, and the second current I2 is calculated based on the ratio. The current on the power supply VDD is measured by measuring the second current I2, thereby measuring the magnitude of the internal current of the RF chip.

[0030] Specifically, the negative input terminal of the operational amplifier circuit AMP is connected to the precise voltage VREF. According to the virtual short and virtual open characteristics of the operational amplifier, the voltage at its positive input terminal V1 is also equal to VREF. According to Ohm's law, I1 = VREF / R1, so the current flowing through transistor Q1 is I1. If the transistor ratio is set to Q1:Q2 = 1:100, then I2 = 100. I1 amplifies the current by 100 times, R2 is a current-limiting resistor, and tst_en is the current test mode enable signal. When current needs to be measured, tst_en is set to 1, and tst_en is set to 0 during normal operation to save power.

[0031] By amplifying the current by 100 times, the internal current of the chip can be directly measured by measuring the current on the power supply VDD.

[0032] This application greatly reduces the complexity of the original circuit scheme, enabling the circuit to measure the current magnitude using only a 1:100 current mirror without the need for feedback.

[0033] Furthermore, refer to Figure 3 The negative input terminal of the operational amplifier circuit AMP is connected to a precise voltage. The positive input terminal of the operational amplifier circuit AMP is connected to the drain of the first transistor Q1 and one end of the first resistor R1, respectively. The output terminal of the operational amplifier circuit AMP is connected to the gate of the first transistor Q1 and the gate of the second transistor Q2, respectively. The other end of the first resistor R1 is grounded.

[0034] Furthermore, the source of the first transistor Q1 is connected to the power supply VDD, the source of the second transistor Q2 is connected to the power supply VDD, and the drain of the second transistor Q2 is connected to one end of the second resistor R2.

[0035] Furthermore, the other end of the second resistor R2 is connected to the drain of the third transistor Q3, the source of the third transistor Q3 is grounded, and the gate of the third transistor Q3 is connected to the current test mode enable signal tst_en.

[0036] Furthermore, when measuring current, the current test mode enable signal tst_en is set to 1; when the RF chip is working normally, the current test mode enable signal tst_en is set to 0.

[0037] Furthermore, the ratio of the number of transistors is the ratio of the number of the first transistor to the number of the second transistor.

[0038] Furthermore, the ratio of transistors is 1:100.

[0039] Example 2: Figure 4 This is a flowchart of the on-chip current detection method provided in Embodiment 2 of the present invention.

[0040] Reference Figure 4 The method is applied to the on-chip current detection circuit described above, the detection circuit including an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor; the method includes the following steps: Step S101: A precise voltage is input to the negative input terminal of the op-amp circuit. Based on the virtual short and virtual open characteristics of the op-amp circuit, the voltage at the positive input terminal of the op-amp circuit is equal to the precise voltage. Step S102: Calculate the first current flowing through the first transistor based on the voltage at the positive input terminal and the first resistance; Step S103: Set the transistor ratio and calculate the second current based on the transistor ratio; Step S104: The current on the power supply VDD is measured by the second current measurement to measure the magnitude of the internal current of the RF chip.

[0041] This invention provides an on-chip current detection circuit and method. The detection circuit includes an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor. The first transistor, the second transistor, and the first resistor are respectively connected to the operational amplifier circuit. The first transistor is connected to the first resistor, the second transistor is connected to the second resistor, and the second resistor is connected to the third transistor. A precise voltage is input to the negative input terminal of the operational amplifier circuit. Based on the virtual short and virtual open characteristics of the operational amplifier circuit, the voltage at the positive input terminal of the operational amplifier circuit is equal to the precise voltage. A first current flowing through the first transistor is calculated based on the voltage at the positive input terminal and the first resistor. A transistor ratio is set, and a second current is calculated based on the transistor ratio. The current on the power supply VDD is measured using the second current, thereby measuring the magnitude of the current inside the RF chip. This greatly reduces the complexity of circuit design, as the current measurement can be completed simply by setting the transistor ratio, without the need for feedback.

[0042] This invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the steps of the on-chip current detection method provided in the above embodiments.

[0043] This invention also provides a computer-readable medium having processor-executable non-volatile program code, on which a computer program is stored, and which, when run by a processor, executes the steps of the on-chip current detection method described above.

[0044] The computer program product provided in this embodiment of the invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the preceding method embodiments. For specific implementation details, please refer to the method embodiments, which will not be repeated here.

[0045] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the system and apparatus described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0046] Furthermore, in the description of the embodiments of the present invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the present invention based on the specific circumstances.

[0047] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, essentially, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0048] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0049] Finally, it should be noted that the above-described embodiments are merely specific implementations of the present invention, used to illustrate the technical solutions of the present invention, and not to limit it. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments within the technical scope disclosed in the present invention, or make equivalent substitutions for some of the technical features; and these modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An on-chip current detection circuit, characterized in that, The detection circuit includes an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor; The first transistor, the second transistor, and the first resistor are respectively connected to the operational amplifier circuit. The first transistor is connected to the first resistor, the second transistor is connected to the second resistor, and the second resistor is connected to the third transistor. The negative input terminal of the operational amplifier circuit receives a precise voltage. Based on the virtual short and virtual open characteristics of the operational amplifier circuit, the voltage at the positive input terminal of the operational amplifier circuit is equal to the precise voltage. Calculate the first current flowing through the first transistor based on the voltage at the positive input terminal and the first resistance; The transistor count ratio is set, and a second current is calculated based on the transistor count ratio. The current on the power supply VDD is measured using the second current to measure the magnitude of the internal current of the RF chip.

2. The on-chip current detection circuit according to claim 1, characterized in that, The negative input terminal of the operational amplifier circuit is connected to the precise voltage, the positive input terminal of the operational amplifier circuit is connected to the drain of the first transistor and one end of the first resistor, the output terminal of the operational amplifier circuit is connected to the gate of the first transistor and the gate of the second transistor, and the other end of the first resistor is grounded.

3. The on-chip current detection circuit according to claim 2, characterized in that, The source of the first transistor is connected to the power supply VDD, the source of the second transistor is connected to the power supply VDD, and the drain of the second transistor is connected to one end of the second resistor.

4. The on-chip current detection circuit according to claim 3, characterized in that, The other end of the second resistor is connected to the drain of the third transistor, the source of the third transistor is grounded, and the gate of the third transistor is connected to the current test mode enable signal.

5. The on-chip current detection circuit according to claim 4, characterized in that, When measuring current, the current test mode enable signal is set to 1; when the RF chip is working normally, the current test mode enable signal is set to 0.

6. The on-chip current detection circuit according to claim 1, characterized in that, The ratio of the number of transistors is the ratio of the number of the first transistor to the number of the second transistor.

7. The on-chip current detection circuit according to claim 6, characterized in that, The ratio of the number of transistors is 1:

100.

8. An on-chip current detection method, characterized in that, The method is applied to the on-chip current detection circuit according to any one of claims 1 to 7, wherein the detection circuit includes an operational amplifier circuit, a first transistor, a second transistor, a third transistor, a first resistor, and a second resistor; the method includes: The negative input terminal of the operational amplifier circuit receives a precise voltage. Based on the virtual short and virtual open characteristics of the operational amplifier circuit, the voltage at the positive input terminal of the operational amplifier circuit is equal to the precise voltage. Calculate the first current flowing through the first transistor based on the voltage at the positive input terminal and the first resistance; Set the transistor ratio, and calculate the second current based on the transistor ratio; The magnitude of the internal current of the RF chip is measured by measuring the current on the power supply VDD using the second current measurement.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program executable on the processor, characterized in that, When the processor executes the computer program, it implements the method described in claim 8.

10. A computer-readable medium having processor-executable non-volatile program code, characterized in that, The program code causes the processor to execute the method described in claim 8.

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