High-precision segmented compensation band-gap reference voltage source

Abstract

A band-gap reference voltage source with high-precision segmented compensation comprises three core circuit units, namely a starting circuit, a core band-gap circuit and a segmented temperature compensation circuit. The three core units are controlled by the following circuits: when a power supply is powered on, a starting circuit is conducted, an initial current is injected, and a core band gap circuit is started and outputs a basic voltage; the segmented compensation circuit synchronously extracts PTAT current and generates temperature coefficient compensation voltage Vcomp, and the temperature coefficient compensation voltage Vcomp and the Vbg are subjected to weighted superposition to offset nonlinear drift so as to stably output reference voltage. Compared with the prior art, multi-dimensional performance jump is realized through a temperature coefficient complementation-dynamic curvature compensation-power supply suppression enhancement collaborative architecture.

Description

Technical Field

[0001] This invention belongs to the field of analog integrated circuit design technology, specifically involving high-precision and high-stability optimization technology for reference voltage / current sources. It is particularly suitable for scenarios such as precision measurement, industrial control, high-end power management, and automotive electronics that are sensitive to temperature drift and power fluctuations. The reference voltage source of this invention can provide ultra-low temperature drift reference signals for core devices such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and operational amplifiers. Summary of the Invention

[0002] To address the aforementioned technical problems in existing technologies, the purpose of this invention is to provide a high-precision, segmented-compensation bandgap reference voltage source, solving the following three core technical challenges: 1. Existing technologies are affected by the PN junction curvature effect, resulting in significant nonlinear drift over a wide temperature range (-40℃~130℃), leading to insufficient accuracy; 2. Poor compatibility between the compensation circuit and the core bandgap circuit, resulting in complex structure, high power consumption, and high noise; 3. Compensation failure in extreme temperature ranges, resulting in weak environmental adaptability. The ultimate goal is to provide a high-precision bandgap reference voltage source with a simple structure, low power consumption, and wide-temperature stability, achieving a temperature coefficient ≤2.1ppm / ℃, voltage drift ≤0.43mV, and static power consumption ≤100μW over a temperature range of -40℃~130℃, meeting the high-precision reference requirements of precision measurement, automotive electronics, and industrial control applications.

[0003] A high-precision segmented compensated bandgap reference voltage source includes three core circuit units: a startup circuit, a core bandgap circuit, and a segmented temperature compensation circuit. The three core units have the following circuit control: when the power supply is powered on, the startup circuit is turned on and injects an initial current, the core bandgap circuit starts and outputs the base voltage; the segmented compensation circuit synchronously extracts the PTAT current to generate a temperature coefficient compensation voltage Vcomp, and the temperature coefficient compensation voltage Vcomp and Vbg are weighted and superimposed to cancel nonlinear drift and stabilize the output reference voltage.

[0004] As a preferred circuit design, the core bandgap circuit consists of a bandgap reference subunit and a clamping amplifier subunit. In the bandgap reference subunit, the following circuit is formed with a first transistor Q1 and a second transistor Q2 as the core devices: the collector of the first transistor Q1 is connected to the base of the second transistor Q2 through a second resistor R2, the emitter of the second transistor is connected to the emitter of the first transistor Q1 through a first resistor R1, and the emitter of the first transistor Q1 is grounded through a seventh resistor R7.

[0005] The reference voltage output terminal Vref is applied to the collector of the first transistor Q1 through resistors R6, R4, and R3; the reference voltage output terminal voltage is applied to the collector of the second transistor Q2 through resistors R6 and R5; the reference voltage output terminal voltage is also connected to electrical node B through a series branch consisting of resistors R9, R10, and R11, which is connected to the base of the first transistor Q1; the voltage at the connection point of resistors R9 and R10 is marked as V. REF1 The voltage at the connection point of the tenth resistor R10 and the eleventh resistor R11 is marked as V. REF2 .

[0006] Furthermore, by matching the emitter area ratio of the first transistor Q1 and the second transistor Q2, and controlling the clamp amplifier subunit, it is possible to make the first transistor Q1 and the second transistor Q2 flow with equal current.

[0007] Furthermore, the clamping amplifier subunit is composed of a twelfth MOSFET M12, a third transistor Q3, and a fourth transistor Q4 as its core components. The gate and drain of the twelfth MOSFET M12 are shorted together to form a point node X. The gate of the eleventh MOSFET M11 is connected to the point node X. The sources of both the eleventh MOSFET M11 and the twelfth MOSFET M12 are connected to the pre-bias voltage output terminal VDDA_PRE. The drain of the eleventh MOSFET M11 is marked as electrical node A. Electrical node A is connected to the reference voltage output terminal Vref through a source follower composed of the fifteenth MOSFET M15.

[0008] The base of the third transistor Q3 in the clamp amplifier subunit is connected to the collector of the second transistor Q2 in the bandgap reference subunit; the base of the fourth transistor Q4 in the clamp amplifier subunit is connected to the electrical node B in the bandgap reference subunit.

[0009] As a preferred circuit design, the startup circuit includes a seventh transistor Q7, a fifth transistor Q5, and a sixth transistor Q6; the bases and collectors of the fifth transistor Q5 and the sixth transistor Q6 are shorted to form an equivalent diode structure, and are connected in series and then grounded; the base of the fifth transistor Q5 is connected to the base of the seventh transistor Q7, and the emitter of the seventh transistor Q7 is connected to node X in the clamp amplifier subunit.

[0010] As a preferred circuit design, the segmented temperature compensation circuit includes a fourteenth MOSFET M14, a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, and a fourth MOSFET M4; the pre-bias voltage output terminal VDDA_PRE is applied to the source of the fourteenth MOSFET M14, and the drain of the fourteenth MOSFET M14 is grounded through an eighth resistor R8; the current flowing through the eighth resistor R8 is denoted as I. PATA The voltage between the eighth resistor R8 and ground is marked as V. PTAT ;

[0011] The drain of the first MOSFET M1 is grounded; the sources of the third MOSFET M3 and the fourth MOSFET M4 are both connected to the output of the bias current source, and the drain of the fourth MOSFET M4 is grounded; the drains of the second MOSFET M2 and the third MOSFET M3 are connected, and their connection node is denoted as C; the current node C is connected to the emitter of the first transistor Q1 in the bandgap reference subunit; the current flowing out from the current node C is denoted as I_ COMP The gates of the first MOSFET M1, the second MOSFET M2, the third MOSFET M3, and the fourth MOSFET M4 are V0, ... PTAT、 V REF1、 V PTAT and V REF1。

[0012] Furthermore, the sources of both the first MOSFET M1 and the second MOSFET M2 are connected to the output of the bias current source.

[0013] Compared with existing technologies, this invention has the following advantages: Through a collaborative architecture of "complementary temperature coefficient - dynamic curvature compensation - enhanced power supply suppression," it achieves multi-dimensional performance leaps compared to existing technologies: In terms of temperature drift control, the temperature drift across the entire temperature range (-40℃~130℃) is ≤3ppm / ℃, an improvement of ≥75% compared to traditional technologies; the temperature drift deviation in extreme temperature ranges (-40℃, 130℃) is ≤3ppm / ℃, meeting the ultra-high precision requirements of precision measurement and automotive electronics; in terms of performance balance, the static power consumption is ≤15μA, resolving the contradiction that "increased precision inevitably leads to increased power consumption" in existing compensation technologies; in terms of process compatibility, through an error feedback calibration mechanism, the temperature drift fluctuation between batches is ≤2ppm / ℃, reducing dependence on process precision and significantly improving mass production yield. It can be widely adapted to scenarios such as precision ADC / DAC, industrial control chips, and automotive electronic power modules, possessing strong practicality and market value. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the circuit structure of the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] See Figure 1 As shown, in terms of the overall circuit design concept, this invention systematically solves the defects of existing technologies by constructing a three-in-one collaborative architecture of "start-up circuit - core bandgap circuit - segmented compensation circuit" and combining a shared current source topology and temperature coefficient compensation mechanism.

[0017] Specifically, the key design points of the circuit structure of this invention mainly include the following three aspects:

[0018] 1. Overall architecture design: The three core units are integrated inside the analog integrated circuit and linked through a low-noise signal link to achieve synchronous optimization of temperature drift, power consumption and noise.

[0019] 2. Detailed design of core unit: (1) Start-up circuit: When the power supply is powered on, the initial bias current is provided through the pre-bias circuit, so that the core bandgap circuit can quickly get out of the zero current steady state; the power supply is automatically turned off after stabilization to avoid additional power consumption and noise introduction; (2) Core bandgap circuit: It is composed of matched PNP transistors Q1~Q2 (emitter area ratio 1:8), and then through the clamping amplifier to make Q1~Q2 flow with equal current. Using the logarithmic relationship between the forward voltage and current of the PN junction, a voltage Vptat proportional to the absolute temperature (PTAT) is generated. It is superimposed with the negative temperature coefficient Vbe1 of Q1 to form the basic reference voltage Vref = Vbe1 +Vptat; (3) Segmented compensation circuit: It includes two bias currents from the bias circuit and VREF1, VREF2 and PATA current provided by the core bandgap reference circuit. Resistor R8 makes the voltage VPTAT generated by R8 through the PTAT current, so that VREF1>VPTAT>VREF2. The resulting compensation current then flows through resistor R7 for voltage compensation.

[0020] 3. Collaborative Workflow: When the power supply is powered on, the startup circuit conducts and injects initial current, the core bandgap circuit starts up quickly and outputs the base voltage Vref; the segmented compensation circuit synchronously extracts the PTAT current, generates the temperature coefficient compensation voltage Vcomp, and superimposes it with Vbg to cancel nonlinear drift and stabilize the output Vref.

[0021] To further illustrate the specific implementation of the circuit structure of this invention, the working principle and control process of each circuit are described in detail below:

[0022] 1. Startup Circuit Operation: After the pre-bias circuit powers on, VDDA_PRE is established to 4V. The gate voltage of the PMOS transistor, which is shorted by the red gate-drain connector in the circuit, rises with the power rail and reaches the value of VDDA_PRE - |Vth|. Since the lower circuit is in a high-impedance state at this time, there is no current in the transistor, so there is also no current in the PMOS transistor mirrored to the left. Therefore, node A cannot be pulled high, the source follower (composed of M15) cannot be turned on, and the reference output node cannot be established.

[0023] The pre-bias current then generates a startup current that flows to the startup circuit of the high-precision reference. This current turns on the two series-connected diodes (Q5 and Q6), generating a base voltage of 2Vbe that turns on the right-hand transistor (Q7). This transistor first pulls down the gate voltage of the red PMOS (M12), forming a current path. This then pulls the reference output node high and turns on the two transistors below (Q3 and Q4), allowing the main reference circuit and clamp amplifier to establish their DC operating points.

[0024] Finally, the reference output node gradually stabilizes around 1.2V, and the clamp amplifier begins to operate normally. At this point, the X node will drop below a certain value, and this voltage will feed back to the startup circuit, drawing away the startup current and turning off the three transistors used for startup (Q5, Q6, and Q7). This reduces the quiescent current consumption in this part. 2. Working principle of the bandgap reference and clamp amplifier circuit: According to the KVL relationship of the R3-Q1-R1-Q2-R2 loop:

[0025] ,

[0026] Among them, V BE1 I is the base-emitter voltage of transistor Q1. C1 V is the collector current of transistor Q1. BE2 I is the base-emitter voltage of transistor Q2. C2 I is the collector current of transistor Q2. B2 This is the base current of transistor Q2.

[0027] Based on the current mirror relationship:

[0028] ;

[0029] Combining the BJT gain formula and the BE junction voltage formula:

[0030] I C1 =βI B1 ， );

[0031] I C2 =βIB2 ， );

[0032] Where Iso is the reverse saturation current of the transistor, V T This is thermal voltage.

[0033] Substituting the values ​​and simplifying, we get...

[0034] ) = I C2 [ R3+ R2+ R1] ;

[0035] Assume β >> 1:

[0036] V T ln N=I C2 ×(R3+R1);

[0037] Then I PTAT = I C2 = ;

[0038] get:

[0039] Vref = V BE2 +(I B2 +I C2 )×R1+ I B2 ×R2+(I B2 +I C1 )×R3 +I C2 ×R4+2I C2 ×R6+4I C2 ×R7 ；

[0040] Vref = V BE2 + ×(1+ ;

[0041] Furthermore, it should be noted that, according to the amplifier's structure, there are two I signals across resistor R7 originating from the clamping amplifier. PATA The mirror current.

[0042] 3. Working principle of the compensation circuit: It includes two bias currents from the bias circuit and V generated by the resistor voltage divider provided by the core bandgap reference circuit. REF1 VREF2 I PTAT Current flowing through resistor R8 generates voltage V PTAT This makes V REF1 >V PTAT >V REF2 The resulting compensation current and the V generated by the core bandgap reference. ref With the temperature coefficient reversed, the current then flows through resistor R7 for voltage compensation.

[0043] In summary, the circuit structure designed in this invention innovatively employs a "simplified topology without bias current source": a clamp amplifier is used in the core bandgap reference circuit. The input pair of this clamp amplifier consists of NPN transistors matched to Q1, and there is no tail current source; its bias current is a mirror current of Q1. This reduces the number of transistors used, thus reducing the chip area. Secondly, a "segmented temperature compensation" mechanism is proposed: utilizing the reference voltage V generated by the core bandgap reference circuit... ref and its resistor voltage divider V REF1 V REF2 V PTAT The compensation current I_COMP generated by M1~M4 flows through R7 to generate Vcomp, which specifically counteracts the temperature characteristics of Vref, achieving nonlinear drift cancellation across the entire temperature range of -40℃ to 130℃, with a temperature coefficient as low as 2.07ppm / ℃; the voltage drift is only 0.424mV, breaking through the bottleneck of traditional technology's failure in extreme temperature range compensation.

[0044] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A high-precision segmented compensated bandgap reference voltage source, characterized in that: It includes three core circuit units: a startup circuit, a core bandgap circuit, and a segmented temperature compensation circuit. The three core units have the following circuit control: when the power supply is turned on, the startup circuit is turned on and injects an initial current, and the core bandgap circuit starts and outputs the base voltage. The segmented compensation circuit synchronously extracts the PTAT current to generate a temperature coefficient compensation voltage Vcomp. The temperature coefficient compensation voltage Vcomp and the reference voltage Vbg are weighted and superimposed to cancel nonlinear drift and stabilize the output reference voltage Vref.

2. The high-precision segmented compensation bandgap reference voltage source according to claim 1, characterized in that: The core bandgap circuit consists of a bandgap reference subunit and a clamping amplifier subunit. In the bandgap reference subunit, the following circuit is formed with a first transistor Q1 and a second transistor Q2 as the core devices: the collector of the first transistor Q1 is connected to the base of the second transistor Q2 through a second resistor R2, the emitter of the second transistor is connected to the emitter of the first transistor Q1 through a first resistor R1, and the emitter of the first transistor Q1 is grounded through a seventh resistor R7. The reference voltage output terminal Vref is applied to the collector of the first transistor Q1 through resistors R6, R4, and R3; the reference voltage output terminal voltage is applied to the collector of the second transistor Q2 through resistors R6 and R5; the reference voltage output terminal voltage is also connected to electrical node B through a series branch consisting of resistors R9, R10, and R11, which is connected to the base of the first transistor Q1; the voltage at the connection point of resistors R9 and R10 is marked as V. REF1 The voltage at the connection point of the tenth resistor R10 and the eleventh resistor R11 is marked as V. REF2 .

3. The high-precision segmented compensation bandgap reference voltage source according to claim 2, characterized in that: By matching the emitter area ratio of the first transistor Q1 and the second transistor Q2, and controlling the clamp amplifier subunit, it is possible to make the first transistor Q1 and the second transistor Q2 flow with equal current.

4. A high-precision segmented compensated bandgap reference voltage source according to claim 2 or 3, characterized in that: The clamping amplifier subunit is composed of a 12th MOSFET M12, a 3rd transistor Q3, and a 4th transistor Q4 as its core components. The gate and drain of the 12th MOSFET M12 are shorted together to form a point node X. The gate of the 11th MOSFET M11 is connected to point node X. The sources of the 11th MOSFET M11 and the 12th MOSFET M12 are both connected to the pre-bias voltage output terminal VDDA_PRE. The drain of the 11th MOSFET M11 is marked as electrical node A. Electrical node A is connected to the reference voltage output terminal Vref through a source follower composed of the 15th MOSFET M15. The base of the third transistor Q3 in the clamp amplifier subunit is connected to the collector of the second transistor Q2 in the bandgap reference subunit; the base of the fourth transistor Q4 in the clamp amplifier subunit is connected to the electrical node B in the bandgap reference subunit.

5. A high-precision segmented compensated bandgap reference voltage source according to claim 1, 2, or 3, characterized in that: The startup circuit includes a seventh transistor Q7, a fifth transistor Q5, and a sixth transistor Q6; the bases and collectors of the fifth transistor Q5 and the sixth transistor Q6 are shorted to form an equivalent diode structure and connected in series to ground; the base of the fifth transistor Q5 is connected to the base of the seventh transistor Q7, and the emitter of the seventh transistor Q7 is connected to node X in the clamp amplifier subunit.

6. A high-precision segmented compensated bandgap reference voltage source according to claim 1, 2, or 3, characterized in that: The segmented temperature compensation circuit includes a fourteenth MOSFET M14, a first MOSFET M1, a second MOSFET M2, a third MOSFET M3, and a fourth MOSFET M4. The pre-bias voltage output VDDA_PRE is applied to the source of the fourteenth MOSFET M14, and the drain of the fourteenth MOSFET M14 is grounded through an eighth resistor R8. The current flowing through the eighth resistor R8 is denoted as I. PATA The voltage between the eighth resistor R8 and ground is marked as V. PTAT ; The drain of the first MOSFET M1 is grounded; the sources of the third MOSFET M3 and the fourth MOSFET M4 are both connected to the output of the bias current source, and the drain of the fourth MOSFET M4 is grounded; the drains of the second MOSFET M2 and the third MOSFET M3 are connected, and their connection node is denoted as C; the current node C is connected to the emitter of the first transistor Q1 in the bandgap reference subunit; the current flowing out from the current node C is denoted as I_ COMP The gates of the first MOSFET M1, the second MOSFET M2, the third MOSFET M3, and the fourth MOSFET M4 are V0, ... PTAT、 V REF1、 V PTAT and V REF1。 7. A high-precision segmented compensated bandgap reference voltage source according to claim 6, characterized in that: The sources of both the first MOSFET M1 and the second MOSFET M2 are connected to the output of the bias current source.

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