Power device, stacked structure of power device and preparation method of stacked structure
By using a stacked structure of power chips and copper clip connections, the challenges of miniaturization and power density improvement in traditional power devices have been solved, resulting in more efficient power conversion and stability, and reduced system costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ACCOPOWER SEMICON CO LTD
- Filing Date
- 2026-04-14
- Publication Date
- 2026-05-12
AI Technical Summary
Traditional power devices have limited room for improvement in power density, and their flat design occupies a large area, making miniaturization difficult.
By employing a stacked structure of power chips and connecting them with flip-chip technology and copper clips, the first and second power chips are stacked together. Combined with the protection of the encapsulation layer, this reduces the space occupied and improves current carrying capacity and heat conduction.
While reducing the footprint, it increases the power density and conversion efficiency of the electronic power system, reduces the overall cost, enhances long-term operational stability, and lowers maintenance costs.
Smart Images
Figure CN122028488A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of power device technology, and in particular to a power device, a stacked structure of power devices, and a method for fabricating the same. Background Technology
[0002] Currently, electronic power systems are used in various industries, and the realization of high-efficiency conversion of electronic power systems depends on the power density of electronic power systems. However, in traditional technologies, the way to increase power density is usually to compress the size of components, so as to put in more components or reduce the system volume, which limits the space for performance improvement. Summary of the Invention
[0003] Therefore, it is necessary to provide a miniaturized power device, a stacked structure of the power device, and a method for fabricating the same.
[0004] In a first aspect, a stacked structure of power devices is provided, comprising: a first power chip and a second power chip stacked sequentially;
[0005] The drain of the first power chip is connected to the DC positive electrode via the first connecting component, and the source of the first power chip is connected to the AC electrode via the second connecting component.
[0006] The drain of the second power chip is connected to the AC electrode via the second connection component, and the source of the second power chip is connected to the DC negative electrode.
[0007] The gate of the first power chip is used to connect to the first driving terminal of the driving circuit, and the gate of the second power chip is used to connect to the second driving terminal of the driving circuit.
[0008] In one embodiment, the first connecting component is a copper clip, and / or the second connecting component is a copper clip.
[0009] In one embodiment, a first connecting component, a first power chip, a second connecting component, a second power chip, and a DC negative electrode are stacked sequentially, and a DC positive electrode and an AC electrode are distributed on both sides of the DC negative electrode.
[0010] In one embodiment, when the area of the first power chip is less than or equal to the area of the second power chip, the projection of the second power chip onto the first power chip covers the first power chip.
[0011] In one embodiment, the first power chip is welded to a first connection component, and the first power chip is welded to a second connection component;
[0012] The second power chip is welded to the second connecting component, and the second power chip is welded to the DC negative electrode.
[0013] The first connecting component is welded to the DC positive electrode, and the second connecting component is welded to the AC electrode.
[0014] In one embodiment, the stacked structure of the power devices further includes:
[0015] The encapsulation layer encapsulates the first power chip, the second power chip, the first connection component, the second connection component, the DC positive electrode, the DC negative electrode, and the AC electrode, with the DC positive electrode, the DC negative electrode, and the AC electrode partially exposed.
[0016] Secondly, a power device is also provided, including: a driving circuit and a stacked structure of the power device described above.
[0017] In one embodiment, the encapsulation layer encapsulates the stacked structure of the power devices and the drive circuitry.
[0018] Thirdly, a method for fabricating a stacked structure of power devices is also provided, comprising:
[0019] Prepare a first power chip, a second power chip, a DC positive electrode, a DC negative electrode, an AC electrode, a first connecting component, and a second connecting component;
[0020] The second power chip is flip-chipped onto the DC negative electrode, so that the source of the second power chip is placed on the DC negative electrode.
[0021] The first end of the second connecting component is placed on the drain of the second power chip, and the second end of the second connecting component is placed on the AC electrode;
[0022] The first power chip is flip-chip mounted on the first end of the second connection component, so that the source of the first power chip is placed on the first end of the second connection component;
[0023] The first end of the first connecting component is placed on the drain of the first power chip, and the second end of the first connecting component is placed on the DC positive electrode to obtain a power device.
[0024] In one embodiment, the method for fabricating the stacked structure of the power device further includes:
[0025] Before flipping the second power chip onto the DC negative electrode, soldering material is applied to the lead frame area where the DC negative electrode is located;
[0026] Before placing the first end of the second connection component on the drain of the second power chip, a soldering material is applied to the first end of the second connection component and the lead frame area where the AC electrode is located.
[0027] Before placing the first end of the first connecting component on the drain of the first power chip, a soldering material is applied to the lead frame area where the DC positive electrode is located.
[0028] After placing the second end of the first connecting component on the DC positive electrode, reflow soldering is performed.
[0029] The aforementioned power device, the stacked structure of the power device, and the fabrication method thereof, by stacking the first power chip and the second power chip, can reduce the space occupied by the power device, thereby increasing the conversion efficiency of the electronic power system with the stacked structure of the power device by increasing the power density while occupying less area of the electronic power system. Attached Figure Description
[0030] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0031] Figure 1 A block diagram illustrating the traditional application of power devices;
[0032] Figure 2 This is one of the structural block diagrams of a stacked structure of power devices according to an embodiment;
[0033] Figure 3 A structural block diagram of a field-effect transistor in a first power chip or a second power chip according to an embodiment;
[0034] Figure 4 This is a schematic diagram of a stacked structure of power devices according to one embodiment;
[0035] Figure 5 A top view of a power device with a tiled design according to an embodiment;
[0036] Figure 6 This is a second structural block diagram of a stacked structure of power devices according to one embodiment;
[0037] Figure 7 A flowchart illustrating the steps of a method for fabricating a stacked structure of a power device according to an embodiment;
[0038] Figure 8 This is a process flow diagram of a method for fabricating a stacked structure of a power device according to one embodiment. Detailed Implementation
[0039] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0041] It is understood that the terms "first," "second," etc., used herein may be used to describe various components or chips, but these components or chips are not limited by these terms. These terms are only used to distinguish the first component or chip from another component or chip. For example, without departing from the scope of this application, a first power chip may be referred to as a second power chip, and similarly, a second power chip may be referred to as a first power chip. Both the first power chip and the second power chip are power chips, but they are not the same power chip.
[0042] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0043] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.
[0044] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.
[0045] like Figure 1As shown, in traditional applications, when a power device comprises multiple power chips (A1 and A2), a flat layout is often used. While this structure enables high-efficiency conversion, it increases the area occupied by the power device in the electronic power system. When both the power device and the driver module B are housed on the same PCB (Printed Circuit Board), the overall area occupied by the power device and driver module B in the electronic power system is even larger, which is detrimental to miniaturization design. Here, the D (Drain) terminal is the drain of the power chip, and the S (Source) terminal is the source of the power chip. Traditionally, power chips are packaged in a standard, upright manner.
[0046] In a specific embodiment, such as Figure 2 As shown, a stacked structure 10 for power devices is provided, including: a first power chip 102 and a second power chip 104 stacked sequentially.
[0047] The drain of the first power chip 102 is connected to the DC positive electrode via the first connection component 106 (see details). Figure 2 The DC+ connection is in the middle, and the source of the first power chip 102 is connected to the AC electrode via the second connection component 108 (see details). Figure 2 AC in the middle) connection.
[0048] The drain of the second power chip 104 is connected to the AC electrode via the second connection component 108, and the source of the second power chip 104 is connected to the DC negative electrode (see details). Figure 2 DC-) connection in the middle.
[0049] The gate of the first power chip 102 is used to connect to the first driving terminal of the driving circuit, and the gate of the second power chip 104 is used to connect to the second driving terminal of the driving circuit.
[0050] The first power chip 102 and the second power chip 104 in the stacked structure 10 of the power device are in reverse series, enabling bidirectional energy flow control. Specifically, in the forward energy flow mode, direct current (DC) can flow through the first power chip 102 from the DC positive electrode to the AC electrode, thereby achieving current inversion. In this case, the second power chip 104 can be in the off state, achieving reverse cutoff based on the diode within the second power chip 104, thus preventing current backflow. In the reverse energy flow mode, alternating current (AC) can flow through the second power chip 104 from the AC electrode to the DC negative electrode, thereby achieving current rectification. In this case, the first power chip 102 can be in the off state, achieving reverse cutoff based on the diode within the first power chip 102, thereby blocking the path between the DC positive electrode and the AC electrode. Thus, by alternately controlling the on and off states of the first power chip 102 and the second power chip 104, current rectification and inversion can be alternately achieved. It should be noted that the on and off states of the first power chip 102 and the second power chip 104 can be controlled by a driving circuit.
[0051] The first power chip 102 and the second power chip 104 are stacked together, which can reduce the space occupied by the power devices. This allows the conversion efficiency of the electronic power system with the stacked structure 10 carrying the power devices to be improved by increasing the power density while occupying less area of the electronic power system.
[0052] Furthermore, the stacked structure 10 of the power device includes two power chips, thus reducing one power device in the electronic power system, greatly improving the power density of the electronic power system, and reducing the overall cost.
[0053] In one specific embodiment, the first connecting member 106 is a copper clip, and / or the second connecting member 108 is a copper clip.
[0054] Compared to wires, copper clips have a much larger cross-sectional area, thus giving them a greater current carrying capacity.
[0055] In power devices, failure is often related to overheating. Compared to wires, copper clips have larger contact areas with the first power chip 102 and with the second power chip 104. Therefore, when the first connecting member 106 is a copper clip and / or the second connecting member 108 is a copper clip, thermal resistance can be reduced, allowing heat from the first power chip 102 and / or the second power chip 104 to be conducted to the external environment through the copper clips, preventing heat buildup and thus improving the long-term operational stability of the power device.
[0056] In one specific embodiment, the first connecting component 106, the first power chip 102, the second connecting component 108, the second power chip 104, and the DC negative electrode are stacked in sequence, and the DC positive electrode and the AC electrode are distributed on both sides of the DC negative electrode.
[0057] Since the source of the first power chip 102 is connected to the AC electrode via the second connection component 108, and the drain of the second power chip 104 is connected to the AC electrode via the second connection component 108, while the source of the second power chip 104 is connected to the DC negative electrode, when the first power chip 102, the second connection component 108, the second power chip 104, and the DC negative electrode are stacked in sequence, both the first power chip 102 and the second power chip 104 are flip-chip. In a half-bridge topology power device, the connection of the source of the flip-chip second power chip 104 to the DC negative electrode in the lead frame can eliminate the parasitic inductance caused by traditional bonding wires.
[0058] like Figure 3 and Figure 4 As shown, the driving circuit drives the first power chip 102 based on its gate, and the driving circuit drives the second power chip 104 based on its gate. In the flip-chip structure, the length of the gate drive loop can be shortened, thereby suppressing gate oscillations caused by the Miller effect. Here, the D (Drain) terminal is the drain of the power chip, the S (Source) terminal is the source of the power chip, the G (Gate) terminal is the gate of the power chip, and the KS (Cathode-Source Electrode) terminal is the cathode-source of the power chip. When a field-effect transistor including the KS terminal is selected as the power chip, reverse current freewheeling or protection functions can be implemented based on the KS terminal, thereby simplifying the design of the external protection circuit. The KS terminal can be connected to the driving circuit.
[0059] In one specific embodiment, when the area of the first power chip 102 is less than or equal to the area of the second power chip 104, the projection of the second power chip 104 onto the first power chip 102 covers the first power chip 102.
[0060] In this configuration, the area occupied by the power devices in the electronic power system is the same as that occupied by the second power chip 104. Compared to a tiled design of power devices, this stacked structure 10 of power devices can reduce the area occupied by the power devices without changing the number of power chips.
[0061] In a specific embodiment, such as Figure 6 As shown, the first power chip 102 is welded to the first connecting component 106, and the first power chip 102 is welded to the second connecting component 108.
[0062] The second power chip 104 is welded to the second connecting component 108, and the second power chip 104 is welded to the DC negative electrode.
[0063] The first connecting component 106 is welded to the DC positive electrode, and the second connecting component 108 is welded to the AC electrode.
[0064] Therefore, it can be seen that there is a soldering material 110 between the drain of the first power chip 102 and the first end of the first connecting component 106, a soldering material 110 between the second end of the first connecting component 106 and the DC positive electrode, a soldering material 110 between the source of the first power chip 102 and the first end of the second connecting component 108, a soldering material 110 between the second end of the second connecting component 108 and the AC electrode, a soldering material 110 between the drain of the second power chip 104 and the first end of the second connecting component 108, and a soldering material 110 between the source of the second power chip 104 and the DC negative electrode. The soldering material 110 can be an interconnecting material such as solder paste, silver, or sintered copper.
[0065] The connection layer formed by the welding material 110 and the welding process has good thermal conductivity, and compared with traditional wire bonding, this welding layer has better mechanical stability. It can ensure that the stacked structure 10 of the power device can maintain the stacked structure during use and does not cause serious misalignment, thereby ensuring the normal use of the power device and reducing the maintenance cost of the electronic power system.
[0066] In one embodiment, the lead frame including a DC positive electrode, a DC negative electrode, and an AC electrode can be made of ceramic substrate materials such as DBC (Direct Bonded Copper) and AMB (Active Metal Brazing).
[0067] In one specific embodiment, the stacked structure 10 of the power devices described above further includes an encapsulation layer 112.
[0068] The encapsulation layer 112 encapsulates the first power chip 102, the second power chip 104, the first connection component 106, the second connection component 108, the DC positive electrode, the DC negative electrode, and the AC electrode, with the DC positive electrode, the DC negative electrode, and the AC electrode partially exposed.
[0069] The encapsulation layer 112 completely covers the first power chip 102, the second power chip 104, the first connecting component 106, and the second connecting component 108, thereby preventing moisture or dust from the external environment from directly contacting these components and avoiding chip malfunctions caused by moisture contamination and dust accumulation. Simultaneously, the DC positive electrode, DC negative electrode, and AC electrode are partially exposed, allowing external devices to connect to the power devices through these exposed portions, thus ensuring the normal operation of the power devices.
[0070] In one specific embodiment, a power device is provided, including: a driving circuit and a stacked structure of the power device described above.
[0071] The drive circuit can be encapsulated within the power device: the power device includes two power chips and a drive chip. Therefore, in electronic power systems, one power device and one drive device can be reduced, which greatly increases the power density of electronic power systems and reduces the overall cost.
[0072] In one specific embodiment, the encapsulation layer encapsulates the stacked structure of the power devices and the driving circuitry.
[0073] The drive circuit can be directly mounted on the lead frame of the stacked structure of the power device, thereby realizing the integrated design of the power device. The lead frame contains the DC positive electrode, DC negative electrode, and AC electrode.
[0074] In one embodiment, the lead frame containing the drive circuit is different from the lead frame containing the stacked structure of the power devices. Providing multiple lead frames allows for the separation of the drive circuit and the stacked structure of the power devices in actual use, accommodating different locations reserved for the power devices in the electronic power system.
[0075] In a specific embodiment, such as Figure 7 As shown, a method for fabricating a stacked structure of a power device includes:
[0076] S602, prepare a first power chip, a second power chip, a DC positive electrode, a DC negative electrode, an AC electrode, a first connecting component, and a second connecting component.
[0077] S604, the second power chip is flip-chipped onto the DC negative electrode, so that the source of the second power chip is placed on the DC negative electrode.
[0078] S606, the first end of the second connecting component is placed on the drain of the second power chip, and the second end of the second connecting component is placed on the AC electrode.
[0079] S608, the first power chip is flip-mounted onto the first end of the second connection component, so that the source of the first power chip is placed on the first end of the second connection component.
[0080] S610, the first end of the first connecting component is placed on the drain of the first power chip, and the second end of the first connecting component is placed on the DC positive electrode to obtain a power device.
[0081] Based on the stacking order of the first power chip, the second power chip, the DC positive electrode, the DC negative electrode, the AC electrode, the first connecting component, and the second connecting component, starting from the bottom layer of the DC positive electrode, the DC negative electrode, and the AC electrode, the second power chip, the second connecting component, the first power chip, and the first connecting component are placed in sequence to form a power device with a stacked structure.
[0082] In one specific embodiment, the method for fabricating the stacked structure of the power device further includes:
[0083] Before flipping the second power chip onto the DC negative electrode, soldering material is applied to the lead frame area where the DC negative electrode is located.
[0084] Before placing the first end of the second connection component on the drain of the second power chip, soldering material is applied to the first end of the second connection component and the lead frame area where the AC electrode is located.
[0085] Before placing the first end of the first connection component on the drain of the first power chip, soldering material is applied to the lead frame area where the DC positive electrode is located.
[0086] After placing the second end of the first connecting component on the DC positive electrode, reflow soldering is performed.
[0087] Before placing the first power chip and the second power chip, soldering material is pre-applied to the soldering locations of the first power chip and the second power chip to prepare for the reflow soldering step.
[0088] In one embodiment, such as Figure 8As shown, before flipping the second power chip, soldering material can be applied to the lead frame area where the DC negative electrode is located. After flipping the second power chip, soldering material can be applied to the side of the first end of the second connecting component near the second power chip and the lead frame area where the AC electrode is located. After mounting the second connecting component and before flipping the first power chip, soldering material can be applied to the side of the first end of the second connecting component near the first power chip. After flipping the first power chip, soldering material can be applied to the lead frame area where the DC positive electrode is located. Then, reflow soldering and molding are performed to obtain the finished power device. Of course, if soldering material is not applied to the lead frame area where the AC electrode is located, soldering material can be applied to the side of the second end of the second connecting component near the lead frame.
[0089] In one embodiment, prior to the reflow soldering step, the method further includes:
[0090] A welding material is applied to a first preset area; wherein, the first preset area is the area on the lead frame that is in contact with the gate of the first power chip.
[0091] A welding material is applied to a second preset area; wherein, the second preset area is the area on the lead frame that is in contact with the gate of the second power chip.
[0092] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.
[0093] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0094] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A stacked structure for power devices, characterized in that, include: The first power chip and the second power chip are stacked in sequence; The drain of the first power chip is connected to the DC positive electrode via a first connecting component, and the source of the first power chip is connected to the AC electrode via a second connecting component. The drain of the second power chip is connected to the AC electrode via the second connecting component, and the source of the second power chip is connected to the DC negative electrode. The gate of the first power chip is used to connect to the first driving terminal of the driving circuit, and the gate of the second power chip is used to connect to the second driving terminal of the driving circuit.
2. The stacked structure of the power device according to claim 1, characterized in that, The first connecting component is a copper clip, and / or the second connecting component is a copper clip.
3. The stacked structure of the power device according to claim 1, characterized in that, The first connecting component, the first power chip, the second connecting component, the second power chip, and the DC negative electrode are stacked in sequence, and the DC positive electrode and the AC electrode are distributed on both sides of the DC negative electrode.
4. The stacked structure of the power devices according to claim 1, characterized in that, When the area of the first power chip is less than or equal to the area of the second power chip, the projection of the second power chip onto the first power chip covers the first power chip.
5. The stacked structure of the power device according to claim 1, characterized in that, The first power chip is soldered to the first connecting component, and the first power chip is soldered to the second connecting component; The second power chip is soldered to the second connecting component, and the second power chip is soldered to the DC negative electrode; The first connecting component is welded to the DC positive electrode, and the second connecting component is welded to the AC electrode.
6. The stacked structure of the power devices according to claim 1, characterized in that, Also includes: The encapsulation layer encapsulates the first power chip, the second power chip, the first connection component, the second connection component, the DC positive electrode, the DC negative electrode, and the AC electrode, with the DC positive electrode, the DC negative electrode, and the AC electrode partially exposed.
7. A power device, characterized in that, include: The driving circuit and the stacked structure of the power device according to any one of claims 1-6.
8. The power device according to claim 7, characterized in that, The encapsulation layer encapsulates the stacked structure of the power devices and the drive circuit.
9. A method for fabricating a stacked structure of a power device, characterized in that, The method includes: Prepare a first power chip, a second power chip, a DC positive electrode, a DC negative electrode, an AC electrode, a first connecting component, and a second connecting component; The second power chip is flip-chip mounted on the DC negative electrode, so that the source of the second power chip is placed on the DC negative electrode; The first end of the second connecting component is placed on the drain of the second power chip, and the second end of the second connecting component is placed on the AC electrode; The first power chip is flip-chipped onto the first end of the second connection component, so that the source of the first power chip is placed on the first end of the second connection component; The first end of the first connecting component is placed on the drain of the first power chip, and the second end of the first connecting component is placed on the DC positive electrode to obtain a power device.
10. The method according to claim 9, characterized in that, The method further includes: Before the step of flipping the second power chip onto the DC negative electrode, a soldering material is applied to the lead frame area where the DC negative electrode is located. Before placing the first end of the second connection component on the drain of the second power chip, a soldering material is applied to the first end of the second connection component and the lead frame area where the AC electrode is located. Before placing the first end of the first connecting component on the drain of the first power chip, a soldering material is applied to the lead frame area where the DC positive electrode is located. After placing the second end of the first connecting component on the DC positive electrode, reflow soldering is performed.