Verification environment integrity detection method and system and electronic equipment
By constructing an error injection model and conducting regression simulation tests, the error coverage problem caused by the imperfection of the verification environment was solved, ensuring the integrity and quality of the verification environment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HAIGUANG INFORMATION TECH (SUZHOU) CO LTD
- Filing Date
- 2026-01-08
- Publication Date
- 2026-05-15
AI Technical Summary
In existing verification methods, due to imperfections or omissions in the verification environment, error scenarios are incorrectly covered, affecting the quality of verification work.
By constructing an error injection model, injecting errors, and performing regression simulation tests, the simulation test results are compared with the expected results one by one to determine the integrity of the verification environment.
To ensure the integrity of the verification environment, improve the quality of verification work, detect vulnerabilities in the verification environment, and guarantee the effectiveness of verification work.
Smart Images
Figure CN122044982A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit design technology, and in particular to a method, system and electronic device for verifying environmental integrity. Background Technology
[0002] In integrated circuit projects, verification work consumes a significant amount of project time. As integrated circuit functions become increasingly complex, with more design modules and more interconnections and functionalities between them, the corresponding verification workload also increases. Verification plays an increasingly important role, making it crucial to ensure that integrated circuit verification is performed thoroughly.
[0003] Current verification methods commonly employ a coverage-driven verification strategy: potential error types are abstracted into coverage points and cross-coverage items, encoded in a functional coverage file, and a coverage report is obtained through simulation regression testing to determine whether all error scenarios are covered. However, in actual verification work, imperfections in the verification environment or oversights in certain parts of the verification environment may lead to incorrectly covered error scenarios, thus affecting the quality of the verification work. Summary of the Invention
[0004] In view of this, embodiments of this application provide a method, system, and electronic device for detecting the integrity of a verification environment, which facilitates the detection of the integrity of the verification environment and thus helps to ensure the integrity of the verification environment.
[0005] In a first aspect, this application provides a method for verifying the integrity of an environment. The method includes: constructing a corresponding error injection model in the verification environment based on injection error analysis information; the injection error analysis information includes error injection signal types and error injection nodes; the error injection model is used to indicate the error injection nodes, the error injection signals associated with the error injection nodes, and the execution rules corresponding to the error injection signal types; injecting errors into the verification environment based on the error injection model and performing regression simulation tests; and determining the integrity of the verification environment based on the regression simulation test results.
[0006] According to one embodiment of this application, determining the integrity of the verification environment based on regression simulation test results includes: comparing the regression simulation test results with the expected injection results one by one; the expected injection results are the expected output error signal features of at least one set of injection error signal types and injection error combinations of error injection nodes; if the regression simulation test results capture the corresponding expected output error signal features, then the verification environment is determined to be complete; if the regression simulation test results do not capture the expected output error signal features, then the verification environment is determined to be incomplete.
[0007] According to one embodiment of this application, the step of constructing a corresponding error injection model in a verification environment based on injection error analysis information includes: obtaining associated signals between the error injection node and the error injection node based on the error injection signal type and the error injection node; determining execution rules for the associated signals according to the error injection signal type, wherein the execution rules are used to indicate the triggering conditions, signal operation methods, and timing requirements for error injection; and integrating the associated signals, execution rules, and the error injection node to form a corresponding error injection model.
[0008] According to one embodiment of this application, the error injection signal type includes a signal-level error injection signal. Injecting errors into the verification environment based on the error injection model includes: based on an indicated clock signal associated with the error injection node, detecting the state of an indicator signal indicating that the register value is valid at the rising edge of the clock signal; the signal-level error injection signal includes: a clock signal associated with the error injection node, a register signal, and an indicator signal indicating that the register value is valid; if the indicator signal is valid, then performing an inversion operation on the register signal according to the execution rule, and releasing the signal after the inversion operation on the register signal at the next rising edge of the clock signal to complete the error injection into the verification environment.
[0009] According to one embodiment of this application, the error injection signal type includes a protocol-level error injection signal; injecting errors into the verification environment based on the error injection model includes: based on the protocol content associated with the error injection node, after a preset clock cycle following the rising edge of the original signal, replacing the target signal with the error injection signal to complete the error injection into the verification environment; the protocol-level error injection signal includes: the protocol content associated with the error injection node, the original signal, the target signal, and the error injection signal.
[0010] According to one embodiment of this application, the step of injecting errors into the verification environment and performing regression simulation tests based on the error injection model includes: injecting errors into a preset first verification scenario in the verification environment based on the error injection model and performing regression simulation tests to obtain a first regression simulation test result; if an error occurs in the first regression simulation test result, comparing the first regression simulation test result with the expected error injection result one by one; if the first regression simulation test result captures the first error signal feature corresponding to the expected output, then determining that the verification environment has integrity.
[0011] According to one embodiment of this application, the step of injecting errors into the verification environment and performing regression simulation tests based on the error injection model further includes: injecting errors into a preset second verification scenario in the verification environment based on the error injection model and performing regression simulation tests to obtain a second regression simulation test result; if the second regression simulation test result shows an error, comparing the first regression simulation test result and the second regression simulation test result with the expected error injection result one by one; if the first regression simulation test result captures the first error signal feature corresponding to the expected output, and the second regression simulation test result captures the second error signal feature corresponding to the expected output, then it is determined that the verification environment has integrity.
[0012] According to one embodiment of this application, the injection error analysis information is stored in the error injection model in the form of an array, and each array corresponds to an error injection operation.
[0013] Secondly, embodiments of this application also provide a verification environment integrity detection system, the system comprising: a first construction module, configured to construct a corresponding error injection model in the verification environment based on injection error analysis information; the injection error analysis information includes error injection signal types and error injection nodes, the error injection model being configured to indicate the error injection nodes, error injection signals associated with the error injection nodes, and execution rules corresponding to the error injection signal types; an error injection module, configured to inject errors into the verification environment and perform regression simulation tests based on the error injection model; and a verification analysis module, configured to determine the integrity of the verification environment based on the regression simulation test results.
[0014] Thirdly, embodiments of this application also provide an electronic device, the electronic device comprising: a processor and a memory, wherein the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the verification environment integrity detection method described in any of the first aspects above. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0016] Figure 1 This is a schematic diagram of a verification environment integrity detection method provided in an embodiment of this application; Figure 2A flowchart illustrating step S110 of the verification environment integrity detection method provided in an embodiment of this application; Figure 3 A flowchart illustrating step S120 of the method for verifying environmental integrity detection is provided for one embodiment of this application; Figure 4 This is a schematic diagram of the verification environment integrity detection system architecture provided in one embodiment of this application; Figure 5 This is a schematic diagram of an electronic device structure provided in an embodiment of this application. Detailed Implementation
[0017] The embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0018] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.
[0019] As integrated circuits become increasingly large-scale, various IP sub-verification environments are integrated into a single large verification environment. It's possible that some verification environment checks and assertions may not be enabled. Therefore, in actual verification work, imperfections or oversights in certain parts of the verification environment may lead to incorrect scenarios being incorrectly covered, thus affecting the quality of the verification work.
[0020] See Figure 1 This application provides a method for verifying environmental integrity detection, including the following steps: S110. Based on the injection error analysis information, construct a corresponding error injection model in the verification environment; the injection error analysis information includes the injection error signal type and the error injection node; the error injection model is used to indicate the error injection node, the injection error signal associated with the error injection node, and the execution rule corresponding to the injection error signal type. In this step, for different injection error analysis information, namely, injection error signal types and injection error nodes, corresponding error injection models are constructed for error injection processing. Each error injection model indicates its injection error node, the injection error signal associated with the injection error node, and the execution rules for the corresponding injection error signal type. Each error injection model has a separate injection error enable switch. Injection error signals can be categorized into signal-level and protocol-level. Signal-level errors target hardware-level errors, and signal-level injection nodes include: data lines of the input and output ports of the Design Under Test (DUT), values of registers or memory within the CPU-configurable DUT, register values representing the current state in the DUT's internal state machine, and register values on some critical data paths. Protocol-level errors target communication protocol or interface specification-level errors, and protocol-level injection nodes mainly include: protocol timing errors and protocol content errors. Protocol timing errors include violations of protocol-defined timing behaviors, such as handshake signal timing, response delays, and timeouts. Protocol content errors include violations of protocol-defined data formats or control fields, such as illegal values for address, data, and command fields.
[0021] S120. Based on the error injection model, inject errors into the verification environment and perform regression simulation tests.
[0022] In this step, errors are injected into the verification environment through an error injection model, and regression simulation tests are performed on the verification scenarios. In order to ensure that individual errors can also be captured by the verification environment, the error injection enable switch of only one error injection model is enabled for each verification scenario (case) in the regression simulation test.
[0023] S130. Based on the regression simulation test results, determine the integrity of the verification environment.
[0024] In this step, after the regression simulation test is completed, the regression simulation test results for each verification scenario are obtained. It is then checked whether all verification scenarios have failed or resulted in errors. If the results for each verification scenario are all failures or errors, it proves that the current verification environment has high integrity, each error point can be detected, and the current verification work is effective. If there are successful verification scenarios, meaning that error points were not captured, the reasons for their failure to be captured are analyzed, thereby strengthening the verification work of the design to be detected.
[0025] The verification environment integrity detection method provided in this application constructs a corresponding error injection model based on the error injection signal type and error injection node, performs error injection and regression simulation tests in a targeted and selective manner, and tests whether the current verification environment can capture the error based on the regression simulation test results after error injection, thereby testing the integrity of the current verification environment. This facilitates the detection of the integrity of the verification environment and helps to ensure the integrity of the verification environment.
[0026] In some embodiments, see Figure 3 Step S120: Based on the regression simulation test results, determine the integrity of the verification environment, including: S121. Compare the regression simulation test results with the expected injection results one by one; the expected injection results are the error signal characteristics expected to be output by at least one set of injection error signal types and injection error combinations of error injection nodes. S122. If the regression simulation test results capture the corresponding error signal characteristics of the expected output, then the verification environment is determined to be complete. S123. If the expected error signal characteristics are not captured in the regression simulation test results, then the verification environment is determined to be incomplete.
[0027] In this embodiment, when analyzing the regression simulation test results to determine the integrity of the verification environment, the regression simulation test results for each verification scenario are obtained. It is checked whether all verification scenarios have errors or failures. For failed or erroneous verification scenarios, their regression simulation test results are compared and analyzed one by one with the expected error injection results to verify whether they are consistent with or conform to the expected error injection results. If all verification scenarios fail or have errors, and the regression simulation test results in each verification scenario conform to the expected error injection results, it proves that the current verification environment has integrity, meaning that the current verification environment guarantees the quality of the current verification work. If there are verification scenarios where the regression simulation test results do not conform to the expected error injection results or show successful regression simulation test results, the reasons for these results are further analyzed, and the regression simulation test is performed again. For example, when the error injection signal type is a signal-level error injection signal, the reasons why the regression simulation test results do not meet the expected error injection results or show that the regression simulation test results are successful may include: the selected error injection node is unreasonable, or the verification environment really has defects; if it is because the selected error injection node is unreasonable, then a reasonable error injection node should be selected, the error injection model should be rebuilt, and regression simulation test should be performed; if it is because the verification environment really has defects, then the check in the verification environment should be supplemented according to the defects to make the verification environment more complete.
[0028] Specifically, before performing error injection and regression simulation testing on the design under test, the functional code of the design under test is analyzed to identify key nodes in the data path, namely, the types of error injection signals and error injection nodes. The feasibility of injecting errors at these nodes and the potential expected errors after injection are analyzed. For example, if the design under test is a processor, the data path includes the Instruction Register (IR), Register File, Arithmetic and Logic Unit (ALU), Data Memory (DM), Program Counter (PC), and Control Unit (CU). Key nodes in the data path are identified, such as the outputs of the Instruction Register, the read outputs of the Register File, the inputs and outputs of the ALU, the inputs and outputs of the Data Memory, the inputs and outputs of the Program Counter, and the control signals generated by the Control Unit. These nodes are identified as signal-level error injection nodes. Similarly, protocol-level error injection nodes and their types are not discussed further here.
[0029] The expected result of an injection error is the expected output error signal characteristic of a combination of injection error signal types and injection error nodes. For example, an injection error in the instruction register output may result in an incorrect opcode, an incorrect register address, or an incorrect immediate value; an injection error in the register file read port output may result in an incorrect calculation result; an injection error in the ALU input may result in a similar error to a register error, potentially leading to an incorrect operation result; an injection error in the ALU output may result in an error that could lead to data errors written to registers or memory; an injection error in the data memory input may result in data errors stored in memory; an injection error in the data memory output may result in data errors read by the processor; an injection error in the program counter may result in a jump to an incorrect address, thereby executing incorrect code; and an injection error in the control signals generated by the control unit may result in the execution of incorrect operations, such as changing the ALU's addition operation to subtraction, or performing a subtraction operation.
[0030] In some embodiments, see Figure 2 Step S110: Based on the injection error analysis information, construct the corresponding error injection model in the verification environment, including: S111. Based on the error injection signal type and the error injection node, obtain the error injection signal associated with the error injection node; S112. Determine the execution rules for the error injection signal according to the error injection signal type. The execution rules are used to indicate the triggering conditions, signal operation mode, and timing requirements for error injection. S113. Integrate the error injection signal, execution rules and error injection node to form a corresponding error injection model.
[0031] In this embodiment, when constructing the error injection model, the corresponding error injection node and the error injection signal associated with the error injection node are first determined according to the error injection signal type. For example, for a signal-level error injection node with an error injection signal type of signal level, the associated error injection signals are determined, including: a clock signal, a register signal, and a signal indicating that the register signal value is valid. Then, the injection execution rule for the error injection signal is determined according to the error injection signal type. The execution rule is used to indicate the triggering condition of error injection, the operation mode of the signal, and the timing requirements. The error injection signal, the execution rule, and the corresponding error injection node are integrated to form the corresponding error injection model. For example, for signal-level injection execution behavior, the injection execution rule can be: at the rising edge of each clock signal, it is determined whether the signal indicating that the register value is valid is valid. If valid, the register signal is inverted, and the register signal is released at the rising edge of the next clock signal.
[0032] In some embodiments, the error injection signal includes a signal-level error injection signal. Injecting errors into the verification environment based on the error injection model includes: detecting the state of an indicator signal indicating a valid register value on the rising edge of a clock signal associated with the error injection node; the associated signal includes: the clock signal associated with the error injection node, a register signal, and an indicator signal indicating a valid register value. If the indication signal is valid, the register signal is inverted according to the execution rules, and the signal after the register signal is inverted is released on the rising edge of the next clock signal to complete the error injection into the verification environment.
[0033] In this embodiment, for signal-level error injection, an error injection model is used to select an error injection node at the signal level, the error injection signal associated with the error injection node at that signal level, and its corresponding execution rule for error injection. For example, a register value on one of the key data paths is selected as the error injection node. At the rising edge of each clock signal, the indicator signal status indicating that the register value is valid is detected. If the indicator signal is valid, the register signal is inverted. At the rising edge of the next clock signal, the register signal after the inverted operation is performed is released to ensure that the register signal is error-injected and that there is only one clock cycle error. The erroneous register signal can be passed down along the data path until it is captured by the check in the verification environment to complete the error injection into the verification environment.
[0034] In some embodiments, the error injection signal includes a protocol-level error injection signal; Injecting errors into the verification environment based on the error injection model includes: based on the protocol content associated with the error injection node, after a preset clock cycle following the rising edge of the original signal, replacing the target signal with an error injection signal to complete the error injection into the verification environment; the protocol-level error injection signal includes: the protocol content associated with the error injection node, the original signal, the target signal, and the error injection signal.
[0035] In this embodiment, for protocol-level error injection, an error injection model is used to select a protocol-level error injection node, the error injection signal associated with that node, and the corresponding execution rule for error injection. Both protocol content error injection and signal-level error injection are content-based and will not be elaborated further. For protocol timing error injection, this embodiment uses a delay-type protocol as an example. For instance, the original protocol content is: five cycles after the rising edge of the original signal A, the rising edge of the target signal B occurs; error injection is performed on the target signal B, for example, by delaying it by one cycle. At this time, an error injection signal C is generated by delaying the target signal B by one cycle, and this error injection signal serves as the error-injected version of the target signal. Other similar timing-related signals can be processed similarly: for each signal requiring error injection, such as signal B, there is a corresponding error injection signal, such as signal C. These target signals and their corresponding error injection signals are stored in a separate array. When performing protocol error injection, five clock cycles after the rising edge of the original signal A, the error injection signal C replaces the target signal B to complete the error injection into the verification environment. That is, under normal circumstances, the target signal B rises 5 cycles after the rising edge of the original signal A. However, after the error was injected, the simulation regression test results showed that the signal B was generated in the 6th cycle, which violated the protocol and the error was caught.
[0036] In some embodiments, injecting errors into the verification environment and performing regression simulation tests based on the error injection model includes: injecting errors into a preset first verification scenario in the verification environment based on the error injection model and performing regression simulation tests to obtain first regression simulation test results; If the first regression simulation test result is incorrect, the first regression simulation test result will be compared with the expected result of the error annotation one by one. If the first error signal feature corresponding to the expected output is captured in the first regression simulation test result, then the verification environment is determined to be complete.
[0037] In this embodiment, during the error injection verification regression, a typical verification scenario is created, the error injection signal type and error injection node in the scenario are determined, and an enable switch is set for the selected error injection node to dynamically enable or disable error injection at runtime. During testing, firstly, the verification scenario is run without error injection to ensure that the verification environment can run normally. Then, the error injection model is used to inject errors into the verification scenario (case). After the regression is completed, the first regression simulation test result is obtained, and it is checked whether the first regression simulation test result has errors or failures. If errors occur, the errors are compared one by one with the expected error injection results to determine whether the errors meet the expectations. If they do, the integrity of the current environment can be demonstrated.
[0038] According to one embodiment of this application, the step of injecting errors into the verification environment and performing regression simulation tests based on the error injection model further includes: injecting errors into a preset second verification scenario in the verification environment based on the error injection model and performing regression simulation tests to obtain a second regression simulation test result; if the second regression simulation test result shows an error, comparing the first regression simulation test result and the second regression simulation test result with the expected error injection result one by one; if the first regression simulation test result captures the first error signal feature corresponding to the expected output, and the second regression simulation test result captures the second error signal feature corresponding to the expected output, then it is determined that the verification environment has integrity.
[0039] In this embodiment, multiple verification scenarios can be created to perform error injection operations during the verification regression test. Each verification scenario performs only one error injection operation. The integrity of the verification environment is determined by verifying all regression simulation test results. For example, in the verification regression test, a first verification scenario and a second verification scenario are created. Errors are injected into each verification scenario using an error injection model. After the regression is completed, the first regression simulation test results and the second regression simulation test results are obtained. It is checked whether both the first regression simulation test results and the second regression simulation test results are incorrect or failed. If both are incorrect or failed, their incorrect results are compared with the expected results of the error injection one by one to determine whether each error meets the expectation. If the error results of each verification scenario meet the expectation, it indicates that the current verification environment has high integrity and can detect all errors.
[0040] According to one embodiment of this application, the injection error analysis information is stored in the error injection model in the form of an array, and each array corresponds to an error injection operation.
[0041] In this embodiment, multiple signals need to be monitored in the verification environment, and errors need to be injected into these signals. The error injection signal types and error injection nodes are placed in separate arrays, with one array executing one error injection operation. This ensures the separation of the error injection model from the verification environment, enabling independent development, testing, and maintenance of the error injection model. Furthermore, managing the error injection signals through arrays allows for easy configuration of different verification scenarios. For example, different error injection operations can be applied by selecting different arrays for different verification scenarios. Each array corresponds to one error injection operation, making it clear which error has been injected during testing. Moreover, when adding new error injection behaviors or operations, only new data and corresponding signal configuration are required; the existing verification environment structure does not need to be changed.
[0042] See Figure 4 This application also provides an environmental integrity verification system, comprising: The first construction module 41 is used to construct a corresponding error injection model in the verification environment based on the injection error analysis information; the injection error analysis information includes the injection error signal type and the error injection node; the error injection model is used to indicate the error injection node, the injection error signal associated with the error injection node, and the execution rule corresponding to the injection error signal type. Error injection module 42 is used to inject errors into the verification environment based on the error injection model and perform regression simulation tests; The verification analysis module 43 is used to determine the integrity of the verification environment based on the regression simulation test results.
[0043] In some embodiments, the verification analysis module includes: The first comparison submodule is used to compare the regression simulation test results with the expected injection results one by one; the expected injection results are the error signal characteristics expected to be output by at least one set of injection error signal types and injection error combinations of error injection nodes; The first determining submodule is used to determine that the verification environment has integrity if the regression simulation test results capture the corresponding error signal features of the expected output. The second determining submodule is used to determine that the verification environment is not complete if the expected output error signal features are not captured in the regression simulation test results.
[0044] In some embodiments, the first building module includes: The first acquisition submodule is used to acquire the injection error signal associated with the error injection node based on the injection error signal type and the error injection node; The third determining submodule is used to determine the execution rules for the injection error signal based on the injection error signal type. The execution rules are used to indicate the triggering conditions, signal operation methods, and timing requirements for error injection. The first construction submodule is used to integrate the error injection signal, execution rules and error injection node to form a corresponding error injection model.
[0045] In some embodiments, the error injection signal includes a signal-level error injection signal. The error injection module is specifically used to detect the indication signal status of a valid register value on the rising edge of a clock signal associated with the error injection node; the signal-level error injection signal includes: a clock signal associated with the error injection node, a register signal, and an indication signal indicating a valid register value. If the indication signal is valid, the register signal is inverted according to the execution rules, and the signal after the register signal is inverted is released on the rising edge of the next clock signal to complete the error injection into the verification environment.
[0046] In some embodiments, the error injection signal includes a protocol-level error injection signal; The error injection module is specifically used to replace the target signal with an error injection signal after a preset clock cycle following the rising edge of the original signal, based on the protocol content associated with the error injection node, in order to complete the error injection into the verification environment; the protocol-level error injection signal includes: the protocol content associated with the error injection node, the original signal, the target signal, and the error injection signal.
[0047] In some embodiments, the error injection module is further configured to: Based on the error injection model, an error is injected into a preset first verification scenario in the verification environment and a regression simulation test is performed to obtain the first regression simulation test result. If the first regression simulation test result is incorrect, the first regression simulation test result will be compared with the expected result of the error annotation one by one. If the first error signal feature corresponding to the expected output is captured in the first regression simulation test result, then the verification environment is determined to be complete.
[0048] In some embodiments, the error injection module is further configured to inject errors into the verification environment based on the error injection model and perform regression simulation tests, and further includes: Based on the error injection model, an error is injected into a preset second verification scenario in the verification environment and a regression simulation test is performed to obtain the second regression simulation test results. If the second regression simulation test result is incorrect, the first regression simulation test result and the second regression simulation test result are compared with the expected result of the error annotation one by one. If the first regression simulation test result captures the first error signal feature corresponding to the expected output, and the second regression simulation test result captures the second error signal feature corresponding to the expected output, then the verification environment is determined to be complete.
[0049] In some embodiments, the injection error analysis information is stored in the error injection model in the form of an array, and each array corresponds to an error injection operation.
[0050] The verification environment integrity detection system of this embodiment can be used to execute the technical solution of the verification environment integrity detection method shown in the foregoing embodiments. Its implementation principle and technical effect are similar. For details not described in detail, please refer to each other.
[0051] See Figure 5 This application also provides an electronic device 50, which is based on the same technical concept as the foregoing embodiments. The electronic device provided in this application can implement the steps and flow of any of the embodiments described in this application.
[0052] The aforementioned electronic device 50 may include a processor 51 and a memory 52, wherein the memory 52 is used to store executable program code; the processor 51 runs a program corresponding to the executable program code by reading the executable program code stored in the memory 52, for executing any of the verification environment integrity detection methods described in the foregoing embodiments.
[0053] For details on the specific execution process of the above steps by the processor 51 and the steps further executed by the processor 51 by running executable program code, please refer to the description of the embodiments of this application, which will not be repeated here.
[0054] The electronic device exists in various forms, including but not limited to: (1) Mobile communication devices: These devices are characterized by their mobile communication capabilities and are primarily designed to provide voice and data communication. These terminals include smartphones (such as iPhones), multimedia phones, feature phones, and low-end phones.
[0055] (2) Ultra-mobile personal computer devices: These devices fall under the category of personal computers, possessing computing and processing capabilities, and generally also have mobile internet access features. These terminals include PDAs, MIDs, and UMPCs, such as the iPad.
[0056] (3) Portable entertainment devices: These devices can display and play multimedia content. This category includes audio and video players (such as iPods), handheld game consoles, e-book readers, as well as smart toys and portable car navigation devices.
[0057] (4) Server: A device that provides computing services. The components of a server include a processor, hard disk, memory, system bus, etc. Servers are similar to general computer architectures, but because they need to provide highly reliable services, they have higher requirements in terms of processing power, stability, reliability, security, scalability, and manageability.
[0058] (5) Other electronic devices with data interaction functions.
[0059] This application also provides a computer-readable storage medium storing one or more programs that can be executed by one or more processors to implement the verification environment integrity detection method described in any of the preceding embodiments.
[0060] In summary, this application provides a method, system, and electronic device for verifying the integrity of a verification environment. It constructs a corresponding error injection model in the verification environment based on the error injection signal type and error injection node; injects errors into the verification environment based on the error injection model and performs regression simulation tests; and determines the integrity of the verification environment based on the regression simulation test results. By constructing a corresponding error injection model according to the error injection signal type and error injection node, and selectively performing error injection and regression simulation tests to cause errors in the simulation results, the integrity of the current verification environment is tested, facilitating the detection of the verification environment's integrity and thus helping to ensure its integrity.
[0061] Furthermore, based on the regression simulation test results, starting from the opposite of successful verification, the current verification environment can be tested after error injection to see if it can capture the error, thereby proving the integrity of the current verification environment. If the verification environment does not capture the error, it indicates that there is a loophole in the verification environment's checks. In this way, the integrity of the verification environment can be improved, thereby ensuring the quality of the verification work.
[0062] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0063] The various embodiments in this specification are described in a related manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.
[0064] For ease of description, if systems, servers, etc. are involved, they may be described separately as various units / modules based on their functions. Of course, in implementing this application, the functions of each unit / module can be implemented in one or more software and / or hardware.
[0065] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc.
[0066] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A method for verifying environmental integrity, characterized in that, The method includes: Based on the injection error analysis information, a corresponding error injection model is constructed in the verification environment; the injection error analysis information includes the injection error signal type and the error injection node; the error injection model is used to indicate the error injection node, the injection error signal associated with the error injection node, and the execution rule corresponding to the injection error signal type. Based on the error injection model, errors are injected into the verification environment and regression simulation tests are performed. The integrity of the verification environment is determined based on the regression simulation test results.
2. The method for verifying environmental integrity according to claim 1, characterized in that, The determination of the integrity of the verification environment based on the regression simulation test results includes: comparing the regression simulation test results with the expected injection results one by one; the expected injection results are the error signal characteristics expected to be output by at least one set of injection error signal types and injection error combinations of error injection nodes; If the regression simulation test results capture the corresponding error signal characteristics of the expected output, then the verification environment is determined to be complete. If the expected error signal characteristics are not captured in the regression simulation test results, then the verification environment is determined to be incomplete.
3. The method for verifying environmental integrity detection according to claim 1, characterized in that, The step of constructing a corresponding error injection model in the verification environment based on the injected error analysis information includes: Based on the error injection signal type and the error injection node, obtain the error injection signal associated with the error injection node; The execution rules for the error injection signal are determined based on the type of the error injection signal. The execution rules are used to indicate the triggering conditions, signal operation methods, and timing requirements for error injection. The error injection signal, execution rules, and error injection node are integrated to form a corresponding error injection model.
4. The method for verifying environmental integrity testing according to claim 1 or 3, characterized in that, The error injection signals include signal-level error injection signals. Injecting errors into the verification environment based on the error injection model includes: detecting the state of an indicator signal indicating a valid register value on the rising edge of a clock signal associated with the error injection node; the signal-level error injection signal includes: the clock signal associated with the error injection node, a register signal, and an indicator signal indicating a valid register value. If the indication signal is valid, the register signal is inverted according to the execution rules, and the signal after the register signal is inverted is released on the rising edge of the next clock signal to complete the error injection into the verification environment.
5. The method for verifying environmental integrity testing according to claim 1 or 3, characterized in that, The error injection signals include protocol-level error injection signals; Injecting errors into the verification environment based on the error injection model includes: based on the protocol content associated with the error injection node, after a preset clock cycle following the rising edge of the original signal, replacing the target signal with an error injection signal to complete the error injection into the verification environment; the protocol-level error injection signal includes: the protocol content associated with the error injection node, the original signal, the target signal, and the error injection signal.
6. The method for verifying environmental integrity detection according to claim 2, characterized in that, The step of injecting errors into the verification environment and performing regression simulation tests based on the error injection model includes: Based on the error injection model, an error is injected into a preset first verification scenario in the verification environment and a regression simulation test is performed to obtain the first regression simulation test result. If the first regression simulation test result is incorrect, the first regression simulation test result will be compared with the expected result of the error annotation one by one. If the first error signal feature corresponding to the expected output is captured in the first regression simulation test result, then the verification environment is determined to be complete.
7. The method for verifying environmental integrity detection according to claim 6, characterized in that, The step of injecting errors into the verification environment and performing regression simulation tests based on the error injection model further includes: Based on the error injection model, an error is injected into a preset second verification scenario in the verification environment and a regression simulation test is performed to obtain the second regression simulation test results. If the second regression simulation test result is incorrect, the first regression simulation test result and the second regression simulation test result are compared with the expected result of the error annotation one by one. If the first regression simulation test result captures the first error signal feature corresponding to the expected output, and the second regression simulation test result captures the second error signal feature corresponding to the expected output, then the verification environment is determined to be complete.
8. The method for verifying environmental integrity according to claim 1, characterized in that, The injection error analysis information is stored in the error injection model in the form of an array, and each array corresponds to an error injection operation.
9. A system for verifying environmental integrity, characterized in that, The system includes: The first construction module is used to construct a corresponding error injection model in the verification environment based on the injection error analysis information; the injection error analysis information includes the injection error signal type and the error injection node; the error injection model is used to indicate the error injection node, the injection error signal associated with the error injection node, and the execution rule corresponding to the injection error signal type. An error injection module is used to inject errors into the verification environment based on the error injection model and perform regression simulation tests. The verification analysis module is used to determine the integrity of the verification environment based on the regression simulation test results.
10. An electronic device, characterized in that, The electronic device includes a processor and a memory, wherein the memory is used to store executable program code; the processor runs a program corresponding to the executable program code by reading the executable program code stored in the memory, for executing the verification environment integrity detection method according to any one of claims 1 to 8.