Three-phase staggered parallel single-stage energy storage converter and control method and application thereof

Abstract

The invention belongs to the technical field of inverters, and discloses a three-phase staggered parallel single-stage energy storage converter and a control method and application thereof, the converter comprises a DC input filter capacitor, a DC bus capacitor, a three-phase LCL filter, a three-phase bridge arm and a boost inductor corresponding to each phase bridge arm, and each phase bridge arm is formed by connecting an upper switch tube, a middle switch tube and a lower switch tube in series; the upper midpoint of each bridge arm is connected with the input end of the LCL filter so as to be connected with a power grid; and the lower midpoint of each bridge arm is connected with one end of the corresponding boost inductor, so that the interleaving parallel structure is integrated in the inverter. Compared with a three-phase interleaving Buck / Boost + VSI two-stage scheme, the input current ripple frequency can also be improved to three times of the switching frequency; three switching tubes are reduced, so that the structure is simple; boost and inversion can be achieved only through one-stage power conversion, bidirectional circulation of energy is achieved, and therefore the system has the advantages of being low in cost, high in integration degree and high in efficiency.

Description

Technical Field

[0001] This invention belongs to the field of power electronic converter technology, and relates to a three-phase interleaved parallel single-stage energy storage converter and its control method and application. Background Technology

[0002] Renewable energy generation, such as wind and solar power, is significantly affected by natural conditions: excessively low or high wind speeds lead to decreased wind power efficiency; solar power output drops sharply at night or during cloudy or rainy weather due to insufficient sunlight. This volatility and intermittency pose a serious challenge to the safe and stable operation of the power system. To address this, energy storage technology has emerged, capable of storing energy during periods of surplus power and releasing it during peak demand periods, thus achieving multiple functions such as peak shaving and valley filling, load smoothing, and improving grid reliability. Battery energy storage, as a key energy storage technology, enables the time-series transfer of electrical energy through bidirectional conversion between electrical and chemical energy, effectively mitigating power fluctuations in renewable energy sources and promoting the consumption of clean energy. It is currently widely used in electric vehicles, grid ancillary services, distributed microgrids, and backup power supplies.

[0003] The energy storage converter is a key interface device connecting the battery and the power grid, and its performance directly determines the efficiency, response speed, and operational reliability of the entire energy storage system. Currently, the industry commonly adopts a two-stage topology: the front stage uses a three-phase interleaved parallel Buck / Boost bidirectional DC / DC converter, and the rear stage uses a DC / AC inverter. This structure effectively solves the matching problem between the low DC voltage of the battery pack and the high AC voltage of the power grid through the boost stage in the front stage. Furthermore, the interleaved parallel structure increases the input current switching frequency by up to three times, helping to reduce input current ripple and thus reducing the size requirements of filtering components. The two-stage architecture achieves decoupling of the front and rear stage control, improving the system control flexibility and enabling it to adapt to a wide range of input voltage variations.

[0004] However, traditional two-stage topologies also have their inherent limitations: First, energy needs to undergo two power conversions, DC / DC and DC / AC, which increases the overall system loss and hinders efficiency improvement; second, the two-stage power circuits and corresponding control architecture increase the system's hardware cost, size, and control complexity; therefore, a method is needed that has fewer components, higher integration, lower cost, and can perform boost and inversion more efficiently. Summary of the Invention

[0005] In view of this, the purpose of this invention is to provide a three-phase interleaved parallel single-stage energy storage converter and its control method and application. By reducing the number of switching transistors to reduce costs and simplify the structure, it can simultaneously achieve boost and inversion functions and bidirectional energy flow through only one stage of power conversion, thereby significantly improving the system integration and conversion efficiency.

[0006] To achieve the above objectives, the technical solution proposed by this invention is as follows:

[0007] The first aspect of the present invention provides a three-phase interleaved parallel single-stage energy storage converter, the converter including a DC input filter capacitor, a DC bus capacitor, a three-phase LCL filter, three-phase bridge arms and boost inductors corresponding to each phase bridge arm;

[0008] Each phase arm is composed of three switches connected in series: upper, middle, and lower. The connection point between the upper and middle switches is the upper midpoint of the phase arm; the connection point between the middle and lower switches is the lower midpoint of the phase arm.

[0009] The uppermost end of each phase bridge arm is connected to the positive terminal of the DC bus capacitor, and the lowermost end of each phase bridge arm is connected to the negative terminal of the DC bus capacitor and the DC input filter capacitor, serving as the negative terminal of the battery port.

[0010] The upper midpoint of each phase bridge arm is connected to the input terminal of the three-phase LCL filter, and the output terminal of the three-phase LCL filter is used to connect to the three-phase power grid.

[0011] The lower midpoint of each phase bridge arm is connected to one end of its corresponding boost inductor, and the other end of each boost inductor is connected to the positive terminal of the DC input filter capacitor, serving as the positive terminal of the battery port.

[0012] A second aspect of the present invention provides a control method for the above-mentioned three-phase interleaved parallel single-stage energy storage converter, the control method comprising the following steps:

[0013] S1. The grid-connected current is decoupled and controlled in the dq rotating coordinate system through phase-locked loop and coordinate transformation. After PI regulation and inverse coordinate transformation, three-phase independent grid-connected modulation signals are generated.

[0014] S2. The error between the instantaneous value of the DC bus voltage and the preset voltage reference value is converted into an inductor current reference value through proportional-integral adjustment. The error between the instantaneous current value of each boost inductor and the inductor current reference value is proportional-integral adjusted to generate three-phase independent boost modulation signals.

[0015] S3. The grid-connected modulation signal and the boost modulation signal are compared with the triangular carrier wave respectively, and the drive pulse signals of all switching transistors are generated through logic combination to realize the integrated control of inverter and boost.

[0016] In some embodiments of the present invention, step S1 of the control method specifically includes:

[0017] S11. Process the three-phase grid voltage through a phase-locked loop, obtain the phase angle of its composite vector as a reference angle, and use coordinate transformation to transform the three-phase grid-connected current from the stationary coordinate system to the dq coordinate system that rotates synchronously with the composite vector of the grid voltage, thereby obtaining the d-axis component and q-axis component of the grid-connected current.

[0018] S12. The error between the d-axis component of the grid-connected current and the preset current reference value is proportionally and integrally adjusted to generate a modulation signal for the d-axis; the error between the q-axis component of the grid-connected current and zero is proportionally and integrally adjusted to generate a modulation signal for the q-axis.

[0019] S13. Invert the modulation signals of the d-axis and q-axis respectively, and then convert them into three-phase preliminary sinusoidal modulation signals by inverse coordinate transformation with the phase angle as the reference angle. Compare the instantaneous values ​​of these three-phase preliminary sinusoidal modulation signals in real time to obtain the minimum value. Subtract the minimum value from each phase preliminary sinusoidal modulation signal to generate three-phase independent grid-connected modulation signals.

[0020] In some embodiments of the present invention, step S3 of the control method specifically includes:

[0021] S31. Preset triangular carriers corresponding to each phase;

[0022] S32. Compare the grid-connected modulation signal of each phase with the corresponding triangular carrier. When the instantaneous value of the grid-connected modulation signal of a certain phase is lower than the instantaneous value of its corresponding triangular carrier, the driving signal of the upper switch of the bridge arm of that phase is high level, and vice versa. This generates the driving signal of the first set of switches. The ratio of the amplitude of the grid-connected modulation signal to the amplitude of the triangular carrier is the modulation ratio.

[0023] S33. Compare each phase boost modulation signal with its corresponding triangular carrier. When the instantaneous value of a phase boost modulation signal is higher than the instantaneous value of its corresponding triangular carrier, the drive signal of the switch transistor in that phase is high, otherwise it is low. This generates a second set of switch transistor drive signals. The ratio of the boost modulation signal amplitude to the triangular carrier amplitude is the duty cycle.

[0024] S34. Perform a logical XOR operation on the switching transistor drive signals of the same phase branch in the first group and the second group. The result of the operation is the drive signal of the switching transistor in that phase bridge arm, thereby generating drive pulses for all remaining switching transistors.

[0025] In some embodiments of the present invention, in step S31 of the control method, the triangular carriers corresponding to each phase have equal amplitudes, equal frequencies, and phase differences of 120°.

[0026] In some embodiments of the present invention, the voltage gain G of the three-phase interleaved parallel single-stage energy storage converter is G=M / (1-D), where M is the modulation ratio, D is the duty cycle, and M <D<1。

[0027] A third aspect of the present invention provides an application of the above-described three-phase interleaved parallel single-stage energy storage converter in an energy storage system.

[0028] In some embodiments of the present invention, the energy storage system includes the three-phase interleaved parallel single-stage energy storage converter, the battery module and the three-phase power grid, wherein the battery module is connected to the battery port and the three-phase power grid is connected to the output terminal of the three-phase LCL filter.

[0029] A fourth aspect of the present invention provides an interface device for an energy storage system, comprising:

[0030] Three-phase interleaved parallel single-stage energy storage converter, wherein the three-phase interleaved parallel single-stage energy storage converter is the three-phase interleaved parallel single-stage energy storage converter described above.

[0031] A battery module, wherein the battery module is connected to the battery port;

[0032] A three-phase power grid is connected to the output terminal of the three-phase LCL filter.

[0033] Compared with existing technologies, the three-phase interleaved parallel single-stage energy storage converter and its control method and application proposed in this invention have the following technical advantages:

[0034] (1) Compared with the traditional three-phase interleaved parallel Buck / Boost+VSI two-stage scheme, the proposed three-phase interleaved parallel single-stage energy storage converter not only achieves the same input current ripple frequency increase to three times the switching frequency, reduces the input current ripple rate, reduces the size of the required filter devices, but also reduces the use of three switching transistors, resulting in lower system cost.

[0035] (2) The proposed three-phase interleaved parallel single-stage energy storage converter realizes boost and inverter control through only one stage of power conversion, realizes bidirectional energy flow, and makes the system have higher integration and system efficiency. In addition, it has the advantages of continuous input current and simple structure. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 A circuit structure diagram of a three-phase interleaved parallel single-stage energy storage converter is provided as an embodiment of the present invention;

[0038] Figure 2 Circuit diagram of a three-phase interleaved parallel single-stage energy storage converter and its three-phase LCL filter provided by the present invention;

[0039] Figure 3 for Figure 2 The diagram shows a control block diagram of a three-phase interleaved parallel single-stage energy storage converter control method.

[0040] Figure 4 for Figure 2 The key waveform diagram of a control method for a three-phase interleaved parallel single-stage energy storage converter is shown.

[0041] Figure 5 for Figure 3 The working mode diagram of phase A bridge arm under the control method shown;

[0042] Figures 6-7 for Figure 2 The simulation waveform diagram of the three-phase interleaved parallel single-stage energy storage converter is shown in the battery discharge mode.

[0043] Figure 8 for Figure 2 The diagram shows the simulation waveform of a three-phase interleaved parallel single-stage energy storage converter operating in battery charging mode. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this invention.

[0045] An embodiment of the first aspect of the present invention provides a three-phase interleaved parallel single-stage energy storage converter. The converter includes a DC input filter capacitor, a DC bus capacitor, a three-phase LCL filter, three-phase bridge arms, and boost inductors corresponding to each phase bridge arm. Each phase bridge arm is composed of three switches connected in series: upper, middle, and lower. The connection point between the upper and middle switches is the upper midpoint of the phase bridge arm; the connection point between the middle and lower switches is the lower midpoint of the phase bridge arm. The uppermost end of each phase bridge arm is connected to the positive terminal of the DC bus capacitor, and the lowermost end of each phase bridge arm is connected to the negative terminal of both the DC bus capacitor and the DC input filter capacitor, serving as the negative terminal of the battery port. The upper midpoint of each phase bridge arm is connected to the input terminal of the three-phase LCL filter, and the output terminal of the three-phase LCL filter is used to connect to the three-phase power grid. The lower midpoint of each phase bridge arm is connected to one end of its corresponding boost inductor, and the other end of each boost inductor is connected to the positive terminal of the DC input filter capacitor, serving as the positive terminal of the battery port.

[0046] In a specific embodiment of the present invention, please refer to Figure 1 The circuit diagram of this three-phase interleaved parallel single-stage energy storage converter is shown. Figure 1 As shown, the converter includes a DC input filter capacitor C. in DC bus capacitor C dc Three-phase LCL filter, three-phase bridge arms and boost inductors corresponding to each phase bridge arm. The three phase bridge arms are phase A, phase B, and phase C. Phase A is composed of upper switch S1, middle switch S2, and lower switch S3 connected in series. The connection point a between upper switch S1 and middle switch S2 is the upper midpoint of phase A, and the connection point x between lower switch S3 and middle switch S2 is the lower midpoint of phase A. Phase B is composed of upper switch S4, middle switch S5, and lower switch S6 connected in series. The connection point b between upper switch S4 and middle switch S5 is the upper midpoint of phase B, and the connection point y between lower switch S6 and middle switch S5 is the lower midpoint of phase B. Phase C is composed of upper switch S7, middle switch S8, and lower switch S9 connected in series. The connection point c between upper switch S7 and middle switch S8 is the upper midpoint of phase C, and the connection point z between lower switch S9 and middle switch S8 is the lower midpoint of phase C. The boost inductors corresponding to each phase arm are as follows: L1 for phase A, L2 for phase B, and L3 for phase C. The collectors of the upper switching transistors S1, S4, and S7 are connected to the DC bus capacitor C. dc The positive terminals of the transistors are connected together, and the sources of the lower switching transistors S3, S6, and S9 are connected to the DC bus capacitor C. dc and DC filter capacitor C inThe negative terminals of the A, B, and C phases are connected to each other as the negative terminal of the battery. The upper midpoints a, b, and c of the A, B, and C phase bridge arms are connected to the input terminals of the three-phase LCL filter, and the output terminals of the three-phase LCL filter are used to connect to the three-phase power grid. The lower midpoints x, y, and z of the A, B, and C phase bridge arms are connected to one end of their respective boost inductors L1, L2, and L3. The other ends of the boost inductors L1, L2, and L3 are all connected to the DC input filter capacitor C. in It is connected to the positive terminal, serving as the positive terminal of the battery.

[0047] In a specific embodiment of the present invention, please refer to Figure 2 The diagram shows the circuit of the three-phase interleaved parallel single-stage energy storage converter and its three-phase LCL filter. The three-phase LCL filter includes an AC filter inductor L. f1 L f2 L f3 It also includes AC filter capacitor C f1 C f2 C f3 AC filter inductor L f1 L f2 L f3 One end is connected to the upper midpoints a, b, and c of phase A, B, and C bridge arms, respectively, and the other end is connected to the power grid filter inductor L. g1 L g2 L g3 and AC filter capacitor C f1 C f2 C f3 One end is connected to the AC filter capacitor C. f1 C f2 C f3 The other end is directly connected; the power grid filter inductor L g1 L g2 L g3 The other end serves as the output of a three-phase LCL filter, used for connection to a three-phase power grid. Specifically, the power grid filter inductor L... g1 The other end serves as the A-phase load terminal, and the power grid filter inductor L g2 The other end serves as the B-phase load terminal, and the power grid filter inductor L g3 The other end serves as the C-phase load terminal.

[0048] In an embodiment of the first aspect of the present invention, as follows is provided Figure 2 The control method for the three-phase interleaved parallel single-stage energy storage converter shown includes the following steps:

[0049] S1. The grid-connected current is decoupled and controlled in the dq rotating coordinate system through phase-locked loop and coordinate transformation. After PI regulation and inverse coordinate transformation, three-phase independent grid-connected modulation signals are generated.

[0050] S2. The error between the instantaneous value of the DC bus voltage and the preset voltage reference value is converted into an inductor current reference value through proportional-integral adjustment. The error between the instantaneous current value of each boost inductor and the inductor current reference value is proportional-integral adjusted to generate three-phase independent boost modulation signals.

[0051] S3. The grid-connected modulation signal and the boost modulation signal are compared with the triangular carrier wave respectively, and the drive pulse signals of all switching transistors are generated through logic combination to realize the integrated control of inverter and boost.

[0052] In one specific embodiment of the present invention, reference is made to... Figure 2 and Figure 3 The control method step S1 specifically includes:

[0053] S11. Processing three-phase grid voltage u via a phase-locked loop (PLL) ga u gb u gc The phase angle θ is obtained, and using the phase angle θ as the reference angle, the three-phase grid-connected current i is transformed using coordinate transformation. Lf1 i Lf2 i Lf3 Transforming from the stationary abc coordinate system to the dq coordinate system, which rotates synchronously with the composite vector of the grid voltage, yields the d-axis component i of the grid-connected current. d With q-axis component i q ;

[0054] S12. Convert the d-axis component of the grid-connected current i d Compared with the preset current reference value i d.ref error i d.e The current is fed into the grid-connected current d-axis component controller PI1 for proportional-integral regulation, generating the d-axis modulation signal u. rd1 ; the q-axis component of the grid-connected current i q Error i from zero q.e The current is fed into the grid-connected current q-axis component controller PI2 for proportional-integral regulation, generating the q-axis modulation signal u. rq1 ;

[0055] S13. Modulate the d-axis signal u rd1 The modulation signal u along the q-axis rq1 Invert each phase angle and then, using the phase angle θ as the reference angle, convert it into a three-phase preliminary sinusoidal modulation signal u through inverse coordinate transformation. ra1 u rb1 u rc1 Real-time comparison of these three initial sinusoidal modulation signals u ra1 u rb1 u rc1 The instantaneous values ​​are used to obtain the minimum value u.min Then, these three-phase preliminary sinusoidal modulation signals u ra1 u rb1 u rc1 Subtracting this minimum value generates the grid-connected modulation signals u for phases A, B, and C. ra u rb u rc .

[0056] In some embodiments of the present invention, reference is made to... Figure 2 and Figure 3 Step S2 of the control method specifically involves: converting the instantaneous value u of the DC bus voltage. dc.f Compared with the preset voltage reference value u dc.ref error u dc.e The input to the controller PI3 is converted into an inductor current reference value i through proportional-integral regulation. L.ref The instantaneous current values ​​i of the boost inductors L1, L2, and L3 L1. f i L2. f i L3. f With the inductor current reference value i L.ref error i L1. e i L2. e i L3. e The signals are fed into controllers PI4, PI5, and PI6 respectively, and through proportional-integral adjustment, a boost modulation signal u is generated. rdc1 u rdc2 u rdc3 .

[0057] In some embodiments of the present invention, reference is made to... Figure 2 and Figure 3 The control method step S3 specifically includes:

[0058] S31. Preset triangular carriers corresponding to each phase. These triangular carriers are symmetrical triangular carriers, that is, preset triangular carrier u corresponding to phase A. c1 The triangular carrier u corresponding to phase B c2 The triangular carrier u corresponding to phase C c3 A-phase, B-phase, and C-phase triangular carrier waves c1 u c2 u c3 The amplitudes are all U cm They have the same frequency and a phase difference of 120°.

[0059] S32. Connect the A-phase, B-phase, and C-phase grid-connected modulation signal u ra u rb u rc respectively with triangular carrier waves of phases A, B, and C. c1 u c2 u c3By comparison, when the instantaneous value of the grid-connected modulation signal of a certain phase is lower than the instantaneous value of its corresponding triangular carrier wave, the drive signal of the upper switch transistor of that phase bridge arm is high, and vice versa, thus generating the drive signals for the first set of switches S1, S4, and S7. Specifically, when the grid-connected modulation signal u of phase A... ra The instantaneous value is less than that of the triangular carrier u. c1 The instantaneous value of the drive signal u of the switch S1 on phase A bridge arm. gs,S1 Set to high level, otherwise set to low level; when the B-phase grid-connected modulation signal u rb The instantaneous value is less than that of the triangular carrier u. c2 The instantaneous value of the drive signal u of the switch S4 on the B-phase bridge arm. gs,S4 Set to high level, otherwise set to low level; when the C-phase grid-connected modulation signal u rc The instantaneous value is less than that of the triangular carrier u. c3 The instantaneous value of the drive signal u of the switch S7 on the C-phase bridge arm. gs,S7 Set to high level, otherwise set to low level. Grid-connected modulation signal u ra u rb u rc The amplitude is U rm Grid-connected modulated signal amplitude U rm With triangular carrier amplitude U cm The ratio is the modulation ratio M, that is, the modulation ratio M = U. rm / U cm This control method adjusts the grid-connected modulation signal u. ra u rb u rc amplitude U rm The modulation ratio M can be changed to achieve AC output regulation and waveform control of the three-phase interleaved parallel single-stage energy storage converter.

[0060] S33. Boost the modulation signals of phases A, B, and C. rdc1 u rdc2 u rdc3 respectively with triangular carrier waves of phases A, B, and C. c1 u c2 u c3 By comparison, when the instantaneous value of a certain phase's boost modulation signal is higher than the instantaneous value of its corresponding triangular carrier wave, the drive signal of the switch transistor in that phase is high; otherwise, it is low. This generates the drive signals for the second set of switches S3, S6, and S9. Specifically, when the A-phase boost modulation signal u... rdc1 The instantaneous value is greater than that of the triangular carrier u. c1 The instantaneous value of the drive signal u of the lower switch S3 in phase A bridge arm. gs,S3 Set to high level, otherwise set to low level; when the B-phase boost modulation signal u rdc2The instantaneous value is greater than that of the triangular carrier u. c2 The instantaneous value of the drive signal u of the lower switch S6 in phase B bridge arm. gs,S6 Set to high level, otherwise set to low level; when the C-phase boost modulation signal u rdc3 The instantaneous value is greater than that of the triangular carrier u. c3 The instantaneous value of the drive signal u of the lower switch S9 in phase C bridge arm. gs,S9 Set to high level, otherwise set to low level. A-phase, B-phase, and C-phase boost modulation signals u rdc1 u rdc2 u rdc3 The amplitude is U rdc The duty cycle D=U of the lower switching transistors S3, S6, and S9 rdc / U cm This control method adjusts the boost modulation signal u. rdc1 u rdc2 u rdc3 amplitude U rdc It can simultaneously change the duty cycle D of the lower switch S3, lower switch S6 and lower switch S9 to realize the boost control of the three-phase interleaved parallel single-stage energy storage converter.

[0061] S34. Perform a logical XOR operation on the drive signals of the first group of switches and the switches in the same phase branch of the second group of switches. The result is the drive signal of the switch in that phase bridge arm, thereby generating the drive pulses for all remaining switches. Specifically, the drive signal u of the upper switch S1... gs,S1 The drive signal u of the lower switch S3 gs,S3 Perform a logical XOR operation to obtain the drive signal u of the middle switch S2. gs,S2 The drive signal u of the upper switch S4 gs,S4 The drive signal u of the lower switch S6 gs,S6 Perform a logical XOR operation to obtain the drive signal u of the middle switch S5. gs,S5 The drive signal u of the upper switch S7 gs,S7 The drive signal u of the lower switch S9 gs,S9 Perform a logical XOR operation to obtain the drive signal u for switch S8. gs,S8 .

[0062] Figure 3 The key waveform diagram of the control method for the interleaved parallel single-stage energy storage converter is shown below. Figure 4 As shown, each bridge arm has three modes. To simplify the analysis, only the A-phase bridge arm will be discussed, and its modes are as follows: Figure 5 As shown:

[0063] (1) Mode 011: Turn on the middle switch S2 and the lower switch S3, and turn off the upper switch S1. At this time, the boost inductor L1 bears the forward voltage drop U. in Inductor charging, inductor current i L1 Linear increase;

[0064] (2) Mode 101: Turn on the upper switch S1 and the lower switch S3, and turn off the middle switch S2. At this time, the boost inductor L1 bears the forward voltage drop U. in Inductor charging, inductor current i L1 Linear increase;

[0065] (3) Mode 110: Turn on the upper switch S1 and the middle switch S2, and turn off the lower switch S3. At this time, the boost inductor L1 bears the reverse voltage drop U. dc -U in Inductor discharge, inductor current i L1 Linear decrease.

[0066] The working principle of the B-phase and C-phase bridge arms is exactly the same. Although the modulation signals and corresponding switching actions of each phase lag by 120° in time, each phase strictly follows the three switching modes "011", "101", and "110" and their corresponding inductor charging and discharging rules. The duration of mode 110 is (1-D)T. s T s Let D be the switching cycle, and D be the duty cycle of the drive signal of the switching transistor in each phase arm. It can be seen that as long as the duty cycle D is kept constant, the charging and discharging time of the boost inductor in each switching cycle is constant, thus effectively avoiding low-frequency ripple.

[0067] From the volt-second balance of the boost inductor L1, we can obtain:

[0068] (1)

[0069] After simplification:

[0070] (2)

[0071] In the formula U dc U is the DC bus voltage. in denoted as input voltage, and D as the duty cycle of the drive signal for the switching transistors in each phase bridge arm.

[0072] See Figure 4 , where the modulation signal u ra u rb u rc It can be represented as:

[0073] (3)

[0074] In the formula, the symbol min represents the real-time comparison sinusoidal signal u. ra1 u rb1 u rc1 The instantaneous value is used to obtain the minimum instantaneous value of the signal u. ra1 u rb1 u rc1 It can be represented as:

[0075] (4)

[0076] In the formula, ω is the angular frequency of the sinusoidal modulating wave. M is the modulation ratio, U rm U is the amplitude of the grid-connected modulated signal. cm This represents the amplitude of the triangular carrier wave.

[0077] Combining equations (3) and (4), the duty cycle d of the drive signals for the upper switching transistors S1, S4, and S7 can be obtained. S1 d S4 d S7 They are as follows:

[0078] (5)

[0079] In the formula, ω is the angular frequency of the sinusoidal modulated wave, and M is the modulation ratio.

[0080] Three-phase voltage u an u bn u cn The average switching cycles are as follows:

[0081] (6)

[0082] (7)

[0083] (8)

[0084] In equations (6)-(8), the symbols This represents the average value of the voltage switching cycle, ω is the angular frequency of the sinusoidal modulation wave, M is the modulation ratio, and U... dc This is the DC bus voltage.

[0085] As can be seen from equations (6) to (8), the output phase voltages of the proposed three-phase interleaved parallel single-stage energy storage converter are all sinusoidal waves throughout the entire power frequency cycle, with equal amplitudes, equal frequencies, and a phase difference of 120°.

[0086] Therefore, the DC bus voltage utilization rate is:

[0087] (9)

[0088] In the formula, U abm U is the amplitude of the line voltage. oam U is the amplitude of the phase voltage. dc is the DC bus voltage, and M is the modulation ratio.

[0089] Combining equations (2) and (9), the voltage gain of the three-phase interleaved parallel single-stage energy storage converter under the proposed control method can be obtained:

[0090] (10)

[0091] In the formula, M is the modulation ratio, D is the duty cycle, and U in This is the input voltage.

[0092] As can be seen from equation (10), when M>1-D, the proposed three-phase interleaved parallel single-stage energy storage converter can achieve boost inverter.

[0093] To verify the correctness of the above theoretical analysis, the three-phase interleaved parallel single-stage energy storage converter and its control method proposed in this invention were simulated and verified using Matlab simulation software. The simulation parameters are as follows: the three-phase power grid is equivalent to an AC voltage source with a voltage and frequency of 220V / 50Hz, and the battery voltage U... in =200V, DC bus voltage U dc The control target value is 800V, the grid-connected current d-axis component reference value is ±42.9A (positive for discharging, negative for charging), and the switching frequency f s =20kHz. In addition, the boost inductor L1=L2=L3=600μH, and the AC filter inductor L... f1 =L f2 =L f3 =1.6mH, mains filter inductance L g1 =L g2 =L g3 =0.4mH, AC filter capacitor C f1 =C f2 =C f3 =15μF, DC bus capacitance C dc =250μF, DC input filter capacitor C in =30μF.

[0094] Figures 6-7 The three-phase grid voltage u of the three-phase interleaved parallel single-stage energy storage converter in discharge mode is shown. ga u gb u gc Three-phase grid current i a i b i c DC bus voltage U dc Input voltage Uin Three-phase boost inductor current i L1 i L2 i L3 and input current I in The simulated waveform. From Figure 6 It can be seen that the three-phase grid voltage u ga u gb u gc The effective values ​​are all 220V, the phase difference is 120°, the frequency is 50Hz, and the three-phase grid current i a i b i c The DC bus voltage is in phase and frequency with the three-phase power grid voltage, and the effective value is 30.3A (amplitude 42.9A). dc Stabilizing at the target control value of 800V, the simulated voltage gain is G=U abm / U in The value is approximately 2.70, which is basically consistent with the theoretical value G=M / (1-D)=2.69 and greater than 1, indicating that the proposed converter has boost inverter function; from Figure 7 It can be seen that the three-phase boost inductor current i L1 i L2 i L3 The average value is approximately 33A, with a ripple frequency of 20kHz and a ripple rate of 48%. The input current i in The average value is approximately 100A, the ripple frequency is 60kHz, and the ripple rate is 5.3%, indicating that the single-stage energy storage converter operates in battery discharge mode. Due to the three-phase interleaved parallel structure, the inductor current stress and input current ripple rate are significantly reduced, and the input current ripple frequency becomes three times the switching frequency.

[0095] Figure 8 The three-phase grid voltage u of the three-phase interleaved parallel single-stage energy storage converter in charging mode is given. ga u gb u gc Three-phase grid current i a i b i c DC bus voltage U dc Input voltage U in and input current I in The simulated waveform shows the three-phase grid current i. a i b i c It is in phase and out of phase with the three-phase grid voltage, and the effective value is 30.3A (amplitude 42.9A); in addition, the average input current I inThe current is approximately -100A, indicating that the three-phase interleaved parallel single-stage energy storage converter is operating in charging mode. The above experimental results demonstrate that the proposed three-phase interleaved parallel single-stage energy storage converter possesses bidirectional energy transfer capability.

[0096] In summary, the three-phase interleaved parallel single-stage energy storage converter and its control method proposed in this invention can simultaneously achieve voltage boosting and inversion, and the ripple frequency of the input current is increased to three times the switching frequency, enabling bidirectional energy flow.

[0097] Compared with existing technologies, the three-phase interleaved parallel single-stage energy storage converter and its control method proposed in this invention have the following technical advantages:

[0098] (1) Compared with the traditional three-phase interleaved parallel Buck / Boost+VSI two-stage scheme, the proposed three-phase interleaved parallel single-stage energy storage converter not only achieves the same input current ripple frequency increase to three times the switching frequency, reduces the input current ripple rate, reduces the size of the required filter devices, but also reduces the use of three switching transistors, resulting in lower system cost.

[0099] (2) The proposed three-phase interleaved parallel single-stage energy storage converter realizes boost and inverter control through only one stage of power conversion, realizes bidirectional energy flow, and makes the system have higher integration and system efficiency. In addition, it has the advantages of continuous input current and simple structure.

[0100] It should be noted that, in this document, relational terms such as "and" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0101] The above description of the embodiments is only for the purpose of helping to understand the method and core ideas of the present invention, and is not intended to limit it. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

Claims

1. A three-phase interleaved parallel single-stage energy storage converter, characterized in that, The converter includes a DC input filter capacitor, a DC bus capacitor, a three-phase LCL filter, three-phase bridge arms, and boost inductors corresponding to each phase bridge arm. Each phase arm is composed of three switches connected in series: upper, middle, and lower. The connection point between the upper and middle switches is the upper midpoint of the phase arm; the connection point between the middle and lower switches is the lower midpoint of the phase arm. The uppermost end of each phase bridge arm is connected to the positive terminal of the DC bus capacitor, and the lowermost end of each phase bridge arm is connected to the negative terminal of the DC bus capacitor and the DC input filter capacitor, serving as the negative terminal of the battery port. The upper midpoint of each phase bridge arm is connected to the input terminal of the three-phase LCL filter, and the output terminal of the three-phase LCL filter is used to connect to the three-phase power grid. The lower midpoint of each phase bridge arm is connected to one end of its corresponding boost inductor, and the other end of each boost inductor is connected to the positive terminal of the DC input filter capacitor, serving as the positive terminal of the battery port.

2. A control method for a three-phase interleaved parallel single-stage energy storage converter as described in claim 1, characterized in that, The control method includes the following steps: S1. The grid-connected current is decoupled and controlled in the dq rotating coordinate system through phase-locked loop and coordinate transformation. After PI regulation and inverse coordinate transformation, three-phase independent grid-connected modulation signals are generated. S2. The error between the instantaneous value of the DC bus voltage and the preset voltage reference value is converted into an inductor current reference value through proportional-integral adjustment. The error between the instantaneous current value of each boost inductor and the inductor current reference value is proportional-integral adjusted to generate three-phase independent boost modulation signals. S3. The grid-connected modulation signal and the boost modulation signal are compared with the triangular carrier wave respectively, and the drive pulse signals of all switching transistors are generated through logic combination to realize the integrated control of inverter and boost.

3. The control method according to claim 2, characterized in that, Step S1 is as follows: S11. Process the three-phase grid voltage through a phase-locked loop, obtain the phase angle of its composite vector as a reference angle, and use coordinate transformation to transform the three-phase grid-connected current from the stationary coordinate system to the dq coordinate system that rotates synchronously with the composite vector of the grid voltage, thereby obtaining the d-axis component and q-axis component of the grid-connected current. S12. The error between the d-axis component of the grid-connected current and the preset current reference value is proportionally and integrally adjusted to generate a modulation signal for the d-axis. The error between the q-axis component of the grid-connected current and zero is proportionally and integrally adjusted to generate a modulation signal for the q-axis. S13. Invert the modulation signals of the d-axis and q-axis respectively, and then convert them into three-phase preliminary sinusoidal modulation signals by inverse coordinate transformation with the phase angle as the reference angle. Compare the instantaneous values ​​of these three-phase preliminary sinusoidal modulation signals in real time to obtain the minimum value. Subtract the minimum value from each phase preliminary sinusoidal modulation signal to generate three-phase independent grid-connected modulation signals.

4. The control method according to claim 2, characterized in that, Step S3 is as follows: S31. Preset triangular carriers corresponding to each phase; S32. Compare the grid-connected modulation signal of each phase with the corresponding triangular carrier. When the instantaneous value of the grid-connected modulation signal of a certain phase is lower than the instantaneous value of its corresponding triangular carrier, the driving signal of the upper switch of the bridge arm of that phase is high level, and vice versa. This generates the driving signal of the first set of switches. The ratio of the amplitude of the grid-connected modulation signal to the amplitude of the triangular carrier is the modulation ratio. S33. Compare each phase boost modulation signal with its corresponding triangular carrier. When the instantaneous value of a phase boost modulation signal is higher than the instantaneous value of its corresponding triangular carrier, the drive signal of the switch transistor in that phase is high, otherwise it is low. This generates a second set of switch transistor drive signals. The ratio of the boost modulation signal amplitude to the triangular carrier amplitude is the duty cycle. S34. Perform a logical XOR operation on the switching transistor drive signals of the same phase branch in the first group and the second group. The result of the operation is the drive signal of the switching transistor in that phase bridge arm, thereby generating drive pulses for all remaining switching transistors.

5. The control method according to claim 4, characterized in that, In step S31, the triangular carriers corresponding to each phase have equal amplitudes, equal frequencies, and phase differences of 120°.

6. The control method according to claim 4, characterized in that, The voltage gain G of the three-phase interleaved parallel single-stage energy storage converter is given by the formula G = M / (1-D), where M is the modulation ratio, D is the duty cycle, and M... <D<1。 7. An application of the three-phase interleaved parallel single-stage energy storage converter as described in claim 1 in an energy storage system.

8. The application according to claim 7, characterized in that, The energy storage system includes the three-phase interleaved parallel single-stage energy storage converter, the battery module, and the three-phase power grid. The battery module is connected to the battery port, and the three-phase power grid is connected to the output terminal of the three-phase LCL filter.

9. An interface device for an energy storage system, characterized in that, include: A three-phase interleaved parallel single-stage energy storage converter, wherein the three-phase interleaved parallel single-stage energy storage converter is the three-phase interleaved parallel single-stage energy storage converter as described in claim 1. A battery module, wherein the battery module is connected to the battery port; A three-phase power grid is connected to the output terminal of the three-phase LCL filter.

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