Fault detection system and method

Abstract

The present disclosure relates to a system, such as a radar system, and related methods, wherein the system includes a transmitter module having a power combiner, an interconnect structure coupled to the power combiner, and detection circuitry coupled to the power combiner. The detection circuitry may be configured to inject at least one test current onto at least one electrical path including at least one of the power combiner and the interconnect structure, compare a first voltage at the at least one electrical path with a reference voltage, and detect a first voltage at the at least one electrical path. And providing a fault indication to safety monitoring circuitry in response to the first voltage exceeding the reference voltage.

Description

Technical Field

[0001] The embodiments of the subject matter described herein generally relate to systems that perform wireless signal transmission, such as automotive radar systems, including circuitry and processes for detecting faults in physical connection points (e.g., solder balls or struts) in such systems. Background Technology

[0002] Automotive radar solutions for Advanced Driver Assistance Systems (ADAS) are currently being deployed on a large scale and are typically implemented as long-range radar (LRR) or short-range radar (SRR) applications. Both applications generally use frequency-modulated continuous wave (FMCW) modulation techniques to identify objects, such as vehicles or pedestrians, near the radar system. These radar systems typically utilize millimeter-wave (mmWave) frequencies to transmit and receive radar signals.

[0003] Automotive radar systems typically employ safety mechanisms to comply with established functional safety requirements. For example, such safety mechanisms can transition the radar system to a fail-safe state in response to the detection of a fault within the system. Potential sources of such faults include cracks or breaks in conductive solder balls or struts that provide electrical connections between different parts of the radar system, where such cracks or breaks could compromise the integrity or reliability of the radar system. Summary of the Invention

[0004] Various exemplary embodiments are presented below. Some simplifications and omissions may be made in the following examples, which are intended to highlight and illustrate some aspects of the various exemplary embodiments, without limiting the scope.

[0005] In an example embodiment, the radar system includes a transmitting antenna and a transmitter module coupled to the transmitting antenna. The transmitter module includes: a power combiner; a plurality of interconnect structures coupled between the power combiner and the transmitting antenna; and a detection circuit system coupled to the power combiner and configured to inject at least one test current into at least one electrical path including the power combiner and at least one of the plurality of interconnect structures, compare a first voltage at the at least one electrical path with a reference voltage, and provide a fault indication to the radar system's safety monitoring circuit system in response to the first voltage exceeding the reference voltage.

[0006] In one or more embodiments, the safety monitoring circuitry disables the radar system in response to a fault indication.

[0007] In one or more embodiments, the plurality of interconnect structures include: a first interconnect structure as part of a first electrical path coupling a power combiner to a first node; a second interconnect structure as part of a second electrical path coupling a power combiner to a first node; and a third interconnect structure coupled between the first node and both the transmit antenna and the DC ground.

[0008] In one or more embodiments, in order to inject at least one test current, the detection circuitry is further configured to inject a first test current through a first portion of the sensing loop of the power combiner and a second test current through a second portion of the sensing loop of the power combiner. The first portion of the sensing loop is separate from the second portion of the sensing loop, the first portion of the sensing loop being coupled to the transmitting antenna via a first interconnect structure, and the second portion of the sensing loop being coupled to the transmitting antenna via a second interconnect structure.

[0009] In one or more embodiments, in order to inject at least one test current, the detection circuitry is further configured to inject the test current into a second node of the first sensing loop of the power combiner, and the test current is divided at the second node and recombined at the first node.

[0010] In one or more embodiments, the transmitter module further includes a peak detector coupled to the first and second electrical paths, and the peak detector is configured to measure peak voltage values ​​at the first and second electrical paths when the radar system transmits one or more radio frequency (RF) signals, and to indicate a fault to the radar system's safety monitoring circuitry based on the measured peak voltage values.

[0011] In one or more embodiments, the first interconnect structure and the second interconnect structure are for connecting an integrated circuit die to a conductive pillar of a package, and the third interconnect structure is for connecting a circuit board to solder balls of a package.

[0012] In an example embodiment, the method includes performing a fault detection process for a radar system by: injecting at least one test current into at least one electrical path including a power combiner and at least one interconnect structure by a detection circuit system of the radar system; comparing a first voltage at the at least one electrical path with a reference voltage by the detection circuit system; and providing a fault indication to a safety monitoring circuit system of the radar system in response to the first voltage exceeding the reference voltage.

[0013] In one or more embodiments, the method further includes deactivating the radar system in response to a fault indication.

[0014] In one or more embodiments, at least one electrical path includes a first electrical path coupling the power combiner to the first node and a second electrical path coupling the power combiner to the first node, and at least one interconnect structure includes a first interconnect structure as part of the first electrical path, a second interconnect structure as part of the second electrical path, and a third interconnect structure coupled between the first node and both the transmit antenna and the DC ground.

[0015] In one or more embodiments, injecting at least one test current includes injecting a first test current through a first portion of the induction loop of the power combiner and injecting a second test current through a second portion of the induction loop of the power combiner. The first portion of the induction loop is separate from the second portion of the induction loop, the first portion of the induction loop being coupled to the transmitting antenna via a first interconnect structure, and the second portion of the induction loop being coupled to the transmitting antenna via a second interconnect structure.

[0016] In one or more embodiments, injecting at least one test current includes injecting the test current into a second node of the first induction loop of the power combiner, and the test current is divided at the second node and recombined at the first node.

[0017] In one or more embodiments, the method further includes: measuring peak voltage values ​​at a first electrical path and a second electrical path by a peak detector during radio frequency (RF) signal transmission; and indicating a fault to the safety monitoring circuitry of the radar system based on the measured peak voltage values ​​by the peak detector.

[0018] In one or more embodiments, when the radar system is not performing radio frequency (RF) signal transmission, at least one test current is injected by the detection circuit system.

[0019] In an example embodiment, the transmitter module includes: a power combiner; an interconnect structure coupled to the power combiner; and a detection circuit system coupled to the power combiner and configured to inject at least one test current into at least one electrical path including at least one of the power combiner and the interconnect structure, compare a first voltage at the at least one electrical path with a reference voltage, and provide a fault indication to the safety monitoring circuit system in response to the first voltage exceeding the reference voltage.

[0020] In one or more embodiments, a fault indication is provided to disable the system, including the transmitter module.

[0021] In one or more embodiments, the interconnect structure includes at least: a first interconnect structure as part of a first electrical path connected to the power combiner; and a second interconnect structure as part of a second electrical path connected to the power combiner.

[0022] In one or more embodiments, in order to inject at least one test current, the detection circuit system is further configured to inject a first test current through a first portion of the sensing loop of the power combiner and inject a second test current through a second portion of the sensing loop of the power combiner, wherein the first portion of the sensing loop is separate from the second portion of the sensing loop.

[0023] In one or more embodiments, in order to inject at least one test current, the detection circuitry is further configured to inject the test current into a node of the first sensing loop of the power combiner. The test current is divided into a first portion and a second portion, the first portion of which is provided to a first interconnect structure via a first electrical path, and the second portion of which is provided to a second interconnect structure via a second electrical path.

[0024] In one or more embodiments, the transmitter module further includes a peak detector coupled to the first and second electrical paths. The peak detector is configured to measure the peak voltage value of the radio frequency (RF) signal at the first and second electrical paths and to indicate a fault to the system's safety monitoring circuitry based on the measured peak voltage value. Attached Figure Description

[0025] A more complete understanding of the subject matter can be obtained by referring to the specific embodiments considered in conjunction with the following figures and the claims, wherein the same reference numerals refer to similar elements throughout the figures. Elements in the figures are shown for simplicity and clarity and are not necessarily drawn to scale. The figures, together with the detailed description, are incorporated into and form part of this specification and are used to further illustrate examples, embodiments, etc., and to interpret various principles and advantages according to this disclosure, wherein:

[0026] Figure 1 This illustrates radar systems that can be configured to perform fault tests according to various embodiments;

[0027] Figure 2 This illustrates various embodiments for operating a radar system, such as... Figure 1 An illustrative process flow of a method for a radar system, the method including a BIST process that may include fault detection;

[0028] Figure 3 The diagram illustrates a fracture detection circuit system according to various embodiments, coupled via a power combiner to a strut and a solder ball, each of which may be collectively included in a radar system, for example... Figure 1 In radar systems;

[0029] Figure 4The diagram illustrates a fracture detection circuit system coupled to a strut and a solder ball via a power combiner according to various embodiments, and shows a peak detector coupled to the strut and the solder ball, each of which may be collectively included in a radar system, for example... Figure 1 In the radar system.

[0030] Figure 5 Illustrative circuit diagrams are shown according to various embodiments illustrating a fracture detection circuit system that can be used for implementation. Figure 3 Fracture detection circuit system or Figure 4 The fracture detection circuit system;

[0031] Figure 6 This illustrates a fracture detection circuit system according to various embodiments, such as... Figure 3 An illustrative process flow of a method for fault detection using a fracture detection circuit system; and

[0032] Figure 7 The diagram illustrates various embodiments of a fracture detection circuit system and a peak detector, for example... Figure 4 An illustrative process flow of a method for fault detection using a fracture detection circuit system and a peak detector. Detailed Implementation

[0033] The following detailed description is illustrative in nature only and is not intended to limit the use of the embodiments described herein and such embodiments. Furthermore, it is not intended to be bound by any explicit or implied theory present in the foregoing technical field, background art, or the specific embodiments described below.

[0034] For the sake of simplicity and clarity, the figures illustrate general construction methods. Descriptions and details of well-known features and techniques may be omitted from the following detailed description to avoid unnecessarily obscuring this disclosure. For example, the dimensions of some elements or areas in the figures may be exaggerated relative to other elements or areas to aid in understanding the embodiments described herein.

[0035] The terms “first,” “second,” “third,” “fourth,” etc. (if present) used in the embodiments and claims are intended to distinguish similar elements and are not necessarily used to describe a particular sequence or time order. It should be understood that the terms thus used are interchangeable where appropriate, such that the embodiments described herein can, for example, operate in a different order than that shown or described herein. Furthermore, the terms “comprising,” “having,” and any variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements, but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. As used herein, the terms “generally,” “substantially,” “largely,” and “substantially” mean sufficient to practically achieve the stated purpose, and minor defects (if present) are not important to the stated purpose.

[0036] Following this logic, when used to refer to measurable quantities (including, but not limited to, dimensions), these terms mean that the quantity is equal to the stated value, subject to acceptable tolerances of any method or apparatus chosen for manufacturing the described structure or measuring the described quantity or dimension. Unless otherwise stated, directional references, such as “top,” “bottom,” “left,” “right,” “above,” “below,” etc., are not intended to claim any preferred orientation, but are illustrative of the orientation of one or more corresponding figures for illustrative purposes. As used herein, the terms “exemplary” and “example” mean “serving as an example, instance, or illustration.” Any embodiment described herein as exemplary or illustrative should not necessarily be construed as preferred or advantageous over other embodiments. Additionally, certain terms may be used herein for reference only and are therefore not intended to be restrictive.

[0037] In this document, elements, nodes, or features are sometimes referred to as “connected” or “coupled” together. As used herein, unless explicitly stated otherwise, “connected” means that one element is directly engaged to (or directly connected to) another element in an electrical or non-electrical manner, and not necessarily mechanically. Similarly, unless otherwise explicitly stated, “coupled” means that one element is directly or indirectly engaged to (or directly or indirectly connected to) another element in an electrical or non-electrical manner, and not necessarily mechanically engaged. Therefore, although the schematic diagrams shown depict exemplary arrangements of elements, additional intervening elements, devices, features, or components may be present in one or more embodiments of the depicted subject matter.

[0038] The various embodiments described herein relate to radar systems, such as automotive radar systems, configured to perform one or more fault detection procedures (e.g., one or more steps of which may be performed as part of a built-in self-test (BIST) procedure), wherein the radar system is configured to detect breaks in such electrical paths (e.g., which may correspond to breaks in one or more struts or solder balls of the radar system) by injecting current along one or more electrical paths of the radar system while simultaneously measuring DC voltage, peak RF voltage, or both at or along such paths. In response to determining that a voltage or power measurement obtained during the fault detection procedure exceeds a corresponding threshold, the radar system may be configured to enter a fail-safe state (e.g., in one or more embodiments, which may be triggered via an assertion of a flag by the break detection circuitry system of the radar system). In the fail-safe state, the conventional functions of the radar system may be deactivated. In one or more embodiments, as a non-limiting example, in the fail-safe state, the radar system may be configured to cause a display system in a vehicle including the radar system (e.g., part of an infotainment system or dashboard display) to display one or more messages or symbols indicating that the radar system is deactivated or requires maintenance.

[0039] Conventional radar systems typically comprise various circuit boards, integrated circuit dies, integrated circuit packages, etc., with connections between these components achieved through conductive (e.g., metallic) interconnect structures, which may include pillars, solder balls, etc. Because such interconnect structures are common points of failure in such radar systems, it is generally desirable to monitor the state of the electrical paths passing through pillars and solder balls. However, monitoring electrical paths carrying high-frequency (e.g., radio frequency (RF)) signals during normal operation of such radar systems using conventional methods can adversely affect signal power (e.g., one or more of these conventional methods require cycling the RF signal from one path to another using an external balun). For example, when conventional components are used to monitor interconnect structures included in or near the transmitter's output, the transmit (TX) output power of the radar system's transmitter may be undesirably reduced.

[0040] The embodiments described herein address these challenges by injecting one or more test currents into an electrical path through a monitored interconnect structure via a power combiner of a transmitter module, which includes or is electrically coupled to the monitored interconnect structure. Throughout this document, unless otherwise stated, the term "current" refers to electric current. In one or more embodiments, a break detection circuitry is configured to compare a corresponding voltage in an electrical path with a reference voltage when a test current is injected. In response to determining that a voltage at one of these electrical paths exceeds a corresponding reference voltage, the break detection circuitry can indicate that a fault has occurred in at least one interconnect structure (and therefore, a fault in the radar system). For example, as a non-limiting example, the break detection circuitry can provide such fault indication by asserting a binary flag (e.g., in a computer-readable storage device coupled to the break detection circuitry) or by sending a binary or non-binary signal to a safety monitoring circuitry of the radar system.

[0041] In one or more embodiments, the output of the power combiner may be coupled to the transmitting antenna of the radar system via an interconnect structure (e.g., conductive pillars, solder balls, etc.). In one or more embodiments, the interconnect structure may include solder balls connected to the TX antenna and may include first and second conductive (e.g., metallic) pillars coupled between the solder balls and the output of the power combiner. A quarter-wavelength stub may be positioned between the solder balls and the TX antenna. The quarter-wavelength stub may provide a ground path for a direct current (DC) signal, such as an injected test current. In one or more embodiments, the power combiner includes a first sensing loop and a second sensing loop. The first sensing loop may be connected between the breakage detection circuitry system and the interconnect structure (e.g., the first and second conductive pillars). The second sensing loop may be electromagnetically (e.g., inductively grounded) coupled to the first loop and may be connected to the output of the power amplifier of the transmitter module. In one or more embodiments, during RF signal transmission, the second sensing loop receives an RF signal from the power amplifier and electromagnetically couples the RF signal to the first sensing loop, which then transmits the RF signal to the antenna via one or more interconnect structures.

[0042] In one or more embodiments, a breakage detection circuit system may include first and second outputs of first and second portions of a first sensing loop coupled to a power combiner. In one or more such embodiments, the first portion of the first sensing loop may be physically separated from a second portion of the first sensing loop by a gap or discontinuity disposed at two opposite sides of the first sensing loop. The first portion of the first sensing loop may be coupled between a first output of the breakage detection circuit system and a first output of the power combiner, and may provide an electrical connection between the first output of the breakage detection circuit system and the first output of the power combiner. The second portion of the first sensing loop may be coupled between a second output of the breakage detection circuit system and a second output of the power combiner, and may provide an electrical connection between the second output of the breakage detection circuit system and the second output of the power combiner. In such embodiments, during a fault detection process, the breakage detection circuit system may inject two separate test currents into the power combiner. For example, the breakage detection circuit system may be configured to inject a first test current into the first portion of the first sensing loop and a second test current into the second portion of the second sensing loop. The breakage detection circuit system may inject the first and second test currents simultaneously. The breakage detection circuit system may measure or otherwise monitor the voltages at the first and second outputs of the breakage detection circuit system to determine whether a fault (e.g., a breakage in an interconnect structure) has occurred. The fracture detection circuit system can be configured to simultaneously measure voltage.

[0043] In one or more other embodiments, the break detection circuitry may include first and second outputs coupled to a single node of a first sensing loop of the power combiner. In one or more such embodiments, the first sensing loop may include a single break or gap separating the first and second outputs of the first sensing loop. In such embodiments, during a fault detection process, the break detection circuitry may inject a test current into a node of the first sensing loop of the power combiner. The break detection circuitry may measure or otherwise monitor the voltage at the first and second outputs of the break detection circuitry to determine whether a fault has occurred (e.g., a break in an interconnect structure). The outputs of the power combiner may correspond to two separate electrical paths. In one or more such embodiments, a peak detector may be coupled to the outputs of the power combiner and may measure the peak RF voltage at both electrical paths during RF signal transmission by the radar system. In response to determining that the measured peak RF voltage of a given electrical path exceeds a corresponding predefined threshold, the peak RF voltage detector may indicate that a fault has occurred in one of the interconnect structures (e.g., by assertion flags or by sending a fault indication signal to the radar system's safety monitoring circuitry).

[0044] Figure 1An illustrative diagram of a radar system 100 is shown, which includes a radar device 102 (sometimes referred to herein as "radar communication circuitry system 102" or "radar front-end circuitry system 102") connected to a radar microcontroller and processing unit (MCPU) 104. The radar system 100 may include a breakage detection circuitry system 144 configured to perform a fault detection process that detects breaks in the interconnect structure (e.g., conductive struts, solder balls, or other suitable interconnect structures) that electrically connect the transmitter module of the radar system 100 to the corresponding transmitting antenna of the radar system 100. Embodiments of such a fault detection process are further described below.

[0045] In one or more embodiments, radar system 100 may be a multiple-input multiple-output (MIMO) radar system, such as a linear frequency modulation (LFM) MIMO radar system (e.g., an LFM automotive MIMO radar system). In one or more embodiments, radar device 102 may include radar front-end hardware. In one or more embodiments, radar device 102 may be embodied as a field-replaceable unit (LRU) or modular component designed for rapid replacement at an operating location. Similarly, radar MCPU 104 may be embodied as a field-replaceable unit (LRU) or modular component. Although a single or monostatic radar device is shown, it should be understood that additional distributed radar devices can be used to form a distributed or multistatic radar. Additionally, the depicted radar system 100 may be implemented as an integrated circuit, wherein radar device 102 and radar MCPU 104 are formed on separate integrated circuits (chips) or on a single chip, depending on the application. According to various embodiments, radar system 100 may be implemented as part of an automotive system in conjunction with an advanced driver assistance system (ADAS) of a vehicle (e.g., vehicle 150). It should be understood that the components of the radar system 100 may be distributed in various locations on or within the vehicle 150 (e.g., the antenna may be located at one or more front, rear, or side panels of the vehicle 150, at the front or rear bumper of the vehicle 150, or at other suitable locations on the vehicle 150, or a combination of such locations; and the processing circuitry, transmitter module, and receiver module may be located at one or more locations within the vehicle 150).

[0046] Radar device 102 includes one or more transmitting antenna elements 126 (sometimes referred to herein as "transmitting antenna 126") and receiving antenna elements 142 (sometimes referred to herein as "receiving antenna 142"), which are respectively connected to one or more radio frequency (RF) transmitter (TX) modules 118 and receiver (RX) modules 128. Each transmitting antenna 126 and TX module may be designated herein as TX1, TX2, TX3, ... TX mA corresponding transmit channel in a set of transmit channels is associated with each transmit channel, where "m" is the total number of transmit channels. Each receive antenna 142 and RX module 128 can be associated with a channel designated herein as RX1, RX2, RX3, ... RX n A set of receive channels is associated with corresponding receive channels, where “n” is the number of receive (RX) channels. As a non-limiting example, a radar device (e.g., radar device 102) may include individual antenna elements (e.g., transmit antenna elements 126) respectively connected to four transmitter modules (e.g., transmitter module 118) and sixteen receiver modules (e.g., receiver module 128). These quantities of transmitter and receiver antenna elements and modules are intended to be illustrative and not limiting, wherein other quantities of these elements are possible in one or more other embodiments, such as four transmitter modules 118 and six receiver modules 128, or a single transmitter module 118 and / or a single receiver module 128.

[0047] Radar device 102 includes a chirp generator 116 configured to supply a chirp input signal to transmitter module 118. For this purpose, chirp generator 116 is configured to receive input program and control signals from MCPU 104 via digital-to-analog converter (DAC) 114. As a non-limiting example, the input program and control signals include a reference local oscillator (LO) signal, a chirp start trigger signal, and a program control signal. Chirp generator 116 is configured to generate a chirp signal and transmit it to transmitter module 118 for transmission via transmit antenna element 126. In one or more embodiments, each transmitter module 118 includes an RF conditioning module 122 configured to filter the chirp signal prior to transmission. In one or more embodiments, RF conditioning module 122 may include one or more frequency multipliers configured to increase the frequency of the chirp signal output by chirp generator 116. Each transmitter module 118 includes a splitter 123, a power amplifier 124, a power combiner 125, and a break detection circuitry system 144. The power amplifier 124 is configured to amplify the filtered chirped signal before it is provided to one or more corresponding transmit antenna elements 126 and transmitted via said transmit antenna elements 126. In this document, the transmitted chirped signal is sometimes referred to as the “transmitted signal” or “transmitted radar signal.”

[0048] One or more radar signals transmitted by transmitter module 118 and transmitting antenna 126 may be reflected by objects in the environment of radar device 102, and at least a portion of the reflected radar signal (sometimes referred to herein as a “return signal,” “reflection,” or “echo”) may be included in the RF signal received by receiving antenna element 142 at radar device 102. In one or more embodiments, the reflected radar signal received via one of the receiving antenna elements 142 and a corresponding one in receiver module 128 corresponds to a reflection of a chirped signal transmitted via one of the transmitting antennas 126 and a corresponding transmitter module 118. The received reflection may include interference components attributable to one or more interference signals in the environment of radar system 100 (e.g., where such interference signals are removed during subsequent processing that may be performed by signal processor 110). At each receiver module 128, the received RF signal (e.g., which may include the reflected radar signal) is amplified by low-noise amplifier (LNA) 140 and then provided to mixer 138, where the received RF signal is mixed with the transmitted radar signal output by RF conditioning module 122. The resulting intermediate frequency (IF) signal is provided to a high-pass filter (HPF) 136. The resulting filtered signal is then provided to a variable gain amplifier 134, which amplifies the filtered signal before providing it to a low-pass filter (LPF) 132. The LPF 132 filters the amplified filtered signal to produce a re-filtered signal. This re-filtered signal is provided to an analog-to-digital converter (ADC) 130 and output as a digital signal by the receiver module 128 (e.g., to a signal processor 110 of the MCPU 104). In one or more embodiments, by processing the received RF signal in this manner, the receiver module 128 can compress echoes with various delays into multiple sinusoidal tones, the frequencies of which correspond to the round-trip delays of the echoes.

[0049] In radar system 100, radar MCPU 104 may be connected and configured to supply input control signals to radar device 102 and receive digital output signals generated by receiver module 128 therefrom. In one or more embodiments, radar MCPU 104 includes radar controller 108 and signal processor 110 (sometimes referred to herein as "signal processing circuitry 110"), either or both of which may be embodied as a microcontroller unit or other processing unit. According to various embodiments, MCPU 104, radar controller 108, and signal processor 110 each include or are implemented by a computer processing circuitry system. Radar controller 108 may receive data from radar device 102 (e.g., from receiver module 128) and may control radar parameters of radar device 102, such as frequency band, length of each radar frame, etc., via DAC 114. For example, DAC 114 may be used to adjust the radar chirp signal output from chirp generator 116 included in radar device 102. Signal processor 110 can be configured and arranged for signal processing tasks, such as, but not limited to, target object identification, interference mitigation, calculation of the distance or gap to a detected object, calculation of the radial velocity of a detected object, and calculation of the angle of arrival (AoA) of a signal reflected by a detected object. In this document, the term "AoA" or "angle of arrival" refers to the angle at which a reflected signal (e.g., a reflected radar signal) is incident on an antenna array. Signal processor 110 can provide calculated values ​​associated with such calculations to storage device 112 and / or other systems via interface 106.

[0050] As a non-limiting example, interface 106 enables MCPU 104 to communicate with other systems via local area networks and wide area networks, the Internet, automotive communication buses, and / or other types of wired or wireless communication systems. In one or more embodiments, MCPU 104 can provide calculated values ​​to other systems via interface 106, such as radar-camera-lidar fusion systems; automated driving assistance systems including parking, braking, or lane-changing assist features; and so on. Storage device 112 can be used to store instructions for MCPU 104, data received from radar device 102, calculated values ​​from signal processor 110, etc. Storage device 112 can be any suitable storage medium, such as volatile or non-volatile computer-readable memory.

[0051] To control the transmitter module 118, the radar controller 108 may be configured, for example, to generate transmitter input signals, such as program, control trigger, reference LO signal, calibration signal, and spectrum shaping signal (e.g., ramp generation in the case of frequency modulated continuous wave (FMCW) radar). The radar controller 108 may be configured, for example, to receive data signals for RF (radio frequency) circuit enable sequences, sensor signals, and / or register programming or state machine signals.

[0052] At each receiver module 128, a digital output signal (e.g., as an ADC sample generated by ADC 130) is generated from the returned signal (i.e., the reflected radar signal received via receiver module 128) for digital processing by signal processor 110 to construct and accumulate a multiple-input multiple-output (MIMO) array vector output forming a MIMO aperture for computing plots or maps for AoA estimation and object trajectories. For example, after receiving the raw ADC sample from ADC 130 at receiver module 128, signal processor 110 may perform one or more interference suppression processes on the digital output signal before processing the resulting interference-suppressed ADC sample using one or more Fast Fourier Transform (FFT) modules or Discrete Fourier Transform (DFT) modules (e.g., fast-time (range) FFT modules and slow-time (Doppler) FFT modules). In one or more embodiments, a range-chilled antenna cube (RCAC) is generated by processing interference-suppressed ADC samples by a fast-time FFT module, and a range-Doppler antenna cube (RDAC) is generated by further processing of the RCAC by a slow-time (Doppler) FFT module (e.g., including a range-Doppler response map for each receive antenna 142). The signal processor 110 can then perform constant false alarm rate (CFAR) detection on the range-Doppler antenna cube to detect peaks in the RDAC. The signal processor 110 can further process the RDAC based on the detected peaks to construct a MIMO array vector, which is then processed to perform AoA estimation and object tracking. The MCU 104 can then output the resulting object trajectory (e.g., via interface 106) to other automotive computing or user interface devices for further processing or display.

[0053] Transmitter modules 118 may each include a break detection circuitry system 144 configured to determine whether a break (e.g., an interrupted electrical connection) has occurred along one or more electrical paths between the power amplifier 124 of the transmitter module 118 and the corresponding transmitting antenna 126. In one or more embodiments, the break detection circuitry system 144 may be configured to perform a fault detection process during which it may inject one or more test currents into the power combiner 125 of the corresponding transmitter module 118. When no break exists in the electrical path between the power combiner 125 and the corresponding transmitting antenna 126, the injected test current may be directed to a ground or reference node (e.g., a quarter-wave stub sized and arranged to act as a direct current (DC) ground) connected to the electrical path leading to the corresponding transmitting antenna 126. While the test current is injected, the break detection circuitry system 144 may measure or otherwise monitor the voltage at one or more electrical paths located between the power combiner 125 and the corresponding transmitting antenna 126. The monitored electrical path may include one or more interconnect structures (not shown), such as solder balls, conductive pillars, or other suitable interconnect structures (e.g., Figure 3 and 4 Conductive support 318, 320 or Figure 3 and 4 The solder ball 324). By monitoring the voltage along such an electrical path, the breakage detection circuitry 144 can determine when a break in the electrical path has occurred (typically corresponding to a break in one or more interconnect structures). In response to this determination, the breakage detection circuitry 144 can send a fault indication to the functional safety monitoring circuitry 148. In one or more embodiments, each transmitter module 118 may additionally include a peak detector (not shown; e.g., Figure 4 A peak detector 404 may be configured to monitor the peak RF voltage (i.e., the peak voltage of the RF signal) at the electrical path between the power combiner 125 and the corresponding transmitting antenna 126 when the RF signal is transmitted by the radar system 100. In one or more such embodiments, the peak detector may provide a fault indication to the functional safety monitoring circuitry system 148 based on the peak RF voltage measurement obtained from one or more electrical paths between the power combiner 125 and the corresponding transmitting antenna 126.

[0054] In response to receiving a fault indication from the fracture detection circuitry 144 (or, in one or more embodiments, from a peak detector), as a non-limiting example, the functional safety monitoring circuitry 148 may take one or more suitable actions, such as disabling the radar system 100, causing a message indicating a fault in the radar system 100 to be displayed at the vehicle 150 (e.g., at the instrument panel display or infotainment system of the vehicle 150), or a combination of such actions. (The following is in conjunction with...) Figures 3 to 7 Embodiments of methods and circuit systems that can be used to perform such fault detection processes (e.g., by a radar system, such as radar system 100) are described in more detail.

[0055] Figure 2 An illustrative process flow is shown for illustrating a radar front-end (RFE) radar cycle 200, the RFE radar cycle including the execution of one or more built-in self-test (BIST) processes, the BIST processes including one or more fault detection processes (e.g., Figure 6 Embodiments of method 600 or Figure 7 The embodiments of method 700, as non-limiting examples, include, for example, those fault detection processes used to detect fractures in interconnect structures. An RFE circuitry system for a radar system (e.g., Figure 1 The radar system 100 uses its radar front-end circuit system 102 to execute method 200. (See reference...) Figure 1 The method 200 describes the components of the radar system 100. However, it should be understood that this is illustrative and not limiting, at least because other suitable radar systems can be used to perform method 200 in one or more other embodiments.

[0056] At block 202, radar front-end circuitry 102 performs a calibration process (e.g., it may include phase calibration, frequency calibration, gain calibration or other suitable calibration process).

[0057] At block 204, radar front-end circuitry 102 transmits a chirped sequence (e.g., a radar signal sequence) via transmitter module 118 and transmit antenna 126, and receives reflections of the transmitted chirped sequence via receiver module 128 and receive antenna 142. Reflections of the transmitted chirped sequence can be reflected by one or more objects in the environment of radar system 100. Such reflections are sometimes referred to herein as “reflected radar signals.”

[0058] At block 206, after the transmitter module 118 and transmit antenna 126 have transmitted the chirped sequence and the receiver module 128 and receive antenna 142 have received the corresponding reflection, the radar front-end circuitry system 102 performs one or more BIST procedures. In one or more embodiments, as part of such BIST procedures, one or more steps of fault detection may be performed by the breakage detection circuitry system 144.

[0059] In one or more embodiments, this fault detection process can be performed by a given transmitter module 118 of the radar front-end circuitry system 102. For example, a break detection circuitry system 144 of the given transmitter module 118 can be configured to inject one or more test currents into a power combiner 125, attempting to deliver the test currents to a DC ground or reference node via one or more interconnect structures, the DC ground or reference node being located at or near the input of the corresponding transmitting antenna 126. For example, the break detection circuitry system 144 can inject first and second test currents into the power combiner 125 simultaneously. The break detection circuitry system 144 can monitor the electrical path voltage by comparing one or more reference voltages with one or more voltages at one or more electrical paths through which each test current is injected. In response to determining that the voltage at a given monitored electrical path exceeds a reference voltage, the break detection circuitry system 144 can provide an indication that a system fault has occurred. To provide such an indication, as a non-limiting example, the break detection circuitry system 144 can assert a binary flag or send a binary or non-binary message to the functional safety monitoring circuitry system 148 of the radar system 100. In response to a fault indication, as a non-limiting example, the functional safety monitoring circuitry system may take one or more actions, such as disabling radar system 100, providing a visual notification on the vehicle 150 screen indicating that radar system 100 is not functioning or requires maintenance, or a combination of such actions.

[0060] In one or more embodiments, this fault detection process may additionally include using a peak detector (e.g., while the RF signal is being transmitted by the radar system 100). Figure 4A peak detector 404 measures the peak RF voltage along these electrical paths. The peak detector can be configured to compare the resulting peak RF voltage measurement with a predetermined peak RF voltage threshold. In response to determining that a given peak RF voltage measurement exceeds the predetermined peak RF voltage threshold, the peak detector can send a fault indication (e.g., via flag assertion, binary or non-binary message, or other suitable method) to the safety monitoring circuitry of radar system 100. In one or more embodiments, a circuitry separate from the peak detector can monitor one or more outputs of the peak detector and can trigger the transmission of a fault indication based on one or more outputs. In response to a fault indication, as a non-limiting example, the functional safety monitoring circuitry can take one or more actions, such as deactivating radar system 100, providing a visual notification on a screen of vehicle 150 indicating that radar system 100 is not functioning or requires maintenance, or a combination of such actions.

[0061] At block 208, the radar front-end circuitry 102 can be reconfigured or can remain idle until method 200 returns to block 202 (e.g., at block 202, a recalibration of the radar front-end circuitry can be performed).

[0062] Figure 3 The following is an example of what is shown: Figure 1 An illustrative block diagram 300 of a radar system 100, comprising a transmitting module and a transmitting antenna, the radar system including a fracture detection circuitry system 144 configured to monitor interconnect structures (e.g., solder balls, struts, etc.) to determine whether such structures have failed. Reference is made herein. Figure 1 The radar system 100 is illustrated in Figure 300, where similar reference numerals are used here to denote similar elements. However, it should be understood that... Figure 1 This reference to radar system 100 is intended to be illustrative and not limiting. For example, in one or more other embodiments, other suitable radar systems may implement the circuitry shown in block diagram 300.

[0063] Figure 300 illustrates a circuit system disposed as part of an integrated circuit (IC) die, package, and circuit board, wherein the IC die and circuit board are connected to the package using interconnect structures such as solder balls or conductive pillars. In this example, Figure 300 includes an IC die 334, a package 336, and a circuit board 338. The circuit board 338 is physically and electrically attached to the package 336 via solder balls 324. The package 336 is physically and electrically attached to the IC die 334 via conductive pillars 318 and 320. The conductive pillars 318 and 320 and the solder balls 324 are sometimes referred to herein as “interconnect structures 318, 320, and 324”. According to various embodiments, the pillars 318 and 320 may be metallic (as a non-limiting example, such as copper) structures that can be attached to one or both of the IC die 334 and the package 336 using solder.

[0064] It should be understood that the arrangement of interconnect structures 318, 320, and 324 is intended to be illustrative and not limiting. For example, in one or more other embodiments, different arrangements, numbers, or types of interconnect structures may be used to physically connect IC die 334 and circuit board 338 to package 336 and electrically connect power combiner 125 to antenna 126-1.

[0065] As shown in the figure, IC die 334 includes at least power amplifiers 124-1 and 124-2, power combiner 125, and breakage detection circuitry system 144. It should be understood that in one or more embodiments, IC die 334 may additionally include other parts of the RF front-end circuitry system (e.g., as a non-limiting example, splitter 123, RF conditioning circuitry system 122, or other suitable RF front-end circuitry system).

[0066] The power combiner 125 may include a first sensing loop 302 and a second sensing loop 304 that can be electromagnetically (e.g., inductively) coupled to each other. In one or more embodiments, the first sensing loop 302 and the second sensing loop 304 may be formed in a separate layer of the IC die 334. The second sensing loop 304 may be connected to the outputs of power amplifier 124-1 and power amplifier 124-2.

[0067] The breakage detection circuit system 144 may include a first output 314 and a second output 316. The first output 314 may be connected to a first portion 306 of the first sensing loop 302 of the power combiner 125. The second output 316 may be connected to a second portion 306 of the first sensing loop 302. The first portion 306 may be connected between the first output 314 and a first conductive pillar 318. The second portion 308 may be connected between the second output 316 and a second conductive pillar 320. The first sensing loop 302 may include a break separating the first portion 306 and the second portion 308, and such a break may be located on opposite sides of the first sensing loop 302. For example, a first break 310 may be located where the breakage detection circuit system 144 is connected to the first sensing loop 302, and a second break 312 may be located where conductive pillars 318 and 320 are connected to the first sensing loop 302. An electrical path 330 may connect the first portion 306 of the first sensing loop 302 to node 322 via conductive pillar 318. Electrical path 332 can connect the second portion 308 of the first sensing loop 302 to node 322 via conductive support 320. Node 322 can be included in package 336. Signals traveling along paths 330 and 332 can be combined at node 322.

[0068] Node 322 can be coupled to antenna 126-1 via solder ball 324. Antenna 126-1 can be housed in or on circuit board 338. Node 326 can be housed in circuit board 338 between solder ball 324 and antenna 126-1. Node 326 can be connected to DC ground 328. In one or more embodiments, DC ground 328 can be implemented as a quarter-wave stub that can act as an open circuit for RF signals (e.g., RF signals to be transmitted via antenna 126-1).

[0069] Because interconnect structures are potential points of failure in radar systems, it may be desirable to monitor the electrical paths passing through conductive pillars 318 and 320 and solder balls 324. In one or more embodiments, such monitoring may include using a break detection circuitry system 144 to monitor the voltage at these paths as part of a fault detection process when one or more test currents (e.g., one or more DC test currents) are injected.

[0070] For example, the fracture detection circuitry 144 can be configured to perform a fault detection process, by which fractures in any interconnect structure (i.e., struts 318 and 320 and solder ball 324) can be detected, and in response, the fracture detection circuitry can act to indicate a fault to the functional safety circuitry (not shown) of the radar system. In one or more embodiments, one or more steps of such a fault detection process can be performed during a BIST process that occurs between RF signal transmissions. That is, such steps of the fault detection process can be performed when antenna 126-1 is not used to transmit RF signals. In one or more embodiments, one or more other steps of the fault detection process (e.g., by [unclear], during a chirped transmission sequence performed by radar system 100) can be performed when antenna 126-1 is used to transmit RF signals (e.g., as a non-limiting example, during a chirped transmission sequence performed by radar system 100). Figure 4 Peak detector 404 monitors paths 330 and 332.

[0071] In one or more embodiments, the fracture detection circuitry 144 may be configured to inject test currents i1 and i2 into the power combiner 125 while monitoring the voltage at output nodes 314 and 316 to determine whether any of the conductive pillars 318 or 320 or the solder ball 324 has a crack or break that would damage the electrical connection to the antenna 126-1. When the conductive pillars 318 and 320 and the solder ball 324 are undamaged, the injected test current i1 passes through a first portion 306 of the first induction loop 302 and along path 330 through the conductive pillar 318 to node 322, and the injected test current i2 passes through a second portion 308 of the first induction loop 302 and along path 332 through the conductive pillar 320 to node 322. The test currents i1 and i2 combine at node 322 to form a current i1+i2. The combined current i1+i2 then passes through the solder ball 324 and then via node 326 to DC ground 328. When conductive pillars 318 and 320 and solder ball 324 are undamaged, the voltages at outputs 314 and 316 are relatively low. However, if any of these interconnect structures breaks and interrupts current flow to node 326, the voltage at one or both outputs 314 and 316 increases. In response to determining that the voltage at either output 314 or 316 has increased above a reference voltage when a test current is supplied (e.g., ...), Figure 5 V in REFThe fracture detection circuitry 144 can be configured to provide a fault indication to a functional safety monitoring circuitry 148, such as a radar system (e.g., radar system 100). In response to the fault indication, as a non-limiting example, the functional safety monitoring circuitry 148 can take one or more actions, such as disabling radar system 100, providing a visual notification on a screen of vehicle 150 indicating that radar system 100 is not functioning or requires maintenance, or a combination of such actions.

[0072] Figure 4 The diagram shows a radar system, for example. Figure 1 An illustrative block diagram 400 of a radar system 100 includes a transmitting module and a portion of a transmitting antenna. The radar system includes a fracture detection circuitry system 144 configured to monitor interconnect structures (e.g., solder balls, struts, etc.) to determine if such structures have failed. Reference is made herein. Figure 1 The radar system 100 is illustrated in Figure 400, where similar reference numerals are used here to denote similar elements. However, it should be understood that... Figure 1 This reference to radar system 100 is intended to be illustrative and not limiting. For example, in one or more other embodiments, other suitable radar systems may implement the circuitry shown in block diagram 400. One or more aspects of the circuitry shown in diagram 400 may be similar to... Figure 3 The circuit system shown in Figure 300 is an aspect of which similar reference numerals denote similar elements, and for the sake of brevity, descriptions of such aspects are not necessarily repeated here.

[0073] In one or more embodiments, as shown in Figure 400, the power combiner 125 may include a first sensing loop 402 inductively coupled to a second sensing loop 304 and including only a single break 312 located at the connection point between the first sensing loop 402 and paths 330 and 332. In this example, the outputs 314 and 316 of the break detection circuitry system 144 are connected to a single node 406 (e.g., instead of in...). Figure 3 In the example (on the opposite side of the break 310), the injected test currents i1 and i2 are combined into a combined current i1+i2 before being injected at the power combiner 125. The combined current is divided at node 406, and the resulting current is propagated along paths 330 and 332 before being recombined at node 322 to form the combined current i1+i2 again.

[0074] Because in this example, the connection between the break detection circuitry 144 and the power combiner 125 does not require an additional break in the first sensing loop 402, one or more embodiments of the circuitry of Figure 400 can have improved RF performance at high frequencies (e.g., above 81 GHz) due to reduced interaction between the break detection circuitry 144 and the RF signal passing through the power combiner 125 during RF signal transmission. However, in this arrangement, the break detection circuitry 144 is able to detect breaks occurring in both conductive pillars 318 and 320, but not breaks occurring in only one of conductive pillars 318 and 320.

[0075] To address this challenge, a peak detector 404 may be included in IC die 334. The peak detector 404 may be configured and arranged to monitor peak RF voltages at paths 330 and 332 while providing RF signals (e.g., via paths 330 and 332) to antenna 126-1 for transmission. In Figure 400, the peak detector 404 is shown directly connected to paths 330 and 332. However, this arrangement is intended to be illustrative and non-limiting. For example, in one or more other embodiments, the peak detector 404 may be connected to paths 330 and 332 via one or more couplers (e.g., RF directional couplers).

[0076] Peak detector 404 may include circuitry configured to acquire peak RF voltage measurements from paths 330 and 332 during a fault detection process when a test current is injected by fracture detection circuitry 144. Peak detector 404 may be configured to compare the peak RF voltage measurements with a predetermined threshold. In response to determining that a peak RF voltage measurement at either path 330 or 332 exceeds the predetermined threshold (indicating fracture of one of conductive pillars 318 and 320 or solder ball 324), peak detector 404 may be configured to provide a fault indication to, for example, a functional safety monitoring circuitry 148 of a radar system, which may act appropriately in response to the fault indication, as described above. In this way, peak detector 404 may be able to detect fractures in a single conductive pillar of conductive pillars 318 and 320 as part of a fault detection process.

[0077] Figure 5 Show Figure 1 , 3Figure 500 illustrates an example embodiment of the fracture detection circuit system 144 of component 4. As shown, the fracture detection circuit system may include outputs 314 and 316, current sources 508, 510 and 512, comparator 520, resistor 506, logic OR gate 524, and electrostatic discharge (ESD) protection circuit system 532. As shown, the ESD protection circuit system 532 may include a first set of diodes connected between ground 528 and output 314, and may additionally include a second set of diodes connected between ground 528 and output 316.

[0078] Current source 508 can be coupled to ground 528 via resistor 506. Current source 508 can supply current i through resistor 506. REF This generates a voltage V at node 514, which is connected to the current source 508, resistor 506, and the inputs of comparators 520 and 522. REF Current source 510 can be coupled to output 314 via node 516. Node 516 can be connected to the input of comparator 520. Current source 510 can supply a first test current i1 to output node 314, thereby generating a voltage V1 at node 516. Current source 512 can be coupled to output 316 via node 518. Node 518 can be connected to the input of comparator 522. Current source 512 can supply a second test current i2 to output node 316, thereby generating a voltage V2 at node 518.

[0079] Comparator 520 receives and compares voltage V1 and voltage V REF Comparator 520 can be configured to operate when V1 is greater than V. REF It outputs a "logic high" (e.g., binary 1) signal when V1 is less than V. REF The output is a "logic low" (e.g., binary 0) signal. A logic high output from comparator 520 can indicate a break in one or more interconnect structures coupled to output 314, thereby creating an open circuit along one or more of the corresponding electrical paths.

[0080] Comparator 522 receives and compares voltage V2 and voltage V REF Comparator 522 can be configured to operate when V2 is greater than V. REF Outputs a "logic high" (e.g., binary 1) signal when V2 is less than V. REF The output is a "logic low" (e.g., binary 0) signal. A logic high output from comparator 522 can indicate a break in one or more interconnect structures coupled to output 316, thereby creating an open circuit along one or more of the corresponding electrical paths.

[0081] OR gate 524 can receive outputs from comparators 520 and 522. If either or both of comparators 520 and 522 output a logic high signal, OR gate 524 can provide a logic high signal at output 526. In one or more embodiments, the logic high signal output by OR gate 524 can enable a function safety monitoring circuitry system (e.g., Figure 1 , 3 The functional safety monitoring circuitry 148 sends a fault indication (e.g., by setting a binary flag or sending a binary or non-binary message). In one or more embodiments, as a non-limiting example, output 526 may be coupled to a register, control circuitry, or functional safety monitoring circuitry that can receive the signal output from OR gate 524. The use of OR gate 524 in this example is intended to be illustrative and not limiting. For example, in one or more other embodiments, other logic circuitry or controller circuitry may be used to monitor the outputs of comparators 520 and 522 and provide a fault indication based on the outputs of comparators 520 and 522.

[0082] Figure 6 An illustrative process flow of method 600 is shown, along with the circuitry of the radar system (e.g., Figure 1 and 3 The fracture detection circuit system 144 can detect and respond to faults (e.g., fractures) in the interconnect structure of the radar system through the method 600. In one or more embodiments, the method 600 can serve as a BIST process (e.g., Figure 2 The BIST process is performed as part of box 206 of method 200 (as a non-limiting example), and may be executed once per radar cycle by the radar system. Reference is made here. Figure 1 The components of the radar system 100 and Figure 3 The method 600 is described in Figure 300. However, it should be understood that this is illustrative and not limiting, at least because other suitable radar systems and circuit systems may be used to perform the method 600 in one or more other embodiments.

[0083] At block 602, the break detection circuitry of the transmitter module injects test current into one or more electrical paths leading to the transmitting antenna via a power combiner and one or more interconnect structures. For example, break detection circuitry 144 can inject one or more test currents (e.g., test currents i1 and i2) into electrical paths 330 and 332 via power combiner 125. If no interconnect structure is broken, the injected test current travels through the interconnect structure (e.g., conductive pillars 318, 320 and solder balls 324) and is routed to ground near the transmitting antenna (e.g., routed to DC ground 328 via node 326 at or near the input of antenna 126-1). If at least one interconnect structure is broken, the voltage at the corresponding electrical path increases (e.g., above a reference voltage V) as seen by the break detection circuitry. REF (voltage level).

[0084] At block 604, the break detection circuitry compares the voltage at the monitored electrical path with a reference voltage. In response to determining that any of the monitored electrical path voltages exceeds the reference voltage, method 600 proceeds to block 606. In response to determining that no electrical path voltage exceeds the reference voltage, method 600 proceeds to block 608. For example, break detection circuitry 144 can compare the voltage V1 at electrical path 330 with the reference voltage V. REF The voltage V2 at electrical path 332 can be compared with the reference voltage V. REF Compare to determine V1 > V REF V2 > V REF .

[0085] At box 606, the fracture detection circuitry indicates a fault in the radar system. For example, fracture detection circuitry 144 can respond to determining that V1 > V REF Or V2>V REF The indication indicates a malfunction in the radar system 100. To provide such an indication, as a non-limiting example, the fracture detection circuitry 144 may assert a binary flag or send a binary or non-binary message to the functional safety monitoring circuitry 148 of the radar system 100. In response to the indication, as a non-limiting example, the functional safety monitoring circuitry 148 may take one or more actions, such as disabling the radar system 100, providing a visual notification on the vehicle 150 screen indicating that the radar system 100 is not functioning or requires maintenance, or a combination of such actions.

[0086] At box 608, the fault detection process results in no fault being detected, and the radar system continues to operate normally. For example, in response to determining that V1 is not greater than V... REF And V2 is not greater than V. REFThe fracture detection circuit system 144 may not provide a fault indication, thus allowing the radar system 100 to continue operating normally.

[0087] Figure 7 An illustrative process flow of method 700 is shown, including the circuitry of the radar system (e.g., Figure 1 and 3 The fracture detection circuit system 144 and Figure 4 The peak detector 404 can detect and respond to faults (e.g., breaks) in the interconnect structure of the radar system through the method 700. In one or more embodiments, one or more steps of method 700 (e.g., blocks 702, 704, and 706) can serve as a BIST process (e.g., Figure 2 The BIST process is performed as part of block 206 of method 200 (as a non-limiting example), and can be performed by the radar system once per radar cycle. In one or more embodiments, one or more steps of method 700 (e.g., blocks 708, 710, and 712) can be performed by the radar system during the transmission of RF signals (e.g., during chirped sequence transmission). Reference is made herein. Figure 1 The components of the radar system 100 and Figure 4 The method 700 is described in Figure 400. However, it should be understood that this is illustrative and not limiting, at least because other suitable radar systems and circuit systems may be used to perform the method 700 in one or more other embodiments.

[0088] At block 702, the break detection circuitry of the transmitter module injects test current into one or more electrical paths (e.g., paths leading to the transmitting antenna) via a power combiner and one or more interconnects, while monitoring the voltage at one or more of these paths. For example, break detection circuitry 144 can inject one or more test currents (e.g., test currents i1 and i2) into electrical paths 330 and 332 via power combiner 125, while monitoring the voltages at electrical paths 330 and 332 (e.g., voltages V1 and V2). If no interconnect is broken, the injected test current travels through the interconnects (e.g., conductive pillars 318, 320, and solder balls 324) and is routed to ground near the transmitting antenna (e.g., at or near the input of antenna 126-1, routed to DC ground 328 via node 326). If at least one interconnect breaks, the voltage at the corresponding electrical path increases (e.g., above a reference voltage V1) as seen by the break detection circuitry. REF (voltage level).

[0089] At block 704, the break detection circuitry compares the voltage at the monitored electrical path with a reference voltage. In response to determining that any of the monitored electrical path voltages exceeds the reference voltage, method 700 proceeds to block 706. In response to determining that no electrical path voltage exceeds the reference voltage, method 700 proceeds to block 708. For example, break detection circuitry 144 can compare the voltage V1 at electrical path 330 with the reference voltage V. REF The voltage V2 at electrical path 332 can be compared with the reference voltage V. REF Compare to determine V1 > V REF V2 > V REF .

[0090] At box 706, the fracture detection circuitry indicates a fault in the radar system. For example, fracture detection circuitry 144 can respond to determining that V1 > V REF Or V2>V REF The indication indicates a malfunction in the radar system 100. To provide such an indication, as a non-limiting example, the fracture detection circuitry 144 may assert a binary flag or send a binary or non-binary message to the functional safety monitoring circuitry 148 of the radar system 100. In response to the indication, as a non-limiting example, the functional safety monitoring circuitry 148 may take one or more actions, such as disabling the radar system 100, providing a visual notification on the vehicle 150 screen indicating that the radar system 100 is not functioning or requires maintenance, or a combination of such actions.

[0091] At block 708, a peak detector measures the peak RF voltage at the monitored electrical path while providing an RF signal (e.g., a radar signal) along the monitored electrical path for subsequent transmission by the radar system 100. For example, peak detector 404 may measure the peak RF voltage at electrical paths 330 and 332 while providing an RF signal along electrical paths 330 and 332 (e.g., for subsequent transmission via antenna 126-1).

[0092] At block 710, the peak detector compares the measured peak RF voltage with a peak RF voltage threshold. In response to determining that the peak RF voltage measurement at any of the monitored electrical paths exceeds a predetermined peak RF voltage threshold, method 700 proceeds to block 712. Otherwise, in response to determining that no peak RF voltage measurement exceeds the predetermined peak RF voltage threshold, method 700 proceeds to block 714. For example, peak detector 404 may compare the predetermined peak RF voltage threshold with each of the peak RF voltage measurements obtained from electrical paths 330 and 332 to determine whether the peak RF voltage threshold has been exceeded.

[0093] At box 712, a fault in the radar system is indicated based on a comparison between a predetermined peak RF voltage threshold and a measured peak RF voltage value. For example, a peak detector (or associated circuitry configured to monitor the output of a peak detector) may indicate a fault in radar system 100 in response to determining that any of the measured peak RF voltage values ​​exceeds a predetermined peak RF voltage threshold. To provide such an indication, as a non-limiting example, the peak detector or associated circuitry may assert a binary flag or send a binary or non-binary message to the functional safety monitoring circuitry 148 of radar system 100. In response to the indication, as a non-limiting example, the functional safety monitoring circuitry 148 may take one or more actions, such as disabling radar system 100, providing a visual notification on a screen of vehicle 150 indicating that radar system 100 is not functioning or requires maintenance, or a combination of such actions.

[0094] At box 712, the fault detection process results in no fault being detected, and the radar system continues to operate normally. For example, in response to determining that V1 is not greater than V... REF And V2 is not greater than V. REF If the peak RF voltage measurement does not exceed the predetermined peak RF voltage threshold, the breakage detection circuit system 144 and the peak detector 404 may not provide a fault indication, thereby causing the radar system 100 to continue to operate normally.

[0095] While this document describes various embodiments of fault detection methods and corresponding circuit systems in the context of radar systems, it should be understood that this is intended to be illustrative rather than limiting. For example, such fault detection methods and circuit systems can be used in systems other than radar, such as in wireless communication systems.

[0096] Various exemplary embodiments are presented below. Some simplifications and omissions may be made in the following examples, which are intended to highlight and illustrate some aspects of the various exemplary embodiments, without limiting the scope.

[0097] In an example embodiment, the radar system includes a transmitting antenna and a transmitter module coupled to the transmitting antenna. The transmitter module includes: a power combiner; a plurality of interconnect structures coupled between the power combiner and the transmitting antenna; and a detection circuit system coupled to the power combiner and configured to inject at least one test current into at least one electrical path including the power combiner and at least one of the plurality of interconnect structures, compare a first voltage at the at least one electrical path with a reference voltage, and provide a fault indication to the radar system's safety monitoring circuit system in response to the first voltage exceeding the reference voltage.

[0098] In one or more embodiments, the safety monitoring circuitry disables the radar system in response to a fault indication.

[0099] In one or more embodiments, the plurality of interconnect structures include: a first interconnect structure as part of a first electrical path coupling a power combiner to a first node; a second interconnect structure as part of a second electrical path coupling a power combiner to a first node; and a third interconnect structure coupled between the first node and both the transmit antenna and the DC ground.

[0100] In one or more embodiments, in order to inject at least one test current, the detection circuitry is further configured to inject a first test current through a first portion of the sensing loop of the power combiner and a second test current through a second portion of the sensing loop of the power combiner. The first portion of the sensing loop is separate from the second portion of the sensing loop, the first portion of the sensing loop being coupled to the transmitting antenna via a first interconnect structure, and the second portion of the sensing loop being coupled to the transmitting antenna via a second interconnect structure.

[0101] In one or more embodiments, in order to inject at least one test current, the detection circuitry is further configured to inject the test current into a second node of the first sensing loop of the power combiner, and the test current is divided at the second node and recombined at the first node.

[0102] In one or more embodiments, the transmitter module further includes a peak detector coupled to the first and second electrical paths, and the peak detector is configured to measure peak voltage values ​​at the first and second electrical paths when the radar system transmits one or more radio frequency (RF) signals, and to indicate a fault to the radar system's safety monitoring circuitry based on the measured peak voltage values.

[0103] In one or more embodiments, the first interconnect structure and the second interconnect structure are for connecting an integrated circuit die to a conductive pillar of a package, and the third interconnect structure is for connecting a circuit board to solder balls of a package.

[0104] In an example embodiment, the method includes performing a fault detection process for a radar system by: injecting at least one test current into at least one electrical path including a power combiner and at least one interconnect structure by a detection circuit system of the radar system; comparing a first voltage at the at least one electrical path with a reference voltage by the detection circuit system; and providing a fault indication to a safety monitoring circuit system of the radar system in response to the first voltage exceeding the reference voltage.

[0105] In one or more embodiments, the method further includes deactivating the radar system in response to a fault indication.

[0106] In one or more embodiments, at least one electrical path includes a first electrical path coupling the power combiner to the first node and a second electrical path coupling the power combiner to the first node, and at least one interconnect structure includes a first interconnect structure as part of the first electrical path, a second interconnect structure as part of the second electrical path, and a third interconnect structure coupled between the first node and both the transmit antenna and the DC ground.

[0107] In one or more embodiments, injecting at least one test current includes injecting a first test current through a first portion of the induction loop of the power combiner and injecting a second test current through a second portion of the induction loop of the power combiner. The first portion of the induction loop is separate from the second portion of the induction loop, the first portion of the induction loop being coupled to the transmitting antenna via a first interconnect structure, and the second portion of the induction loop being coupled to the transmitting antenna via a second interconnect structure.

[0108] In one or more embodiments, injecting at least one test current includes injecting the test current into a second node of the first induction loop of the power combiner, and the test current is divided at the second node and recombined at the first node.

[0109] In one or more embodiments, the method further includes: measuring peak voltage values ​​at a first electrical path and a second electrical path by a peak detector during radio frequency (RF) signal transmission; and indicating a fault to the safety monitoring circuitry of the radar system based on the measured peak voltage values ​​by the peak detector.

[0110] In one or more embodiments, when the radar system is not performing radio frequency (RF) signal transmission, at least one test current is injected by the detection circuit system.

[0111] In an example embodiment, the transmitter module includes: a power combiner; an interconnect structure coupled to the power combiner; and a detection circuit system coupled to the power combiner and configured to inject at least one test current into at least one electrical path including at least one of the power combiner and the interconnect structure, compare a first voltage at the at least one electrical path with a reference voltage, and provide a fault indication to the safety monitoring circuit system in response to the first voltage exceeding the reference voltage.

[0112] In one or more embodiments, a fault indication is provided to disable the system, including the transmitter module.

[0113] In one or more embodiments, the interconnect structure includes at least: a first interconnect structure as part of a first electrical path connected to the power combiner; and a second interconnect structure as part of a second electrical path connected to the power combiner.

[0114] In one or more embodiments, in order to inject at least one test current, the detection circuit system is further configured to inject a first test current through a first portion of the sensing loop of the power combiner and inject a second test current through a second portion of the sensing loop of the power combiner, wherein the first portion of the sensing loop is separate from the second portion of the sensing loop.

[0115] In one or more embodiments, in order to inject at least one test current, the detection circuitry is further configured to inject the test current into a node of the first sensing loop of the power combiner. The test current is divided into a first portion and a second portion, the first portion of which is provided to a first interconnect structure via a first electrical path, and the second portion of which is provided to a second interconnect structure via a second electrical path.

[0116] In one or more embodiments, the transmitter module further includes a peak detector coupled to the first and second electrical paths. The peak detector is configured to measure the peak voltage value of the radio frequency (RF) signal at the first and second electrical paths and to indicate a fault to the system's safety monitoring circuitry based on the measured peak voltage value.

[0117] Although the operations of the methods herein are shown and described in a specific order, the order of operations for each method may be changed so that certain operations can be performed in reverse order, or that certain operations can be performed at least partially concurrently with other operations. In one or more other embodiments, instructions or sub-operations of different operations may be implemented intermittently and / or alternately.

[0118] It should also be noted that at least some operations of the methods described herein can be implemented using software instructions stored on a computer-usable storage medium for execution by a computer. As an example, embodiments of a computer program product include a computer-usable storage medium for storing a computer-readable program. The computer-usable or computer-readable storage medium can be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system (or device or apparatus). Examples of non-transitory computer-usable and computer-readable storage media include semiconductor or solid-state memory, magnetic tape, removable computer disks, random access memory (RAM), read-only memory (ROM), rigid disks, and optical disks.

[0119] Alternatively, the embodiments described herein can be implemented entirely in hardware or in implementations that include both hardware and software elements. In software-based embodiments, the software may include, but is not limited to, firmware, resident software, microcode, or other suitable software.

[0120] As used herein, the terms “circuit” and “circuit system,” including the term “processing circuit system” and related terms, refer to any suitable combination of analog or digital circuit elements, hardware, firmware, software, etc.; including but not limited to application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), microcontrollers, and microprocessors. It should be understood that the term “circuit system” encompasses non-volatile and volatile memory devices, including but not limited to random access memory (RAM), read-only memory (ROM), etc., which can be implemented using any suitable means, such as SRAM, DRAM, or magnetic storage devices as non-limiting examples. Following these principles, it should be understood that references to “processor” or “processing circuit system” can include means in which a general-purpose computing device includes or is otherwise coupled to memory storing machine-readable instructions configured to cause the processing circuit system to perform the described actions. As a non-limiting example, such instructions can be stored as instructions in a human-readable high-level programming language that are interpreted or compiled into object code or machine language, or they can be stored directly in a low-level language such as object code or machine language or another suitable representation.

[0121] It should be further understood that, unless otherwise expressly stated, features such as processing circuitry, memory, and related circuitry and devices can be implemented by any suitable combination of one or more localized devices, including but not limited to distributed systems formed by multiple different devices communicating with each other via direct electrical communication connections, wireless communication connections, and public or private communication networks including the Internet. It will also be understood that processing circuitry and related devices can be implemented by one or more physical machines or by virtual machines, including but not limited to virtualized computing environments provided within “cloud” computing environments or other virtualized systems.

[0122] While at least one exemplary embodiment has been presented in the detailed description above, it should be understood that numerous variations exist. It should also be understood that the exemplary embodiments described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. In fact, the detailed description above will provide those skilled in the art with convenient guidance for implementing one or more of the described embodiments. It should be understood that various changes can be made to the function and arrangement of the elements without departing from the scope defined by the claims.

Claims

1. A radar system, characterized in that, include: Transmitting antenna; as well as A transmitter module coupled to the transmitting antenna, the transmitter module comprising: Power combiner; Multiple interconnect structures coupled between the power combiner and the transmitting antenna; and A detection circuit system, coupled to the power combiner, is configured to: Inject at least one test current into at least one electrical path that includes at least one of the power combiner and at least one of the plurality of interconnect structures; Compare the first voltage at the at least one electrical path with a reference voltage; and In response to the first voltage exceeding the reference voltage, a fault indication is provided to the safety monitoring circuitry of the radar system.

2. The radar system according to claim 1, characterized in that, The plurality of interconnect structures include: A first interconnect structure, which serves as part of a first electrical path coupling the power combiner to a first node; A second interconnect structure, which serves as part of a second electrical path coupling the power combiner to the first node; and A third interconnect structure is coupled between the first node and both the transmitting antenna and the DC ground.

3. The radar system according to claim 2, characterized in that, In order to inject the at least one test current, the detection circuit system is further configured to: A first test current is injected through the first part of the induction circuit of the power combiner; as well as A second test current is injected through a second portion of the induction circuit of the power combiner, wherein the first portion of the induction circuit is separated from the second portion of the induction circuit, the first portion of the induction circuit is coupled to the transmitting antenna via a first interconnect structure, and the second portion of the induction circuit is coupled to the transmitting antenna via a second interconnect structure.

4. The radar system according to claim 2 or 3, characterized in that, In order to inject the at least one test current, the detection circuit system is further configured to: A test current is injected into a second node of the first induction loop of the power combiner, wherein the test current is divided at the second node and recombined at the first node.

5. The radar system according to claim 4, characterized in that, The transmitter module further includes: A peak detector, coupled to the first electrical path and the second electrical path, wherein the peak detector is configured to: While the radar system transmits one or more radio frequency (RF) signals, the peak voltage values ​​at the first electrical path and the second electrical path are measured; and Based on the measured peak voltage value, a fault is indicated to the safety monitoring circuit system of the radar system.

6. A method, characterized in that, include: The fault detection process for the radar system is performed through the following steps: The detection circuitry of the radar system injects at least one test current into at least one electrical path, which includes a power combiner and at least one interconnection structure. The detection circuit system compares the first voltage at the at least one electrical path with a reference voltage; as well as The detection circuit system provides a fault indication to the safety monitoring circuit system of the radar system in response to the first voltage exceeding the reference voltage.

7. The method according to claim 7, characterized in that, The at least one electrical path includes a first electrical path coupling the power combiner to the first node, and a second electrical path coupling the power combiner to the first node, and the at least one interconnect structure includes: A first interconnect structure, which is part of the first electrical path; A second interconnect structure, which is part of the second electrical path; and The third interconnect structure is coupled between the first node and both the transmitting antenna and the DC ground.

8. The method according to claim 7, characterized in that, Injecting the at least one test current includes: A first test current is injected through the first portion of the induction circuit of the power combiner; and A second test current is injected through a second portion of the induction circuit of the power combiner, wherein the first portion of the induction circuit is separated from the second portion of the induction circuit, the first portion of the induction circuit is coupled to the transmitting antenna via a first interconnect structure, and the second portion of the induction circuit is coupled to the transmitting antenna via a second interconnect structure.

9. The method according to claim 7 or 8, characterized in that, Injecting the at least one test current includes: A test current is injected into a second node of the first induction loop of the power combiner, wherein the test current is divided at the second node and recombined at the first node.

10. The method according to claim 9, characterized in that, In addition, including: The peak voltage values ​​at the first and second electrical paths are measured by a peak detector during radio frequency (RF) signal transmission. as well as The peak detector indicates a fault to the safety monitoring circuitry of the radar system based on the measured peak voltage value.

Images