Method of performing abnormal value detection and abnormal value detection circuit

Abstract

The invention relates to a method for performing abnormal value detection and an abnormal value detection circuit. The outlier detection circuitry may be employed to filter outliers such that they do not negatively affect statistical analysis or processing tasks. The abnormal value detection circuit may receive data as a stream of a plurality of sets having a plurality of values included within one set. The outlier detection circuitry includes dedicated hardware and / or software resources that determine a maximum value and a minimum value that occur within each set of the received streams.

Description

Technical Field

[0001] This application relates to a method for performing outlier detection and an outlier detection circuit. Background Technology

[0002] In many use cases, it is desirable to identify outliers, such as maximum and / or minimum values, from a dataset. These outliers can be selected for sorting, further processing, or discarded to avoid adverse effects on other downstream processes or applications. For example, many data processing applications (such as filtering, data cleansing / sanitizing, noise reduction, machine learning algorithms, image processing, signal processing, etc.) may need to filter outliers from datasets so that such outliers do not adversely affect statistical analysis. However, existing technologies for identifying outliers may require storing the dataset to be filtered or labels that would not normally be applied to the data stream. Other technologies for identifying outliers may be able to perform such labeling on the data stream, but in some applications, these technologies are often too slow or too complex. Summary of the Invention

[0003] To effectively filter out outliers so that they do not negatively impact statistical analysis or further processing tasks, outlier detection circuits are employed. Outlier detection circuits according to various aspects of this technology can receive data as a stream of multiple sets containing multiple values ​​within a set. The outlier detection circuit includes dedicated hardware and / or software resources that determine the maximum and minimum values ​​occurring within each set in the received stream. In some specific implementations, the outlier detection circuit is capable of detecting and extracting up to, for example, four (4) minimum values ​​and up to four (4) maximum values ​​from up to eight (8) input data elements received in parallel. The outlier detection circuit is also capable of distinguishing between valid and invalid data inputs, and of computing both minimum and maximum values ​​in parallel using the same comparator hardware and / or comparator software elements.

[0004] Some implementations include a method for performing outlier detection. The method may include comparing a data input with a previous maximum and a previous minimum value of a previous data input via an outlier detection circuit. The method may include forming at least one array based on the comparison result via the outlier detection circuit. The method may include sorting the at least one array based on one or more validity signals associated with the data input, the previous maximum value, and the previous minimum value via the outlier detection circuit. The method may include extracting at least one maximum value and at least one minimum value from the sorted at least one array via the outlier detection circuit.

[0005] In some implementations, the at least one array includes a maximum value array, a minimum value array, or both a maximum value array and a minimum value array.

[0006] In some implementations, the data input includes a first number of data elements, the previous maximum value includes a second number of data elements, and the previous minimum value includes a third number of data elements. In some implementations, the first number of data elements is equal to the second number of data elements, and / or the first number of data elements is equal to the third number of data elements. In other implementations, the sum of the second number of data elements and the third number of data elements is equal to the first number of data elements.

[0007] In some implementations, the one or more validity signals include a set of valid data signals, a set of valid previous maximum values, and a set of valid previous minimum values. Additionally or alternatively, the number of valid data signals in the valid data signal set is the same as a first number of data elements, the number of valid previous maximum values ​​in the set of valid previous maximum values ​​is the same as a second number of data elements, and / or the number of valid previous minimum values ​​in the set of valid previous minimum values ​​is the same as a third number of data elements. Additionally or alternatively, a corresponding valid data signal in the valid data signal set indicates whether a corresponding data element in the data input is valid or invalid, a corresponding valid previous maximum value in the set of valid previous maximum values ​​indicates whether a corresponding data element in a previous maximum value is valid or invalid, and / or a corresponding valid previous minimum value in the set of valid previous minimum values ​​indicates whether a corresponding data element in a previous minimum value is valid or invalid.

[0008] In some embodiments, the at least one array includes a maximum value array, and forming the at least one array includes using the comparison result to form a first portion of the maximum value array; and forming a second portion of the maximum value array based on the transpose of the first portion. In some embodiments, the maximum value array is a two-dimensional array, and forming the maximum value array includes forming a first portion such that the number of stored elements gradually decreases with each subsequent row in the maximum value array; and forming a second portion such that the number of stored elements gradually increases with each consecutive row in the maximum value array. In some embodiments, forming the maximum value array further includes storing a predefined value in the main diagonal of the elements in the maximum value array. In some examples, the predefined value is 1. In some embodiments, the at least one array also includes a minimum value array, and forming the at least one array includes forming the minimum value array by transposing the maximum value array.

[0009] In some implementations, each column in the at least one array corresponds to a corresponding data element in a set of data elements. The set of data elements includes at least one data element from the data input, at least one data element from a previous maximum value, and at least one data element from a previous minimum value.

[0010] In some implementations, comparing the data input with the previous maximum and previous minimum values ​​includes comparing the initial data element from the set of data elements with each other data element in the set of data elements; and comparing each other data element in the set of data elements with each other data element in the set of data elements that has not yet been selected or compared, until all data elements in the set of data elements have been compared.

[0011] In some implementations, each row in the at least one array corresponds to a corresponding data element in the set of data elements. In some implementations, sorting the at least one array includes: identifying valid data elements and invalid data elements in the set of data elements based on one or more validity signals; filling each cell in each column corresponding to an invalid data element with a first value; and iterating over each row in each column corresponding to a valid data element. In some examples, the first value is 0.

[0012] In some implementations, iterating over each row in each column corresponding to a valid data element includes: determining whether a data element corresponding to the row index of a valid row is valid and whether the value at the cell defined by the row index and column index of the valid column is equal to a second value; and when the element is valid and the value is the second value, filling the lowest unfilled row in the corresponding column of the at least one array with the second value. In some examples, the second value is 1.

[0013] In some implementations, iterating over each row in each column corresponding to a valid data element includes: for each row corresponding to a valid data element, identifying each array element in each column corresponding to a valid data element equal to a second value; and for each identified array element, filling the lowest array element in each row storing the first value with the second value. In some examples, the second value is 1.

[0014] In some implementations, extracting the at least one maximum value and the at least one minimum value from the sorted at least one array includes: performing a binary right shift operation on the column values ​​for each column corresponding to a valid data element; inverting the right-shifted column values; and performing a binary AND operation on the column values ​​and the inverted column values. In some examples, the column values ​​are binary numbers defined by each element in the column.

[0015] In some examples, extracting the at least one maximum value from the sorted at least one array includes determining the data value of the column with the lowest row in the at least one array storing the second value as the at least one maximum value. In some examples, extracting the at least one minimum value from the sorted at least one array includes determining the data value of the column with the highest row in the at least one array storing the second value as the at least one minimum value.

[0016] Some implementations include outlier detection circuitry. This outlier detection circuitry may include a comparator circuit configured to compare a data input with a previously maximum and a previously minimum value of a previous data input. The outlier detection circuitry may include an array forming circuit configured to form at least one array based on the comparison result of the comparator circuitry. The outlier detection circuitry may include an array sorting circuit configured to sort the at least one array according to one or more validity signals. The outlier detection circuitry may include a extractor circuit configured to extract at least one maximum value and at least one minimum value from the sorted at least one array.

[0017] In some implementations, the comparator circuit includes a comparator array arranged such that data elements of a non-repeating data input are compared with previous maximum and minimum values.

[0018] In some embodiments, the at least one array includes a maximum value array, and the array forming circuit is configured to: use the comparison result to form a first portion of the maximum value array; and form a second portion of the maximum value array based on the transpose of the first portion.

[0019] In some implementations, the maximum array is a two-dimensional array, and the array forming circuit is configured to: form a first portion such that the number of stored elements gradually decreases with each subsequent row in the maximum array; and form a second portion such that the number of stored elements gradually increases with each consecutive row in the maximum array.

[0020] In some implementations, the array forming circuit is configured to store predefined values ​​in the main diagonal of the elements in the maximum value array. In some examples, the predefined value is 1.

[0021] In some embodiments, the at least one array further includes a minimum value array, and the array forming circuit is configured to form the minimum value array by transposing the maximum value array.

[0022] In some implementations, each column in the at least one array corresponds to a corresponding data element in a set of data elements, and the set of data elements includes at least one data element from the data input, at least one data element from the previous maximum value, and at least one data element from the previous minimum value.

[0023] In some implementations, the comparator circuit is configured to: compare an initial data element from the set of data elements with each other data element in the set of data elements; and compare each other data element in the set of data elements with each other data element in the set of data elements that has not yet been selected or compared, until all data elements in the set of data elements have been compared.

[0024] In some implementations, each row in the at least one array corresponds to a corresponding data element in the data element set, and the array sorting circuit is configured to: identify valid data elements and invalid data elements in the data element set based on the one or more validity signals; fill each cell in each column corresponding to the invalid data element with a first value; and iterate over each row in each column corresponding to the valid data element. In some examples, the first value is 0.

[0025] In some implementations, the array sorting circuit is configured to iterate over each row in each column corresponding to a valid data element, including: for each row corresponding to a valid data element, identifying each array element in each column corresponding to a valid data element equal to a second value; and for each identified array element, filling the lowest array element in each row storing the first value with the second value. In some examples, the second value is 1.

[0026] In some implementations, the extractor circuit is configured to: perform a binary right shift operation on a column value corresponding to a valid data element, wherein the column value is a binary number defined by each element in the column; invert the right-shifted column value; and perform a binary AND operation on the column value and the inverted column value.

[0027] In some embodiments, the extractor circuit is configured to: determine the data value of the column with the lowest row in the at least one array storing the second value as the at least one maximum value; and determine the data value of the column with the highest row in the at least one array storing the second value as the at least one minimum value. Attached Figure Description

[0028] Figure 1 Exemplary systems in which various aspects of this technology can be practiced are illustrated.

[0029] Figure 2 Exemplary imaging systems according to various aspects of the present technology are illustrated.

[0030] Figure 3 Example scenarios illustrating various aspects of this technology are presented.

[0031] Figure 4 Examples of pixel arrays and readout components for image sensors according to various aspects of the present technology are illustrated.

[0032] Figure 5 Examples of components of an outlier detector based on various aspects of this technology are illustrated.

[0033] Figure 6 Example operations for forming a maximum and minimum value array detector according to various aspects of this technology are illustrated.

[0034] Figure 7 A table illustrating example comparisons of various aspects of this technology is provided.

[0035] Figure 8 Examples based on Figure 7 Example maximum array of comparison results.

[0036] Figure 9 Examples based on Figure 7 The minimum array of comparison results and / or Figure 8 An example of a maximum value array.

[0037] Figure 10 Examples based on Figure 8 An example sorted maximum value table of the maximum value array.

[0038] Figure 11 Examples based on Figure 9 An example sorted minimum value table of the minimum value array.

[0039] Figure 12 Examples based on Figure 10 An example of a sorted maximum value table extracted from the maximum value table.

[0040] Figure 13 Examples based on Figure 11 An example of a sorted minimum value table, extracted from the minimum value table.

[0041] Figure 14 Example maximum value selection tables and example minimum value selection tables for selecting maximum values ​​are illustrated according to various aspects of this technology.

[0042] Figure 15 Example methods based on various aspects of this technology are illustrated. Detailed Implementation

[0043] As mentioned above, outlier detection can be used to filter out outliers so that they do not negatively impact statistical analysis or further processing tasks. While this technique can be employed in many other applications, including other types of sensors that receive real-time data streams, it can be particularly beneficial in image sensing. Image sensors and imaging systems are used in a wide variety of electronic devices to capture images for many different situations and applications. In a typical arrangement, an image sensor has an array of image pixels arranged in rows and columns. Readout circuitry can be coupled to the corresponding column to read out the image signal from each image pixel in that corresponding column.

[0044] Large image pixel arrays can be particularly useful for applications requiring high-resolution images. However, problems can arise when attempting to perform readout operations. For example, the array may contain hundreds or thousands of rows and columns. The frame rate used for pixel readout is proportional to the time spent reading out all rows in the array. For instance, doubling the number of rows would halve the frame rate if all other factors remained constant. Faster readout in an imaging system may require higher power consumption from the imaging system. Furthermore, being able to discard outliers can be very helpful, for example, in reducing artifacts.

[0045] 1. Example System and Specific Implementation

[0046] Figure 1An example logical interaction between elements of system 100 is illustrated. As shown, system 100 includes a source node 101, an outlier detection circuit (ODC) 102, and a target node 103. Source 101 and / or target 103 can be any type of system, device, platform, component, application, service, or other entity or element. In some embodiments, system 100 may represent a separate computing system or device, wherein each of source 101, ODC 102, and target 103 is a separate component. In other embodiments, system 100 may represent a network or other interconnection of computing systems or devices, wherein at least source 101 and target 103 are independent systems or devices, and potentially ODC 102 is implemented independently of source 101 and / or target 103. Examples of such systems or devices may include imaging devices, mobile phones, smartphones, tablets, wearable devices (e.g., smartwatches, fitness trackers, smart glasses, smart clothing / fabrics, head-mounted displays, etc.), laptops, desktop computers, workstations, in-vehicle infotainment systems, head-up display (HUD) devices, extended reality (XR) systems (e.g., including augmented reality (AR), virtual reality (VR), mixed / mediated reality (MR) technologies), game consoles, engine management systems, engine control units, embedded systems, microcontrollers, control modules, connected appliances and / or network components (e.g., base stations, routers, hubs, switches, fabrics, gateways, network functions, etc.), satellites, sensors, Internet of Things (IoT) devices, smart appliances, autonomous or semi-autonomous unmanned aircraft (e.g., unmanned land / land vehicle systems, unmanned surface / amphibious vehicle systems, unmanned aerial vehicle (UAV) systems, etc.), robots, electronic signage, single-board computers, plug-in computers or Dow chips and / or any type of computing device, such as any of those computing devices discussed herein. Additionally or alternatively, source 101, ODC 102 and / or target 103 may be implemented as part of the imaging system 200 discussed below.

[0047] As previously described, in some embodiments, source 101 and target 103 may be implemented as components or parts of the same system or device. Additionally or alternatively, source 101 and target 103 may be different applications or software elements operating from the same or different systems. In a first example, source 101 is a first application operating from the system, and target 103 is a second application operating from the same system. In a second example, source 101 is an application operating from the system, and target 103 is a memory location, buffer, register, or directory / path of a file system operating from the system. In a third example, source 101 is a first memory buffer, and target 103 is the same or a different memory buffer. In a fourth example, source 101 is a sensor, and target 103 is an onboard processor or onboard memory chip implemented from the sensor.

[0048] In other implementations, source 101 and target 103 are implemented as independent systems or by independent systems. In a first example, source 101 is an IoT device, such as a sensor (e.g., an image sensor), and target 103 is a system or computing service remote from the IoT device that processes and / or stores data generated by the IoT device / sensor. In a second example, source 101 is a first network node in a network, and target 103 is a second network node in the same or a different network. In this example, the network can be a wireless network such as a wireless local area network (WLAN) or a cellular network, or a wired network such as a data center network. Additionally, a network node can be a user equipment, base station, switch, router, bridge, hub, gateway, network function, and / or any other type of device / system participating in one or more networks.

[0049] exist Figure 1In the example, source 101 may be configured to send data 111 to target 103. Data 111 may be generated as a result of one or more processes, measurements, or other phenomena. For example, data 111 may represent raw signals or processed data generated by sensors (e.g., image frames or other image-related signals). In another example, data 111 may represent a collection of signaling or data elements generated by a communication device, such as one or more data packets, protocol data units (PDUs), frames, fragments, etc. Data 111 may represent other types of analog or digital signals and / or collections of various data. In some examples, data 111 is a collection of data points or elements or includes a collection of data points or elements, and therefore, data 111 may be referred to as dataset 111 (or “dataset 111”). It should be noted that dataset 111 may be a sample as part of a group or a larger dataset. Furthermore, data 111 may be any suitable form, format, or data structure. For example, the form, format, or data structure of data 111 may be based on the requirements of medium 115, such as those specified in the relevant communication protocol, data exchange format, interface definition language (IDL), and / or other aspects of medium 115. In some examples, data 111 may flow from source 101 to destination 103. Here, data 111 (or “data stream 111”) may be a sequence of data elements available over time, or a continuous or quasi-continuous data stream.

[0050] ODC 102 may operate as a filter and may include hardware and / or software elements that process data structures or datasets to generate another data structure, dataset, or subset of data; process data streams to generate another data stream; process stored and / or streaming data according to one or more conditions, criteria, rules, policies, etc.; and / or process streams or signals to remove unwanted or undesirable components, features, or other aspects from the stream or signal. In some embodiments, ODC 102 may be implemented by source 101, target 103, or a system including both source 101 and target 103. In other embodiments, ODC 102 may be implemented by an entity independent of source 101 and / or target 103. In any of these embodiments, source 101 and target 103 may be independent systems.

[0051] exist Figure 1In the example, source 101 sends data 111 to ODC 102 via medium 115. In embodiments where source 101 and ODC 102 are implemented by the same system, medium 115 can be any other means of communication between software connectors, software glue, middleware, APIs, ABIs, drivers, and / or applications and / or services. Where the system is processing data locally, medium 115 can represent one or more memory buffers, file systems, or directories, etc. In embodiments where source 101 and ODC 102 are implemented by different systems, medium 115 can be any suitable wired or wireless communication interface and / or protocol.

[0052] ODC 102 receives dataset 111, performs various operations on dataset 111 to detect one or more outliers according to the various implementations and examples discussed herein, and generates dataset 112. Dataset 112 is then delivered to target 103 via medium 116. Medium 116 may be the same as or different from medium 115. For example, medium 116 may include any means of interconnection and / or communication between applications, services, components, devices, systems, and / or networks, or combinations thereof.

[0053] Similar to data 111, data 112 can be a data sequence, such as a data stream or data flow, or data 112 can be a collection or packet of data elements, such as one or more data packets, PDUs, frames, fragments, etc. For example, the form / format of data 112 may be based on the requirements of the medium 116 on which it is to be transmitted, such as those specified in the relevant communication protocol, data exchange format, IDL, and / or other aspects of the medium 116. In some implementations, a separate encoder may be used ( Figure 1 Dataset 112 (not shown) is encapsulated for transmission on medium 116. In some embodiments, dataset 112 has the same form, format, or structure as dataset 111, although it has no or one or more outliers (or only has one or more outliers). In other embodiments, dataset 112 may have a different form, format, or structure than dataset 111. In any of the embodiments discussed herein, dataset 111 and / or dataset 112 can be any form of human-readable and / or machine-readable data.

[0054] As previously mentioned, some data points / elements in dataset 111 may be outliers. An outlier (or simply "outlier") is an element or data point in dataset 111 that differs significantly from other elements or data points in dataset 111. Outliers may arise from variability in data 111, variability in measurement, or may be the result of errors or faults in data 111 (such as measurement errors, translation errors, transmission errors, etc.). In some data samples, some data points may be further away from the sample mean than data points considered reasonable. Outliers, typically the last observation, can include the sample maximum and / or sample minimum, depending on whether they are extremely high or extremely low.

[0055] Outliers can bias and mislead results, and therefore, detecting and handling outliers is useful for accurate data processing and interpretation. Thus, one or more outliers may need to be identified and / or removed from data 111 before being passed to target 103. In this regard, data 111 may be passed or fed to ODC 102 before being transmitted to the intended target 103. As described above, ODC 102 is an intermediate element between source 101 and target 103, identifying outliers from dataset 111 and generating dataset 112 based on the outlier identification. In some implementations, ODC 102 removes outliers from dataset 111, and therefore, in such implementations, dataset 112 has fewer (or no) biased data points. In other implementations, ODC 102 removes non-outliers from dataset 111, and therefore, in such implementations, dataset 112 includes only outliers. In other implementations, ODC 102 locates outliers without deleting them. The following example describes how ODC 102 removes outliers from dataset 111, such that dataset 112 does not contain outliers. While the following discussion provides an example of discarding or otherwise removing outliers from dataset 111, other specific implementations and / or use cases are possible based on the various implementations discussed herein.

[0056] Figure 2An exemplary imaging system 200 is illustrated, such as an electronic device employing sensor circuitry (also referred to as a sensor module) to capture images. This exemplary imaging system may employ ODC 102 to remove outliers (e.g., anomalous pixel values ​​or other image information) from its dataset (e.g., from captured image frames). The imaging system 200 may include or be part of still-life cameras or video cameras, webcams, video surveillance systems, high-speed inspection systems, vehicle imaging systems, video game systems with imaging capabilities, XR systems, robots, drones, commercial or industrial systems, satellite imaging systems, and / or any other imaging-based system or application (including any of the systems mentioned herein). The camera (or imaging) module 202 is configured to convert incident / received light into digital image data. The camera module 202 includes one or more image sensors (or sensor modules) 204.

[0057] During the image capture process, light (visible and / or invisible) from the scene is focused onto the image sensor 204 through one or more corresponding lenses 206. The image sensor 204 may include circuitry for generating analog pixel image signals and circuitry for converting those image signals into corresponding digital image data. The digital image data may be provided to storage and processing circuitry 208.

[0058] Storage and processing circuitry 208 may include, for example, one or more integrated circuits (ICs) (such as image processing circuitry), microprocessors, storage devices (such as random access memory (RAM) and / or non-volatile memory (NVM)), etc. This circuitry may be implemented using components separate from or incorporated into camera module 202. When storage and processing circuitry 208 is implemented on ICs different from those implementing camera module 202, the IC having circuitry 208 may be stacked with or otherwise packaged with the ICs used in camera module 202. In some specific implementations, storage and processing circuitry 208 may include one or more central processing units (CPUs) or individual processor cores, one or more graphics processing units (GPUs), one or more accelerated processing units (APUs), one or more neural processing units (NPUs), one or more tensor processing units (TPUs), one or more microcontrollers, one or more application-specific integrated circuits (ASICs), one or more field-programmable gate arrays (FPGAs), one or more digital signal processors (DSPs), and / or other hardware-based processing elements. References to processors should be understood to include references to a single processor or a collection of processors that may or may not operate in parallel.

[0059] Image data captured by camera module 202 can be processed and stored using processing circuitry 208 (e.g., an image processing engine using processing circuitry 208, an imaging mode selection engine using processing circuitry 208, etc.). The processed image data can be provided to external equipment, such as a computer, vehicle control system, external display, and / or other devices, using a wired or wireless communication path (not shown) coupled to processing circuitry 208.

[0060] exist Figure 2 In this example, camera module 202 may include illumination module 210, which is configured to emit light for illuminating objects in an image scene. Image sensor 204 may be configured to acquire a reflected version of the emitted light and generate image information for the scene. By way of example only, such image information may include depth or distance information for one or more objects, a depth or distance map of the image scene, an image of the image scene, etc.

[0061] The illumination module 210 (such as a light emitter controlled by driver circuitry) can emit light with any suitable characteristics. This can include any suitable waveform, peak amplitude or power, periodicity or frequency, light pulses, light with modulation amplitude and modulation frequency, etc. The emitted light can be in the infrared (IR) band and / or optical band and can be generated by an LED or laser configured to emit one or more light pulses (such as in a light pulse train). The emitted light can reach one or more objects in the image scene and be reflected from such objects, thus returning as reflected light to the camera module 202. Objects can include any suitable stationary or moving objects. By way of example only, in a driving scene for a vehicle operating in autonomous (or manual) driving mode, objects can include signs, streetlights, driving lanes or bicycle lanes, curbs or sidewalks, other road users (e.g., other vehicles, cyclists, or pedestrians), trees or bushes, etc.

[0062] Reflected light can be received at image sensor 204 (e.g., at one or more moving image pixels, at one or more photosensitive elements within the moving image pixels, etc.). Driver circuitry and / or control circuitry can control the pixels to generate one or more image frames based on the reflected light, such as by providing control signals to transistors or other actuating elements (e.g., switching elements) coupled to the pixels. Specifically, based on the control signals received from the driver circuitry and / or control circuitry, the pixels can (e.g., during an accumulation or exposure time period) generate different portions of charge in response to the reflected light, can (e.g., during a readout time period) perform one or more readout operations on the generated portions of charge, or can perform other operations during other time periods.

[0063] The processing circuitry in camera module 202 (or processing circuitry 208 in imaging system 200) can control illumination module 110 (if used) and is aware of the characteristics of the emitted light signal. The processing circuitry can control image sensor 204 to generate image signals for one or more image frames, these image signals indicating the characteristics of the reflected light signal. The system can process (e.g., compare and correlate) the generated image signals for these image frames to the reflected and emitted light to determine phase difference and / or time-of-flight information. Furthermore, the processing circuitry can implement ODC 102.

[0064] Depending on various aspects of this technology, ODC 102 may be implemented or deployed in different parts or regions of the imaging sensor 200. In one embodiment, ODC 102 may be part of image sensor circuitry 204. In another embodiment, ODC 102 may be part of storage and processing circuitry 208. In yet another embodiment, ODC 102 may be a separate, independently operating component connected to both image sensor 204 and storage and processing circuitry 208 via suitable interconnection technology. In any of the foregoing embodiments, ODC 102 may act as a filter or other intermediary between image sensor circuitry 204 and storage and processing circuitry 208.

[0065] Figure 3 An exemplary image sensing scenario 300 is illustrated, in which a set of image sensors is part of an automated inspection system. Specifically, the inspection system in this example includes a processing system 302 operatively coupled to an image sensor 304. The image sensor 304 is configured to acquire images along an inspection line 306 (e.g., an assembly line in a factory or other production facility, a waste stream in a material recycling facility, etc.) or other inspection setup. As shown, multiple items, such as bottle 308, move along the inspection line 306. A display 310 may present images captured by the image sensor 304. One of the items, specifically bottle 308x, is shown as having a crack or other defect, as displayed on the display 310. As part of the automated inspection process, the defective item may be discarded into a bin 312. In other cases, any defective item may be tagged or otherwise identified for further testing or repair.

[0066] In this image sensing scenario 300, sensor 304 generates an image, which is then provided to processing system 302 for defect detection. The image generated by sensor 304 may be in the form of a streaming image array or a collection of other pixel values. Sensor 304 and / or processing system 302 may employ ODC 102 to detect outliers in the captured image data. In some examples, ODC 102 receives a collection of eight pixels simultaneously, and not all pixels may be valid due to the way they are read from the image sensor. Four maximum and four minimum values, or at most four maximum and at most four minimum values, may be removed from the stream, so that pixel values ​​without outliers can be used for further statistical analysis, such as defect detection. One objective is to remove outliers as quickly as possible to avoid storing such data before it is processed by processing system 302.

[0067] One way invalid data may occur is due to different clock frequencies, for example, where a first frequency is used to read out the image array, and a second frequency is used to process the image array after it has been read out. For example, the first frequency may be used by sensor 304, and the second frequency may be used by processing system 302. The processing frequency may differ from the readout frequency so that more data elements are processed per clock cycle. However, this can cause some data elements to be invalid because additional data elements are added to the image array around the beginning and end of the relevant portion of the image array being processed. Another way invalid data may occur is due to misalignment between the readout image array and the starting point used to process the image array, which can result in some invalid data values ​​being obtained before valid values ​​are obtained.

[0068] Figure 4 Examples are shown for use Figure 2 An example configuration of the pixel array of the image sensor 204 and the readout component 400. (See example...) Figure 4 As shown, component 400 includes a pixel array 402 and control and processing circuitry in module 406, the pixel array comprising sensor pixels 404 arranged in rows and columns. Array 402 may contain, for example, tens, hundreds, or thousands of rows and columns of sensor pixels 404. Module 406 may be coupled to row control circuitry 408 (sometimes referred to as row driver circuitry or pixel driver circuitry) and column control and readout circuitry 410 (sometimes referred to as column readout circuitry or column control circuitry, readout circuitry, or column decoder circuitry). Control module 406 may receive (row) addresses from row control circuitry 408 and provide corresponding (row) control signals (such as reset control signals, anti-halo control signals, row selection (or pixel selection) control signals, modulation control signals, storage control signals, charge transfer control signals, readout control signals, sample-and-hold control signals, and / or storage control signals) to pixels 404 via (row) control path 412.

[0069] One or more lines (such as column line 414) may be coupled to each column of pixels 404 in array 402. Column line 414 may be used to read image signals from pixels 404 and to provide bias signals (e.g., bias current or bias voltage) to pixels 404. Column control and readout circuitry 410 may receive image signals (e.g., analog pixel values ​​generated by pixels 404) through line 414. This circuitry 410 may include memory circuitry for storing calibration signals (e.g., reset level signals, reference level signals) and / or image signals (e.g., image level signals) read from array 402, amplifier circuitry or multiplier circuitry, analog-to-digital converter (ADC) circuitry, bias circuitry, latching circuitry for selectively enabling or disabling portions (columns) of circuitry 410, or other circuitry coupled to one or more pixels in array 402 for operating pixels 404 and for reading image signals from pixels 404. The ADC circuit in circuit 410 can convert the analog pixel values ​​received from array 402 into corresponding digital pixel values ​​(sometimes referred to as digital image data or digital pixel data). Circuit 410 can supply digital pixel data to control / processing module 406 for (e.g., in one or more pixel columns) pixels 404.

[0070] The pixel array 402 may also be provided with a filter array having multiple (color) filter elements (each filter element corresponding to a corresponding pixel), which allows a single image sensor to sample light of different colors or different groups of wavelengths. Typically, filter elements of any desired color and / or wavelength (e.g., light wavelength or infrared wavelength) and in any desired pattern can be formed on any desired number of image pixels 404. For example, for using (e.g., Figure 2 In the illumination module 110, the time-of-flight sensing of the illumination source is performed, and the pixel array 402 can be provided with a corresponding filter array that allows light of color and / or frequency emitted from the illumination source to pass through.

[0071] A collection of buffer memories 416 (e.g., RAM, etc.) may be coupled to column control and readout circuitry 410. As shown, buffer memories 416 are coupled to column control and readout circuitry 410. Buffer memories 416 are employed when performing parallel row readouts, as further discussed below.

[0072] Camera module 202 (see Figure 2The image sensor 204 may include one or more arrays 402 of image pixels 404. The image pixels 404 may be formed in a semiconductor substrate using complementary metal-oxide-semiconductor (CMOS) technology, charge-coupled device (CCD) technology, or any other suitable photosensitive device technology. The image pixels 404 may be front-illuminated (FSI) image pixels or back-illuminated (BSI) image pixels. Furthermore, the array 402 may include different types of pixels 404, such as active pixels, passive pixels, optically shielded pixels, reference pixels, etc. If desired, the image sensor may include an integrated circuit package or another structure in which multiple integrated circuit substrate layers or chips (e.g., from multiple wafers) are vertically stacked or otherwise arranged relative to each other.

[0073] 2. Outlier detection in data points

[0074] Figure 5 An example outlier detector 500 (also referred to as "filter 500") according to an aspect of the present technology is illustrated. In some specific implementations, the outlier detector 500 may correspond to Figure 1 ODC 102 in this example. The outlier detector 500 includes one or more comparators 501, a maximum value array forming element 502, a minimum value array forming element 503, a maximum value array sorting element 504A, a minimum value array sorting element 504B, a valid value array sorting element 504C, a maximum value extractor and selector 505A, and a minimum value extractor and selector 505B. Each of these elements can be implemented using any combination of hardware elements (e.g., logic gates, programmable logic devices, FPGAs, ASICs, etc.) and / or software elements. For example, each element of the outlier detector 500 can be embodied as any number, combination, configuration, and / or arrangement of logic gates, such as NOT (inverter), AND, OR, NAND, NOR, XOR, XNOR, and / or other gates, some or all of which can be formed by combinations of various diodes, transistors, and / or other electrical elements. Additionally or alternatively, each element of the outlier detector 500 may be embodied as any number, combination, configuration, and / or arrangement of comparator circuits, multiplexers, demultiplexers, encoders, decoders, tri-state buffers, sorting circuits, memory arrays, programmable logic arrays, arithmetic arrays, etc., some or all of which may be formed by various combinations of logic gates. In other specific embodiments, each element of the outlier detector 500 may be embodied as any number, combination, configuration, and / or arrangement of software components executable by a general-purpose or special-purpose processor (such as any of those processors mentioned herein).

[0075] Comparator 501 compares data input 512 with the previous maximum value 511 and the previous minimum value 513. The previous maximum value 511 and the previous minimum value 513 can be accessed through one or more registers ( Figure 5 (Not shown) The inputs are connected to comparator 501. In some embodiments, data input 512 may be obtained from column readout circuitry 410, memory 416, and / or some other device or component (including any of those devices or components mentioned herein). Comparator 501 may include any combination and arrangement of logic circuitry and / or hardware elements, depending on the specific comparison or logic operation to be performed. Comparator 501 arranges the comparison results in a manner that allows the comparison results to be interpreted as one or more tables, matrices, or arrays (such as arrays of minimum and maximum values). Figure 7 Table 700 shows example comparison results generated by comparator 501.

[0076] The maximum value array forming element 502 arranges the comparison results from comparator 501 into the maximum value array. Figure 6 Table 603 and Figure 8 Table 800 shows an example of such a maximum value array, which will be discussed below. Maximum value array forming element 502 and / or minimum value array forming element 503 arrange the comparison results from comparator 501 into the minimum value array. Figure 6 Table 604 and Figure 9 Table 900 shows an example of such a minimum array, which will also be discussed below.

[0077] The maximum value array sorting element 504A sorts the maximum value array according to the constraint (validity) signals 521, 522, and 523 for each value. This will be discussed below. Figure 10 Table 1000 shows an example of a sorted maximum value array. The minimum value array sorting element 504B sorts the minimum value array according to the limiting / valid signals 521, 522, 523 for each value. The following discussion focuses on... Figure 11 Table 1100 shows an example of a sorted array of minimum values.

[0078] The valid array sorting element 504C sorts the validity signals 521, 522, and 523 so that the validity signals can follow the data elements. For example, the maximum valid signal 541, the data output valid signal 542, and the minimum valid signal 543 can be used in the next outlier detection iteration. The previous maximum valid signal 521, the data valid signal 522, and the previous minimum valid signal 523 can be accessed through one or more registers (…). Figure 5(Not shown) The input is connected to the sorter 504C. If the number of elements smaller than the minimum / maximum value is valid, the valid array sorting element 504C allows the filter 500 to function correctly. The valid array sorting element 504C sorts these values ​​to determine how many valid signals 541, 543 can be generated for the maximum value output 531 and the minimum value output 533, and how many of these valid signals need to be generated for the largest and smallest elements among them. Additionally, (re)aligning these values ​​helps avoid incorrectly indicating such elements as valid when they are actually invalid. Figure 14 The top row of the maximum value masking table 1402 shows an example of an array of valid signal sorting. In some implementations, the valid array sorting element 504C includes selection logic to select elements and mark these elements as valid or invalid. In other implementations, a separate selection element may be included after the valid array sorting element 504C for selecting valid (or invalid) elements.

[0079] The maximum value extractor and selector 505A extracts the maximum value from the sorted array of maximum values ​​and selects the maximum value to be assigned to the maximum value output 531. Figure 12 and Figure 14 An example of this type of extraction and selection is shown. The minimum value extractor and selector 505B extracts the minimum value from the sorted array of minimum values ​​and selects the minimum value to be assigned to the minimum value output 533. Figure 13 and Figure 14 An example of this type of extraction and selection is shown. The following discussion... Figures 12 to 14 .

[0080] Filter 500 has N m-bit data elements as data input 512 (where N and m are integers). Filter 500 also utilizes J previous m-bit minimum value elements 513 and K previous m-bit maximum value elements 511 (where J and K are integers). In some embodiments, the J previous minimum value elements 513 and the K previous maximum value elements 511 each have the same size and / or magnitude as the input data element 512, or are equal to N. In other embodiments, the sum or combination of the J previous minimum value elements 513 and the K previous maximum value elements 511 has the same size and / or magnitude as the input data element 512. For example, in the case where the input data 512 includes 8 elements, J and K may be equal to 4. In other embodiments, the J previous minimum value elements 513 and the K previous maximum value elements 511 are independent of N.

[0081] Along with input signals 511, 512, and 513, there are also K 1-bit limiting signals 521 (also referred to as "previous maximum valid signals 521") indicating the validity of K maximum value elements, N 1-bit limiting signals 522 (also referred to as "data valid signals 522") indicating whether the data elements of data input 512 are valid, and J 1-bit limiting signals 523 (also referred to as "previous minimum valid signals 521") indicating the validity of J minimum value elements 513. In some implementations, limiting signals 521, 522, and 523 with a value of '1' indicate that the corresponding element is valid, and a value of '0' indicates that the corresponding element is invalid. Limiting signals 521, 522, and 523 can be transmitted together with their corresponding signals 511, 512, and 513 as independent indicators or flags for each data element to indicate whether its corresponding element is valid or invalid.

[0082] Filter 500 outputs the values ​​of K maximum data elements (e.g., maximum output 531) and J minimum data elements (e.g., minimum output 533) as input. Filter 500 also outputs corresponding qualifying signals (e.g., maximum valid 541 and minimum valid 543) to indicate whether each element is valid. N data elements are passed through filter 500 as data output 532 without modification, as are the corresponding qualifying signals 542 for the data elements.

[0083] During the initial presentation of data elements, the values ​​of the minimum element 513 and the maximum element 511 are unimportant. Limiting signals 523 and 521 indicate whether the minimum element 513 and the maximum element 511 are invalid, respectively. When initially presenting a data element with the previous maximum element 511, the previous minimum value 513 and data input 512 are input into the comparator array 501. The comparator array 501 is configured such that elements are not repeatedly compared. This is achieved by selecting an initial element and then comparing it with each other element. Then, a new element is selected and compared with each other element that has not yet been selected and / or compared. This process of selecting and comparing elements is repeated until every element has been selected and compared, and the last element has no other elements to compare with.

[0084] In this example, the output of comparator 501 is stored in two 2D 1-bit arrays, such as a maximum value array and a minimum value array generated by the maximum value array forming element 502 and the minimum value array forming element 503, respectively. It should be understood that the output of comparator 501 can be stored in any number of arrays, where such arrays may have the same or different sizes depending on the specific implementation or design choice. The maximum value array stores the result from comparator 501 to extract the maximum value, and the minimum value array stores the result from comparator 501 to extract the minimum value. Each maximum and minimum value array has N+J+K elements in each dimension, and each column and row index corresponds to one of the input data elements of input data 512, the previous minimum value element 513, or the previous maximum value element 511. This is symmetric, such that the same index across each dimension of the array corresponds to the same element. This association can be the same for each array created, and all arrays can have the same size.

[0085] Figure 6 Example operations are shown for forming a maximum value array for extracting the maximum value and a minimum value array for extracting the minimum value. Figure 6 In the example, table element 610 shows the operation performed by comparator 501 (e.g., "A>B"). Table element 611a is the column index of the previous maximum value 511, and table element 611b is the row index of the previous maximum value 511. In this example, the previous maximum value 511 is "25". Table elements 612a1, 612a2, and 612a3 are the column indices of the corresponding data elements in data input 512, while table elements 612b1, 612b2, and 612b3 are the row indices of the corresponding data elements in data input 512. In this example, the data elements are "16", "4", and "53". Table element 613a is the column index of the previous minimum value 513, and table element 613b is the row index of the previous minimum value 513. In this example, the previous minimum value 513 is "11". Additionally, an asterisk in each of the depicted tables indicates that its input is valid. Although the following discussion relates to operations on arrays of maximum values, the same principles apply to operations on arrays of minimum values. For example, Table 604 shows an array of minimum values. In this example, the array of minimum values ​​is the same as the array of maximum values, but it is transposed.

[0086] Table 601 shows the result of the first operation using the result of comparator 501. Here, the maximum value array is initially filled using the result from comparator 501 by using the selected element from the previous step as the row index and the element to which the selected element is to be compared as the column index. The value stored at this location is the comparison result of the two elements. This fills one corner of the array, as shown in Table 601.

[0087] In the first operation, the value of each row index is compared sequentially with each value of each column index, and the resulting value is stored in the corresponding table element. In the illustrated example, this operation could begin at the top-left table element and continue along its rows, processing elements in subsequent rows, and so on, until the bottom-right table element has been processed. For example, the first operation could begin at table element (611b, 611a), where the value of the row index of row 611b (e.g., the maximum value of "25", 511) is compared with the value of the column index of column 611a (e.g., the maximum value of "25", 511). The comparison operation for table element (611b, 611a) can be skipped because it involves comparing the value with itself (e.g., comparing "25" with "25" in the illustrated example). Therefore, table element (611b, 611a) remains unfilled in table 601. Unfilled cells in table 601 represent comparisons of elements with themselves, or comparison operations that have already been performed. Next, table elements (611b, 612a1) are processed, where the row index value of row 611b (e.g., the maximum value of "25", 511) is compared with the column index of column 612a1 (e.g., the first data element value of "16"), and the result of the comparison is stored in table elements (611b, 612a1). Here, the resulting value "1" in table elements (611b, 612a1) can represent "true", and table elements including the value "0" can represent "false".

[0088] Another corner of the array is filled by repeating the previous operations, but switching the indexes between rows and columns and inverting the stored values, as shown in Table 602. Thus, Table 602 represents the result of a second operation used to form an array of maximum values, where the transpose of Table 601 is filled into Table 602 with the inverted values. For example, the maximum value 511 in column 611a (e.g., A = 25) can be compared with the minimum value 513 in row 613b (B = 16), and the resulting value is inverted and stored in table element (613b, 611a). Therefore, the value "0" can be stored in table element (613b, 611a). Additionally or alternatively, Table 601 (or the filled table elements in Table 601) can be transposed such that Table 601 is flipped diagonally and / or its row and column indices are switched, resulting in another matrix, such as Table 602. In any implementation, this results in Table 602 including a main diagonal with equal indexes, and therefore the table elements on the main diagonal remain unfilled.

[0089] Table 603 shows the result of the third operation used to form the maximum value array. Here, the main diagonal of the maximum value array with equal indices is padded with 1s ("1"), as shown in Table 603. Table 603 is a table for the maximum value array.

[0090] Table 604 represents the resulting table of the minimum value array. As shown in Table 604, the minimum value array is a transpose of the maximum value array 603. For example, the maximum value array 603 can be flipped diagonally, and / or the row and column indices of the maximum value array 603 can be switched to produce Table 604. In other specific implementations, the same or similar operations as previously discussed with respect to Tables 601, 602, and 603 can be used to compute the minimum value array.

[0091] Return to reference Figure 5 After generating the maximum and minimum value arrays, the maximum and minimum value arrays are sorted by sorting elements 504A and 504B, respectively. In some implementations, the data in each column of each array is sorted and filtered. This may involve creating two new arrays, one for the minimum values ​​and one for the maximum values, storing the sorted data in these arrays.

[0092] Sort an array of maximum values. This can involve iterating over the columns or processing each column in the array individually. If an element corresponding to a column index is invalid, the column is skipped and filled with zeros ("0") in the corresponding sorted array. If an element corresponding to a column index is valid, each row is iterated over, and if an element corresponding to a row index is valid and the cell value is one ("1") at both the row and column indices, the lowest unfilled row in the column is filled with one ("1") in the resulting array. After considering each column, the result should be a sorted array. Figure 6 Table 605 is an example of a sorted maximum array based on the maximum array 603.

[0093] As an example, in Figure 6 In Table 603, column 612a1 corresponds to an invalid column index, and therefore, each cell in column 612a1 of the sorted result array 605 is filled with zeros ("0"). In another example, in Figure 6 In table 603, row 611b corresponds to the valid row index, column 611a corresponds to the valid column index, and table element (611b, 611a) contains the value one ("1"). The lowest unfilled row in the corresponding valid column 611a is row 613b. Therefore, table element (613b, 611a) is filled with one ("1") in result array 605. Additionally, table element (611b, 611a) is filled with zero ("0") in result array 605.

[0094] As another example, in Figure 6In table 603, row 611b corresponds to the valid row index, column 613a corresponds to the valid column index, and table element (611b, 613a) contains the value one (“1”). The lowest unfilled row in the corresponding valid column 613a is row 612b2. Therefore, table element (612b2, 613a) is filled with one (“1”) in result array 605. Additionally, table element (611b, 613a) is filled with zero (“0”) in result array 605.

[0095] As yet another example, in Figure 6 In table 603, row 612b3 corresponds to the valid row index, column 612a3 corresponds to the valid column index, and table element (612b3, 612a3) contains the value one (“1”). The lowest unfilled row in the corresponding valid column 612a3 is row 613b. Therefore, in the resulting array 605, table element (613b, 612a3) is filled with one (“1”), and table element (612b3, 612a3) is filled with zero (“0”).

[0096] After sorting the array, the first '1' is extracted from each column of the sorted array. For this, each column is treated as a binary number, where the most significant bit (MSB) is the bit in the top row and the least significant bit (LSB) is the bit in the bottom row. This binary number can be represented as "X". The extraction process involves right-shifting X by 1 bit (inserting a 0), inverting the right-shifted X, and performing a bitwise AND operation on X and the inverted right-shifted X.

[0097] Perform a bitwise AND operation on X, shift the result of X one bit to the right, and then invert it. Equation 1 shows an example of such an operation, where X = 00000111, "&" is the bitwise AND operator, "~" is the bitwise NOT (invert) operator, and ">>" is the right shift operator.

[0098]

[0099] =00000100

[0100] The result of this calculation is then mapped back into the array following the same mapping, where MSB is the top row and LSB is the bottom row. Figure 6 Table 606 in the table shows an example of a sorted array with a extracted 1s. As shown in Table 606, the first 1 (i.e., the highest valid cell with a 1 (1)) in each column of Table 605 is maintained, and the remaining 1s (1) are replaced with zeros (0). Table 606 can now be used to extract the maximum value. The aforementioned process can be repeated for a sorted array of minimum values ​​504B to extract the minimum value.

[0101] To extract the minimum value 533 and the maximum value 531 from the minimum and maximum value arrays respectively, the final J rows are read from the final minimum value array, and the final K rows are read from the final maximum value array. One (1) The column appearing in each row corresponds to the element that is the J-th minimum or K-th maximum value. The last row is the minimum / maximum, and each higher row includes the minimum / maximum values ​​of the next permutation. For example, as... Figure 6 As shown in Table 606, column 612a3 has a lowest row 613b with a 1, meaning the column index corresponding to column 612a3 ("53" in this example) is the maximum value. Additionally, column 611a in Table 606 has a next lowest row 612b3 with a 1, meaning the column index corresponding to column 611a ("25" in this example) is the next maximum value. In some cases, rows can be all zeros. In such cases, the selected value is irrelevant because it will be marked as invalid by the valid array sorting logic 504C. For example, in Table 606, row 611b could be marked as invalid.

[0102] A valid qualifier for each of the minimum and maximum elements is generated by sorting the valid qualifiers from the input data (e.g., data valid signal 522) and the valid qualifiers from all previous minimum and maximum elements (e.g., previous minimum valid signal 523 and previous maximum valid signal 521). This is done using the valid qualifiers from previous data. Figure 6 The same technique used to sort each column within the table is employed. Therefore, valid qualifiers 521, 522, and 523 are arranged into the sorted valid array by valid array sorting logic 504C. By sorting the valid qualifiers 521, 522, and 523, equal numbers of minimum and maximum values ​​can be selected by using even values ​​for one qualifier and odd values ​​for the other. If unequal numbers of minimum and maximum values ​​are needed or preferred, one of different numbers of minimum and maximum values ​​can be selected by prioritizing the minimum or maximum values, selecting valid signals from the sorted valid signals, and then sorting or otherwise selecting from the unused valid signals. The newly sorted valid signals can then be used to qualify the remaining minimum / maximum values.

[0103] For example, with four (4) minimum values, four (4) maximum values, and eight (8) input values, the valid qualifier 0001(max)1001 1010(data)0011(min) can be sorted as: 00000000 0111 1111. Choosing an even index value for the minimum value will result in four (4) valid minimum values, and an odd index value will result in three (3) valid maximum values.

[0104] In many ways, Figure 5 The arrangement shown can be advantageous. One advantage is that the outlier detector 500 uses far fewer comparators than previous outlier detection designs used in existing image sensors. Another advantage is that the outlier detector 500 can be implemented entirely using combinational logic, which allows the value to be extracted without pipelining the data. This simultaneously saves power and circuit area, which are critical factors in designing low-coverage devices such as image sensors.

[0105] 3. Example outlier detection scenario

[0106] As mentioned above, various applications and / or scenarios can benefit from data sets (such as...) Figure 1 Outliers identified and / or removed from the dataset 111. An example outlier detection application / scenario may involve a set of pixel values ​​processed as part of a denoising algorithm. A denoising algorithm can be a computational technique used to enhance the quality of images, audio, communication signals, and / or other data by removing unwanted random variations or "noise" that blur the desired signal. The denoising algorithm identifies and suppresses noise while preserving as much of the original information as possible. In this example scenario, the noise to be reduced by such a denoising algorithm may be in the form of outlier pixel values ​​removed from the set of pixel values ​​for further processing. Example use cases for such denoising algorithms include digital photography, medical imaging, astronomy, surveillance systems, biometric processing, satellite imagery, video processing for object recognition and / or computer vision applications, industrial inspection processes, robotics, and autonomous vehicles.

[0107] In one example, an image array comprising a set of pixel values ​​can be generated based on captured images or when images are captured in real-time (or near real-time). When images are captured by an imaging sensor (such as imaging system 200), the maximum and minimum pixel values ​​of the image array can be extracted from the image array in real-time (or near real-time). These values ​​can be discarded and / or passed to another system or process for further processing and / or for other purposes. One objective is to remove outliers as quickly as possible to avoid storing pixel data before preprocessing or processing, thereby saving memory and computational resources. In this example, the imaging sensor can simultaneously generate and stream a set of eight pixel values, some of which may be valid or invalid depending on how they are read out. Four maximum and four minimum pixel values, or up to four maximum and four minimum pixel values, can be removed from this data stream for further statistical analysis. Outlier detection for this example scenario can be performed by ODC 102, as per [reference needed]. Figures 7 to 14 More detailed description.

[0108] Figure 7 Example comparison result table 700 is shown, which can be generated by... Figure 5 Comparator 501 is formed in the table. In this example, comparator 501 performs a greater than (">) comparison operation. Table 700 includes the following set of inputs: four previous maximum values ​​511 including the maximum value 0 in row 0 and column 0 ("max0"), the maximum value 1 in row 1 and column 1 ("max1"), the maximum value 2 in row 2 and column 2 ("max2"), and the maximum value 3 in row 3 and column 3 ("max3"); four previous minimum values ​​513 including the minimum value 0 in row 15 and column 15 ("min0"), the minimum value 1 in row 14 and column 14 ("min1"), the minimum value 2 in row 13 and column 13 ("min2"), and the minimum value in row 12 and column 13 ("min2"). The minimum value 3 in row 12 (“min3”); and eight data inputs 512 including data input 0 in row 4 and column 4 (“d0”), data input 1 in row 5 and column 5 (“d1”), data input 2 in row 6 and column 6 (“d2”), data input 3 in row 7 and column 7 (“d3”), data input 4 in row 8 and column 8 (“d4”), data input 5 in row 9 and column 9 (“d5”), data input 6 in row 10 and column 10 (“d6”), and data input 7 in row 11 and column 11 (“d7”). In this example, max0 has a value of 91, max1 has a value of 77, max2 has a value of 67, max3 has a value of 59, d0 has a value of 92, d1 has a value of 83, d2 has a value of 49, d3 has a value of 21, d4 has a value of 47, d5 has a value of 30, d6 has a value of 7, d7 has a value of 51, min3 has a value of 56, min2 has a value of 47, min1 has a value of 33, and min0 has a value of 13. Each input also has a corresponding valid signal / indicator 521, 522, 523. In this example, the valid signal for max0 is "false," indicating that the value of max0 is invalid; the valid signal for max1 is "true," indicating that the value of max1 is valid; and so on.

[0109] The comparison results are filled into each cell of table 700 by comparing the row index value of the current row with the column index values ​​of each column, starting from cell (0,0) and moving sequentially to cell (0,15). Each row is processed sequentially from row 0 to row 15. If a row index is compared with the same column index, or if the operation has already been performed, the comparison is skipped. Cells where comparisons are skipped are blank. In this example, table 700 is processed starting at cell (0,0), where the comparison of max0 with max0 is skipped, and therefore cell (0,0) is blank. Next, cell (0,1) is processed, where the value of max0 (91) is compared with the value of max1 (77). Since 91 is greater than 71, the value "true" is stored in cell (0,1). Next, cells (0,2) through (0,15) are processed in a similar manner, and the result of each comparison is stored in the corresponding cell. After processing row 0, process row 1 in a similar manner, starting at cell (1,0) and ending at cell (1,15). Note that because a comparison of max1 and max0 has already been performed (e.g., at cell (0,1)), the comparison operation for cell (1,0) is skipped, and because the comparison operation for cell (1,1) would involve comparing the same row and column indices (i.e., comparing max1 with max1), the comparison operation for that cell is also skipped.

[0110] Figure 8 An example of a maximum value array 800 (or "maximum value table 800") based on comparison result 700 is shown. This can be derived from... Figure 5 The maximum value table in table 700 forms element 502, resulting in maximum value array 800. In this example, the values ​​in each row of table 700 are inverted, and the inverted values ​​are placed in the corresponding column in table 800. However, if a value is invalid, the corresponding column in table 800 is filled with a "false" value. Additionally, each comparison of a value with itself is automatically filled with a "true" value, unless the value is indicated as invalid.

[0111] For example, because column 0 (max0) in Table 800 is invalid, it is filled with a "false" value, as indicated by the valid indicator signal corresponding to max0 in Table 700. The valid indicator signal corresponding to max1 in Table 700 is indicated as "true," and therefore, the value in row 1 (max1) in Table 700 is inverted and the inverted value is inserted into column 1 (max1) in Table 800. Here, because cell (1,1) in Table 800 involves a self-comparison (i.e., a comparison of max1 with max1), this cell retains a "true" value. Additionally, since cell (1,2) in Table 700 retains a value of "true," cell (2,1) in Table 800 retains its inverse (i.e., "false"). In another example, since cell (1,3) in Table 700 retains a value of "true," cell (3,1) in Table 800 retains a value of "false." In yet another example, since cell (1,4) in table 700 retains the value "false", cell (4,1) in table 800 retains the value "true".

[0112] Furthermore, it should be noted that the relative magnitude of data elements in Table 800 can be identified or determined by counting the number of cells in a column with "true" values. The column with the fewest "true" values ​​has the largest magnitude, the column with the most "true" values ​​has the smallest magnitude, and a column with zero "true" values ​​indicates an invalid data element. For example, the column with a single "true" value in Table 800 is column 4. The column index corresponding to column 4 is data element d0. Figure 7 As shown, d0 has a value of 92, which is Figure 7 The maximum number of all data element values ​​shown. As another example, column 5 with column index d1 contains two cells with a "true" value. Figure 7 As shown, d1 has a value of 91, which is the next maximum value after 92. As another example, column 15 corresponds to the data element min0 with a minimum value of 13 (among the valid data elements), and as... Figure 8 As shown, column 15 contains 10 cells with a "true" value.

[0113] Similarly, the relative magnitude of a data element in Table 800 can be identified or determined by counting the number of cells in a row with a "true" value, where the row with the fewest "true" values ​​has the smallest magnitude, the column with the most "true" values ​​has the largest magnitude, and a column with zero "true" values ​​indicates an invalid data element. For example, row 15 in Table 800 has a single cell with a "true" value, corresponding to data element min0. As described earlier, in the example depicted, min0 has the smallest magnitude among all data elements. As another example, row 4 includes 10 cells with "true" values. Row 4 corresponds to data element d0, which has the largest value as described earlier.

[0114] Figure 9 An example of a minimum value array 900 (or “minimum value table 900”) based on comparison results 700 and / or the maximum value array 800 is shown. The minimum value array 900 can be derived from... Figure 5 The minimum value table is generated by element 503. In this example, the minimum value array 900 is the transpose of the maximum value array 800. In other embodiments, the minimum value array 900 is generated by inverting the values ​​in each row of table 700 and placing those inverted values ​​in the corresponding rows of array 900. Similar to the maximum value array 800, if a value from table 700 is invalid, the corresponding row in table 900 is filled with a "false" value. Additionally, each comparison of a value with itself is automatically filled with a "true" value unless the value is indicated as invalid.

[0115] Similar to the maximum value array 800, the relative magnitude of data elements in table 900 can be identified or determined by counting the number of cells in a column with a "true" value. The column with the most "true" values ​​has the largest magnitude, the column with the fewest "true" values ​​has the smallest magnitude, and a column with zero "true" values ​​indicates an invalid data element. For example, the column in table 900 with a single "true" value is column 15, which, as mentioned earlier, corresponds to the data element min0 with a minimum value of 13. As another example, column 4, with column index d0, contains 10 cells with "true" values, and as mentioned earlier, d0 has a maximum value of 92.

[0116] Additionally, the relative magnitude of data elements in Table 800 can be identified or determined by counting the number of cells in rows with "true" values. The row with the most "true" values ​​has the smallest magnitude, the column with the fewest "true" values ​​has the largest magnitude, and the column with zero "true" values ​​indicates an invalid data element. For example, row 15 in Table 900 has the most cells with "true" values ​​and corresponds to the data element min0 with the smallest value, while row 4 in Table 900 has the fewest cells with "true" values ​​and corresponds to the data element d0 with the largest value.

[0117] Figure 10 The sorted maximum value table 1000 is shown, and Figure 11 The example sorted minimum value table 1100 is shown. The sorted maximum value table 1000 can be obtained from... Figure 5 The maximum value array sorting element 504A is generated, and the sorted minimum value table 1100 can be obtained from... Figure 5 The minimum value array sorting element 504B is generated. The maximum value arrays 800 and 900 are sorted to arrange the columns so that cells with "true" values ​​are arranged in a row facing the bottom of the table. And as previously discussed, the column with the fewest "true" values ​​in the sorted maximum value table 1000 represents the maximum value, and the column with the most "true" values ​​in the sorted maximum value table 1000 represents the minimum value. Similarly, the column with the fewest "true" values ​​in the sorted minimum value table 1100 represents the minimum value, and the column with the most "true" values ​​in the sorted maximum value table 1100 represents the maximum value. It should also be noted that the number of true values ​​in each column of each of the tables 800, 900, 1000, and 1100 is always unique.

[0118] Figure 12 An example of the extracted maximum value table 1200 is shown, and Figure 13 An example of the extracted minimum value table 1300 is shown. (This can be derived from...) Figure 5 The extractor and selector 105A in the middle generate the maximum value table 1200 of the extracted values, and can be used by... Figure 5 The extractor and selector 505B in the code generate the minimum extracted value table 1300. Figure 12 In this process, the position of the first (or topmost) true value in each column is extracted. For example, in Tables 1000 and 1200, the highest "true" value of min0 is located at cell (9, 15), and therefore the "true" value in cell (9, 15) is retained, while the remaining cells in column 15 are converted to "false" values. This can be done using suitable hardware components, such as an XOR gate. For example, each column in Table 1000 can be viewed as a binary number X, and binary number X can be right-shifted by 1 to produce binary number Y. To obtain the result Table 1200, X and Y are XORed (e.g., X⊕Y), which masks the highest value.

[0119] The maximum value 531 and the minimum value 533 can be identified and / or determined by reading the rows in Table 1200. The largest value corresponds to the column index in Table 1200 where its true value is located lowest (towards the bottom), and the smallest value corresponds to the column index in Table 1200 where its true value is located highest (towards the top). For example, in Table 1200, column 4 corresponding to data element d4 has a cell with a true value in row 0, which means the true value can be located lowest in Table 1200. Thus, d4 contains the maximum value. Additionally, the second largest value corresponds to the second lowest column index in Table 1200 where its true value is (e.g., d1 in column 5 of Table 1200), the third largest value corresponds to the third lowest column index in Table 1200 where its true value is (e.g., max1 in column 1 of Table 1200), and so on. As another example, the highest-ranking "true" value in Table 1200 is located in column 15, corresponding to the data element min0 whose "true" value is located in row 9. Thus, min0 includes the minimum value.

[0120] exist Figure 13 In Table 1300, the maximum value corresponds to the column index of the highest position in Table 1300 where its "true" value is located, and the minimum value corresponds to the column index of the lowest position in Table 1200 where its "true" value is located. For example, the lowest position "true" value is located in cell (0,15) in Table 1300, which corresponds to min0. Therefore, min0 corresponds to the minimum value in the dataset. Additionally, the second minimum value corresponds to the second lowest column index in Table 1300 where its "true" value is located (e.g., d5 in column 9 of Table 1300), the third minimum value corresponds to the third lowest column index in Table 1300 where its "true" value is located (e.g., min1 in column 14 of Table 1300), and so on. As another example, the highest position "true" value is located in cell (9,4) in Table 1300, which corresponds to d0, and the value of d0 corresponds to the maximum value 531.

[0121] After identifying the maximum and minimum values ​​in Tables 1200 and / or 1300, the following can be done: Figure 14 The maximum value is 531 and the minimum value is 533.

[0122] Figure 14 Example maximum value selection table 1401 is shown for selecting the maximum value 531 when not all values ​​are valid, and example minimum value selection table 1410 is shown for selecting the minimum value 533 when not all values ​​are valid. (This can be obtained from...) Figure 5 The extractor and selector 105A in the middle generate the maximum value selection table 1401, and can be used by... Figure 5 The extractor and selector 505B in the table generate the minimum value selection table 1410.

[0123] It can be obtained from Figure 12 The valid values ​​in Table 1200 are sorted so that all valid elements are placed on one side of Table 1401 as shown in the figure (note that they are not in...). Figure 14 The valid values ​​are shown in the table, thus generating a maximum value selection table 1401. Eight maximum valid values ​​are arranged in columns 0 through 7 of table 1401. The value of maximum value 531 is then selected based on a predefined or configured specific implementation or use case. In the example scenario described earlier, the four largest maximum values ​​(e.g., data elements d0, d1, max1, max3) are assigned to maximum value 531, and therefore, the next four maximum values ​​(e.g., data elements min3, d7, min2, min1) are masked, as shown in the maximum value masking table 1402. This results in a maximum value valid table 1403, showing the four data elements (e.g., data elements d0, d1, max1, max3) with the maximum values ​​assigned to maximum value 531. Maximum value valid table 1403 can represent the final output resulting from the sorting that occurs as shown in the maximum value masking table 1402.

[0124] In some implementations, the remaining four elements in the maximum value selection table 1401 (e.g., data elements d0, d1, max1, max3) can be the next four maximum elements, or they can be assigned to the minimum value 533. The position of the minimum value varies depending on the number of valid inputs. For example, if the maximum value selection table 1401 is expanded for all 16 inputs, the remaining four elements in the maximum value selection table 1401 (e.g., data elements d0, d1, max1, max3) may be the minimum value. Although it is possible to extract the minimum value from the maximum value selection table 1401, in some implementations it may be easier to extract the minimum value by using a separate table (such as the minimum value selection table 1410).

[0125] In this example scenario, the minimum value 533 can be selected using the minimum value selection table 1410. This can be achieved by selecting from... Figure 13 The valid values ​​in Table 1300 are sorted so that all valid elements are placed on one side of Table 1410 as shown in the figure (note that they are not in...). Figure 14The valid values ​​are shown in the table, thus generating a minimum value selection table 1410. Eight minimum valid values ​​are arranged in columns 7 to 0 of table 1410. The value of minimum value 533 is then selected based on a predefined or configured specific implementation or use case. In the example scenario described earlier, the four smallest minimum values ​​(e.g., data elements min2, min1, d5, min0) are assigned to minimum value 533, and therefore, the next four minimum values ​​(e.g., data elements max1, max3, min3, d7) are masked, as shown in minimum value masking table 1412. Because the remaining valid signals may not be correctly aligned, the "Vld_min" row in minimum value masking table 1412 takes the valid signals left after applying the "Max_msk" function (see, for example, the Max_msk row in maximum value masking table 1402). In some implementations, this step may be included based on the specific implementation of how the selection is made between minimum and maximum value outputs. In other implementations, this step may be skipped. This results in a minimum value valid table 1413, which shows four data elements (e.g., data elements min2, min1, d5, min0) with the minimum value assigned to the minimum value 533. The minimum value valid table 1413 may represent the final output resulting from the sorting that occurred as shown in the minimum value masking table 1412.

[0126] The example implementation discussed herein can be used to split valid signals, such as valid signals 541, 542, and 543, to determine the priority of selecting the minimum value 533 and / or the maximum value 531 when a certain number (less than eight in this example) of inputs are valid. For example, if three inputs are valid for the first loop / iteration, then (i) all valid signals are available for the maximum value 531 and all inputs are available as the maximum value 531, or (ii) every even number of valid signals is available for the maximum value 531 and every odd number of valid signals is available for the minimum value 533. In this example, two of the values ​​can be classified as the maximum value 531 and one value can be classified as the minimum value 533.

[0127] In some implementations, the number of values ​​to be selected for the maximum value 531 and the minimum value 533 may be scaled up or down depending on the specific use case or design choices. For example, some implementations may involve selecting one, two, or three values ​​for each of the maximum value 531 and the minimum value 533, while in other implementations, more than four values ​​may be selected for each of the maximum value 531 and the minimum value 533. However, the number of pixel values ​​to be selected for the maximum value 531 and the minimum value 533 may be limited based on the system clock rate and / or other constraints. It should also be noted that the number of values ​​selected for the maximum value 531 may differ from the number of values ​​selected for the minimum value 533. For example, four values ​​may be selected for the maximum value 531 and two values ​​for the minimum value 533, or vice versa. In some implementations, the number of values ​​selected for the maximum value 531 and the minimum value 533 may be dynamically selected based on calculated statistical analysis, such as when the calculated average has deviated from a certain error or standard deviation. Additionally or alternatively, the specific data elements or values ​​selected for the maximum value 531 and the minimum value 533 may be based on weighting or other parameters or conditions predefined or configured for downstream processing.

[0128] Figure 15 A method 1500 for performing outlier detection is illustrated, which can be performed by an outlier detection circuit (such as the previously discussed ODC 102 and / or outlier detector 500). The method begins at operation 1502, where the outlier detection circuit compares a data input (such as data input 512) with a previous maximum value and a previous minimum value (such as a previous maximum value 511 and a previous minimum value 513). At operation 1504, the outlier detection circuit forms at least one array based on the comparison results, such as a maximum value array and / or a minimum value array as previously discussed. At operation 1506, the outlier detection circuit sorts the at least one array according to one or more validity signals (such as a previous maximum value validity signal 521, a data validity signal 522, and / or a previous minimum value validity signal 523). At operation 1508, the outlier detection circuit extracts and / or selects at least one maximum value and at least one minimum value from the sorted at least one array, such as a maximum value output 531 and a minimum value output 533.

[0129] 4. Further comments

[0130] For the purposes of this disclosure, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to also include the plural forms. When used herein, the term “comprising” specifies the presence of the stated feature, integral, step, operation, element, and / or component, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups and / or combinations thereof. Additionally, the phrase “A and / or B” refers to (A), (B), or (A and B), and the phrase “A, B, and / or C” refers to (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C). The phrase “X” refers to one or more Xs, a set of Xs, or a plurality of Xs. As used herein, the term “each” means each member of a set or each member of a subset of a set. The phrases “in an embodiment,” “in some embodiments,” “in one specific embodiment,” “in some specific embodiments,” “in some examples,” and other similar phrases used herein may refer to one or more of the same or different embodiments, specific embodiments, and / or examples. In addition, terms such as “comprising,” “including,” and “having” are used in relation to this invention.

[0131] Furthermore, the reference in this document to “one or more processors” includes a group of processors that can be configured to perform one or more operations. Any combination of such a collection of processors can perform individual operations or a set of operations. This can include two or more GPUs, CPUs, TPUs, ASICs, FPGAs, or DSPs (or other hardware-based processing elements) or any combination thereof. It can also include cases where the processor has multiple processing cores. Therefore, the reference to “one or more” such devices does not require that all processing elements (or cores) in the collection must each perform all operations. Rather, unless explicitly stated otherwise, when a set of operations is indicated, any one or more processing elements (or cores) can perform different operations, and the different processing elements (or cores) can perform specific operations sequentially or in parallel.

[0132] Unless otherwise specified, the articles depicted in the accompanying drawings are not necessarily drawn to scale. In drawings that are not necessarily drawn to scale, similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts.

[0133] Although the techniques described herein have been illustrated with reference to specific embodiments / configurations, it should be understood that these are merely illustrative of the principles and applications of the techniques. Therefore, it should be understood that many modifications can be made to the exemplary embodiments, and other arrangements can be designed, without departing from the spirit and scope of the techniques as defined by the appended claims. By way of example only, components illustrated in a series arrangement may have complementary parallel configurations; similarly, components illustrated in a parallel arrangement may have complementary series configurations.

Claims

1. A method for performing outlier detection, the method comprising: The outlier detection circuit compares the data input with the previous maximum and minimum values ​​of the previous data input. At least one array is formed based on the comparison results using the outlier detection circuit; The outlier detection circuit sorts the at least one array based on one or more validity signals associated with the data input, the previous maximum value, and the previous minimum value; as well as The outlier detection circuit extracts at least one maximum value and at least one minimum value from at least one sorted array.

2. The method according to claim 1, wherein, The at least one array includes a maximum value array, and the formation includes: The comparison results are used to form the first portion of the maximum value array; and The second part of the maximum value array is formed based on the transpose of the first part.

3. The method according to claim 2, wherein, The maximum value array is a two-dimensional array, and the formation further includes: The first portion is formed such that the number of stored elements gradually decreases with each subsequent row in the maximum value array; and The second part is formed such that the number of stored elements gradually increases with each consecutive row in the maximum value array.

4. The method according to claim 2, wherein, The formation also includes: The predefined values ​​are stored in the main diagonal of the elements in the maximum value array.

5. The method of claim 2, wherein the at least one array further comprises a minimum value array, and the formation further comprises: The minimum value array is formed by transposing the maximum value array.

6. The method of claim 1, wherein each column in the at least one array corresponds to a corresponding data element in a set of data elements, and the set of data elements includes at least one data element from the data input, at least one data element from the previous maximum value, and at least one data element from the previous minimum value.

7. The method according to claim 6, wherein, The comparison includes: The initial data element from the set of data elements is compared with each other data element in the set of data elements; and Each other data element in the set of data elements is compared with each other data element in the set of data elements that has not yet been selected or compared, until all data elements in the set of data elements have been compared.

8. The method according to claim 6, wherein, Each row in the at least one array corresponds to a corresponding data element in the set of data elements, and the sorting includes: The valid data elements and invalid data elements in the data element set are identified according to one or more validity signals; Fill each cell in each column corresponding to an invalid data element with the first value; and Iterate over each row in each column that corresponds to a valid data element.

9. The method according to claim 8, wherein, Iterating over each row in each column corresponding to a valid data element includes: For each row corresponding to a valid data element, identify each array element in each column corresponding to a valid data element equal to the second value; For each identified array element, fill the lowest array element in each row storing the first value with the second value; and For each column corresponding to a valid data element, Perform a binary right shift operation on the column values, where the column values ​​are binary numbers defined by each element of the column; Inverse the column values ​​shifted to the right; and Perform a binary AND operation on the column value and the column value to be inverted.

10. The method according to claim 9, wherein, The extraction also includes: The data value of the column with the lowest row in the at least one array storing the second value is determined as the at least one maximum value; and The data value of the column with the highest row in the at least one array storing the second value is determined as the at least one minimum value.

11. An outlier detection circuit, the outlier detection circuit comprising: A comparator circuit configured to compare a data input with a previous maximum and a previous minimum value of a previous data input; An array forming circuit configured to form at least one array based on a comparison result; An array sorting circuit configured to sort the at least one array based on one or more validity signals; and A extractor circuit configured to extract at least one maximum value and at least one minimum value from at least one sorted array.

12. The outlier detection circuit according to claim 11, wherein, The at least one array includes a maximum value array, and the array forming circuit is configured to: The comparison results are used to form the first part of the maximum value array; as well as The second part of the maximum value array is formed based on the transpose of the first part.

13. The outlier detection circuit according to claim 12, wherein, The maximum value array is a two-dimensional array, and the array forming circuit is configured as follows: The first portion is formed such that the number of stored elements gradually decreases with each subsequent row in the maximum value array; and The second part is formed such that the number of stored elements gradually increases with each consecutive row in the maximum value array.

14. The outlier detection circuit according to claim 12, wherein, The array forming circuit is configured as follows: The predefined values ​​are stored in the main diagonal of the elements in the maximum value array.

15. The outlier detection circuit according to claim 12, wherein, The at least one array further includes a minimum value array, and the array forming circuit is configured to: The minimum value array is formed by transposing the maximum value array.

16. The outlier detection circuit of claim 11, wherein each column in the at least one array corresponds to a corresponding data element in a set of data elements, and the set of data elements includes at least one data element from the data input, at least one data element from the previous maximum value, and at least one data element from the previous minimum value.

17. The outlier detection circuit according to claim 16, wherein, The comparator circuit is configured as follows: The initial data element from the set of data elements is compared with each other data element in the set of data elements; and Each other data element in the set of data elements is compared with each other data element in the set of data elements that has not yet been selected or compared, until all data elements in the set of data elements have been compared.

18. The outlier detection circuit according to claim 16, wherein, Each row in the at least one array corresponds to a corresponding data element in the set of data elements, and the array sorting circuit is configured to: The valid data elements and invalid data elements in the data element set are identified according to one or more validity signals; Fill each cell in each column corresponding to an invalid data element with the first value; as well as Iterate over each row in each column that corresponds to a valid data element.

19. The outlier detection circuit according to claim 18, wherein, In order to iterate over each row in each column corresponding to a valid data element, the array sorting circuit is configured as follows: For each row corresponding to a valid data element, identify each array element in each column corresponding to a valid data element equal to the second value; For each identified array element, fill the lowest array element in each row storing the first value with the second value; as well as For each column corresponding to a valid data element, Perform a binary right shift operation on the column values, where the column values ​​are binary numbers defined by each element of the column; Inverse the column values ​​shifted to the right; and Perform a binary AND operation on the column value and the column value to be inverted.

20. The outlier detection circuit according to claim 19, wherein, The extractor circuit is configured as follows: The data value of the column with the lowest row in the at least one array storing the second value is determined as the at least one maximum value; as well as The data value of the column with the highest row in the at least one array storing the second value is determined as the at least one minimum value.

Images