Method and apparatus for multi-zone temperature control for jet impingement cooling of integrated circuit packages

Abstract

Methods and apparatus for multi-zone temperature control for jet impingement cooling of integrated circuit packages are disclosed. An exemplary system includes a first nozzle to direct a first portion of an impingement fluid toward an integrated circuit package; a second nozzle for directing a second portion of the impingement fluid toward the integrated circuit package; a first flow restrictor for controlling a first pressure of the impingement fluid provided to a first portion of the first nozzle; and a second flow restrictor for controlling a second pressure of the impingement fluid provided to a second portion of the second nozzle.

Description

Background Technology

[0001] Electronic components, such as microprocessors and integrated circuit packages, typically generate heat during operation. Excessive heat can degrade the performance, reliability, and / or expected lifespan of such electronic components, and may even lead to component failure. Therefore, in many cases, cooling systems are implemented to dissipate heat from such electronic components, thereby maintaining their operating temperature within an appropriate range. Some electronic components are cooled by heat dissipation / heat transfer through a fluid in contact with the component's interface. Sometimes, the fluid directly contacts the electronic component, increasing heat dissipation / heat transfer by eliminating the need for additional interface contact components. Attached Figure Description

[0002] Figure 1 An exemplary jet impingement cooling system constructed in accordance with the teachings disclosed herein is shown.

[0003] Figure 2 Another exemplary jet impingement cooling system constructed in accordance with the teachings disclosed herein is shown.

[0004] Figure 3 yes Figure 1 and / or Figure 2 A block diagram of an exemplary implementation of an exemplary controller circuit.

[0005] Figure 4 This indicates that it can be executed, instantiated, and / or implemented by an exemplary programmable circuit. Figure 3 A flowchart of exemplary machine-readable instructions and / or exemplary operations of the controller circuitry in the diagram.

[0006] Figure 5 This is a block diagram of an exemplary processing platform including programmable circuitry configured to execute, instantiate, and / or implement exemplary machine-readable instructions and / or implement... Figure 4 Exemplary operations in [the document] to implement Figure 3 The controller circuit in the middle.

[0007] Figure 6 yes Figure 5 A block diagram of an exemplary implementation of a programmable circuit.

[0008] Figure 7 yes Figure 5 A block diagram of another exemplary implementation of the programmable circuit.

[0009] Figure 8 This is a block diagram of an exemplary software / firmware / instruction distribution platform (e.g., one or more servers) used to distribute software, instructions, and / or firmware (e.g., corresponding to...) Figure 4The exemplary machine-readable instructions in the document are distributed to client devices associated with end users and / or consumers (e.g., for licensing, selling and / or using), retailers (e.g., for selling, reselling, licensing and / or re-licensing), and / or original equipment manufacturers (OEMs) (e.g., for inclusion in products that will be distributed to, for example, retailers and / or other end users (e.g., direct purchase customers)).

[0010] Throughout, the same reference numerals will be used to refer to the same or similar parts in all the accompanying drawings and written descriptions. The drawings are not necessarily drawn to scale. Detailed Implementation

[0011] As integrated circuit (IC) packages (e.g., semiconductor chips) shrink over time, their thermal density (e.g., heat generated per unit volume) increases in order to maintain the same or better performance. To cool such IC packages, direct fluid cooling (e.g., cooling the electronic components by directly contacting the fluid / liquid with the interface of the electronic components) is an option to reduce (e.g., prevent) overheating, throttling, and / or damage. Furthermore, direct fluid cooling can be used to control the temperature of the IC package (referred to herein as die temperature) for thermal testing.

[0012] One direct fluid cooling technique is jet impingement cooling. Jet impingement cooling involves supplying a liquid coolant (e.g., an impingement fluid) to one or more nozzles that generate jets of coolant that directly impinge on the surface of an IC package. In some cases, the IC package is waterproof / fluid-resistant, preventing the coolant from reaching the circuitry (e.g., transistors, interconnects, etc.) to avoid short circuits and / or other adverse effects. Additionally or alternatively, gaskets or seals are placed adjacent to the IC package such that the coolant only contacts the portion of the IC package spaced apart from the circuitry. Additionally or alternatively, the coolant may be a dielectric coolant that makes direct contact with the circuitry without causing a short circuit.

[0013] Some jet impingement cooling systems are single-phase systems, where the coolant remains in the same phase (e.g., liquid phase) throughout the process. Others are two-phase systems, where at least some of the coolant changes between liquid and gas phases. Both single-phase and two-phase jet impingement cooling systems provide significant localized cooling capabilities (heat transfer coefficients) across the entire IC package. Typically, the nozzle configuration and position in a jet impingement cooling system are tailored to target desired hot spots on the IC package. However, current implementations of jet impingement cooling systems are limited in their ability to rapidly and dynamically control the die temperature at certain locations on the IC package relative to other locations (e.g., a given hot spot).

[0014] One method for controlling or regulating the die temperature at different locations on a given IC package cooled by a jet impingement cooling system is to mix coolants of different temperatures before supplying the mixed coolant to the nozzles in the cooling system. In this way, the inlet temperature of the coolant supplied to any given nozzle can be controlled, thereby controlling the temperature at which the coolant impinges on the IC package and correspondingly controlling the die temperature of the package. Furthermore, in some cases, by supplying different mixtures of hot / warm and cold / cool coolants to different nozzles in the cooling system, associated locations on the IC package can be cooled to different degrees.

[0015] Controlling die temperature by mixing coolants with different input temperatures has several drawbacks or limitations. First, controlling the coolant inlet temperature by mixing two or more different (e.g., hot and cold) coolant sources requires multiple different valves for each different location in the IC package where die temperature control is needed. That is, for each location, zone, or area in the IC package where temperature control is required, at least two valves (one for the first temperature (e.g., hot) and one for the second temperature (e.g., cold)) are needed to produce a mixed coolant supplied to one or more nozzles associated with each location, zone, or area. Therefore, if the IC package is divided into four zones, at least eight valves are required. The need for so many valves increases the cost of such a cooling system and introduces complexity. Furthermore, the relatively large number of valves increases the space required to implement such a cooling system. In addition, the increased space requirement leads to valves being positioned further away from the nozzles, which can adversely affect the system's response time. Specifically, the die temperature response time is a function of valve position and the thermal mass of the hothead. Valves further away from the nozzle have significantly slower response times compared to valves closer to the nozzle. More specifically, experimental tests show that a valve located 1 meter away from the heat head slows down the die temperature response time by 600 milliseconds compared to a valve located close to the heat head (e.g., within 20 cm).

[0016] Another limitation of mixing coolants to control die temperature is that crosstalk can occur between different jets on the IC package due to impacts at different temperatures. After the jet from the nozzle initially impacts the IC package, it diffuses outward across the entire surface of the package. This outward diffusion of the coolant may extend toward and into other areas of the package surface that are directly impacted by another jet from another nozzle. If the two different nozzles are supplied with coolants at different inlet temperatures (based on different mixtures of hot and cold coolant sources), the diffusion of coolant from the first nozzle (impact at the first temperature) may disrupt the intended thermal operation of the coolant from the second nozzle (impact at the second temperature).

[0017] Another limitation of mixing coolants to control die temperature is that it is not a feasible two-phase cooling method. In fact, there is currently no known method to use a two-phase jet impingement cooling system to dynamically and independently control different areas of an IC package.

[0018] The examples disclosed herein overcome some or all of the limitations of mixing coolant to control die temperature. Specifically, as described below, some of the examples disclosed herein do not require at least two valves for each individually controlled area of ​​the IC package, but instead use only a single valve per area. Therefore, the disclosed examples can reduce cost and complexity compared to other methods. Furthermore, the fewer components also allow the disclosed examples to be implemented in a smaller space. Moreover, although the examples disclosed herein can be implemented in a smaller space (the valves are closer to the nozzles than in previously known systems), the valves can be placed further away from the nozzles than in known coolant mixing systems without concern about reduced response time, because the response time of the disclosed examples is decoupled from the fittings and the thermal mass of the hothead. In fact, experimental tests have shown that the examples disclosed herein can achieve response times approximately 3 to 4 times faster than known coolant mixing systems. Therefore, the examples disclosed herein offer greater flexibility while also improving efficiency compared to known coolant mixing systems. Additionally, some of the examples disclosed herein reduce (e.g., eliminate) crosstalk problems between different jets at different temperatures, because the inlet temperatures on the different nozzles used to provide different jets are substantially the same. Furthermore, the examples disclosed herein can be implemented in conjunction with a two-phase cooling system.

[0019] Experimental results show that the cooling capacity (e.g., heat transfer coefficient) of the coolant jet is linearly proportional to the jet velocity of the coolant at the associated nozzle outlet. Furthermore, the jet velocity of the coolant ejected from the nozzle is linearly proportional to the inlet pressure of the coolant supplied to the associated nozzle. In other words, as the inlet pressure of the coolant increases, the jet velocity ejected from the nozzle increases, which increases the heat transfer coefficient of the coolant. Similarly, as the inlet pressure decreases, the jet velocity decreases, which decreases the heat transfer coefficient of the coolant. Therefore, the die temperature at a given location of the IC package can be adjusted or controlled by regulating the inlet pressure of the coolant supplied to the associated nozzle (which provides the jet impinging at a given location). Moreover, such temperature control can be achieved while keeping the coolant temperature constant. Therefore, the same coolant (at the same temperature) can be supplied to different nozzles at different pressures to control the die temperature at different associated locations than the first location.

[0020] As disclosed herein, since peak loads typically do not occur simultaneously on all devices under test, dynamically controlling die temperature by adjusting the inlet pressure of the coolant supplied to the nozzle can reduce (e.g., minimize) capital costs. Furthermore, the examples disclosed herein are not limited to thermal testing but can also be used for the efficient and reliable cooling of IC packages implemented by end users (e.g., enterprise hyperscale, data centers, cloud service providers, etc.). More specifically, the examples disclosed herein enable end users to improve the thermal performance of exemplary cooling systems during periods of high load (e.g., by adjusting the inlet pressure) and reduce thermal performance when the system is idle, thereby improving energy efficiency. Additionally, reliably controlling die temperature to a specific setpoint with a relatively fast response time can reduce (e.g., minimize) package warpage and fatigue issues associated with thermomechanical cycles, thereby improving package reliability.

[0021] Figure 1 An exemplary jet impingement cooling system 100 constructed in accordance with the teachings disclosed herein is shown. The exemplary cooling system 100 includes two thermal cooling components 102. While two thermal cooling components 102 are shown, in other examples, the jet impingement cooling system 100 includes only one thermal cooling component 102. In other examples, the jet impingement cooling system 100 includes more than two thermal cooling components 102.

[0022] As shown in the example, each thermal cooling assembly 102 includes a chamber 104 operatively coupled to an associated nozzle plate 106. In this example, each nozzle plate in the nozzle plate 106 includes an associated nozzle array 108 and / or supports the associated nozzle array 108. Although both nozzle plates 106 are shown as including eight nozzles, the nozzle array 108 may include any suitable number of nozzles. Furthermore, in some examples, a first array of nozzles 108 (associated with a first thermal cooling assembly 102) may include a different number of nozzles than a second array of nozzles 108 (associated with a second thermal cooling assembly 102). In the example shown, the nozzles 108 are arranged to direct a jet of coolant 110 (e.g., impinging fluid or coolant) to a corresponding IC package (e.g., a first IC package 112 and a second IC package 114) within a corresponding chamber 104 of the respective thermal cooling assembly 102. In some examples, the thermal cooling assembly 102 is configured to perform thermal testing of the IC packages 112, 114. In such examples, each IC package 112, 114 is sometimes generally referred to as a device under test (DUT). In other examples, thermal cooling assembly 102 is configured to cool IC packages 112, 114 implemented for use by end users (e.g., enterprise hyperscale, data centers, cloud service providers, etc.). In the example shown, coolant 110 is water. However, in other examples, different liquid coolants 110 may be used. More specifically, in some examples, dielectric coolants are used.

[0023] exist Figure 1 In the example shown, the first IC package 112 includes a single semiconductor die 116 (e.g., a chip, a die) mounted to a package substrate 118. In contrast, the second IC package 114 includes two separate semiconductor dies 120, 122 (e.g., chips, die) mounted to a package substrate 124. In other examples, one or both of the IC packages 112, 114 may have a different number of semiconductor dies 116, 120, 122 than those shown. In this example, the IC packages 112, 114 are bare die packages, where the dies 116, 120, 122 are uncovered or exposed to direct impact from the coolant 110 from the nozzle array 108. However, in other examples, the dies 116, 120, 122 in one or both of the IC packages 112, 114 may be covered by a package cap (e.g., an integrated heatsink).

[0024] In this example, the first IC package 112 includes two separate regions 126 and 128 (divided by dashed lines) designated for independent temperature control. More specifically, the two regions 126 and 128 of the first IC package 112 correspond to different portions of a single semiconductor die 116. The second IC package 114 of the illustrated example also includes two separate regions 130 and 132 (divided by dashed lines) designated for independent temperature control. The two regions 130 and 132 of the second IC package 114 correspond to corresponding semiconductor dies in two different semiconductor dies 120 and 122. In other examples, different numbers of regions and / or regions of different sizes and / or locations may be designated for independent control in accordance with the teachings disclosed herein. In this example, each region is associated with four nozzles (e.g., cooled by four nozzles). However, in other examples, different numbers of nozzles (e.g., 1, 2, 3, 5, 6, 7, 8, etc.) may be associated with each region 126, 128, 130, 132. Furthermore, in some examples, there may be more nozzles associated with certain areas than with other areas.

[0025] As shown in the example, each thermal cooling assembly 102 includes a separate inlet port 134, which is fluidly coupled to a nozzle associated with each distinct region 126, 128, 130, 132 in the IC packages 112, 114. Therefore, in this example, each thermal cooling assembly 102 includes two inlet ports 134 corresponding to two corresponding regions 126, 128, 130, 132 in the associated IC packages 112, 114. Furthermore, in this example, each thermal cooling assembly 102 includes an outlet port 136. Although only one outlet port 136 is shown, the thermal cooling assembly 102 may include any number of outlet ports.

[0026] In some examples, coolant 110 is supplied to different inlet ports 134 via separate inlet channels 138, 140, 142, 144 (e.g., fluid lines, pipes). Coolant 110 is directed from inlet port 134 through nozzle plate 106 to nozzle 108. Before coolant 110 is removed from chamber 104 via outlet port 136, nozzle 108 generates a jet of coolant 110 impinging on IC packages 112, 114. In some examples, after leaving chamber 104, coolant 110 returns to tank 146 (e.g., a reservoir in the illustrated example) for reuse in the jet impingement cooling system 100.

[0027] More specifically, in some examples, a first pump 148 pumps coolant 110 from tank 146 to inlet channels 138, 140, 142, 144. In some examples, coolant 110 is pumped through filter 150 to remove particles or other impurities that may affect the operation of IC packages 112, 114. In some examples, coolant 110 also flows through flow meter 152 to monitor the flow of coolant 110. Furthermore, in this example, coolant 110 flows through heater 154 to heat coolant 110, after which coolant 110 is supplied to inlet channels 138, 140, 142, 144 leading to thermal cooling assembly 102. For illustrative purposes, the flow path of coolant 110 when heated (e.g., after flowing through heater 154 until exiting thermal cooling assembly 102 at outlet port 136) is represented by a thick solid line 153; while the coolant 110 when cooled is represented by a thick dashed line 155. As shown in the example, coolant 110 is cooled after leaving the thermal cooling assembly 102 because the coolant is mixed with additional coolant 110 that has already been pumped through the subcooler 156 by the second pump 158.

[0028] In the illustrated example, each of the inlet channels 138, 140, 142, and 144 includes a corresponding adjustable flow limiter 160, 162, 164, and 166. As used herein, the flow limiter includes any type of device capable of limiting or constraining the flow rate of fluid (e.g., coolant 110) through the channels (e.g., inlet channels 138, 140, 142, and 144) to regulate (e.g., reduce) the pressure of coolant 110 downstream of the flow limiter. In some examples, the flow limiters 160, 162, 164, and 166 are implemented using any suitable type of valve (e.g., proportional valve, solenoid valve, butterfly valve, needle valve, etc.). In the illustrated example, inlet channels 138, 140, 142, and 144 are the sole fluid lines supplying coolant 110 to nozzle 108. Therefore, in this example, the portion of coolant 110 supplied to any given nozzle necessarily flows through the corresponding inlet channels 138, 140, 142, 144, and thus through the corresponding flow restrictors 160, 162, 164, 166. In other words, the entire portion of coolant supplied to a given nozzle in the illustrated example flows through one of the corresponding flow restrictors 160, 162, 164, 166.

[0029] As described above, adjusting the downstream pressure of coolant 110 results in adjusting the inlet pressure at nozzle 108, which in turn leads to adjusting (e.g., proportionally adjusting) the jet velocity of coolant 110 exiting the nozzle. This adjustment of the jet velocity results in (e.g., proportionally adjusting) the heat transfer coefficient of coolant 110. Therefore, adjusting the flow limiters 160, 162, 164, and 166 can control the thermal cooling efficiency of the coolant 110 impacting IC packages 112 and 114. More specifically, by independently controlling different flow limiters 160, 162, 164, and 166, different die temperatures can be achieved for different regions 126, 128, 130, and 132. In this way, it is possible to perform different tests simultaneously (e.g., in parallel) at different temperatures in different regions, thereby significantly reducing the overall thermal testing time of the IC package.

[0030] In some examples, the highest or maximum pressure of the coolant 110 supplied to nozzle 108 corresponds to the pressure when flow restrictors 160, 162, 164, 166 are fully open. In such examples, the pressure is driven by a first pump 148 that pumps the coolant 110 through a jet impingement cooling system 100. In some examples, a first pressure sensor 168 (e.g., a pressure gauge) is provided to measure this pressure along the fluid line delivering the coolant 110 to heater 154. In other examples, the first pressure sensor 168 may be located in any other suitable location. Furthermore, in some examples, an additional pressure sensor 170 (e.g., a pressure gauge) is located downstream of flow restrictors 160, 162, 164, 166 to measure the inlet pressure of the coolant 110 supplied to nozzle 108. This contrasts with known mixing methods that involve pumping two separate coolant lines (one hot and one cold). Figure 1 The exemplary jet impingement cooling system 100 includes only a single input fluid line 171. Therefore, the exemplary system requires a low overall flow rate, resulting in reduced system energy consumption. In some examples, a chamber pressure sensor 172 is positioned to measure the pressure within chamber 104. Additionally, in some examples, a coolant tank pressure sensor 174 is provided to measure the pressure within tank 146. In some examples, one or more of the pressure sensors 168, 170, 172, and 174 are omitted.

[0031] like Figure 1As shown, the coolant 110 flowing through all four inlet channels 138, 140, 142, and 144 (e.g., along the same fluid line 171) originates from the same source heated by the same heater 154. Therefore, since the coolant is supplied by the common fluid line 171 upstream of the inlet channels 138, 140, 142, and 144, the different portions of coolant 110 supplied by each of the inlet channels 138, 140, 142, and 144 have the same temperature. Thus, the temperature of the coolant 110 supplied to any of the nozzles 108 is substantially the same as the temperature of the coolant 110 supplied to each of the other nozzles. Therefore, there is no need to consider crosstalk between the different jets, as the mixing of the jets does not change the temperature.

[0032] Figure 1 Another advantage of the exemplary jet impingement cooling system 100 is the ability to place flow limiters 160, 162, 164, 166 at any suitable distance from the corresponding inlet port 134 of the thermal cooling assembly 102. Therefore, although the second flow limiter 160 and the fourth flow limiter 166 are placed at different distances from the corresponding thermal cooling assembly 102 (both farther than the first flow limiter 160 and the third flow limiter 164), each flow limiter 160, 162, 164, 166 can still regulate the pressure of the coolant 110 supplied to the nozzle 108. Furthermore, the distance of the flow limiters 160, 162, 164, 166 from the nozzle 108 has a negligible effect on the spool temperature response time (unlike known methods of temperature control based on mixing coolants at different temperatures).

[0033] Exemplary jet impact cooling system (e.g.) Figure 1 The exemplary system 100 in the example can not only be used to independently control the temperature of different regions of an IC package in a reliable and efficient manner, but such an exemplary system can also be flexibly adapted to other situations that cannot be achieved using previously known cooling systems. For example, in Figure 1 In the example, the two semiconductor dies 120, 122 in the second IC package 114 have different heights, resulting in a die height difference 175 that may occur in 2.5D and / or 3D architectures (e.g., IC packages with high-bandwidth memory (HBM) stacks). Previously, thermal testing of dies with different heights was not possible, and dummy dies were required to provide die-to-die matching heights. However, the example disclosed herein can accommodate different die heights associated with different regions (e.g., by adjusting the inlet pressure of the coolant 110 to achieve an appropriate jet velocity corresponding to the distance between the dies as a function of the die height). Figure 1 (As shown in the illustration). Therefore, the exemplary jet impact cooling system 100 can simplify thermal testing of IC packages and reduce the cost of thermal testing in a way that was not previously realized.

[0034] In some examples, the jet impingement cooling system 100 is implemented as a two-phase cooling system. In some such examples, the pressure within chamber 104 is maintained below atmospheric pressure, such that the incoming coolant 110 (which is at an elevated temperature) will pass through the vapor dome and reach the two phases. In some such examples, the below-atmospheric pressure within chamber 104 is achieved by a vacuum pump 176 located downstream of chamber outlet port 136. In other examples, vacuum pump 176 is omitted.

[0035] In some examples, the jet impact cooling system 100 includes exemplary controller circuitry 178 (e.g., one or more microcontrollers) to control the operation of different aspects of the cooling system 100. More specifically, in Figure 1 In the example shown, each thermal cooling assembly 102 includes a separate controller circuit 178. In other examples, the same controller circuit 178 controls the operation of both thermal cooling assemblies 102. In some examples, the controller circuit 178 is communicatively coupled to corresponding flow limiters 160, 162, 164, 166 to regulate the downstream pressure of the coolant 110 supplied to the nozzle 108. Furthermore, in some examples, the controller circuit 178 is communicatively coupled to pressure sensors 170, 172 that provide input to the controller circuit 178 to determine how to regulate and / or control the flow limiters 160, 162, 164, 166.

[0036] In some examples, controller circuitry 178 determines when and how to adjust flow limiters 160, 162, 164, 166 based on temperature data obtained from one or more temperature sensors 180 (e.g., digital temperature sensors (DTS)). Temperature sensors 180 monitor the temperature of IC packages 112, 114 substantially in real time. That is, in some examples, controller circuitry 178 is communicatively coupled to temperature sensors 180. In this example, at least one temperature sensor 180 is included in each region 126, 128, 130, 132 of IC packages 112, 114 to provide a die temperature specific to the corresponding region. In some examples, multiple temperature sensors 180 are included in a given region 126, 128, 130, 132. In some examples, as shown in the illustrated example, temperature sensors 180 may be embedded within IC packages 112, 114. Additionally or alternatively, temperature sensors 180 may be on the outer surface of IC packages 112, 114. In some examples, the temperature sensor 180 is located near a location in or on the semiconductor dies 116, 120, 122 that is known (or expected) to generate a relatively large amount of heat (e.g., a location associated with a possible hot spot).

[0037] In some examples, controller circuitry 178 is also communicatively coupled to other components in the broader jet impingement cooling system 100 (e.g., one or more of pumps 148, 158, 176, other pressure sensors 168, 174, filter 150, flow meter 152, heater 154, and / or subcooler 156) to monitor and / or control the flow, movement, and / or temperature of the coolant throughout the system 100. In some examples, controller circuitry, separate from the circuitry monitoring and controlling flow limiters 160, 162, 164, 166, monitors and controls these other components. In other words, in some examples, controller circuitry 178 may be partitioned into different controllers implemented by different hardware in different locations. In other examples, some or all of the operation of controller circuitry 178 may be implemented by a single piece of hardware. Therefore, although Figure 1 Two boxes are used to illustrate the controller circuitry 178 coupled to the respective external components of the two thermal cooling assemblies 102, but the controller circuitry 178 can be in any other suitable location and can be combined in one box and / or distributed in three or more boxes at different locations (e.g., different from the location shown). The following is in conjunction with... Figure 3 and Figure 4 Further details regarding an implementation of the exemplary controller circuit 178 are provided.

[0038] Figure 2 Another exemplary jet impingement cooling system 200 constructed in accordance with the teachings disclosed herein is shown. Figure 2 The exemplary jet impact cooling system 200 in the example and Figure 1 The exemplary jet impingement cooling system 100 is substantially the same as that described below and / or clearly visible in the context. Therefore, it is similar to... Figure 1 The corresponding features are the same or similar Figure 2 The features shown are identified by the same reference numerals. Furthermore, the above text is combined with… Figure 1 The description of such characteristics also applies to Figure 2 The corresponding features in.

[0039] Figure 2 Examples and Figure 1 The difference in the examples is that, Figure 2 The example of the jet impingement cooling system 200 enables independent control of the temperature of the coolant 110 supplied to each thermal cooling component 102. (As described above...) Figure 1The coolant 110 discussed is supplied at a constant temperature to each of the different inlet channels 138, 140, 142, 144. Therefore, the temperature of the coolant 110 supplied to each nozzle 108 is substantially the same. The advantage of this implementation is the elimination of crosstalk between different jets on the IC packages 112, 114 caused by shocks at different temperatures. However, this only concerns jets within the same chamber 104 of the same thermal cooling assembly 102. Accordingly, in Figure 2 In the example shown, the coolant temperature supplied to each thermal cooling component 102 can be controlled independently.

[0040] More specifically, such as Figure 2 As shown, the exemplary jet impingement cooling system 200 includes a cold coolant line 202 and a heated coolant line 204, which can be mixed in any suitable manner via a first mixing valve 206 and a second mixing valve 208. In this example, the first mixing valve 206 supplies to a first fluid line 210, which is a common fluid line to both a first inlet channel 138 and a second inlet channel 140 associated with the first thermal cooling assembly 102, and the second mixing valve 208 supplies to a second fluid line 212, which is a common fluid line to both a third inlet channel 142 and a fourth inlet channel 144 associated with the second thermal cooling assembly 102. Thus, although the temperatures of the first fluid line 210 and the second fluid line 212 can be different (and independently controlled), the same temperature is provided to each nozzle of the nozzle 108 in a given thermal cooling assembly 102. In some examples, mixing valves 206, 208 are communicatively coupled to and controlled by controller circuitry 178. This allows for greater flexibility in conducting thermal tests by setting different baseline temperatures for the coolant 110 supplied to each thermally cooled component 102. The die temperatures of different regions 126, 128, 130, 132 can still be independently controlled by adjusting the corresponding flow limiters 160, 162, 164, 166 associated with each region. Specifically, as described above, adjusting the flow limiters 160, 162, 164, 166 changes the inlet pressure of the coolant 110 supplied to the nozzle, thereby proportionally changing the jet velocity exiting the nozzle, which in turn affects the heat transfer coefficient of the coolant impacting the corresponding regions 126, 128, 130, 132 of the IC packages 112, 114.

[0041] Figure 3 It dynamically and independently controls the die temperature in different areas of the IC package. Figure 1 and / or Figure 2 A block diagram of an exemplary embodiment of the controller circuit 178. Figure 3The controller circuit 178 can be instantiated (e.g., created, made effective for any length of time, implemented, enforced, etc.) by a programmable circuit (e.g., a central processing unit (CPU) that executes the first instruction). Additionally or alternatively, Figure 3 The controller circuit 178 can be instantiated (e.g., instantiated, made active for any length of time, implemented, enforced, etc.) by (i) an application-specific integrated circuit (ASIC) and / or (ii) a field-programmable gate array (FPGA) constructed and / or configured in response to a second instruction that performs an operation corresponding to the first instruction. It should be understood that... Figure 3 Some or all of the circuits in the system can therefore be instantiated at the same or different times. Figure 3 Some or all of the circuitry can be instantiated, for example, in one or more threads that execute in parallel and / or serially on hardware. Furthermore, in some examples, Figure 3 Some or all of the circuitry can be implemented by microprocessor circuitry for implementing the execution instructions of one or more virtual machines and / or containers and by FPGA circuitry for performing operations.

[0042] like Figure 3 As shown in the example, the controller circuit 178 includes an exemplary user interface circuit 302, an exemplary coolant control circuit 304, an exemplary sensor interface circuit 306, an exemplary flow limiter control circuit 308, an exemplary setpoint comparison circuit 310, an exemplary nozzle flow determiner circuit 312, and an exemplary memory 314.

[0043] The exemplary controller circuit 178 is provided with an exemplary user interface circuit 302 to enable a user to provide input to the controller circuit 178, thereby defining parameters for the operation of the exemplary jet impact cooling system 100, 200. For example, in some examples, the user can provide a coolant temperature setpoint via the user interface circuit 302, to which the coolant 110 will be heated by the heater 154. Additionally or alternatively, in some examples, the user can provide multiple coolant temperature setpoints for each thermal cooling component 102 to which coolant 110 is to be supplied via the user interface circuit 302. In some such examples, the temperature setpoints define the use of a coolant temperature setpoint associated with each thermal cooling component 102. Figure 2 The mixing valve 206 in the IC package is used to mix the coolant 110 at different temperatures. Additionally, in some examples, the user can provide different die temperature setpoints to be controlled for different areas of the IC package via the user interface circuit 302. In some examples, the coolant temperature setpoint is defined by and / or determined based on the die temperature setpoint.

[0044] Additionally, in some examples, the user can provide the baseline pressure or flow rate of the coolant 110 to be pumped through the exemplary jet impingement cooling system 100, 200 via the user interface circuitry 302. In some examples, system parameters and / or other inputs received from the user via the user interface circuitry 302 are stored in the exemplary memory 314. In some examples, the user interface circuitry 302 also enables the output of information to the user regarding the operation of the jet impingement cooling system 100, 200. In some examples, the user interface circuitry 302 is instantiated and / or configured to perform actions such as those described by programmable circuitry executing user interface instructions. Figure 4 The flowchart in the diagram represents the operations performed.

[0045] In some examples, controller circuit 178 includes means for obtaining setpoint values ​​(e.g., die temperature setpoint, coolant inlet temperature setpoint, etc.). For example, the means for obtaining these values ​​may be implemented by user interface circuitry 302. In some examples, user interface circuitry 302 may be implemented via means such as... Figure 5 The exemplary programmable circuit 512 in the example can be instantiated using programmable circuitry. For example, the user interface circuit 302 can be instantiated using... Figure 6 The execution of machine-executable instructions (e.g., by...) Figure 4 The exemplary microprocessor 600 is instantiated by at least those instructions implemented in block 402. In some examples, the user interface circuitry 302 can be instantiated by hardware logic circuitry, which can be provided by... Figure 7 The user interface circuitry 700 is implemented and / or configured to perform operations corresponding to machine-readable instructions. Additionally or alternatively, the user interface circuitry 302 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the user interface circuitry 302 can be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, XPU, comparator, operational amplifier, logic circuitry, etc.) configured and / or configured to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally applicable.

[0046] The exemplary controller circuit 178 is provided with an exemplary coolant control circuit 304 to control the flow rate and / or temperature of the coolant 110 circulating through the jet impact cooling system 100. That is, in some examples, the coolant control circuit 304 generates and / or provides command signals to control the operation of one or more of the pumps 148, 158, 176 to regulate and / or control the flow rate of the coolant 110 and / or the associated maximum coolant pressure. Additionally or alternatively, in some examples, the coolant control circuit 304 generates and / or provides command signals to control the operation of the heater 154 to regulate and / or control the temperature of the heated coolant 110. Furthermore, in some examples, the coolant control circuit 304 generates and / or provides control signals to the mixing valve 206 (… Figure 2 The coolant control circuit 304 is configured to perform operations such as issuing command signals to regulate and / or control the temperature of the coolant 110 supplied to a given thermal cooling component 102. In some examples, the coolant control circuit 304 is instantiated and / or configured to perform operations such as those by programmable circuitry that executes coolant control instructions. Figure 4 The flowchart in the diagram represents the operations performed.

[0047] In some examples, controller circuit 178 includes means for regulating the characteristics of the coolant (e.g., means for regulating the input temperature of the coolant, means for regulating the flow rate of the coolant, etc.). For example, the means for regulation can be implemented by coolant control circuit 304. In some examples, coolant control circuit 304 can be implemented by programmable circuitry (e.g.,...). Figure 5 The exemplary programmable circuit 512 in the example can be instantiated. For example, the coolant control circuit 304 can be instantiated by... Figure 6 The execution of machine-executable instructions (e.g., by...) Figure 4 The exemplary microprocessor 600 is instantiated by at least those instructions implemented in block 404. In some examples, the coolant control circuit 304 can be instantiated by hardware logic circuitry, which can be provided by... Figure 7 The ASIC, XPU, or FPGA circuitry 700 is implemented and / or configured to perform operations corresponding to machine-readable instructions. Additionally or alternatively, the coolant control circuitry 304 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the coolant control circuitry 304 can be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, XPU, comparator, operational amplifier, logic circuitry, etc.) configured and / or configured to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally applicable.

[0048] The exemplary controller circuit 178 is provided with an exemplary sensor interface circuit 306 for communicating with and receiving sensor data from one or more sensors implemented in the exemplary jet impingement cooling systems 100, 200. For example, in some examples, the sensor interface circuit 306 receives pressure data from one or more of pressure sensors 168, 170, 172, 174. Additionally or alternatively, in some examples, the sensor interface circuit 306 receives temperature data from one or more temperature sensors 180. Furthermore, in some examples, the sensor interface circuit 306 receives flow data from a flow meter 152 and / or additional sensor data from sensors associated with pumps 148, 158, 176, filter 150, and / or heater 154. In some examples, the sensor interface circuit 306 is instantiated and / or configured to perform actions such as those by a programmable circuit that executes sensor interface instructions. Figure 4 The flowchart in the diagram represents the operations performed.

[0049] In some examples, controller circuitry 178 includes means for acquiring sensor data (e.g., means for acquiring temperature data (e.g., current (measured) temperature), means for acquiring pressure data, etc.). For example, the means for acquiring this data can be implemented by sensor interface circuitry 306. In some examples, sensor interface circuitry 306 can be implemented via, for example... Figure 5 The exemplary programmable circuit 512 in the example can be instantiated using programmable circuitry. For example, the sensor interface circuit 306 can be instantiated using... Figure 6 The execution of machine-executable instructions (e.g., by...) Figure 4 The exemplary microprocessor 600 may be instantiated using at least those instructions implemented in block 406. In some examples, the sensor interface circuitry 306 may be instantiated using hardware logic circuitry, which may be configured and / or constructed as... Figure 7 The sensor interface circuit 306 is implemented by an ASIC, XPU, or FPGA circuit 700 that performs operations corresponding to machine-readable instructions. Alternatively or additionally, the sensor interface circuit 306 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the sensor interface circuit 306 can be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, XPU, comparator, operational amplifier, logic circuitry, etc.) configured and / or constructed to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally applicable.

[0050] The exemplary controller circuit 178 includes an exemplary flow limiter control circuit 308 for communicating with and / or controlling the flow limiters 160, 162, 164, and 166. That is, in some examples, the flow limiter control circuit 308 generates and / or provides command signals to control and / or regulate the flow limiters 160, 162, 164, and 166, thereby regulating and / or controlling the downstream pressure of the coolant 110 (e.g., the inlet pressure of the coolant 110 supplied to the nozzle 108). Furthermore, in some examples, the flow limiter control circuit 308 receives signals from the flow limiters 160, 162, 164, and 166 indicating the state or position of the flow limiter (e.g., the degree to which the flow limiter is open or closed). In some examples, the flow limiter control circuit 308 is instantiated and / or configured to perform actions such as those described by a programmable circuit that executes flow limiter interface instructions. Figure 4 The flowchart in the diagram represents the operations performed.

[0051] In some examples, controller circuit 178 includes means for regulating and / or controlling the flow limiter. For example, the means for regulating and / or controlling may be implemented by flow limiter control circuit 308. In some examples, flow limiter control circuit 308 may be implemented using programmable circuitry (e.g.,...). Figure 5 The exemplary programmable circuit 512 in the example can be instantiated. For example, the flow limiter control circuit 308 can be instantiated by... Figure 6 The execution of machine-executable instructions (e.g., by...) Figure 4 The exemplary microprocessor 600 may be instantiated using at least those instructions implemented in blocks 414, 416, and 418. In some examples, the flow limiter control circuit 308 may be instantiated using hardware logic circuitry, which may be provided by... Figure 7 The flow limiter control circuit 308 is implemented and / or configured to perform operations corresponding to machine-readable instructions by the ASIC, XPU, or FPGA circuit 700. Additionally or alternatively, the flow limiter control circuit 308 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the flow limiter control circuit 308 can be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, XPU, comparator, operational amplifier, logic circuitry, etc.) configured and / or configured to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally applicable.

[0052] The exemplary controller circuit 178 is provided with an exemplary setpoint comparison circuit 310 to compare a measured value (e.g., received from a sensor via sensor interface circuit 306) with a setpoint value (e.g., specified by a user via user interface circuit 302 and stored in memory 314). In some examples, such a comparison is used to determine when changes are needed to the operation of the jet impact cooling system 100, 200. For example, when a measured value deviates from an associated setpoint, the setpoint comparison circuit 310 identifies the deviation and can cause the coolant control circuit 304 and / or the flow limiter control circuit 308 to adjust the device so that the measured value moves toward the associated setpoint. In some examples, the setpoint comparison circuit 310 is instantiated by a programmable circuit that executes setpoint comparison instructions and / or is configured to perform actions such as those described by... Figure 4 The flowchart in the diagram represents the operations performed.

[0053] In some examples, controller circuit 178 includes means for comparing measured data with a corresponding setpoint (e.g., means for comparing a measured temperature with a temperature setpoint, etc.). For example, the means for determining this setpoint can be implemented by setpoint comparison circuit 310. In some examples, setpoint comparison circuit 310 can be implemented using, for example... Figure 5 The exemplary programmable circuit 512 in the example can be instantiated by a programmable circuit. For example, the setpoint comparison circuit 310 can be instantiated by... Figure 6 The execution of machine-executable instructions (e.g., by...) Figure 4 The exemplary microprocessor 600 may be instantiated using at least those instructions implemented in blocks 408, 410, 416, and 418. In some examples, the setpoint comparison circuit 310 may be instantiated using hardware logic circuitry, which may be provided by... Figure 7 The ASIC, XPU, or FPGA circuitry 700 is implemented and / or configured to perform operations corresponding to machine-readable instructions. Additionally or alternatively, the set-point comparison circuitry 310 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the set-point comparison circuitry 310 can be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, XPU, comparator, operational amplifier, logic circuitry, etc.) configured and / or configured to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally applicable.

[0054] The exemplary controller circuit 178 is provided with an exemplary nozzle flow rate determiner circuit 312 for determining flow parameters or characteristics of the coolant 110 as it flows through the nozzle 108. In some examples, such parameters include the inlet pressure of the coolant 110 supplied to the nozzle 108 and / or the jet velocity ejected by the nozzle. As described above, these parameters are correlated such that the nozzle flow rate determiner circuit 312 can determine only one of them directly. In some examples, the nozzle flow rate determiner circuit 312 determines these parameters based on the die temperature setpoint of each region 126, 128, 130, 132 of the IC packages 112, 114. Additionally or alternatively, the nozzle flow rate determiner circuit 312 determines these parameters based on a comparison of measured values ​​with a setpoint provided by the setpoint comparison circuit 310. In some examples, the flow characteristics of the coolant at the nozzle are not specifically determined. Instead, the flow characteristics are automatically adjusted only in response to the deviation between the measured spool temperature and the setpoint spool temperature (e.g., by adjusting flow limiters 160, 162, 164, 163). That is, in some examples, the specific inlet pressure of the coolant 110 and / or the resulting jet velocity are not pre-calculated by the nozzle flow determiner circuit 312, but are simply derived by implementing the control loop. In some such examples, the nozzle flow determiner circuit 312 can be omitted. In some examples, the nozzle flow determiner circuit 312 is instantiated and / or configured to perform actions such as those by a programmable circuit that executes nozzle flow determiner instructions. Figure 4 The flowchart in the diagram represents the operations performed.

[0055] In some examples, controller circuit 178 includes means for determining nozzle flow characteristics (e.g., means for determining the inlet pressure of the coolant to the nozzle, means for determining the jet velocity exiting the nozzle, etc.). For example, the means for determining these characteristics can be implemented by nozzle flow rate determiner circuit 312. In some examples, nozzle flow rate determiner circuit 312 can be implemented by programmable circuitry (e.g.,...). Figure 5 The exemplary programmable circuit 512 in the example can be instantiated. For example, the nozzle flow determiner circuit 312 can be instantiated by... Figure 6 The execution of machine-executable instructions (e.g., by...) Figure 4 The exemplary microprocessor 600 may be instantiated using at least those machine-executable instructions implemented in blocks 416, 418. In some examples, the nozzle flow determiner circuit 312 may be instantiated using hardware logic circuitry, which may be provided by... Figure 7The ASIC, XPU, or FPGA circuitry 700 is implemented and / or configured to perform operations corresponding to machine-readable instructions. Additionally or alternatively, the nozzle flow rate determiner circuitry 312 can be instantiated by any other combination of hardware, software, and / or firmware. For example, the nozzle flow rate determiner circuitry 312 can be implemented by at least one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, XPU, comparator, operational amplifier, logic circuitry, etc.) configured and / or configured to execute some or all of the machine-readable instructions and / or perform some or all of the operations corresponding to the machine-readable instructions without executing software or firmware, but other configurations are equally applicable.

[0056] Although Figure 3 The implementation is shown in the figure. Figure 1 and / or Figure 2 The controller circuit 178 in the example is in an exemplary manner, but Figure 3 One or more of the elements, processes, and / or devices shown may be combined, divided, rearranged, omitted, removed, and / or implemented in any other way. Furthermore, the exemplary user interface circuit 302, the exemplary coolant control circuit 304, the exemplary sensor interface circuit 306, the exemplary flow limiter control circuit 308, the exemplary setpoint comparison circuit 310, the exemplary nozzle flow determiner circuit 312, and the exemplary memory 314, and / or more generally, Figure 3 The exemplary controller circuit 178 can be implemented by hardware alone or by hardware in combination with software and / or firmware. Therefore, for example, any of the exemplary user interface circuit 302, exemplary coolant control circuit 304, exemplary sensor interface circuit 306, exemplary flow limiter control circuit 308, exemplary setpoint comparison circuit 310, exemplary nozzle flow determiner circuit 312, and exemplary memory 314, and / or more generally, the exemplary controller circuit 178 can be implemented by programmable circuitry in combination with machine-readable instructions (e.g., firmware or software), processor circuitry, analog circuitry, digital circuitry, logic circuitry, programmable processors, programmable microcontrollers, graphics processors (GPUs), digital signal processors (DSPs), ASICs, programmable logic devices (PLDs), and / or field-programmable logic devices (FPLDs) (e.g., FPGAs). Furthermore, Figure 3 The exemplary controller circuit 178 in the example may include, in addition to Figure 3 Other than those shown or in lieu of the above Figure 3 One or more elements, processes and / or devices shown, and / or may include more than one of any or all of the elements, processes and devices shown.

[0057] Figure 4 The diagram shows a flowchart illustrating exemplary machine-readable instructions that can be executed by programmable circuitry to implement and / or instantiate them. Figure 3 The controller circuit 178 in the figure, and / or may represent a circuit that can be executed by a programmable circuit to implement and / or instantiate. Figure 3 Exemplary operation of controller circuit 178 in the example. Machine-readable instructions can be generated by programmable circuitry (e.g., in conjunction with the following). Figure 5 The programmable circuit 512 shown in the exemplary processor platform 500 discussed herein executes one or more executable programs or portions thereof, and / or may be executed by the following combination Figure 6 and / or Figure 7 The exemplary programmable circuits discussed (e.g., FPGAs) perform one or more functions or portions of functions. In some examples, machine-readable instructions cause operations, tasks, etc., to operate and / or be performed automatically in the real world. As used herein, “automatic” means without human intervention.

[0058] The program may be embodied in instructions (e.g., software and / or firmware) stored on one or more non-transitory computer-readable and / or machine-readable storage media, such as cache memory, magnetic storage devices or disks (e.g., floppy disks, hard disk drives (HDDs), etc.), optical storage devices or disks (e.g., Blu-ray discs, compact discs (CDs), digital multimedia discs (DVDs), etc.), redundant arrays of independent disks (RAID), registers, ROM, solid-state drives (SSDs), SSD memory, non-volatile memory (e.g., electrically erasable programmable read-only memory (EEPROM), flash memory, etc.), volatile memory (e.g., random access memory (RAM) of any type), and / or any other storage device or disk. The instructions on the non-transitory computer-readable and / or machine-readable media may be programmed and / or executed by programmable circuitry located in one or more hardware devices, but the entire program and / or portions thereof may alternatively be executed and / or instantiated and / or embodied in dedicated hardware by one or more hardware devices other than programmable circuitry. Machine-readable instructions can be distributed across multiple hardware devices and / or executed by two or more hardware devices (e.g., server and client hardware devices). For example, client hardware devices can be implemented by endpoint client hardware devices (e.g., hardware devices associated with human and / or machine users) or intermediate client hardware device gateways (e.g., radio access networks (RANs)) that facilitate communication between the server and endpoint client hardware devices. Similarly, non-transitory computer-readable storage media can include one or more media. Furthermore, although the exemplary program is for reference only... Figure 4The flowchart shown is used to describe the implementation of the exemplary controller circuit 178, but many other methods can be used alternatively. For example, the execution order of the blocks in the flowchart can be changed, and / or some of the blocks described can be changed, removed, or combined. Additionally or alternatively, any or all blocks in the flowchart can be implemented by one or more hardware circuits (e.g., processor circuitry, discrete and / or integrated analog and / or digital circuitry, FPGA, ASIC, comparator, operational amplifier, logic circuitry, etc.) configured to perform the corresponding operation without executing software or firmware. The programmable circuitry can be distributed across different network locations and / or local to one or more hardware devices (e.g., a single-core processor (e.g., a single-core CPU), a multi-core processor (e.g., a multi-core CPU, XPU, etc.)). For example, the programmable circuitry can be a CPU and / or FPGA located in the same package (e.g., the same integrated circuit (IC) package or two or more separate housings), one or more processors in a single machine, multiple processors distributed across multiple servers in a server rack, multiple processors distributed across one or more server racks, and / or any combination thereof.

[0059] The machine-readable instructions described herein may be stored in one or more of the following formats: compressed format, encrypted format, segmented format, compiled format, executable format, packaged format, etc. The machine-readable instructions described herein may be stored as data (e.g., computer-readable data, machine-readable data, one or more bits (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), bit streams (e.g., computer-readable bit streams, machine-readable bit streams, etc.)) or data structures (e.g., as part of instructions, code, code representations, etc.). For example, machine-readable instructions may be segmented and stored on one or more storage devices, disks, and / or computing devices (e.g., servers) located at the same or different locations (e.g., in the cloud, edge devices, etc.) within a network or network set. Machine-readable instructions may require one or more of the following to be installed, modified, adapted, updated, combined, supplemented, configured, decrypted, decompressed, unpacked, distributed, redistributed, compiled, etc., so that they can be directly read, interpreted, and / or executed by computing devices and / or other machines. For example, machine-readable instructions may be stored in multiple parts that are individually compressed, encrypted, and / or stored on separate computing devices, wherein the parts, when decrypted, decompressed, and / or combined, form a set of computer-executable and / or machine-executable instructions that implement one or more functions and / or operations that may together form a program such as that described herein.

[0060] In another example, machine-readable instructions may take the form of a state store that can be read by programmable circuitry, but require the addition of libraries (e.g., dynamic link libraries (DLLs)), software development kits (SDKs), application programming interfaces (APIs), etc., to execute the machine-readable instructions on a specific computing device or other device. In yet another example, machine-readable instructions may require configuration (e.g., stored settings, data input, recorded network addresses, etc.) before the machine-readable instructions and / or corresponding programs can be executed, in whole or in part. Therefore, as used herein, computer-readable and / or machine-readable media may include instructions and / or programs, regardless of their specific format or state.

[0061] The machine-readable instructions described in this article can be represented by any past, present, or future instruction language, scripting language, programming language, etc. For example, machine-readable instructions can be represented using any of the following languages: C, C++, Java, C#, Perl, Python, JavaScript, Hypertext Markup Language (HTML), Structured Query Language (SQL), Swift, etc.

[0062] As mentioned above, Figure 4The exemplary operations described herein can be implemented using executable instructions (e.g., computer-readable and / or machine-readable instructions) stored on one or more non-transitory computer-readable and / or machine-readable media. As used herein, the terms “non-transitory computer-readable medium,” “non-transitory computer-readable storage medium,” “non-transitory machine-readable medium,” and / or “non-transitory machine-readable storage medium” are expressly defined to include any type of computer-readable storage device and / or storage disk, but exclude propagating signals and transmission media. Examples of such non-transitory computer-readable media, non-transitory computer-readable storage media, non-transitory machine-readable media, and / or non-transitory machine-readable storage media include optical storage devices, magnetic storage devices, HDDs, flash memory, read-only memory (ROM), CDs, DVDs, cache memory, any type of RAM, registers, and / or any other storage device or storage disk in which information is stored for any duration (e.g., extended time period, permanent, transient, for temporary buffering, and / or for caching information). As used herein, the terms "non-transitory computer-readable storage device" and "non-transitory machine-readable storage device" are defined as including any physical (mechanical, magnetic, and / or electrical) hardware used to retain information for a period of time, but excluding the propagation of signals and transmission media. Examples of non-transitory computer-readable storage devices and / or non-transitory machine-readable storage devices include any type of random access memory, any type of read-only memory, solid-state memory, flash memory, optical disc, magnetic disk, disk drive, and / or redundant array of independent disks (RAID) system. As used herein, the term "device" refers to a physical structure, such as mechanical and / or electrical devices, hardware, and / or circuitry, which may or may not be configured and / or manufactured to execute computer-readable instructions, machine-readable instructions, etc.

[0063] Figure 4 This is a flowchart illustrating exemplary machine-readable instructions and / or exemplary operations 400, which can be executed, instantiated, and / or implemented by programmable circuitry to dynamically and independently control an IC package (e.g., Figure 1 and / or Figure 2 The die temperature in different regions of the IC package (112, 114). Figure 4The exemplary machine-readable instructions and / or exemplary operations 400 begin at block 402, wherein exemplary user interface circuitry 302 obtains die temperature setpoints for different regions (e.g., regions 126, 128, 130, 132) of an IC package (e.g., IC package 112, IC package 114). At block 404, exemplary coolant control circuitry 304 adjusts the input temperature of a coolant (e.g., coolant 110) based on the die temperature setpoints. In some examples, the input temperature of coolant 110 corresponds to the temperature of coolant 110 output by heater 154, such as... Figure 1 As shown. In other examples, the input temperature of coolant 110 corresponds to the temperature after the coolant is mixed with the cold line 202 and the heated line 204, such as... Figure 2 As shown.

[0064] At block 406, exemplary sensor interface circuitry 306 obtains the current temperature (e.g., measured temperature) of different regions 126, 128, 130, 132. That is, in some examples, sensor interface circuitry 306 obtains temperature data from temperature sensor 180. At block 408, exemplary setpoint comparison circuitry 310 compares the current (e.g., measured) temperature of each region 126, 128, 130, 132 with the corresponding die temperature setpoint. At block 410, exemplary setpoint comparison circuitry 310 determines whether to adjust the die temperature of a given region. In some examples, this determination is based on whether the current (e.g., measured) temperature of the region deviates from the corresponding die temperature setpoint. If the die temperature of a given region is to be adjusted, the control flow proceeds to block 412. At block 412, exemplary nozzle flow rate determiner circuitry 312 determines the velocity of the jet from nozzle(s) ...(s))(s)(s)(s))(s)(s At block 414, exemplary flow limiter control circuitry 308 adjusts flow limiters (e.g., flow limiters 160, 162, 164, 166) to change the inlet pressure of coolant 110 to be supplied to nozzle(s) 108, thereby generating a jet at a determined velocity. The control flow then proceeds to block 416. In some examples, the jet velocity is not directly determined. In some such examples, block 412 is omitted, and exemplary flow limiter control circuitry 308 (at block 414) adjusts the relevant flow limiters 160, 162, 164, 166 to change the inlet pressure in a manner that will regulate the jet velocity, thereby reducing the deviation between the current (measured) temperature and the die temperature setpoint.

[0065] Returning to block 410, if the exemplary setpoint comparison circuit 310 determines that the die temperature for a given region should not be adjusted, the control flow proceeds directly to block 416. At block 416, the exemplary controller circuit 178 (e.g., via the flow limiter control circuit 308, the setpoint comparison circuit 310, and / or the nozzle flow determiner circuit 312) determines whether there are other regions to consider. If so, the control flow returns to block 410. Otherwise, the control flow proceeds to block 418, where the exemplary controller circuit 178 (e.g., via the flow limiter control circuit 308, the setpoint comparison circuit 310, and / or the nozzle flow determiner circuit 312) determines whether to continue monitoring the system. If yes, the control flow returns to block 406. Otherwise, exemplary operation 400 ends.

[0066] Figure 5 It is configured to execute and / or instantiate exemplary machine-readable instructions and / or Figure 4 Exemplary operations in [the document] to implement Figure 3 A block diagram of an exemplary programmable circuit platform 500, including controller circuitry 178. Programmable circuit platform 500 can be, for example, a server, personal computer, workstation, self-learning machine (e.g., neural network), mobile device (e.g., cellular phone, smartphone, such as iPad). TM Tablet computers, personal digital assistants (PDAs), internet devices, or any other type of computing and / or electronic device.

[0067] The programmable circuit platform 500 illustrated includes programmable circuitry 512. Programmable circuitry 512 is hardware. For example, programmable circuitry 512 can be implemented by one or more integrated circuits, logic circuits, FPGAs, microprocessors, CPUs, GPUs, DSPs, and / or microcontrollers from any desired family or manufacturer. Programmable circuitry 512 can be implemented by one or more semiconductor-based (e.g., silicon-based) devices. In this example, programmable circuitry 512 implements exemplary user interface circuitry 302, exemplary coolant control circuitry 304, exemplary sensor interface circuitry 306, exemplary flow limiter control circuitry 308, exemplary setpoint comparison circuitry 310, and exemplary nozzle flow determiner circuitry 312.

[0068] The programmable circuit 512 shown in the example includes local memory 513 (e.g., cache, registers, etc.). The programmable circuit 512 of the example communicates with main memories 514 and 516 (including volatile memory 514 and non-volatile memory 516) via bus 518. Volatile memory 514 may be synchronous dynamic random access memory (SDRAM), dynamic random access memory (DRAM), or RAMBUS. ®Dynamic Random Access Memory (RDRAM) ® The non-volatile memory 516 can be implemented using flash memory and / or any other type of memory device. Access to the main memory 514, 516 of the illustrated example is controlled by the memory controller 517. In some examples, the memory controller 517 can be implemented using one or more integrated circuits, logic circuitry, microcontrollers from any desired series or manufacturer, or any other type of circuitry for managing the flow of data to and from the main memory 514, 516.

[0069] The programmable circuit platform 500 shown in the example also includes interface circuitry 520. Interface circuitry 520 can be implemented in hardware according to any type of interface standard, such as an Ethernet interface, a Universal Serial Bus (USB) interface, or Bluetooth. ® Interfaces include Near Field Communication (NFC) interfaces, Peripheral Component Interconnect (PCI) interfaces, and / or Peripheral Component Interconnect Fast (PCIe) interfaces.

[0070] In the illustrated example, one or more input devices 522 are connected to interface circuitry 520. The input devices 522 allow users (e.g., human users, machine users, etc.) to input data and / or commands into programmable circuitry 512. The input devices 522 may be implemented using, for example, audio sensors, microphones, cameras (still or video), keyboards, buttons, mice, touchscreens, touchpads, trackballs, isotope devices, and / or voice recognition systems.

[0071] The interface circuit 520 of the illustrated example is also connected to one or more output devices 524. The output devices 524 may be implemented, for example, by display devices (e.g., light-emitting diode (LED), organic light-emitting diode (OLED), liquid crystal display (LCD), cathode ray tube (CRT) display, in-plane conversion (IPS) display, touchscreen, etc.), haptic output devices, printers, and / or speakers. Therefore, the interface circuit 520 of the illustrated example typically includes a graphics driver card, a graphics driver chip, and / or graphics processor circuitry, such as a GPU.

[0072] The interface circuit 520 of the example shown also includes communication devices, such as a transmitter, receiver, transceiver, modem, residential gateway, wireless access point, and / or network interface, to facilitate the exchange of data between network 526 and external machines (e.g., any kind of computing device). Communication can be achieved through, for example, Ethernet connections, digital subscriber line (DSL) connections, telephone line connections, coaxial cable systems, satellite systems, beyond-line-of-sight wireless systems, line-of-sight wireless systems, cellular telephone systems, optical connections, etc.

[0073] The programmable circuit platform 500 shown in the example also includes one or more mass storage disks or devices 528 for storing firmware, software, and / or data. Examples of such mass storage disks or devices 528 include magnetic storage devices (e.g., floppy disks, drives, HDDs, etc.), optical storage devices (e.g., Blu-ray discs, CDs, DVDs, etc.), RAID systems, and / or solid-state storage disks or devices (e.g., flash memory devices and / or SSDs).

[0074] It can be by Figure 4 The machine-readable instructions 532 implemented by the machine-readable instructions in the document can be stored in a mass storage device 528, a volatile memory 514, a non-volatile memory 516, and / or on at least one removable non-transitory computer-readable storage medium (e.g., a CD or DVD).

[0075] Figure 6 yes Figure 5 A block diagram of an exemplary embodiment of the programmable circuit 512. In this example, Figure 5 The programmable circuit 512 is implemented by the microprocessor 600. For example, the microprocessor 600 may be a general-purpose microprocessor (e.g., a general-purpose microprocessor circuit). The microprocessor 600 executes... Figure 4 Some or all of the machine-readable instructions in the flowchart are used to effectively translate Figure 3 The circuits in the code are instantiated as logic circuits, thereby executing operations corresponding to these machine-readable instructions. In some such examples, Figure 3 The circuitry in the microprocessor 600 is instantiated through hardware circuitry combined with machine-readable instructions. For example, the microprocessor 600 may be implemented using multi-core hardware circuitry such as a CPU, DSP, GPU, XPU, etc. While the microprocessor 600 may include any number of exemplary cores 602 (e.g., one core), the microprocessor 600 of this example is a multi-core semiconductor device including N cores. The cores 602 of the microprocessor 600 may operate independently or may cooperate to execute machine-readable instructions. For example, machine code corresponding to firmware, embedded software, or software programs may be executed by one core of core 602, or may be executed by multiple cores of core 602 at the same or different times. In some examples, the machine code corresponding to firmware, embedded software, or software programs is split into threads and executed in parallel by two or more cores of core 602. Software programs may correspond to… Figure 4 The flowchart in the document represents some or all of the machine-readable instructions and / or operations.

[0076] Core 602 can communicate via a first exemplary bus 604. In some examples, the first bus 604 can be implemented as a communication bus to enable communication associated with one or more cores of core 602. For example, the first bus 604 can be implemented as at least one of an Interconnect Integrated Circuit (I2C) bus, an SPI bus, a PCI bus, or a PCIe bus. Additionally or alternatively, the first bus 604 can be implemented as any other type of computing bus or electrical bus. Core 602 can obtain data, instructions, and / or signals from one or more external devices via exemplary interface circuitry 606. Core 602 can output data, instructions, and / or signals to one or more external devices via interface circuitry 606. Although the core 602 in this example includes exemplary local memory 620 (e.g., a Level 1 (L1) cache that can be divided into an L1 data cache and an L1 instruction cache), microprocessor 600 also includes exemplary shared memory 610 that can be shared by cores (e.g., a Level 2 (L2) cache) for high-speed access to data and / or instructions. Data and / or instructions can be transferred (e.g., shared) by writing to and / or reading from shared memory 610. The local memory 620 and shared memory 610 of each core in core 602 can be a combination of multi-level cache memory and main memory (e.g., ...). Figure 5 The cache hierarchy (514, 516) is part of the storage device hierarchy. Generally, higher-level memories in the hierarchy exhibit shorter access times and have smaller storage capacities than lower-level memories. Changes to the various levels in the cache hierarchy are managed by cache coherence strategies (e.g., reconciliation).

[0077] Each core 602 may be referred to as a CPU, DSP, GPU, or any other type of hardware circuitry. Each core 602 includes a control unit circuitry 614, an arithmetic and logic (AL) circuitry (sometimes referred to as an ALU) 616, multiple registers 618, local memory 620, and a second exemplary bus 622. Other structures may be present. For example, each core 602 may include vector unit circuitry, single instruction multiple data (SIMD) unit circuitry, load / store unit (LSU) circuitry, branch / jump unit circuitry, floating-point unit (FPU) circuitry, etc. The control unit circuitry 614 includes semiconductor-based circuitry configured to control (e.g., coordinate) data movement within the corresponding core 602. The AL circuitry 616 includes semiconductor-based circuitry configured to perform one or more mathematical and / or logical operations on data within the corresponding core 602. Some examples of the AL circuitry 616 perform integer-based operations. In other examples, the AL circuitry 616 also performs floating-point operations. In other examples, the AL circuitry 616 may include a first AL circuitry performing integer-based operations and a second AL circuitry performing floating-point operations. In some examples, the AL circuit 616 may be referred to as an arithmetic logic unit (ALU).

[0078] Register 618 is a semiconductor-based structure used to store data and / or instructions, such as the results of one or more operations performed by the corresponding AL circuit 616 of core 602. For example, register 618 may include one or more vector registers, SIMD registers, general-purpose registers, flag registers, segment registers, machine-specific registers, instruction pointer registers, control registers, debug registers, memory management registers, machine check registers, etc. Register 618 can be as follows: Figure 6 The registers 618 are arranged in a group as shown. Alternatively, registers 618 can be organized in any other arrangement, format, or structure, for example, by distributing them throughout core 602 to reduce access time. The second bus 622 can be implemented by at least one of an I2C bus, an SPI bus, a PCI bus, or a PCIe bus.

[0079] Each core 602, and / or more generally, the microprocessor 600, may include additional and / or alternative structures similar to those shown and described above. For example, one or more clock circuits, one or more power supplies, one or more power gates, one or more cache home agents (CHAs), one or more aggregation / common grid stoppers (CMS), one or more shifters (e.g., barrel shifters), and / or other circuitry may be present. The microprocessor 600 is a semiconductor device manufactured to include a plurality of transistors interconnected to implement the above-described structures in one or more integrated circuits (ICs) contained in one or more packages.

[0080] Microprocessor 600 may include one or more accelerators (e.g., acceleration circuitry, hardware accelerators, etc.) and / or cooperate with one or more accelerators. In some examples, accelerators are implemented by logic circuitry to perform certain tasks faster and / or more efficiently than a general-purpose processor. Examples of accelerators include ASICs and FPGAs such as those discussed herein. GPUs, DSPs, and / or other programmable devices may also be accelerators. Accelerators may be onboard with microprocessor 600, in the same chip package as microprocessor 600, and / or in one or more separate packages with microprocessor 600.

[0081] Figure 7 yes Figure 5 A block diagram of another exemplary embodiment of the programmable circuit 512 is shown. In this example, the programmable circuit 512 is implemented by an FPGA circuit 700. For example, the FPGA circuit 700 can be implemented by an FPGA. The FPGA circuit 700 can, for example, be used to perform operations that would otherwise be possible through... Figure 6 The operations are performed by an exemplary microprocessor 600 that executes the corresponding machine-readable instructions. However, once configured, the FPGA circuitry 700 instantiates the operations and / or functions corresponding to the machine-readable instructions in hardware, and therefore can typically execute the operations / functions faster than a general-purpose microprocessor that executes the corresponding software.

[0082] More specifically, with the above Figure 6 The microprocessor 600 (which is a general-purpose device that can be programmed to execute...) Figure 4 Compared to the flowchart in the diagram, which represents some or all of the machine-readable instructions, but whose interconnections and logic circuitry remain fixed after manufacturing, Figure 7 The example FPGA circuit 700 includes interconnects and logic circuitry that can be configured, constructed, programmed, and / or interconnected in different ways after manufacturing to instantiate, for example, a circuit corresponding to... Figure 4 The flowchart in the diagram represents some or all of the machine-readable instructions for operation / function. Specifically, FPGA circuit 700 can be considered as an array of logic gates, interconnects, and switches. Switches can be programmed to change the way the logic gates are interconnected, thereby effectively forming one or more dedicated logic circuits (unless FPGA circuit 700 is reprogrammed and until then). The configured logic circuits enable the logic gates to cooperate in different ways to perform different operations on the data received by the input circuits. These operations can correspond to... Figure 4 The flowchart in the diagram represents some or all of the instructions (e.g., software and / or firmware). Therefore, the FPGA circuit 700 can be configured and / or constructed as a dedicated logic circuit to efficiently handle instructions corresponding to... Figure 4The FPGA circuit instantiates some or all of the machine-readable instructions in the flowchart, thereby executing the operations / functions corresponding to these software instructions in a specialized manner similar to that of an ASIC. Therefore, the FPGA circuit 700 can execute operations / functions corresponding to these software instructions faster than a general-purpose microprocessor. Figure 4 Operations / functions of some or all machine-readable instructions in the code.

[0083] exist Figure 7 In some examples, the FPGA circuit 700 is configured and / or constructed in response to programming (and / or reprogramming once or multiple times) based on a binary file. In some examples, the binary file can be compiled and / or generated based on instructions in a hardware description language (HDL) (e.g., Lucid, VHSIC Hardware Description Language (VHDL), or Verilog). For example, a user (e.g., a human user, a machine user, etc.) can write code or programs corresponding to one or more operations / functions in the HDL; the code / program can be translated into a low-level language as needed; and the code / program (e.g., code / program in a low-level language) can be converted (e.g., by a compiler, software application, etc.) into a binary file. In some examples, Figure 7 The FPGA circuit 700 in the middle can access and / or load binary files to enable Figure 7 The FPGA circuit 700 is configured and / or constructed to perform one or more operations / functions. For example, the binary file may consist of bit streams (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.) and / or Figure 7 The FPGA circuit 700 in the middle can access machine-readable instructions to implement and generate Figure 7 The configuration and / or construction of the FPGA circuit 700 or one or more of its components.

[0084] In some examples, the binary file is compiled, generated, transformed, and / or otherwise output from a unified software platform used to program the FPGA. For example, the unified software platform can translate first instructions (e.g., code or program) corresponding to one or more operations / functions in a high-level language (e.g., C, C++, Python, etc.) into second instructions corresponding to one or more operations / functions in an HDL. In some such examples, the binary file is compiled, generated, and / or otherwise output from the unified software platform based on the second instructions. In some examples, Figure 7 The FPGA circuit 700 in the middle can access and / or load binary files to enable Figure 7The FPGA circuit 700 is configured and / or constructed to perform one or more operations / functions. For example, the binary file may consist of bit streams (e.g., one or more computer-readable bits, one or more machine-readable bits, etc.), data (e.g., computer-readable data, machine-readable data, etc.) and / or Figure 7 The FPGA circuit 700 in the middle can access machine-readable instructions to implement and generate Figure 7 The configuration and / or construction of the FPGA circuit 700 or one or more of its components.

[0085] Figure 7 The FPGA circuitry 700 includes exemplary input / output (I / O) circuitry 702 for obtaining and / or outputting data from exemplary configuration circuitry 704 and / or external hardware 706. For example, configuration circuitry 704 may be implemented by interface circuitry that can obtain a binary file, which may be implemented as a bitstream, data, and / or machine-readable instructions, thereby configuring FPGA circuitry 700 or portions thereof. In some such examples, configuration circuitry 704 may obtain the binary file from a user, a machine (e.g., hardware circuitry (e.g., programmable or dedicated circuitry) that can implement artificial intelligence / machine learning (AI / ML) models to generate binary files, and / or any combination thereof). In some examples, external hardware 706 may be implemented by external hardware circuitry. For example, external hardware 706 may be... Figure 6 The microprocessor 600 is implemented in the system.

[0086] The FPGA circuit 700 also includes an array of exemplary logic gates 708, a plurality of exemplary configurable interconnects 710, and exemplary memory circuitry 712. The logic gates 708 and the configurable interconnects 710 can be configured to interact with... Figure 4 Instantiate one or more operations / functions and / or other desired operations corresponding to at least some of the machine-readable instructions in the machine-readable instructions. Figure 7 The logic gate circuit 708 shown is manufactured in blocks or groups. Each block includes semiconductor-based electrical structures that can be configured as logic circuits. In some examples, the electrical structures include logic gates (e.g., AND gates, OR gates, NAND gates, etc.) that provide basic building blocks for the logic circuits. Electrically controllable switches (e.g., transistors) are present within each logic gate circuit 708 to enable the configuration of the electrical structures and / or logic gates to form a circuit that performs the desired operation / function. The logic gate circuit 708 may include other electrical structures such as lookup tables (LUTs), registers (e.g., flip-flops or latches), multiplexers, etc.

[0087] The configurable interconnects 710 shown in the example are conductive paths, traces, vias, etc., which may include electrically controllable switches (e.g., transistors). The state of the electrically controllable switches can be changed by programming (e.g., using an HDL instruction language) to activate or deactivate one or more connections between one or more logic gates in logic gate 708, thereby programming the desired logic circuit.

[0088] The storage circuit 712 in the example shown is configured to store the results of one or more operations performed by the corresponding logic gates. The storage circuit 712 can be implemented using registers, etc. In the example shown, the storage circuit 712 is distributed among the logic gates 708, thereby facilitating access and improving execution speed.

[0089] Figure 7 The exemplary FPGA circuit 700 also includes an exemplary dedicated operating circuit 714. In this example, the dedicated operating circuit 714 includes a dedicated circuit 716 that can be invoked to implement common functions, thereby avoiding the need for field programming of these functions. Examples of such dedicated circuits 716 include memory (e.g., DRAM) controller circuitry, PCIe controller circuitry, clock circuitry, transceiver circuitry, memory, and multiplier-accumulator circuitry. Other types of dedicated circuitry may be present. In some examples, the FPGA circuit 700 may also include an exemplary general-purpose programmable circuit 718, such as an exemplary CPU 720 and / or an exemplary DSP 722. Other general-purpose programmable circuits 718, such as GPUs, XPUs, etc., may additionally or alternatively exist and can be programmed to perform other operations.

[0090] although Figure 6 and Figure 7 It shows Figure 5 Two exemplary embodiments of the programmable circuit 512 are provided, but many other approaches are conceived. For example, the FPGA circuit may include an onboard CPU, such as... Figure 6 One or more CPUs in the exemplary CPU 720. Therefore, Figure 5 The programmable circuit 512 in the middle can also be achieved by at least Figure 6 The exemplary microprocessor 600 and Figure 7 The exemplary FPGA circuit 700 in the example is combined to implement this. In some such hybrid examples, Figure 6 One or more cores of the 602 can execute by Figure 4 The flowchart in the diagram represents the first part of machine-readable instructions to perform one or more first operations / functions. Figure 7 The FPGA circuit 700 in the FPGA can be configured and / or constructed to perform operations related to... Figure 4The flowchart in the diagram represents the second part of a machine-readable instruction corresponding to one or more second operations / functions, and / or the ASIC can be configured and / or constructed to perform the operations described by the second part of the machine-readable instruction. Figure 4 The flowchart in the diagram represents the third part of a machine-readable instruction, corresponding to one or more third operations / functions.

[0091] It should be understood that Figure 3 Some or all of the circuits in the code can therefore be instantiated at the same or different times. For example, Figure 6 The same and / or different parts of the microprocessor 600 can be programmed to execute one or more machine-readable instructions at the same and / or different times. In some examples, Figure 7 The same and / or different parts of the FPGA circuit 700 can be configured and / or constructed to perform operations / functions corresponding to one or more machine-readable instructions at the same and / or different times.

[0092] In some examples, Figure 3 Some or all of the circuits in the code can be instantiated, for example, in one or more threads that execute simultaneously and / or serially. For example, Figure 6 The microprocessor 600 can execute machine-readable instructions in one or more threads that execute simultaneously and / or serially. In some examples, Figure 7 The FPGA circuit 700 can be configured and / or constructed to perform operations / functions simultaneously and / or serially. Furthermore, in some examples, Figure 3 Some or all of the circuits in the circuit can be Figure 6 One or more virtual machines and / or containers are implemented and executed on the microprocessor 600.

[0093] In some examples, Figure 5 The programmable circuit 512 can be housed in one or more packages. For example, Figure 6 Microprocessor 600 and / or Figure 7 The FPGA circuitry 700 can be housed in one or more packages. In some examples, the XPU can be... Figure 5 The programmable circuit 512 is implemented in the package and can be in one or more packages. For example, the XPU may include: a CPU in one package (e.g., ... Figure 6 The microprocessor 600 in Figure 7 CPU 720 in one package, DSP in another package (e.g., Figure 7 DSP 722 in one package, GPU in another package, and FPGA in yet another package (e.g., Figure 7 FPGA circuit 700 in the middle.

[0094] exist Figure 8 The diagram illustrates a block diagram of an exemplary software distribution platform 805, which is used to distribute software (e.g., software owned and / or operated by the owner and / or operator of the software distribution platform) to other hardware devices. Figure 5 (Example machine-readable instructions 532 in the document). The exemplary software distribution platform 805 can be implemented by any computer server, data facility, cloud service, etc., capable of storing and sending software to other computing devices. A third party can be a customer of the entity that owns and / or operates the software distribution platform 805. For example, the entity owning and / or operating the software distribution platform 805 can be a developer, seller, and / or software (e.g., [example machine-readable instructions]). Figure 5 The licensor of the exemplary machine-readable instruction 532 in the example. A third party may be a consumer, user, retailer, OEM, etc., who purchases and / or licenses the software for use and / or resells and / or sublicenses it. In the illustrated example, the software distribution platform 805 includes one or more servers and one or more storage devices. The storage devices store the machine-readable instruction 532, which may correspond to... Figure 4 The exemplary machine-readable instructions are as described above. One or more servers of the exemplary software distribution platform 805 communicate with an exemplary network 810, which may correspond to the Internet and / or any one or more of the exemplary networks described above. In some examples, one or more servers respond to a request to send software to a requesting party as part of a commercial transaction. Payments for software delivery, sale, and / or licensing may be processed by one or more servers of the software distribution platform and / or by a third-party payment entity. The servers enable purchasers and / or licensors to download machine-readable instructions 532 from the software distribution platform 805. For example, software (which may correspond to...) Figure 4 The exemplary machine-readable instructions 532 can be downloaded to the exemplary programmable circuit platform 500, which executes the machine-readable instructions 532 to implement the controller circuit 178. In some examples, one or more servers of the software distribution platform 805 periodically distribute software (e.g., ...) to the controller circuit 178. Figure 5 The exemplary machine-readable instruction 532 in the document provides, sends, and / or forces updates to ensure that improvements, patches, updates, etc., are distributed and applied to software at end-user devices. Although referred to as software above, the distributed “software” may alternatively be firmware.

[0095] "Comprising" and "including" (and all their forms and tenses) are used herein as open-ended terms. Therefore, whenever a claim uses "comprising" or "including" in any form (e.g., present tense, progressive tense, etc.) in the preamble or in any kind of claim reference, it should be understood that additional elements, items, etc., may exist without exceeding the scope of the corresponding claim or reference. As used herein, when the phrase "at least" is used as a transitional term in, for example, the preamble of a claim, it is open-ended in the same way that the terms "comprising" and "including" are open-ended. The term "and / or," when used, for example, in the form of A, B, and / or C, refers to any combination or subset of A, B, and C, such as: (1) only A, (2) only B, (3) only C, (4) A and B, (5) A and C, (6) B and C, or (7) A and B and C. As used herein in the context of describing structures, components, items, objects, and / or things, the phrase "at least one of A and B" is intended to refer to an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. As used herein in the context of describing the implementation or execution of processes, instructions, actions, activities, etc., the phrase "at least one of A or B" is intended to refer to an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B. Similarly, as used herein in the context of describing the implementation or execution of processes, instructions, actions, activities, etc., the phrase "at least one of A or B" is intended to refer to an implementation that includes any of the following: (1) at least one A, (2) at least one B, or (3) at least one A and at least one B.

[0096] As used herein, singular references (e.g., "a," "first," "second," etc.) do not exclude plurals. As used herein, the term "a" refers to one or more objects within that object. The terms "a," "one or more," and "at least one" are used interchangeably herein. Furthermore, although listed individually, multiple modules, elements, or actions may be implemented by, for example, the same entity or object. Additionally, while a single feature may be included in different examples or claims, it is possible for them to be combined, and inclusion in different examples or claims does not imply that a combination of features is not feasible and / or advantageous.

[0097] As used herein, unless otherwise stated, the term "above" describes the relationship of two parts relative to the ground. The first part is above the second part if the second part has at least one portion located between the ground and the first part. Similarly, as used herein, the first part is "below" the second part when the first part is closer to the ground than the second part. As stated above, the first part may be above or below the second part in one or more of the following situations: when there are other parts between them, when there are no other parts between them, when the first part is in contact with the second part, or when the first part and the second part are not in direct contact with each other.

[0098] As used in this patent, stating that any part (e.g., layer, film, region, area, or plate) is in any way on (e.g., placed, located, set, or formed on, etc.) another part indicates that the referenced part is in contact with the other part, or that the referenced part is above the other part and one or more intermediate parts are located therebetween.

[0099] As used herein, unless otherwise specified, a connection reference (e.g., attachment, coupling, connection, and link) may include intermediate components between the elements referenced by the connection reference and / or relative movement between these elements. Thus, a connection reference does not necessarily mean that two elements are directly connected and / or in a fixed relationship with each other. As used herein, a statement that any part is "in contact" with another part is defined as indicating that there is no intermediate part between the two parts.

[0100] Unless otherwise specifically stated, the use of descriptive terms such as “first,” “second,” “third,” etc., herein does not imply or otherwise indicate any meaning of priority, physical order, arrangement in a list, and / or any sorting, but is merely used as designations and / or arbitrary names to distinguish elements in order to facilitate understanding of the disclosed examples. In some examples, the descriptive term “first” may be used to refer to an element in a particular embodiment, while different descriptive terms such as “second” or “third” may be used in the claims to refer to the same element. In such examples, it should be understood that such descriptive terms are used only to clearly identify those elements in the context of the discussion (e.g., within the claims), which would otherwise likely share the same name.

[0101] As used herein, “approximately” and “about” modify their subject / value to identify variations that may exist in real-world applications. For example, “approximately” and “about” may modify dimensions that may be imprecise due to manufacturing tolerances and / or other real-world defects as would be understood by one of ordinary skill in the art. For example, unless otherwise stated herein, “approximately” and “about” may indicate that such dimensions may be within tolerances of + / - 10%.

[0102] As used in this article, "substantially real-time" means occurring in a near-instantaneous manner, taking into account the real-world delays that may exist in computation time, transmission, etc. Therefore, unless otherwise stated, "substantially real-time" means real-time plus 1 second.

[0103] As used herein, the phrase “in communication” (including its variations) encompasses direct and / or indirect communication via one or more intermediate components, and does not require direct physical (e.g., wired) communication and / or continuous communication, but additionally includes selective communication for periodic intervals, scheduled intervals, non-periodic intervals, and / or one-off events.

[0104] As used herein, “programmable circuit” is defined as including: (i) one or more special purpose circuits (e.g., application-specific integrated circuits (ASICs)) that are structured to perform (multiple) specific operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors); and / or (ii) one or more semiconductor-based general purpose circuits that can be programmed with instructions to perform (multiple) specific functions and / or (multiple) operations and include one or more semiconductor-based logic devices (e.g., electrical hardware implemented by one or more transistors). Examples of programmable circuits include programmable microprocessors (e.g., central processing unit (CPU)) that can execute first instructions to perform one or more operations and / or functions; field-programmable gate arrays (FPGAs) that can be programmed with second instructions to instantiate one or more operations and / or functions corresponding to the first instructions; graphics processing units (GPUs) that can execute first instructions to perform one or more operations and / or functions; digital signal processors (DSPs) that can execute first instructions to perform one or more operations and / or functions; XPUs; network processing units (NPUs); one or more microcontrollers and / or integrated circuits (e.g., application-specific integrated circuits (ASICs)) that can execute first instructions to perform one or more operations and / or functions. For example, an XPU can be implemented by a heterogeneous computing system that includes multiple types of programmable circuits (e.g., one or more FPGAs, one or more CPUs, one or more GPUs, one or more NPUs, one or more DSPs, etc., and / or any combination thereof), and by orchestration techniques (e.g., multiple application programming interfaces (APIs)) that can assign computational tasks to any of the multiple types of programmable circuits suitable for and capable of performing computational tasks.

[0105] As used herein, an integrated circuit / circuit is defined as one or more semiconductor packages containing one or more circuit elements, such as transistors, capacitors, inductors, resistors, current paths, diodes, etc. For example, an integrated circuit can be implemented as one or more of an ASIC, FPGA, chip, microchip, programmable circuit, semiconductor substrate coupling multiple circuit elements, system-on-a-chip (SoC), etc.

[0106] As can be understood from the foregoing, exemplary systems, devices, products, and methods have been disclosed that can reliably and efficiently control the die temperature of different regions of an IC package in a manner independent of other regions by adjusting the inlet pressure of the coolant supplied to the nozzle, which provides jets that impinge on different regions. The examples disclosed herein offer cost, space, and complexity savings compared to known die temperature control systems because they require fewer components and have fewer constraints on the location (e.g., distance) of these components. Furthermore, the examples disclosed herein provide faster response times than known systems can achieve. Moreover, the examples disclosed herein are not affected by crosstalk issues between different jets. Furthermore, the examples disclosed herein are applicable to single-phase or two-phase jet impingement cooling systems.

[0107] Further examples and combinations thereof include the following:

[0108] Example 1 includes a system comprising: a first nozzle for directing a first portion of an impact fluid to an integrated circuit package; a second nozzle for directing a second portion of the impact fluid to the integrated circuit package; a first flow limiter for controlling a first pressure of the impact fluid supplied to the first portion of the first nozzle; and a second flow limiter for controlling a second pressure of the impact fluid supplied to the second portion of the second nozzle.

[0109] Example 2 includes the system according to Example 1, wherein the second pressure is controlled independently of the first pressure.

[0110] Example 3 includes a system according to either Example 1 or 2, wherein a first portion of the impinging fluid supplied to the first nozzle flows entirely through the first flow restrictor.

[0111] Example 4 includes a system according to any one of Examples 1-3, further comprising: a first pressure sensor for measuring a first pressure, a second pressure sensor for measuring a second pressure, and a third pressure sensor for measuring a third pressure within a cavity for housing an integrated circuit package.

[0112] Example 5 includes a system according to any one of Examples 1-4, wherein the first and second portions of the impinging fluid have the same temperature.

[0113] Example 6 includes a system according to Example 5, including a heater for raising the temperature of a shock fluid supplied from a fluid line located upstream of a first flow limiter and a second flow limiter.

[0114] Example 7 includes a system according to Example 6, including a valve for mixing a first fluid with a second fluid to generate a shock fluid, the valve being located upstream of a common fluid line, the first fluid corresponding to the output of a heater, and the second fluid being colder than the first fluid.

[0115] Example 8 includes a system according to Example 7, wherein the valve is a first valve, the system includes a second valve for mixing the first fluid with the second fluid to produce a third fluid, the third fluid being supplied to a third nozzle for directing the third fluid to a second integrated circuit package, and the third fluid having a different temperature than the impinging fluid.

[0116] Example 9 includes a system according to any one of Examples 1-8, wherein when the impinging fluid enters the chamber containing the integrated circuit package, at least some first portions of the impinging fluid change from a liquid phase to a gas phase.

[0117] Example 10 includes a system according to any one of Examples 1-9, wherein the first flow limiter is at least one of a proportional valve, a solenoid valve, a butterfly valve, or a needle valve.

[0118] Example 11 includes a system according to any one of Examples 1-10, wherein a first flow limiter is located at a first distance upstream of a first nozzle, and a second flow limiter is located at a second distance upstream of a second nozzle, the second distance being different from the first distance.

[0119] Example 12 includes a system according to any one of Examples 1-11, wherein a first nozzle is used to direct a first portion of the impinging fluid to a first region of an integrated circuit package, the first region having a first die associated with a first die height, and a second nozzle is used to direct a second portion of the impinging fluid to a second region of the integrated circuit package, the second region having a second die associated with a second die height different from the first die height.

[0120] Example 13 includes a system according to any one of Examples 1-12, wherein a first nozzle is used to direct a first portion of the impinging fluid to a first die of an integrated circuit package, and a second nozzle is used to direct a second portion of the impinging fluid to a second die of an integrated circuit package.

[0121] Example 14 includes an apparatus comprising interface circuitry, machine-readable instructions, and at least one processor circuitry, the at least one processor circuitry being programmed by the instructions to: cause adjustment of a first flow limiter to change a first inlet pressure of coolant to be supplied to a first nozzle located downstream of the first flow limiter, the first nozzle being for directing coolant to a first region of an integrated circuit package; and cause adjustment of a second flow limiter to change a second inlet pressure of coolant to be supplied to a second nozzle located downstream of the second flow limiter, the second nozzle being for directing coolant to a second region of the integrated circuit package.

[0122] Example 15 includes a device according to Example 14, wherein the regulation of the first flow limiter is independent of the regulation of the second flow limiter.

[0123] Example 16 includes an apparatus according to any one of Examples 14 or 15, wherein one or more processor circuits in at least one processor circuit are configured to: determine a first temperature of a first region of an integrated circuit package based on sensor data from a first temperature sensor, and adjust a first flow limiter based on the first temperature.

[0124] Example 17 includes the device according to Example 16, wherein one or more processor circuits in at least one processor circuit are configured to: induce adjustment of the first flow limiter based on a comparison of a first temperature with a first setpoint.

[0125] Example 18 includes the device according to Example 17, wherein one or more processor circuits in at least one processor circuit are configured to: determine a second temperature of a second region of an integrated circuit package, and induce adjustment of a second flow limiter based on a comparison of the second temperature with a second setpoint, the second setpoint being different from a first setpoint.

[0126] Example 19 includes a non-transitory machine-readable storage medium comprising instructions for causing at least one processor circuitry to perform at least the following operations: causing adjustment of a first flow limiter to change a first inlet pressure of coolant to be supplied to a first nozzle located downstream of the first flow limiter, the first nozzle being used to direct coolant to a first region of an integrated circuit package; and causing adjustment of a second flow limiter to change a second inlet pressure of coolant to be supplied to a second nozzle located downstream of the second flow limiter, the second nozzle being used to direct coolant to a second region of the integrated circuit package.

[0127] Example 20 includes a non-transitory machine-readable storage medium according to Example 19, wherein the regulation of the first flow limiter is independent of the regulation of the second flow limiter.

[0128] The following claims are incorporated herein by reference. Although certain exemplary systems, devices, products, and methods have been disclosed herein, the scope of this patent is not limited thereto. Rather, this patent covers all systems, devices, products, and methods that fall fully within the scope of the claims of this patent.

Claims

1. A system comprising: A first nozzle, the first nozzle being used to direct a first portion of the impact fluid toward an integrated circuit package; A second nozzle is used to direct a second portion of the impact fluid toward the integrated circuit package; A first flow limiter, the first flow limiter being used to control a first pressure of the impact fluid supplied to the first portion of the first nozzle; as well as A second flow limiter is used to control the second pressure of the impact fluid supplied to the second portion of the second nozzle.

2. The system according to claim 1, wherein, The second pressure is controlled independently of the first pressure.

3. The system according to claim 1, wherein, The first portion of the impact fluid supplied to the first nozzle flows entirely through the first flow limiter.

4. The system according to claim 1, further comprising: A first pressure sensor, the first pressure sensor being used to measure the first pressure; A second pressure sensor is used to measure the second pressure. as well as A third pressure sensor is used to measure a third pressure within the cavity housing the integrated circuit package.

5. The system according to any one of claims 1-4, wherein, The first and second portions of the impact fluid have the same temperature.

6. The system of claim 5, further comprising a heater for raising the temperature of the impinging fluid supplied from a fluid line located upstream of the first flow restrictor and the second flow restrictor.

7. The system of claim 6, further comprising a valve for mixing a first fluid with a second fluid to generate the impingement fluid, the valve being located upstream of a common fluid line, the first fluid corresponding to the output of the heater, and the second fluid being colder than the first fluid.

8. The system according to claim 7, wherein, The valve is a first valve, and the system includes a second valve for mixing the first fluid with the second fluid to produce a third fluid, the third fluid being supplied to a third nozzle for directing the third fluid to a second integrated circuit package, the third fluid having a different temperature than the impingement fluid.

9. The system according to any one of claims 1-4, wherein, When the impact fluid enters the chamber containing the integrated circuit package, at least some of the first portion of the impact fluid changes from the liquid phase to the gas phase.

10. The system according to any one of claims 1-4, wherein, The first flow limiter is at least one of a proportional valve, a solenoid valve, a butterfly valve, or a needle valve.

11. The system according to any one of claims 1-4, wherein, The first flow limiter is located at a first distance upstream of the first nozzle, and the second flow limiter is located at a second distance upstream of the second nozzle, the second distance being different from the first distance.

12. The system according to any one of claims 1-4, wherein, The first nozzle is used to direct the first portion of the impact fluid to a first region of the integrated circuit package, the first region having a first die associated with a first die height, and the second nozzle is used to direct the second portion of the impact fluid to a second region of the integrated circuit package, the second region having a second die associated with a second die height different from the first die height.

13. The system according to any one of claims 1-4, wherein, The first nozzle is used to direct the first portion of the impact fluid to the first die of the integrated circuit package, and the second nozzle is used to direct the second portion of the impact fluid to the second die of the integrated circuit package.

14. An apparatus comprising: Interface circuit; Machine-readable instructions; as well as At least one processor circuit, said at least one processor circuit being programmed by the instructions to: This causes adjustment of the first flow limiter to change the first inlet pressure of the coolant to be supplied to the first nozzle located downstream of the first flow limiter, the first nozzle being used to direct the coolant to a first region of the integrated circuit package; as well as This causes adjustment of the second flow limiter to change the second inlet pressure of the coolant to be supplied to the second nozzle located downstream of the second flow limiter, the second nozzle being used to direct the coolant to the second region of the integrated circuit package.

15. The device according to claim 14, wherein, The adjustment of the first flow limiter is independent of the adjustment of the second flow limiter.

16. The device according to any one of claims 14-15, wherein, One or more of the at least one processor circuits are configured to: determine a first temperature of the first region of the integrated circuit package based on sensor data from a first temperature sensor, wherein the first flow limiter is adjusted based on the first temperature.

17. The device according to claim 16, wherein, One or more of the at least one processor circuits are configured to: cause adjustment of the first flow limiter based on a comparison of the first temperature with a first set point.

18. The device according to claim 17, wherein, One or more of the at least one processor circuits are used for: Determine the second temperature of the second region of the integrated circuit package; and The second flow limiter is adjusted based on a comparison between the second temperature and a second setpoint, where the second setpoint is different from the first setpoint.

19. A machine-readable storage medium comprising instructions for causing at least one processor circuitry to perform at least the following operations: This causes adjustment of a first flow limiter to change the first inlet pressure of the coolant to be supplied to a first nozzle located downstream of the first flow limiter, the first nozzle being used to direct the coolant to a first region of an integrated circuit package; and This causes adjustment of the second flow limiter to change the second inlet pressure of the coolant to be supplied to the second nozzle located downstream of the second flow limiter, the second nozzle being used to direct the coolant to the second region of the integrated circuit package.

20. The machine-readable storage medium according to claim 19, wherein, The adjustment of the first flow limiter is independent of the adjustment of the second flow limiter.

21. A method comprising: Adjust the first flow limiter to change the first inlet pressure of the coolant to be supplied to the first nozzle located downstream of the first flow limiter, the first nozzle being used to direct the coolant to a first region of the integrated circuit package; as well as Adjust the second flow limiter to change the second inlet pressure of the coolant to be supplied to the second nozzle located downstream of the second flow limiter, the second nozzle being used to direct the coolant to the second region of the integrated circuit package.

22. The method according to claim 21, wherein, The adjustment of the first flow limiter is independent of the adjustment of the second flow limiter.

23. The method of claim 21, comprising: A first temperature of the first region of the integrated circuit package is determined based on sensor data from a first temperature sensor, and the first flow limiter is adjusted based on the first temperature.

24. The method of claim 23, comprising: The first flow limiter is adjusted based on a comparison between the first temperature and the first set point.

25. An apparatus comprising means for performing the method of any one of claims 21 to 24.

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