Wafer-free automatic cleaning process

Abstract

The invention discloses a wafer-free automatic cleaning process, which comprises the following steps of: placing an electrostatic chuck in a process cavity of a passivation layer plasma etching machine, and forming channels on two side edges of the electrostatic chuck by utilizing a plasma sheath layer by controlling the radio frequency power for generating plasma and the continuous change of the pressure in the process cavity; impurity sources are taken away and removed through pressure difference on the two sides of the electrostatic chuck by means of periodic swing. According to the characteristics of the plasma sheath layer, the lower the density is, the Debye length of the sheath layer is increased, the pressure is continuously adjusted, a channel is formed in the side edge of the electrostatic chuck, and an impurity source is cleaned up through the pressure difference of periodic swing.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device manufacturing, and in particular to a fabless automated cleaning process. Background Technology

[0002] Semiconductor devices are manufactured on a wafer substrate, and a thick passivation layer, typically silicon nitride, is deposited on the surface after completion. This thick passivation layer provides protection for the devices formed on the wafer surface, isolating them from external moisture erosion, impurity contamination, and preventing damage to the devices from scratches on the wafer surface.

[0003] After the passivation layer is etched, the aluminum pads beneath it that lead to the chip ports are exposed. Moisture and residual phosphorus (F) on the aluminum surface after etching can cause AlF crystals to form on the aluminum pads. AlF crystals can affect package reliability. From an etching perspective, current methods often use a large amount of Ar to bombard the wafer surface to reduce the F on the Al surface. However, Ar also bombards the silicon nitride (SiN) passivation layer, and the SiN particles that are detached from the bombardment become one of the sources of impurity contamination.

[0004] As the production line continues to operate, defects accumulate in the process chambers of some equipment and eventually fall onto the wafer surface, forming peeling defects and causing the wafer to be scrapped. Summary of the Invention

[0005] The technical problem to be solved by this invention is to provide a fabless automatic cleaning process to solve the problem of passivation layer contamination on the wafer surface.

[0006] To address the aforementioned issues, this invention provides a fabless automated cleaning process. An electrostatic chuck is placed inside the process chamber of a plasma etching machine for passivation layer. By controlling the radio frequency power of the generated plasma and the continuous changes in the pressure inside the process chamber, a plasma sheath forms channels on both sides of the electrostatic chuck. The impurity source is carried away and removed by the pressure difference on both sides of the electrostatic chuck through periodic oscillation.

[0007] Furthermore, the plasma etching machine is a TCP machine.

[0008] Furthermore, the plasma etching machine completes the etching of the silicon nitride passivation layer in the preceding process and uses Ar to perform wafer surface treatment, resulting in the accumulation of silicon nitride particle impurities in the process cavity.

[0009] Furthermore, controlling the plasma includes the following steps: The first step involves setting the RF power to 1000W, the internal pressure of the process chamber to 8mT, and the response time to 2s. The second step involves setting the RF power to 800W, the internal pressure of the process chamber to 15mT, and the reaction time to 2s. The third step involves RF power of 600W, internal pressure of the process chamber of 15mT, and a reaction time of 2s. Step 4: RF power 400W, internal pressure of process chamber 30mT, reaction time 2s; Step 5: RF power 200W, internal pressure of process chamber 30mT, reaction time 2s; After completing the above steps, start the next cycle from step one until the process chamber of the plasma etching machine is cleaned.

[0010] This invention provides a fabless automatic cleaning process that utilizes the characteristics of a plasma sheath: the lower the density, the greater the Debye length of the sheath. Combined with continuous pressure adjustment, a channel is formed on the side of the electrostatic chuck, and the pressure difference of periodic oscillations is used to clean the impurity source. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the waferless automatic cleaning process of the present invention.

[0012] Figure 2 This is a schematic diagram of the defect distribution on the surface of a wafer after processing with existing technology and the process of this invention.

[0013] Figure 3 It is a statistical curve of the number of defects on the surface of the wafer after processing by existing processes and the process of this invention. Detailed Implementation

[0014] The following detailed description, in conjunction with the accompanying drawings, provides specific embodiments of the present invention and clearly and completely describes the technical solutions of the present invention. However, the present invention is not limited to the following embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. The advantages and features of the present invention will become clearer from the following description and claims. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise ratios, and are only used for the purpose of conveniently and clearly illustrating the embodiments of the present invention. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0015] It should be understood that the present invention can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein. Rather, providing these embodiments will make the disclosure thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated, and the same reference numerals denote the same elements throughout. It should be understood that when an element or layer is referred to as “on,” “adjacent to,” “connected to,” or “coupled to” other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as “directly on,” “directly adjacent to,” “directly connected to,” or “directly coupled to” other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used only to distinguish one element, component, region, layer, or part from another element, component, region, layer, or part. Therefore, without departing from the teachings of this invention, the first element, component, region, layer, or part discussed below may be referred to as the second element, component, region, layer, or part.

[0016] To improve the internal environment of the process chamber and prevent impurities from falling onto the wafer surface and causing peeling defects during the manufacturing process, this invention provides a fabless automated cleaning process to thoroughly clean impurities within the process chamber.

[0017] In plasma etching, the plasma itself is electrically neutral, but the electron and ion densities begin to change as the plasma approaches the object's surface. This is fundamentally due to the fact that the mass of an electron is much smaller than that of an ion, so electrons move much faster than ions in an electric field. Therefore, without other constraints, electrons will leave the plasma much faster than ions at the object's surface (typically the inner wall of a cavity). This results in a significant accumulation of electrons on the inner wall of the cavity, creating an electric field near the cavity wall that points from the plasma mass towards the inner wall; this region is called the sheath. The sheath plays a crucial role in semiconductor dry etching. It can control ion energy and directionality, including ion acceleration: the strong electric field in the sheath (formed by the sheath potential difference) accelerates positive ions in the plasma and bombards the material surface perpendicularly; directional etching: highly directional ion bombardment can achieve anisotropic etching (vertical etching), avoiding lateral etching, thereby forming high-precision micro- and nano-structures (such as deep trenches or vertical holes); energy regulation: by adjusting the sheath potential (such as changing the radio frequency power, frequency, or electrode area), ion energy can be controlled to optimize the etching rate and selectivity (balance between physical and chemical etching).

[0018] When the source power of the plasma decreases, the generation efficiency of inductively coupled plasma decreases, leading to a reduction in plasma density. This paper proposes a fabless-less automated cleaning process to address the source of defects within the process cavity, utilizing changes in sheath thickness and pressure to achieve cleaning of the process cavity interior.

[0019] This invention utilizes the characteristics of a plasma sheath: the lower the density, the greater the Debye length (a characteristic parameter describing the distance of charge action in plasma or electrolyte solution, also known as the Debye radius) of the sheath. Combined with continuous pressure adjustment, a channel is formed on the side of the ESC (Electrostatic Chuck, a clamping device that uses electrostatic force to hold a wafer to a substrate, widely used in vacuum wafer fabrication processes such as plasma etching and ion implantation). The pressure difference from periodic oscillations cleans away impurity sources. Specifically, controlling the RF power from high to low causes the plasma density to gradually decrease, thus gradually increasing the Debye length of the plasma sheath; conversely, when the RF power gradually increases, the plasma density gradually increases, and the Debye length of the plasma sheath gradually decreases. Combined with controlling the pressure changes inside the process chamber, this creates plasma oscillation on both sides of the classic chuck. Figure 1 As shown, the thickness of the plasma sheath gradually increases as the plasma density decreases. Figure 1 In the middle image, the plasma density gradually decreases and the thickness of the sheath increases, creating a pressure difference on both sides of the electrostatic chuck.

[0020] The process chamber can be cleaned by utilizing the pressure difference of periodic oscillation; this is the process principle of the present invention.

[0021] Specifically, in one embodiment, taking a TCP etching stage as an example, the ion density and ion energy of the TCP etching stage can be controlled separately. During the internal cleaning process of the chamber, plasma control includes: The first step involves setting the RF power to 1000W, the internal pressure of the process chamber to 8mT, and the response time to 2s. The second step involves an RF power of 800W, an internal pressure of 15mT in the process chamber, and a response time of 2s. The third step involves RF power of 600W, internal pressure of the process chamber of 15mT, and a reaction time of 2s. Step 4: RF power 400W, internal pressure of the process chamber 30mT, reaction time 2s; Step 5: RF power 200W, internal pressure of the process chamber 30mT, reaction time 2s.

[0022] The above completes one process cycle.

[0023] The above process parameters are only a reference value provided by the embodiment of the present invention. In practice, the adjustment step of the RF power can be adjusted to be more precise or the step can be larger to save process time. The specific settings can be obtained through a limited number of experiments based on the specific conditions of the production line.

[0024] After the above control steps are completed, the next cycle is carried out. The first to fifth steps are executed repeatedly, which can form a periodic plasma flow oscillation around the classic suction cup, which can disturb and blow away impurity particles, thereby peeling off the impurity sources accumulated and attached inside the process cavity from the cavity and carrying them out of the process cavity by airflow.

[0025] After the process chamber is treated as described above, the normal wafer fabrication process is then carried out. In the clean process chamber, the number of defects on the finished wafer surface is significantly reduced after defect detection. See details... Figure 2 and Figure 3 , Figure 2 The image on the left side of the middle section shows defect detection on the wafer surface processed using existing techniques. Figure 2 The image on the right side of the middle section shows the wafer processed using the techniques of this invention. Figure 3 This is a curve showing the number of defects. It can be clearly seen that the process cavity treated by this invention significantly reduces the number of defects in the processed wafers.

[0026] The above are merely preferred embodiments of the present invention and are not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A waferless automated cleaning process, characterized in that: An electrostatic chuck is placed inside the process chamber of a plasma etching machine for passivation layer. By controlling the radio frequency power of the generated plasma and the continuous change of the pressure inside the process chamber, a channel is formed on both sides of the electrostatic chuck using the plasma sheath. The impurity source is carried away and removed by the pressure difference on both sides of the electrostatic chuck through periodic oscillation.

2. The waferless automated cleaning process as described in claim 1, characterized in that: The plasma etching equipment mentioned is a TCP equipment.

3. The waferless automated cleaning process as described in claim 1, characterized in that: The passivation layer is silicon nitride.

4. The waferless automated cleaning process as described in claim 1, characterized in that: The plasma etching machine described above completes the etching of the silicon nitride passivation layer in the preceding process and uses Ar to perform F treatment on the wafer surface, resulting in the accumulation of silicon nitride particle impurities in the process cavity.

5. The waferless automated cleaning process as described in claim 1, characterized in that: When the radio frequency power of plasma generation decreases, the generation efficiency of inductively coupled plasma decreases, resulting in a decrease in plasma density. Consequently, the Debye length of the plasma sheath increases. Simultaneously, the internal pressure of the process chamber is continuously adjusted, forming channels with different pressure differences on the side of the electrostatic chuck.

6. The waferless automated cleaning process as described in claim 1, characterized in that: By controlling the radio frequency power of the generated plasma, which varies continuously from 200W to 1000W, and the internal pressure of the process cavity, which varies from 8mT to 30mT, the radio frequency power and the internal pressure of the process cavity are adjusted to match, thereby realizing the plasma cleaning process inside the process cavity.

7. The waferless automated cleaning process as described in claim 4, characterized in that: Controlling the plasma includes the following steps: The first step involves setting the RF power to 1000W, the internal pressure of the process chamber to 8mT, and the response time to 2s. The second step involves an RF power of 800W, an internal pressure of 15mT in the process chamber, and a response time of 2s. The third step involves RF power of 600W, internal pressure of the process chamber of 15mT, and a reaction time of 2s. Step 4: RF power 400W, internal pressure of the process chamber 30mT, reaction time 2s; Step 5: RF power 200W, internal pressure of the process chamber 30mT, reaction time 2s; After completing the above steps, return to the first step to start the next cycle until the process chamber of the plasma etching machine is clean.

8. The waferless automated cleaning process as described in claim 7, characterized in that: The adjustment step of the radio frequency power is adjusted according to the quantity and adhesion of impurity sources accumulated in the process cavity, as well as the balance of process processing time.

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