Etching method and semiconductor structure

Abstract

The invention relates to the technical field of semiconductors, in particular to an etching method and a semiconductor structure. The provided etching method comprises the steps that a semiconductor structure to be etched is provided, and the semiconductor structure at least comprises a bottom oxide layer, a bottom anti-reflection layer and a patterned photoresist layer, and the bottom anti-reflection layer and the patterned photoresist layer are sequentially arranged on the bottom oxide layer; a main etching step is executed, the patterned photoresist layer is used as a mask, and first etching gas is adopted to carry out main etching on the bottom anti-reflection layer with partial thickness; executing an over-etching step, and performing over-etching on the residual part of the bottom anti-reflection layer by adopting second etching gas; wherein the first etching gas comprises a combined gas of fluorocarbon gas and hydrogen, and the second etching gas comprises a combined gas of hydrocarbon fluorine gas, oxygen and inert gas. According to the invention, the problem that the fin part is easy to damage in the opening and etching process of the bottom anti-reflection layer at present can be solved, the damage to the fin part can be reduced, and the height of the photoresist layer can be effectively controlled.

Description

Technical Field

[0001] This invention relates to the field of semiconductor processing technology, and more specifically, to an etching method and a semiconductor structure. Background Technology

[0002] As devices move to 16nm and smaller nodes, many new processes are being introduced in FinFET devices to meet new and stringent requirements, among which multi-threshold voltage (Vt) tuning is essential. To achieve multi-threshold voltage (Vt) tuning, N-channel metal-oxide-semiconductor transistor / P-channel metal-oxide-semiconductor transistor (NMOS / PMOS) ion implantation processes are required, using a bottom anti-reflective coating (BARC) as a mask and protecting other areas of the wafer with a photoresist mask. Ion implantation can precisely reach specific areas within the wafer, enabling localized electrical modifications to form various circuit device components.

[0003] The bottom antireflective layer opening (Barc Open) process is essential for achieving precise ion implantation. Key challenges in developing this process include achieving sufficient effective photoresist height and high selectivity for the gate oxide layer (Fin ALD OX) grown across the entire three-dimensional surface of the fin using atomic layer deposition (ALD). However, related technologies in the Barc Open etching process suffer from drawbacks. The oxide layer is easily etched during the etching process, potentially damaging the fin. Furthermore, the etching process can result in incomplete fin exposure, preventing ion implantation in certain areas. Summary of the Invention

[0004] The purpose of this invention is to provide an etching method and semiconductor structure that can at least alleviate the problem of easy damage to the fins in the current etching process of opening the bottom anti-reflection layer, reduce damage to the fins, and achieve effective control over the height of the photoresist layer.

[0005] In a first aspect, the present invention provides an etching method, the etching method comprising: A semiconductor structure to be etched is provided, the semiconductor structure including at least a bottom oxide layer, and a bottom anti-reflection layer and a patterned photoresist layer sequentially disposed on the bottom oxide layer; The main etching step is performed by using the patterned photoresist layer as a mask and employing a first etching gas to perform main etching on a portion of the thickness of the bottom anti-reflection layer. An etching step was performed, and a second etching gas was used to etch the remaining portion of the bottom anti-reflective layer. The first etching gas comprises a combination of fluorocarbon gas and hydrogen, and the second etching gas comprises a combination of fluorocarbon gas, oxygen and inert gas.

[0006] In some alternative embodiments, the fluorocarbon gas includes one or more of CF4, C2F6, C4F6, or C4F8.

[0007] In some alternative embodiments, the hydrocarbon gas includes one or more of CH3F or CH2F2.

[0008] In some alternative embodiments, the inert gas includes one or more of Ar or He.

[0009] In some alternative embodiments, the fluorocarbon gas includes CF4.

[0010] In some alternative embodiments, the hydrocarbon gas includes CH3F.

[0011] In some alternative implementations, the inert gas includes Ar.

[0012] In some optional embodiments, during the main etching step, the etching selectivity ratio of the bottom anti-reflective layer to the photoresist layer is ≥5:1.

[0013] In some optional embodiments, during the over-etching step, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is ≥8:1.

[0014] In some optional embodiments, during the over-etching step, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is ≥9:1.

[0015] In some alternative embodiments, the volume ratio of the fluorocarbon gas to hydrogen in the first etching gas is 1:100 to 100:1.

[0016] In some alternative embodiments, the volume ratio of the hydrocarbon gas to oxygen in the second etching gas is 1:100 to 100:1.

[0017] In some optional embodiments, the volume ratio of the inert gas to the hydrocarbon gas in the second etching gas is 1:100 to 100:1.

[0018] In some optional embodiments, during the main etching step, the flow rate of the fluorocarbon gas ranges from 0 to 100 sccm; and the flow rate of the hydrogen gas ranges from 0 to 500 sccm.

[0019] In some optional embodiments, during the over-etching step, the flow rate of the hydrocarbon gas ranges from 0 to 50 sccm, the flow rate of the oxygen gas ranges from 0 to 50 sccm, and the flow rate of the inert gas ranges from 0 to 1000 sccm.

[0020] In some alternative embodiments, the semiconductor structure further includes a substrate and fins located on the substrate; the bottom oxide layer and the bottom antireflective layer cover the fins, and the top surface of the bottom antireflective layer is higher than the top of the fins, and the patterned photoresist layer is located on the top surface of the bottom antireflective layer.

[0021] In some optional embodiments, the process conditions of the main etching step include: chamber pressure of 10 mT to 100 mT, high-frequency power of 100 W to 500 W, low-frequency power of 0 W to 500 W, and peak bias voltage of 150 V to 500 V.

[0022] In some optional embodiments, the process conditions for the over-etching step include: a chamber pressure of 10 mT to 100 mT, a high-frequency power of 100 W to 500 W, a low-frequency power of 0 W to 500 W, and a peak bias voltage range of 150 V to 500 V.

[0023] In a second aspect, the present invention provides a semiconductor structure comprising: Substrate; Multiple fins are disposed on the substrate; A bottom oxide layer is located on the substrate, and the bottom oxide layer covers at least a portion of the sidewalls of the fin; A grooved bottom anti-reflective layer is located on the bottom oxide layer, the bottom anti-reflective layer covering the top of the fin; the groove is located within the bottom anti-reflective layer, and the bottom of the groove exposes the bottom oxide layer; The trenches are formed using the aforementioned etching method.

[0024] The above-described technical solutions adopted in the embodiments of this application can achieve the following beneficial effects: The etching method described in this application can be used in the process of opening the bottom anti-reflective layer. This method employs a two-step etching approach—a main etching step and an over-etching step—during the formation of trenches in the bottom anti-reflective layer. The first etching gas in the main etching step uses a combination gas including fluorocarbon gas and hydrogen. This improves the etching selectivity between the bottom anti-reflective layer and the photoresist layer in the main etching step, allows for sufficient photoresist layer height, reduces or avoids the problem of some areas not being fully covered during ion implantation, and results in a vertical photoresist layer / bottom anti-reflective layer profile. Furthermore, the second etching gas in the over-etching step uses a combination gas including fluorocarbon gas, oxygen, and an inert gas. This improves the etching selectivity between the bottom anti-reflective layer and the bottom oxide layer, ensuring complete etching of the bottom anti-reflective layer while minimizing damage to the fins, effectively reducing damage to the fins during the etching process.

[0025] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0027] Figure 1 Schematic diagrams of the bottom anti-reflective coating before and after etching, provided for related technologies; Figure 2 The image shows the results of etching the bottom anti-reflective coating using a gas mixture of CF4, CHF3 and O2, which is provided for related technologies. Figure 3 This is a schematic flowchart of an etching method provided in an embodiment of the present invention; Figure 4 These are schematic diagrams showing the bottom anti-reflective coating before and after etching, as provided in an embodiment of the present invention. Figure 4 (a) Before the etching process is performed to open the bottom anti-reflective coating, Figure 4 (b) After the main etching step in the etching process is executed to open the bottom anti-reflective coating, Figure 4 (c) After the over-etching step in the etching process is executed to enable the bottom anti-reflective coating. Detailed Implementation

[0028] The technical solution of the present invention will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings.

[0030] Figure 1 The diagrams shown are schematics of the bottom anti-reflective coating before and after etching, provided by the relevant technology. Figure 1 In the diagram, PR represents the photoresist layer, Barc represents the bottom anti-reflective coating, OX represents the oxide layer, Fin represents the fins, and Si Substrate represents the silicon substrate. For example... Figure 1 As shown, achieving sufficient effective photoresist (PR) height and high selectivity for the oxide layer are key challenges in the development of the Barc Open process. The effective photoresist height and the high selectivity of the Barc / OX ratio are crucial parameters. If the photoresist is too low, certain areas will not be adequately covered; if it is too high, it will block part of the ion beam during tilted implantation. Simultaneously, sufficient selectivity for the oxide layer is required during the etching of the Barc to avoid damage to the fins. Therefore, achieving precise control of the photoresist height, obtaining a vertical profile of the Barc and photoresist, and avoiding damage to the fins remain key focuses of current processes.

[0031] In related technologies, the etching gases commonly used in the bottom anti-reflective coating etching process are a combination of carbon tetrafluoride, trifluoromethane, and oxygen (CF4, CHF3, and O2). The profile or contour and critical dimensions are controlled by adjusting a series of parameters such as gas ratios, RF power, pressure, and temperature. For example, increasing the CF4 / O2 ratio and decreasing the CHF3 ratio can increase the critical dimension (CD) of the bottom anti-reflective coating, reducing the selectivity ratio of the bottom anti-reflective coating to the photoresist layer. Increasing the low-frequency power and decreasing the pressure can achieve a more vertical profile or contour. However, these existing methods have drawbacks. They have relatively low selectivity for oxide layers. Due to the large number of F ions in the reactive gases, the oxide layer is easily etched during the etching process, potentially damaging the fins. Furthermore, cone angles or tilt angles are prone to occur during etching, preventing complete exposure of the fins and hindering ion implantation in some areas. Figure 2 The image shows the results of etching the bottom anti-reflective coating using a gas mixture of CF4, CHF3, and O2, as shown. Figure 2 As shown, when using a combination of CF4, CHF3 and O2 gases to open and etch the bottom anti-reflective coating, a cone angle or tilt angle appeared at the bottom, which prevented the fins on both sides from being fully exposed. Furthermore, the selectivity for the oxide layer was very low. Before the bottom anti-reflective coating was completely etched, the fins were already damaged, which did not meet the process conditions for opening the bottom anti-reflective coating.

[0032] Therefore, to address the challenges of precisely controlling the height of the photoresist layer, the vertical cross-section of the photoresist layer / bottom anti-reflective coating, and reducing damage to the fins during the bottom anti-reflective coating opening process, this invention provides an etching method and a semiconductor structure. This invention modifies the gas and process steps of the traditional bottom anti-reflective coating etching process, achieving control over the selectivity ratio of the photoresist layer / bottom anti-reflective coating and the bottom anti-reflective coating / oxide layer through a two-step process reaction, and obtaining the vertical cross-section of the photoresist layer / bottom anti-reflective coating. Specific technical solutions are described below.

[0033] refer to Figure 3 As shown in the embodiment of this application, an etching method is provided, which includes: A semiconductor structure to be etched is provided, the semiconductor structure including at least a bottom oxide layer, and a bottom anti-reflection layer and a patterned photoresist layer sequentially disposed on the bottom oxide layer; The main etching step is performed by using a patterned photoresist layer as a mask and employing a first etching gas to perform main etching on a portion of the bottom anti-reflection layer. After performing an etching step, a second etching gas is used to etch the remaining bottom anti-reflective layer. The first etching gas includes a combination of carbon fluorine gas and hydrogen, and the second etching gas includes a combination of carbon hydrogen fluorine gas, oxygen and inert gas.

[0034] In this embodiment of the invention, the provided etching method can be applied to the process of opening the bottom anti-reflective layer (also known as the bottom anti-reflective coating), that is, to the etching process of forming a window area in the bottom anti-reflective coating, especially to the method of adjusting the selectivity in the process of opening the bottom anti-reflective layer of a capacitively coupled plasma (CCP) machine. This etching method can be performed in a vacuum reaction chamber.

[0035] The etching process method for opening the bottom anti-reflective layer provided in this embodiment, that is, the etching process method for forming a window area in the bottom anti-reflective layer, mainly uses two process reactions, such as a main etching step and an over-etching step, to control the selectivity ratio of the photoresist layer / bottom anti-reflective layer and the bottom anti-reflective layer / bottom oxide layer (i.e., oxide layer), thereby obtaining an effective photoresist layer height, a vertical profile of the photoresist layer / bottom anti-reflective layer, and avoiding damage to the fins. Furthermore, this embodiment of the invention can be used to solve the following problems: effective control of the photoresist layer height during the bottom anti-reflective layer opening etching process; maximizing the vertical profile of the photoresist layer / bottom anti-reflective layer; improving the selectivity ratio of the bottom anti-reflective layer / bottom oxide layer; and reducing damage to the fins during etching.

[0036] Specifically, the present invention first provides a semiconductor structure to be etched, the semiconductor structure including at least a bottom oxide layer, a bottom anti-reflection layer disposed on the bottom oxide layer, and a patterned photoresist layer disposed on the bottom anti-reflection layer, that is, at least including a bottom oxide layer, a bottom anti-reflection layer and a patterned photoresist layer stacked sequentially.

[0037] Of particular note is that, unlike conventional one-step etching reactions, this invention employs a two-step process in the bottom anti-reflective layer opening etching process, such as a main etching step (ME) and an over-etching step (OE). The main etching step can quickly and uniformly remove the bottom anti-reflective layer of the substrate, while the over-etching step can clearly remove residues, ensure integrity, and address unevenness. Furthermore, this invention uses different process gases in the main etching step and the over-etching step; for example, the main etching step uses a gas containing fluorocarbons (C). x F y The first etching gas consists of hydrogen (H2), and the over-etching step uses a hydrocarbon gas (CH2) x F y The second etching gas consists of oxygen (O2) and an inert gas.

[0038] Therefore, fluorocarbon gas (C) is used in the first main etching step (ME). x F y Using a combination of hydrogen (H2) and ion implantation gas (CH2) in the main etching step of the bottom anti-reflection layer can improve the etching selectivity ratio of the bottom anti-reflection layer to the photoresist layer in the main etching step. For example, the selectivity ratio of the bottom anti-reflection layer to the photoresist layer can reach 5:1. This allows for sufficient photoresist layer height, reduces or avoids the problem of some areas not being fully covered during ion implantation, and produces a vertical photoresist layer / bottom anti-reflection layer profile. In the second over-etching step (OE), a hydrocarbon gas (CH2) is used. x F yThe use of a combination of oxygen (O2) and inert gas in the over-etching step of the bottom anti-reflective layer can improve the selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer. For example, the selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer can reach approximately 9:1. This ensures that the bottom anti-reflective layer is completely etched while minimizing damage to the fins, effectively reducing damage to the fins during the etching process. Furthermore, due to the presence of O2, the selectivity ratio of the bottom anti-reflective layer to the photoresist layer is reduced in this over-etching step, further consuming the photoresist layer and achieving a suitable photoresist layer height. Therefore, this etching process allows for control over the selectivity ratios of the photoresist layer / bottom anti-reflective layer and the bottom anti-reflective coating / bottom oxide layer, achieving an effective photoresist layer height, obtaining a vertical cross-section of the photoresist layer / bottom anti-reflective layer, and avoiding or minimizing damage to the fins.

[0039] In some embodiments, the semiconductor structure to be etched further includes a substrate and fins located on the substrate; a bottom oxide layer and a bottom anti-reflective layer cover the fins, and the top surface of the bottom anti-reflective layer is higher than the top of the fins, and a patterned photoresist layer is located on the top surface of the bottom anti-reflective layer.

[0040] The aforementioned substrate can be used to provide a process platform for the subsequent formation of semiconductor structures.

[0041] In this embodiment, the substrate can be a semiconductor substrate or a functional layer on a semiconductor substrate. The aforementioned fins can be formed on the semiconductor substrate; the aforementioned bottom oxide layer can be formed on the semiconductor substrate or on a functional layer on the semiconductor substrate.

[0042] In this embodiment, the substrate material is silicon.

[0043] In other embodiments, the substrate material may also be other materials such as germanium, silicon carbide, gallium arsenide, or indium gallium phosphate, and the substrate may also be a silicon-on-insulator substrate or a germanium-on-insulator substrate. The substrate material may be suitable for process requirements or easy to integrate.

[0044] In this embodiment, the substrate can be a fin field-effect transistor with multiple fins (fin structures). In other embodiments, the substrate can also be a planar semiconductor structure. Semiconductor structures that require ion implantation through a mask window are all applicable to the technical solution of this invention and are not limited to fin field-effect transistors.

[0045] Optionally, the semiconductor structure to be etched includes a substrate and a plurality of fins disposed on the substrate, the plurality of fins being disposed independently on the substrate; the fins may include device fins for forming a device and dummy fins to be removed. In some embodiments, the material of the fins and the material of the substrate are both silicon. Alternatively, in other embodiments, the materials of the fins and the substrate may be different, and the fins may be formed on the substrate by a bonding process or by an epitaxial growth process.

[0046] A bottom oxide layer is also formed on the substrate, which covers at least part of the sidewalls of the fin and exposes the top of the fin. The main function of this bottom oxide layer is to act as an etching barrier layer to protect the fin.

[0047] In this embodiment, the material of the bottom oxide layer can be, for example, silicon oxide, and is not particularly limited. Optionally, the bottom oxide layer can be formed by oxidation or deposition; wherein the deposition can be, for example, atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD). Optionally, the bottom oxide layer can be formed directly on the substrate, or other functional layers or dielectric layers can be formed between the bottom oxide layer and the substrate, and is not particularly limited.

[0048] A bottom anti-reflective layer is formed on the bottom oxide layer. The bottom anti-reflective layer is disposed on the top surface of the bottom oxide layer and covers the top of the fin, that is, the top surface of the bottom anti-reflective layer is higher than the top surface of the fin.

[0049] In this embodiment, the material of the bottom anti-reflective layer is BARC. The bottom oxide layer can be formed by a deposition process; wherein the deposition can be, for example, atomic layer deposition (ALD), chemical vapor deposition (CVD), or physical vapor deposition (PVD).

[0050] A patterned photoresist layer (PR) is formed on the bottom anti-reflection layer, and the patterned photoresist layer is disposed on the top surface of the bottom anti-reflection layer.

[0051] In this embodiment, when providing the semiconductor structure to be etched, a substrate and fins located on the substrate can be provided first. Then, a bottom oxide layer covering part of the sidewalls of the fins is formed, followed by a bottom anti-reflective layer covering the top and bottom oxide layers of the fins. Finally, a patterned photoresist layer is formed on the bottom anti-reflective layer. The patterned photoresist layer can be formed by first forming a photoresist layer on the bottom anti-reflective layer, then exposing and developing the photoresist layer to form a patterned photoresist layer with a preset pattern; for example, by exposing and developing the photoresist layer to pattern the photoresist layer, forming a trench window exposing the bottom anti-reflective layer. The bottom anti-reflective layer exposed by the trench window is etched to expose the bottom oxide layer.

[0052] Specifically, the patterned photoresist layer is achieved through exposure and development. Light contacts the surface of the photoresist material, altering its chemical composition. The developer removes a portion of the photoresist material, resulting in the desired semiconductor structure pattern. This patterned photoresist layer has trench windows corresponding to the locations of the openings (or trenches) to be formed. Through these trench windows, a bottom anti-reflective layer is etched to form a bottom anti-reflective layer with trenches (or vias).

[0053] It should be noted that, depending on actual needs, the height relationship of the bottom oxide layer, bottom anti-reflection layer, photoresist layer, and other material layers can be determined based on the actual target material layer and the etching ratio of the etched layer material and the mask layer material, without imposing too many restrictions on this.

[0054] Optionally, the etching process in this embodiment can be anisotropic dry etching.

[0055] The etching method provided in this embodiment improves the selectivity ratio of the bottom anti-reflective coating to the photoresist layer, which can avoid or reduce the etching of the photoresist layer in the main etching step. The photoresist layer has a good masking effect, which ensures the dimensional accuracy of the bottom anti-reflective coating forming window area, thereby ensuring the dimensional accuracy of the P / N implantation area formed based on the window area, and ensuring the electrical performance of the final semiconductor device.

[0056] Specifically, in the etching process for forming the window area of ​​the bottom anti-reflection layer in this embodiment, a main etching step is performed first, followed by an over-etching step. In the main etching step, a patterned photoresist layer is used as a mask, and a first etching gas is employed to perform main etching on a portion of the bottom anti-reflection layer. This first etching gas includes a combination of fluorocarbon gas and hydrogen. In some embodiments, the fluorocarbon gas in the main etching step includes one or more of CF4, C2F6, C4F6, or C4F8. In particular, the inventors of this application, through optimization of fluorocarbon gases, have found that using CF4 fluorocarbon gas yields better results; therefore, in some preferred embodiments, the fluorocarbon gas is CF4. The use of a combination of CF4 and H2 as the first etching gas allows for a balance between etching rate and selectivity / profile control, facilitating precise control over etching morphology and interface damage.

[0057] Therefore, in this embodiment, the main etching step uses a chemical system of fluorocarbon gases such as CF4 and H2 as the first etching gas. Its main functions are: (a) CF4 decomposes in plasma to generate F free radicals, which can effectively etch the BARC material and generate volatile fluorides. These fluorides are removed during the etching process to achieve the main purpose of removing BARC. (b) Utilizing the reducing properties of H2, it can react with the oxides generated during the etching process to reduce the formation of oxides. This helps to prevent oxidation of the photoresist layer surface and maintain the chemical stability of the photoresist, thereby achieving the requirement of high selectivity for etching the bottom anti-reflection layer and the photoresist layer.

[0058] In some embodiments, during the main etching step, the etching selectivity ratio of the bottom anti-reflective layer to the photoresist layer is ≥5:1.

[0059] In this embodiment of the invention, under the etching conditions of the first etching gas such as the combination of CF4 and H2, the etching selectivity ratio of the bottom anti-reflection layer and the photoresist layer can reach about 5:1, or even more than 5:1. This greatly improves the selectivity ratio of the bottom anti-reflection coating to the photoresist layer, helps to reduce the etching of the photoresist layer in the main etching step, can reserve sufficient photoresist layer height, reduce or avoid the problem that some areas will not be fully covered during ion implantation, and can obtain a vertical photoresist layer / bottom anti-reflection layer profile.

[0060] In some embodiments, during the main etching step, the volume ratio of fluorocarbon gas to hydrogen in the first etching gas is 1:100 to 100:1. Preferably, in some embodiments, during the main etching step, the volume ratio of fluorocarbon gas to hydrogen in the first etching gas is 1:5 to 5:1; for example, it can be 1:100, 1:50, 1:10, 1:5, 1:2, 1:1, 2:1, 3:1, 5:1, 50:1, 100:1, etc.

[0061] When the volume ratio of fluorocarbon gas to hydrogen is within the above range, most of the bottom anti-reflective layer can be etched at a suitable etching rate, and the selectivity between the bottom anti-reflective coating and the photoresist layer can be high. This can effectively utilize the role of fluorocarbon gas in etching BARC materials and the role of hydrogen in preventing oxidation of the photoresist surface.

[0062] It should be noted that all gases in the first etching gas can be supplied simultaneously or in a pulsed manner. The gas supply rate can be adjusted according to actual needs. If all gases are mixed and introduced, the first speed can be used first, followed by the second speed, and the second speed can be less than the first speed. In addition, if different gases are introduced at different times, the gas supply rate of each gas can also be changed.

[0063] In some embodiments, during the main etching step, the flow rate of the fluorocarbon gas ranges from 0 to 100 sccm, excluding 0; that is, the flow rate of the fluorocarbon gas is greater than 0 and less than or equal to 100 sccm. The flow rate of the hydrogen gas ranges from 0 to 500 sccm, excluding 0; that is, the flow rate of the hydrogen gas is greater than 0 and less than or equal to 500 sccm. As an example, the flow rate of the fluorocarbon gas can be any value within the limit range of 10 sccm, 20 sccm, 30 sccm, 50 sccm, 60 sccm, 80 sccm, 90 sccm, 100 sccm, etc., and the flow rate of the hydrogen gas can be any value within the limit range of 10 sccm, 50 sccm, 100 sccm, 150 sccm, 200 sccm, 300 sccm, 400 sccm, 500 sccm, etc. These can be selected as needed, and no excessive restrictions are imposed here.

[0064] It should be understood that the flow rate of the first etching gas should not be too high or too low. If the flow rate of fluorine and hydrogen in the first etching gas is too high, a high etching rate is likely to occur, which may lead to the accidental etching of other layers or damage to the fins during the etching of the bottom anti-reflection layer. If the flow rate of fluorine and hydrogen in the first etching gas is too low, the etching rate of the bottom anti-reflection layer will be too slow, which is not conducive to improving the formation efficiency of the semiconductor structure.

[0065] In some embodiments, the process parameters of the main etching step further include: chamber pressure of 10 mT to 100 mT, high-frequency power of 100 W to 500 W, low-frequency power of 0 W to 500 W, and peak bias voltage of 150 V to 500 V.

[0066] Therefore, by reasonably setting the process parameters of the main etching step, the etching effect on the bottom anti-reflection layer can be guaranteed, and the etching selection ratio between the bottom anti-reflection coating and the photoresist layer can meet the process requirements.

[0067] In some embodiments, during the etching step, the hydrocarbon gas includes one or more of CH3F or CH2F2; in particular, the inventors of this application have found through optimization of the hydrocarbon gas that using CH3F hydrocarbon gas can achieve better results. Therefore, in some preferred embodiments, the hydrocarbon gas is CH3F.

[0068] In some embodiments, the inert gas used in the etching step includes one or more of Ar (argon) or He (helium); in particular, the inventors of this application have found through optimization of the inert gas that using Ar inert gas can achieve better results. Therefore, in some preferred embodiments, the inert gas is Ar. In this embodiment, the second etching gas is a combination of CH3F, O2, and Ar, which can balance the etching rate and selectivity / profile control, facilitating precise control of the etching morphology and interface damage.

[0069] Therefore, in this embodiment, the over-etching step uses a chemical system of CH3F, O2, and Ar as the second etching gas. Its main functions are: First, CH3F decomposes in plasma to generate F (fluorine) radicals. These radicals have high reactivity and can effectively etch the BARC material. The F radicals react with the organic and inorganic components in the BARC material to generate volatile fluorides. These products are removed during the etching process, achieving the main purpose of removing the BARC. Simultaneously, CH3F has a low etching rate for the oxide layer, achieving a selectivity between the bottom anti-reflective layer and the bottom oxide layer, reducing damage to the fins. Second, O2 decomposes in plasma to generate O radicals. These radicals have high reactivity and can effectively etch the BARC material. The O radicals react with the organic components in the BARC material to generate volatile oxides. These products are removed during the etching process, achieving the effect of etching the bottom anti-reflective layer. Simultaneously, O2 reacts with the photoresist material through oxidation, generating volatile oxides such as CO, CO2, and H2O. These products are removed during the etching process, thus eliminating the photoresist and ensuring its effective height. Additionally, inert gases such as Ar can serve as carrier and dilution gases, enhancing the bombardment effect.

[0070] In some embodiments, during the etching step, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is ≥8:1. As an example, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is 8:1 to 9:1.

[0071] In some embodiments, during the over-etching step, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is ≥9:1.

[0072] In this embodiment of the invention, under the etching conditions of the second etching gas such as the combination of CH3F, O2 and Ar, the etching selectivity ratio of the bottom anti-reflection layer and the bottom oxide layer can reach more than 8:1, or even about 9:1. In this way, the bottom anti-reflection layer is completely etched without damaging the fin. At the same time, due to O2, the selectivity ratio of the bottom anti-reflection layer and the photoresist layer is reduced, and the photoresist layer is further consumed, so that a suitable photoresist layer height can be achieved.

[0073] In some embodiments, during the over-etching step, the volume ratio of hydrocarbon gas to oxygen in the second etching gas is 1:100 to 100:1. Preferably, in some embodiments, during the over-etching step, the volume ratio of hydrocarbon gas to oxygen in the second etching gas is 1:4 to 4:1; for example, it can be 1:100, 1:50, 1:10, 1:5, 1:4, 1:2, 1:1, 2:1, 3:1, 4:1, 10:1, 100:1, etc.

[0074] In some embodiments, during the over-etching step, the volume ratio of inert gas to hydrocarbon gas in the second etching gas is 1:100 to 100:1. Preferably, in some embodiments, during the over-etching step, the volume ratio of inert gas to hydrocarbon gas in the second etching gas is 2:1 to 20:1; for example, it can be 2:1, 4:1, 5:1, 6:1, 8:1, 10:1, 12:1, 15:1, 20:1, etc.

[0075] When the volume ratio of hydrocarbon gas and oxygen, or hydrocarbon gas and inert gas in the second etching gas is within the above range, the remaining bottom anti-reflective layer can be etched at a suitable etching rate. This allows for a high selectivity between the bottom anti-reflective coating and the bottom oxide layer, effectively utilizing the role of hydrocarbon gas and oxygen, reducing damage to the fins, and achieving a suitable photoresist layer height.

[0076] It should be noted that all gases in the second etching gas can be supplied simultaneously or in a pulsed manner. The gas supply rate can be adjusted according to actual needs. If all gases are mixed and introduced, the first speed can be used first, followed by the second speed, and the second speed can be less than the first speed. In addition, if different gases are introduced at different times, the gas supply rate of each gas can also be changed.

[0077] In some embodiments, during the etching step, the flow rate of hydrocarbon gas ranges from 0 to 50 sccm, excluding 0, meaning the flow rate of hydrocarbon gas is greater than 0 and less than or equal to 50 sccm; the flow rate of oxygen ranges from 0 to 50 sccm, excluding 0, meaning the flow rate of oxygen is greater than 0 and less than or equal to 50 sccm; and the flow rate of inert gas ranges from 0 to 1000 sccm, excluding 0, meaning the flow rate of inert gas is greater than 0 and less than or equal to 1000 sccm. As an example, the flow rate of hydrocarbon gases can be any value within the limit range of 5 sccm, 10 sccm, 20 sccm, 30 sccm, 40 sccm, 50 sccm, etc.; the flow rate of oxygen can be any value within the limit range of 5 sccm, 10 sccm, 20 sccm, 30 sccm, 40 sccm, 50 sccm, etc.; and the flow rate of inert gases can be any value within the limit range of 10 sccm, 50 sccm, 100 sccm, 200 sccm, 300 sccm, 400 sccm, 500 sccm, 600 sccm, 800 sccm, 1000 sccm, etc. The specific value can be selected according to the needs, and no excessive restrictions are imposed here.

[0078] It should be understood that the flow rate of the second etching gas should not be too high or too low. If the flow rate of hydrocarbon and oxygen in the second etching gas is too high, a high etching rate is likely to occur, which may lead to the accidental etching of other layers or damage to the fins during the etching of the bottom anti-reflection layer. If the flow rate of hydrocarbon and oxygen in the second etching gas is too low, the etching rate of the bottom anti-reflection layer may be too slow, which is not conducive to improving the formation efficiency of the semiconductor structure.

[0079] In some embodiments, the process parameters of the over-etching step further include: chamber pressure of 10 mT to 100 mT, high-frequency power of 100 W to 500 W, low-frequency power of 0 W to 500 W, and peak bias voltage of 150 V to 500 V.

[0080] Therefore, by reasonably setting the process parameters of the above-mentioned etching step, the etching effect on the bottom anti-reflective layer can be guaranteed, and at the same time, the etching selection ratio of the bottom anti-reflective coating to the bottom oxide layer can meet the process requirements.

[0081] Figure 4 The diagrams shown are schematic diagrams of the bottom anti-reflective coating before and after etching according to an embodiment of the present invention. Figure 4 (a) Before the etching process is performed to open the bottom anti-reflective coating, Figure 4 (b) After the main etching step in the etching process is executed to open the bottom anti-reflective coating, Figure 4(c) After the over-etching step in the etching process is executed to enable the bottom anti-reflective coating. For example... Figure 4 As shown in (a), before etching, the height of the photoresist layer (PR) is approximately 266.1 nm, the thickness of the bottom anti-reflective layer (Barc) is approximately 245.2 nm, the height of the fin is approximately 122.1 nm, the height of the bottom oxide layer (OX) on the fin surface is approximately 11.8 nm (approximately 16.0 nm on the sides), and the thickness of the shallow trench isolation oxide layer (STI OX) is approximately 82.7 nm. Figure 4 As shown in (b), after completing the first main etching step, the remaining photoresist layer (PR) has a height of approximately 230.4 nm, the etched height of the photoresist layer is approximately 35.7 nm, and the bottom anti-reflective layer (Barc) has an etching thickness of approximately 206.1 nm. Therefore, the etching selectivity ratio of the bottom anti-reflective layer to the photoresist layer reaches 5.77, the photoresist layer is at a healthy height, and a vertical profile of the bottom anti-reflective layer is obtained. Further, as... Figure 4 As shown in (c), after completing the second over-etching step, the bottom anti-reflective layer exposed by the photoresist layer has been completely etched away, and the fins have been fully exposed. There are still some residues of the bottom oxide layer on the fin surface. The bottom anti-reflective layer in the middle of the fin is approximately 51.2 nm thick, the bottom oxide layer loss is approximately 5.6 nm, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is approximately 8.96, and the height of the remaining photoresist layer is approximately 129.9 nm, which meets the requirements for subsequent ion implantation. Therefore, this invention has reproducibility for the bottom anti-reflective coating opening process at different nodes, that is, it has reproducibility for the etching process of forming the window area of ​​the bottom anti-reflective coating at different nodes. After performing the main etching step, a structure with a vertical cross-section can be obtained, and all fins can be fully exposed. During the over-etching step, there is a sufficient selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer, removing the bottom anti-reflective layer without damaging the fins.

[0082] In summary, in fin field-effect transistor (Fin FET) devices at 16nm and smaller nodes, the etching process for forming the window region with the bottom anti-reflective coating has always been a challenge. This challenge involves ensuring the bottom anti-reflective coating is completely etched while leaving an appropriate height of photoresist layer as a barrier for ion implantation, and achieving zero damage to the fins. Therefore, the process demands extremely high precision. It requires a suitable selectivity ratio between the bottom anti-reflective layer and the photoresist layer to meet the effective height requirement of the photoresist layer, and a very high selectivity ratio for etching the bottom anti-reflective layer and the bottom oxide layer. The goal is to achieve complete etching of the bottom anti-reflective layer with minimal damage to the fins, and for the photoresist layer and the bottom anti-reflective layer to have a vertical cross-section, providing favorable conditions for subsequent ion implantation.

[0083] This invention provides a novel etching method for forming the window area of ​​the bottom anti-reflective coating by innovatively adjusting the process steps of the etching process and selecting different etching gases. Figure 4 The etching effect of the embodiments of the present invention has been verified. The method provided by the embodiments of the present invention achieves an extremely high selectivity ratio between the bottom anti-reflective layer and the bottom oxide layer through two-step bottom anti-reflective layer etching. While the bottom anti-reflective layer is completely etched, there is virtually no damage to the fins, meeting current process development requirements. Furthermore, the method provided by the embodiments of the present invention, by using different selectivity ratios between the bottom anti-reflective layer and the photoresist layer in two steps, achieves effective control of the photoresist layer height, providing the necessary conditions for precise ion implantation to reach the interior of the wafer. The embodiments of the present invention provide a new solution for the etching process of the bottom anti-reflective coating forming the window area, which is helpful for the development of new process nodes.

[0084] Accordingly, embodiments of this application also provide a semiconductor structure formed using the aforementioned etching method.

[0085] In some embodiments, the semiconductor structure includes: Substrate; Multiple fins are disposed on the substrate; A bottom oxide layer is located on the substrate and covers at least a portion of the sidewalls of the fin. A grooved bottom anti-reflective layer is located on the bottom oxide layer, and the bottom anti-reflective layer covers the top of the fin; the groove is located within the bottom anti-reflective layer, and the bottom of the groove exposes the bottom oxide layer; The trenches were formed using the aforementioned etching method.

[0086] The provided semiconductor structure can ensure good fin formation quality of the device, which is beneficial to improving the electrical performance of the semiconductor structure.

[0087] The semiconductor structure described in this embodiment is formed using the etching method described in the foregoing embodiments. For a detailed description of the semiconductor structure described in this embodiment, please refer to the corresponding description in the foregoing embodiments. This embodiment will not repeat the description here.

[0088] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An etching method, characterized in that, The etching method includes: A semiconductor structure to be etched is provided, the semiconductor structure including at least a bottom oxide layer, and a bottom anti-reflection layer and a patterned photoresist layer sequentially disposed on the bottom oxide layer; The main etching step is performed by using the patterned photoresist layer as a mask and employing a first etching gas to perform main etching on a portion of the thickness of the bottom anti-reflection layer. An etching step was performed, and a second etching gas was used to etch the remaining portion of the bottom anti-reflective layer. The first etching gas comprises a combination of fluorocarbon gas and hydrogen, and the second etching gas comprises a combination of fluorocarbon gas, oxygen and inert gas.

2. The etching method according to claim 1, characterized in that, The fluorocarbon gas includes one or more of CF4, C2F6, C4F6, or C4F8; And / or, the hydrocarbon gas includes one or more of CH3F or CH2F2; And / or, the inert gas includes one or more of Ar or He.

3. The etching method according to claim 2, characterized in that, The fluorocarbon gas includes CF4; And / or, the hydrocarbon gas includes CH3F; And / or, the inert gas includes Ar.

4. The etching method according to claim 1, characterized in that, In the main etching step, the etching selectivity ratio of the bottom anti-reflection layer to the photoresist layer is ≥5:1; And / or, in the over-etching step, the etching selectivity ratio of the bottom anti-reflective layer to the bottom oxide layer is ≥8:

1.

5. The etching method according to claim 1, characterized in that, In the first etching gas, the volume ratio of the fluorocarbon gas to the hydrogen gas is 1:100 to 100:1; And / or, in the second etching gas, the volume ratio of the hydrocarbon gas to oxygen is 1:100 to 100:1; And / or, in the second etching gas, the volume ratio of the inert gas to the hydrocarbon gas is 1:100 to 100:

1.

6. The etching method according to claim 5, characterized in that, In the main etching step, the flow rate of the fluorocarbon gas is in the range of 0–100 sccm; the flow rate of the hydrogen gas is in the range of 0–500 sccm. And / or, in the over-etching step, the flow rate of the hydrocarbon gas is in the range of 0–50 sccm, the flow rate of the oxygen gas is in the range of 0–50 sccm, and the flow rate of the inert gas is in the range of 0–1000 sccm.

7. The etching method according to claim 1, characterized in that, The semiconductor structure further includes a substrate and fins located on the substrate; The bottom oxide layer and the bottom anti-reflective layer cover the fin, and the top surface of the bottom anti-reflective layer is higher than the top of the fin. The patterned photoresist layer is located on the top surface of the bottom anti-reflective layer.

8. The etching method according to any one of claims 1 to 7, characterized in that, The process conditions for the main etching step include: The chamber pressure is 10 mT to 100 mT, the high-frequency power is 100 W to 500 W, the low-frequency power is 0 W to 500 W, and the peak value range of the bias voltage is 150 V to 500 V.

9. The etching method according to any one of claims 1 to 7, characterized in that, The process conditions for the etching step include: The chamber pressure is 10 mT to 100 mT, the high-frequency power is 100 W to 500 W, the low-frequency power is 0 W to 500 W, and the peak value range of the bias voltage is 150 V to 500 V.

10. A semiconductor structure, characterized in that, include: Substrate; Multiple fins are disposed on the substrate; A bottom oxide layer is located on the substrate, and the bottom oxide layer covers at least a portion of the sidewalls of the fin; A grooved bottom anti-reflective layer is located on the bottom oxide layer, the bottom anti-reflective layer covering the top of the fin; the groove is located within the bottom anti-reflective layer, and the bottom of the groove exposes the bottom oxide layer; The trenches are formed using the etching method described in any one of claims 1 to 9.

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