Reference voltage generating circuit and method thereof

Abstract

Embodiments of the present disclosure include a reference voltage generation circuit for a semiconductor device and a method thereof. The reference voltage generation circuit includes a first current generator circuit configured to generate a temperature proportional current that increases in proportion to the temperature, a second current generator circuit configured to generate a temperature inverse proportional current that decreases as the temperature increases, and a temperature coefficient compensation circuit, the temperature coefficient compensation circuit is configured to adjust a second-order temperature coefficient by adjusting the temperature proportional current or the temperature inverse proportional current, and combine the adjusted temperature proportional current and the adjusted temperature inverse proportional current to generate a reference voltage without the second-order temperature coefficient, the second-order temperature coefficient is associated with a non-linear change in the reference voltage.

Description

Technical Field

[0001] The embodiments described herein relate to semiconductor devices, and more particularly to reference voltage generation circuits for semiconductor devices or reference voltage generation circuits for semiconductor devices. Background Technology

[0002] With technological advancements, more components can be integrated per unit area on a semiconductor chip. Furthermore, the performance of semiconductor chips is accelerating. Due to this advanced integration of components and accelerated performance, the heat generated within semiconductor devices (e.g., temperature) has an increasingly significant impact on device stability and accuracy. In some cases, reference voltages are used to address these temperature variations. Therefore, calculating and providing a stable reference voltage can ensure the performance and / or reliability of semiconductor devices, especially those subjected to high temperatures and / or temperature fluctuations.

[0003] In current technology, a bandgap reference (hereinafter referred to as BGR) circuit can be used to generate a reference voltage. Generally, the base-emitter voltage (VBE) of a bipolar junction transistor (BJT) can be used to generate the reference voltage. However, the generated reference voltage typically includes second-order or higher-order coefficients with respect to temperature and / or additional higher-order components that depend on temperature variables. Therefore, the generated reference voltage curve includes a curvature that bends upwards or downwards based on device temperature, rather than a linear reference voltage curve. The curvature of the reference voltage curve is based on the nonlinear change in the reference voltage (or reference current) caused by temperature, and this curvature can have a significant impact on the reference voltage, and thus a significant impact on the stability, performance, and / or reliability of the device. Summary of the Invention

[0004] Embodiments consistent with this disclosure may provide a reference voltage generator circuit or reference voltage generation circuit that can reduce temperature-induced voltage variations by eliminating higher-order temperature coefficients (e.g., second-order and higher-order terms). Embodiments consistent with this disclosure may also provide a reference voltage generation circuit that can reduce temperature-induced voltage fluctuations while minimizing the number of bipolar junction transistors (BJTs).

[0005] According to an embodiment, a reference voltage generation circuit for a semiconductor device may include: a first current generator circuit configured to generate a temperature-proportional current that increases proportionally with temperature; a second current generator circuit operatively coupled to the first current generator circuit and configured to generate a temperature-inverse current that decreases with increasing temperature; and a temperature coefficient compensation circuit configured to adjust the temperature-proportional current or the temperature-inverse current to change a second-order temperature coefficient associated with the temperature-proportional current or the temperature-inverse current, and to combine the adjusted temperature-proportional current and the temperature-inverse current to generate a reference voltage without the second-order temperature coefficient, the second-order temperature coefficient being associated with a nonlinear change in the reference voltage.

[0006] According to another embodiment, a method for generating a reference voltage for a semiconductor device may include: generating a temperature-proportional current using the base-emitter voltage of a bipolar junction transistor; generating a first temperature-inverse current having a first second-order temperature coefficient and a second temperature-inverse current having a second second-order temperature coefficient based on the temperature-proportional current, wherein the first second-order temperature coefficient and the second second-order temperature coefficient have different values; adjusting at least one of the first temperature-inverse current or the second temperature-inverse current; generating a third temperature-inverse current by combining the adjusted first temperature-inverse current and the second temperature-inverse current; adjusting the third temperature-inverse current; and generating a reference current by combining the temperature-proportional current and the adjusted third temperature-inverse current.

[0007] According to another embodiment, a reference voltage generation circuit for a semiconductor device may include a temperature-proportional current generator circuit, the temperature-proportional current generator circuit including a first bipolar junction transistor (BJT) and a second BJT, the temperature-proportional current generator circuit being configured to use the first BJT and the second BJT to generate a temperature-proportional current that increases proportionally to temperature. In some embodiments, the reference voltage generation circuit may further include a temperature-inverse current generator circuit, the temperature-inverse current generator circuit being operatively coupled to the temperature-proportional current generator circuit and including a third BJT and a fourth BJT, the temperature-inverse current generator circuit being configured to: supply the temperature-proportional current to the third BJT to generate a first temperature-inverse current that decreases with increasing temperature; combine the temperature-proportional current and the first temperature-inverse current to generate an intermediate reference current; and apply the intermediate reference current to the fourth BJT to generate a second temperature-inverse current. In some embodiments, the reference voltage generation circuit may further include a temperature coefficient compensation circuit operatively coupled to the temperature proportional current generator circuit and the temperature inverse current generator circuit, and configured to: adjust at least one of the first temperature inverse current or the second temperature inverse current to change the second-order temperature coefficient; and combine the adjusted first temperature inverse current and the second temperature inverse current to generate a reference voltage without the second-order temperature coefficient, which is associated with a nonlinear change in the reference voltage. Attached Figure Description

[0008] In the following detailed description, the above and other objects and features of the present disclosure are described with reference to the accompanying drawings through embodiments of the present disclosure.

[0009] Figure 1 This is a block diagram illustrating a reference voltage generation circuit consistent with embodiments of the present disclosure.

[0010] Figure 2 It shows the basis Figure 1 A circuit configuration diagram of an embodiment of the reference voltage generation circuit.

[0011] Figure 3 This is a diagram illustrating an example of a prior art reference voltage generator circuit that uses only a temperature-proportional current generator circuit to generate a reference voltage.

[0012] Figure 4 It is shown by Figure 3 A graph illustrating an example of a reference voltage generated by a prior art reference voltage generator circuit based on temperature variations.

[0013] Figure 5 This is a diagram illustrating exemplary operation of a reference voltage generation circuit consistent with embodiments of this disclosure.

[0014] Figure 6 This is a flowchart illustrating a reference voltage generation method consistent with embodiments of this disclosure.

[0015] Figure 7 It is a graph showing a reference voltage with curvature compensated by a reference voltage generation circuit, consistent with an embodiment of this disclosure.

[0016] Figure 8 This is a diagram illustrating another exemplary embodiment of a reference voltage generation circuit consistent with this disclosure.

[0017] Figure 9 This is a block diagram illustrating an exemplary system-on-chip (SoC) including a reference voltage generator circuit, consistent with embodiments of this disclosure. Detailed Implementation

[0018] It will be understood that the foregoing general description and the following detailed description are exemplary and will be considered as providing additional description of the claimed inventive concept. Reference numerals are indicated in detail in the embodiments of this disclosure, examples of which are shown in the accompanying drawings. Wherever possible, the same reference numerals are used in the specification and drawings to refer to the same or similar parts.

[0019] Figure 1 This is a block diagram illustrating a reference voltage generation circuit according to an embodiment of the present disclosure. (See reference...) Figure 1 For example, the reference voltage generation circuit 100 may include a PTAT (Proportional-To-Absolute-Temperature) generator circuit 110, a CTAT (Complementary-To-Absolute-Temperature) generator circuit 130, and a temperature coefficient compensation circuit 150. As used herein, "circuit" can refer to an interconnection arrangement of electronic components (such as resistors, capacitors, transistors, diodes, and other electrical components) that work together to perform a particular function or a series of functions within an electrical or electronic system. Furthermore, any circuit described herein may refer to a single circuit or a sub-circuit of the reference voltage generation circuit of this disclosure.

[0020] In some embodiments, the PTAT generator circuit 110 can generate a temperature-proportional current (IT) that increases with temperature (e.g., proportional to the change in temperature). PTATTo this end, the PTAT generator circuit 110 may include a bipolar junction transistor (BJT) having a base-emitter voltage (VBE). The base-emitter voltage (VBE) of the BJT also has a temperature-inverse characteristic (CTAT) that decreases with increasing temperature. The PTAT generator circuit 110 can use the base-emitter voltage (VBE) of the BJT to generate a temperature-proportional current (IT). PTAT ) or temperature proportional voltage (V PTAT ).

[0021] In some embodiments, the CTAT generator circuit 130 can be based on temperature proportional current (IT). PTAT The base-emitter voltage (VBE) of the BJT generates a temperature-inverse current (I) with different temperature factors ("VTln(T)"). CTATX I CTATY The CTAT generator circuit 130 can use temperature-proportional current (I). PTAT Different collector currents (Ic) are applied to two different BJTs. Then, temperature-inverse currents (Ic) with different logarithmic errors ("VTln(T)" or "Tln(T)") can be generated. CTATX I CTATY In this example, due to thermal voltage ("V") T ) is represented as a first-order coefficient of temperature ("T"), so the logarithmic error can be represented as "Tln(T)".

[0022] In some embodiments, the temperature coefficient compensation circuit 150 can utilize a temperature inverse current (IT) generated by the CTAT generator circuit 130. CTATX I CTATY This is used to generate a reference voltage (Vref) without an error term (e.g., with the logarithmic error term removed (“Tln(T)”)). The temperature coefficient compensation circuit 150 can adjust the temperature inverse current (IT). CTATX I CTATY The magnitude of ) is used to remove the temperature inverse current (I CTATX I CTATY The term “Tln(T)” is included in each of the terms in the equation. For example, the temperature coefficient compensation circuit 150 can scale the temperature inverse current (I) by multiplying it by a factor K (where K can be an integer or non-integer value). CTATX I CTATY Then, by adjusting the temperature inverse current (I) CTATX I CTATYBy combining these parameters, the "Tln(T)" value corresponding to the second-order temperature coefficient can be removed. The reference voltage (Vref) with the "Tln(T)" value removed can be generated, for example, based on a reference current (Iref) with the "Tln(T)" value also removed. These features will be described in more detail below with reference to the accompanying drawings.

[0023] Based on the above description, the reference voltage generation circuit 100, consistent with the embodiments of this disclosure, can generate a reference voltage (Vref) with the "Tln(T)" value removed by, for example, adding two BJTs to the CTAT generator circuit 130. As a result, a stable reference voltage Vref can be generated at minimal cost, even under extreme temperatures.

[0024] Figure 2 It shows the basis Figure 1 A circuit diagram illustrating the circuit configuration of an embodiment of the reference voltage generation circuit. (Refer to...) Figure 2 An exemplary reference voltage generation circuit 100a includes a PTAT generator circuit 110a, a CTAT generator circuit 130a, and a temperature coefficient compensation circuit 150a.

[0025] PTAT generator circuit 110a may include PMOS transistors PM1 and PM2, operational amplifier 112, first resistor R1, and bipolar junction transistors (BJTs) Q1 and Q2 to generate a temperature-proportional current (IT) that increases with temperature. PTAT The source of each of PMOS transistors PM1 and PM2 can be connected to the power supply voltage terminal VDD. The gate of each of PMOS transistors PM1 and PM2 can be connected to the output terminal of operational amplifier 112. The drain of PMOS transistor PM1 can be connected to the negative input terminal (-) of operational amplifier 112, and the drain of PMOS transistor PM2 can be connected to the positive input terminal (+) of operational amplifier 112. The collector of a diode-connected first BJT Q1 can be connected to the drain of PMOS transistor PM1. The emitter of the diode-connected first BJT Q1 can be connected to the ground terminal GND, and the emitter of a diode-connected second BJT Q2 can be connected to the ground terminal GND. A first resistor R1 can be connected between the drain of PMOS transistor PM2 and the collector of the second BJT Q2. In some embodiments, the second BJT Q2 may include any number (xN) of diode-connected BJTs in parallel.

[0026] Further reference Figure 2In an exemplary embodiment, the base-emitter voltage VBE1 of the first BJT Q1 can be input to the negative input terminal (-) of the operational amplifier 112. Then, the base-emitter voltage VBE1 of the first BJT Q1 can be transferred to the positive input terminal (+) of the operational amplifier 112 via feedback. Therefore, the differential voltage (ΔVBE=VBE1-VBE2) between the base-emitter voltage VBE1 of the first BJT Q1 and the base-emitter voltage VBE2 of the second BJT Q2 can be applied to the first resistor R1. The base-emitter voltage VBE1 of the first BJT Q1 has a temperature-inverse proportional current (CTAT) characteristic that decreases with increasing temperature. On the other hand, the temperature-proportional current (I) has a temperature-proportional current (PTAT) characteristic. PTAT A differential voltage (ΔVBE) flows through the first resistor R1. Therefore, the basic operation of the PTAT generator circuit 110a can be based on the inverse temperature-dependent CTAT characteristic generated by using the base-emitter voltage VBE1 of the first BJT Q1. The PTAT generator circuit 110a can therefore generate a temperature-dependent current (IT) based on the inverse temperature-dependent CTAT characteristic associated with the first BJT Q1. PTAT ).

[0027] CTAT generator circuit 130a can mirror the temperature-proportional current (I) generated by PTAT generator circuit 110a. PTAT To generate the first temperature inverse current (I) CTATX ) and the second temperature inverse current (I CTATY Therefore, the CTAT generator circuit 130a may include a method for generating a first temperature inverse current (I0). CTATX The first CTAT generator circuit 132a and the circuit for generating the second temperature inverse current (I) CTATY The second CTAT generator circuit 134a.

[0028] The first CTAT generator circuit 132a may include a PTAT current source 133a, a third BJT Q3, a diode-connected PMOS transistor PM3, and a second resistor R2. As used herein, the current source may refer to a current mirror circuit (e.g., a circuit configured to replicate, regulate, or discharge a reference current while maintaining a constant current). The PTAT current source 133a can generate a temperature-proportional current (IT) of the same magnitude as the current generated from the PTAT generator circuit 110a. PTAT ). PTAT current source 133a supplies temperature-proportional current (I). PTAT This can be achieved, for example, by mirroring the temperature-proportional current generated from the PTAT generator circuit 110a. Temperature-proportional current (IT) PTATThe current (I0) can be supplied to the collector of the third BJT Q3. The emitter of the third BJT Q3 can be connected to ground, and the base of the third BJT Q3 can be connected to the node located between the drain of the diode-connected PMOS transistor PM3 and the second resistor R2. Therefore, the temperature-proportional current (I0) PTAT The base-emitter voltage VBE3 of the third BJTQ3 flowing in the forward direction can be applied to the second resistor R2. This includes a first temperature-inverse current (I) corresponding to the value of "Tln(T)" of the logarithmic temperature error. CTATX The base-emitter voltage VBE3 can thus flow to the second resistor R2. The first temperature-inverse current (I0) is explained in more detail below. CTATX The amount of ).

[0029] The second CTAT generator circuit 134a may include a temperature-invariant current source 135a, a fourth BJT Q4, a diode-connected PMOS transistor PM4, and a second resistor R2. In this example, the second resistor R2 of the second CTAT generator circuit 134a may refer to a resistor having the same resistance value as the second resistor R2 of the first CTAT generator circuit 132a. For example, it can be generated by the temperature-invariant current (IT) generated by the CTAT generator circuit 110a. PTAT ) and the first temperature inverse current (I) generated from the first CTAT generator circuit 132a CTATX ( ) are combined to generate a temperature-invariant current source 135a. Therefore, by combining temperature-proportional currents (I ) PTAT Temperature positive bit and first temperature inverse current (I) CTATX The temperature inverse characteristic of ) can generate a flat intermediate reference current (I). REFM ).

[0030] A temperature-invariant current source of 135A can supply an intermediate reference current (I0). REFM This current can be generated by current combination and / or achieved through current mirroring. The intermediate reference current can be stable relative to temperature changes and can be supplied to the collector of the fourth BJT Q4. The emitter of the fourth BJT Q4 can be connected to ground, and the base of the fourth BJT Q4 can be connected to the node located between the drain of the diode-connected PMOS transistor PM4 and the second resistor R2. Therefore, the intermediate reference current (I REFM The base-emitter voltage VBE4 of the fourth BJT Q4 through which the current flows can be applied to the second resistor R2.

[0031] Second temperature inverse current (I) CTATYThis can include the value of "Tln(T)" as a logarithmic error, and can flow through the second resistor R2 via the base-emitter voltage VBE4. However, the second temperature-inverse current (I) CTATY The magnitude (e.g., value) of the “Tln(T)” included in the equation can differ from the first temperature inverse current (I). CTATX The magnitude of the "Tln(T)" value included in the formula (e.g., the value). Therefore, it will be understood that the first temperature inverse current (I) can be adjusted, for example. CTATX ) and the second temperature inverse current (I CTATY The size ratio is used to eliminate the value of "Tln(T)" as a logarithmic error or a temperature-based second-order coefficient.

[0032] Continue to refer to Figure 2 The temperature coefficient compensation circuit 150a can utilize the temperature inverse current (IT) generated by the CTAT generator circuit 130a. CTATX I CTATY The temperature coefficient compensation circuit 150a can then generate a curvature-compensated (e.g., flattened) reference voltage (Vref) based on the reference current (Iref) after removing the logarithmic error. In some embodiments, the temperature coefficient compensation circuit 150a may include a first node N1, a second node N2, a first CTAT current source 151, a second CTAT current source 153, a PTAT current source 155, PMOS transistors PM5 and PM6, and a third resistor R3.

[0033] The first CTAT current source 151 can provide a second temperature-inverse current (IT) from the power supply voltage VDD to the first node N1. CTATY The first CTAT current source 151 can supply a second temperature-inverse current (IT) generated by the second CTAT generator circuit 134a. CTATY This is achieved by mirroring the current of the first temperature-inverse current (TAT). The second CTAT current source 153 can supply an adjusted first temperature-inverse current (e.g., a first temperature-inverse current multiplied by a factor K1) (K1I). CTATX The second CTAT current source 153 can also discharge the regulated first temperature-inverse current from the first node N1 to ground. The second CTAT current source 153 can use the first temperature-inverse current (I) generated by the first CTAT generator circuit 132a. CTATX This is achieved by mirroring multiple current mirrors. Therefore, it is compared with, for example, a first temperature-inverse current (K1I). CTATX ) and the second temperature inverse current (I CTATY The difference between the two corresponds to the third temperature inverse current (I). CTATDThe third temperature-inverse current (I) can flow through the PMOS transistor PM5. CTATD ) can have "K1I" CTATX -I CTATY The value of "and the third temperature inverse current (I CTATD It can be provided without a second-order temperature coefficient (e.g., in a state where the value of "Tln(T)" corresponding to the second-order term of temperature is removed).

[0034] The PMOS transistor PM6 may include a current mirror circuit, which, for example, adjusts the third temperature-inverse current (Ic) flowing in the PMOS transistor PM5 by multiplying the current by a coefficient K2. CTATD For example, PMOS transistor PM6 may include K2 transistors connected in parallel, sharing a gate with PMOS transistor PM5. The temperature-inverse current (K2I) regulated by PMOS transistor PM6... CTATD This can be provided to the second node N2.

[0035] In addition, the PTAT current source 155 can supply a temperature-proportional current (IT) to the second node N2. PTAT This current will be compared with the regulated third temperature-inverse current (K2I) from the supply voltage VDD. CTATD ) combination. For example, you can press [I] PTAT + K2I CTATD =I PTAT + K2×(K1I CTATX -I CTATY ) = I PTAT + K1K2I CTATX - K2I CTATY A reference current (Iref) is generated, and then a reference voltage (Vref) can be provided based on the generated reference current (Iref) flowing through the third resistor R3.

[0036] Based on the above description and Figure 2 The reference voltage generation circuit 100a shown can generate temperature-inverse currents (IT) with different values ​​of “Tln(T)” (e.g., error terms) by using a current mirror circuit and two BJTs Q3 and Q4. CTATX I CTATY Through temperature inverse current (I) CTATX and I CTATY The combination of these three factors can generate a third temperature-inverse current after removing the value of "Tln(T)" (e.g., the temperature error term). Then, as described above and elsewhere in this document, by combining the third temperature-inverse current (I... CTATD ) and temperature proportional current (I PTATA reference current (Iref) can be generated, and a reference voltage (Vref) can be generated based on the reference current (Iref). The generated reference voltage (ref) removes the first-order coefficient and the second-order coefficient "Tln(T)" of the temperature "T".

[0037] Figure 3 This illustrates the use of only a PTAT generator circuit (e.g., Figure 2 The circuit diagram of an example of a prior art reference voltage generator circuit 100b for generating a reference voltage is shown in Figure 110a. Figure 3 In the reference voltage generator circuit 100b, the temperature-inverse current (IT) generated from the PTAT generator circuit 110b can be combined. CTAT ) and temperature proportional current (I PTAT This is done to remove the first-order coefficient temperature term, which is a linear component. However, it is difficult to remove the second-order coefficient "Tln(T)" which is the logarithmic error term included in the base-emitter voltage VBE, especially when only the PTAT generator circuit 110b is used. Therefore, higher-order temperature coefficient components, such as second-order or higher-order components, may remain in the temperature-voltage curve. This characteristic will be explained further below.

[0038] As described above, the PTAT generator circuit 110b may include PMOS transistors PM1 and PM2, operational amplifier 112, first resistor R1, second resistor R2, and BJTs Q1 and Q2 to generate a temperature-proportional current (IT) that increases with temperature. PTAT The source of each of PMOS transistors PM1 and PM2 can be connected to the power supply voltage (VDD). The gate of each of PMOS transistors PM1 and PM2 can be connected to the output terminal of operational amplifier 112. The drain of PMOS transistor PM1 can be connected to the negative input terminal (-) of operational amplifier 112, and the drain of PMOS transistor PM2 can be connected to the positive input terminal (+) of operational amplifier 112. The collector of the diode-connected first BJT Q1 can be connected to the drain of PMOS transistor PM1, and the emitter of the diode-connected first BJT Q1 can be connected to ground. The emitter of the diode-connected second BJT Q2 can also be connected to ground. A first resistor R1 can be connected between the drain of PMOS transistor PM2 and the collector of the second BJT Q2. It will be further understood that the second BJT Q2 may include any number (xN) of diode-connected BJTs connected in parallel.

[0039] The base-emitter voltage VBE1 of the first BJT Q1 can be input to the negative input terminal (-) of operational amplifier 112. The base-emitter voltage VBE1 of the first BJT Q1 can also be fed back to the positive input terminal (+) of operational amplifier 112 via feedback. Therefore, the first resistor R1 can provide a differential voltage (ΔVBE=VBE1-VBE2) between the base-emitter voltage VBE1 of the first BJT Q1 and the base-emitter voltage VBE2 of the second BJT Q2. The base-emitter voltage VBE1 of the first BJT Q1 can have a temperature-inverse proportional current (CTAT) characteristic that decreases with increasing temperature. Furthermore, a temperature-proportional current (IT) with a temperature-proportional characteristic is also present. PTAT The voltage can flow through the first resistor R1 due to the differential voltage (ΔVBE).

[0040] Furthermore, an inverse temperature current (ICTAT) can flow through a second resistor R2, which can be connected between node N0, where the base-emitter voltage VBE1 of the first BJT Q1 is applied, and ground. For example, the base-emitter voltage VBE1 supplied to the second resistor R2 can have an inverse temperature characteristic. Finally, an inverse temperature current (IT) can be generated, for example, by adding the second resistor R2 to node N0. CTAT At node N0, the base-emitter voltage VBE1 of the PTAT generator circuit 110b is formed.

[0041] In the reference voltage output terminal 120b, the PTAT generator circuit 110b generates a temperature-proportional current (IT). PTAT ) and temperature inverse current (I CTAT The sum of these can be mirrored to generate a reference voltage (Vref). The sum of the currents flowing in the channel of the PMOS transistor PM2 (I0) can also be used to generate a reference voltage. PTAT +I CTAT The voltage can be mirrored by the PMOS transistor PM7 and supplied to the output resistor R10. Then, a reference voltage (Vref) without a first-order coefficient (or component) can be output to the output resistor R10.

[0042] The above description can be summarized into the following exemplary equation. The temperature-proportional current (I) flowing in the first resistor R1 through the differential voltage ΔVBE PTAT ) and the temperature-inverse current (I) flowing in the second resistor R2 CTAT ) can be represented by the following equations 1a and 1b respectively.

[0043] (Equations 1a and 1b)

[0044] In equations 1a and 1b above, "N" represents the number of parallel connections of the second BJT Q2, and "V" represents the number of parallel connections of the second BJT Q2. T "" represents thermal voltage. The output reference voltage (Vref) can also be expressed as Equation 2 below.

[0045] (Equation 2)

[0046] Furthermore, the base-emitter voltage VBE can be derived from the equation representing the collector current "Ic" of the BJT, as shown in Equation 3 below.

[0047] (Equation 3)

[0048] In Equation 3, "I S "Ic" represents the saturation current, "η" represents the process parameter, and "C1" is a constant. It is also assumed that the collector current "Ic" is an exponential expression of temperature "T" (Ic = D1T). δ The base-emitter voltage VBE can be expressed as Equation 4 below.

[0049] (Equation 4)

[0050] Here, "δ" represents the order of the temperature "T" at the collector current Ic. "C1" and "D1" are each constant. Specifically, the thermal voltage "V"... T "This can be represented by the following equation 5."

[0051] (Equation 5)

[0052] In Equation 5, "k" is the Boltzmann constant, "q" is the charge of the electron, and "T" is the absolute temperature. As shown in Equation 5, the thermal voltage "V" T This is expressed as a first-order expression for temperature "T". Therefore, the base-emitter voltage VBE in Equation 4 includes the constant term V. GO The first-order expression (or value) for temperature is "-V T "[ln(C1)-ln(D1)]", and second-order or higher-order expressions "-V" T ln(T)(η-δ)". This is a second-order or higher-order expression "-V". T In this paper, "ln(T)(η-δ)" can be referred to as "Tln(T)" or its value.

[0053] Ultimately, the base-emitter voltage VBE generated solely by the PTAT generator circuit 110b will include a value of “Tln(T)” corresponding to the logarithmic error (or higher-order term error). The temperature-proportional current (IT) generated using the PTAT generator circuit 110b... PTAT In temperature-inverse current (ICTAT), the constant term and the first-order term of temperature "T" dominate. However, when the temperature-direct current (IT) is used... PTAT ) and temperature inverse current (I CTAT When combined, the reference voltage (Vref) will still have curvature due to the value of "Tln(T)".

[0054] Figure 4 It is shown by Figure 3 A graph illustrating an example of an undesirable change in the reference voltage generated by the reference voltage generator circuit 100b relative to temperature. (Reference) Figure 4 In the reference voltage curve C1 for temperature, the shape of the second-order curve for temperature “T” is prominent due to the remaining value of “Tln(T)”.

[0055] By using the PTAT generator circuit (e.g.) Figure 3 The temperature-inverse current (I) generated by 110b) CTAT ) and temperature proportional current (I PTAT The sum of currents (I) PTAT +I CTAT The corresponding reference current Iref can be found in the output resistor (e.g., Figure 3 The reference voltage Vref, with its first-order component removed, is generated in R10. According to the reference voltage curve C1, the reference voltage Vref exhibits rather low stability, at least due to the value of "Tln(T)". This is one exemplary reason why removing the "Tln(T)" term may be beneficial for providing, for example, a reference voltage Vref that maintains a stable level and is therefore more accurate with respect to temperature changes (or extreme temperatures).

[0056] Figure 5 This is a circuit diagram illustrating exemplary operation of a reference voltage generation circuit according to an embodiment of the present disclosure. (See reference...) Figure 5 Temperature proportional to current (I) PTAT The PTAT generator circuit 110a can generate the PTAT. Then, the CTAT generator circuit 130a can generate the CTAT based on the temperature-proportional current (IT). PTAT Generates the first temperature-inverse current (I) CTATX ) and the second temperature inverse current (I CTATX Then, by using the temperature inverse current (I) CTATX I CTATYThe temperature coefficient compensation circuit 150a can generate a reference voltage Vref after removing the logarithmic error "Tln(T)" value (as well as the first-order error term). The process of removing the logarithmic error term from the reference current Iref by applying curvature compensation technology will be described below with reference to the additional equations.

[0057] The PTAT generator circuit 110a can generate a temperature-proportional current (IT) from the differential voltage (ΔVBE=VBE1-VBE2) applied to the first resistor R1. PTAT The differential voltage (ΔVBE = VBE1 - VBE2) can correspond to the difference between the base-emitter voltage VBE1 of the first BJT Q1 and the base-emitter voltage VBE2 of the second BJT Q2. The base-emitter voltage VBE1 of the first BJT Q1 can have an inverse temperature-proportional (CTAT) characteristic that decreases with increasing temperature. Furthermore, the temperature-proportional current (I) has a direct temperature-proportional (PTAT) characteristic. PTAT A differential voltage (ΔVBE) can flow through the first resistor R1. If the temperature is proportional to the current (I... PTAT )(exist Figure 5 The middle mark is If is expanded into a power series in terms of temperature “T”, it can be represented by the following equation 6.

[0058] (Equation 6)

[0059] The first CTAT generator circuit 132a can mirror the temperature-proportional current (IT). PTAT ) and provide it to the third BJTQ3. Due to the temperature proportional current (I PTAT The current flows through the third BJT Q3, so the temperature order "δ" corresponding to the temperature-proportional current can be considered to have a value "1" (e.g., first order). Based on this exemplary situation, the first temperature-inverse current (IT) generated by the first CTAT generator circuit 132a... CTATX )(exist Figure 5 The middle mark is ) can be represented by the following equation 7.

[0060] (Equation 7)

[0061] Furthermore, by combining temperature-proportional current (I PTAT ) and the first temperature inverse current (I CTATX This can generate an intermediate reference current (I) that remains constant relative to temperature. REFM In other words, the intermediate reference current (I) REFM The intermediate reference current (I) does not change with temperature.REFM )(exist Figure 5 The middle mark is When the temperature order “δ” is provided to the fourth BJT Q4, it can be considered to have a value of “0”. In this exemplary case, the second temperature inverse current (I) CTATY )(exist Figure 5 The middle mark is ) can be represented by the following equation 8.

[0062] (Equation 8)

[0063] Consider equations 7 and 8 together, when based on temperature proportional to current (I PTAT When a current is applied to different BJTs Q3 and Q4, a temperature-inverse current (I) with different second-order logarithmic errors "Tln(T)" may be generated. CTATX I CTATY Therefore, by adjusting the first temperature inverse current (I) CTATX ) and the second temperature inverse current (I CTATX The coefficient of the second-order term (C) CTX2 C CTY2 The ratio or magnitude of the combined reference current can eliminate the logarithmic error of the second-order term of temperature in the combined reference current, such as the value of "Tln(T)".

[0064] To remove the second-order term "Tln(T)", the first CTAT current source 151 of the temperature coefficient compensation circuit 150a can provide a second temperature-inverse current (It) from the power supply voltage VDD to the first node N1. CTATY )(exist Figure 5 The middle mark is The second CTAT current source 153 can adjust the first temperature inverse current (I) by a factor of "K1" (e.g., multiplied by a factor K1). CTATX Discharge from the first node N1 to ground (in) Figure 5 The middle mark is Therefore, the third temperature inverse current (I) CTATD ) can flow through PMOS transistor PM5 (in Figure 5 The middle mark is The third temperature inverse current (ICTATD) can be equal to the first temperature inverse current (K1I). CTATX The difference between the third temperature inverse current (Ic) and the second temperature inverse current (ICTATY). CTATD () can be represented by the following equation 9.

[0065] (Equation 9)

[0066] As shown in Equation 9 above, the third temperature-inverse current (I) CTATD It can be confirmed that the second-order term of temperature "T" has been removed (e.g., based on the first temperature inverse current (K1I)). CTATX ) and the second temperature inverse current (I CTATY The combination of these factors gives it a value of "0". Therefore, the third temperature inverse current (I) CTATD In the equation, only the constant term and the first-order term of temperature "T" can be retained.

[0067] Now, the third temperature-inverse current (I) with the second-order term of temperature "T" removed. CTATD It can be mirrored by the PMOS transistor PM6 to a current proportional to temperature (I) PTAT The PMOS transistor PM6 may include a current mirror circuit that adjusts the third temperature-inverse current (I3) flowing through the PMOS transistor PM5 by a factor "K2". CTATD (For example, the third temperature inverse current (I) CTAT (Multiplied by factor K2). The third temperature inverse current (K2I) regulated by PMOS transistor PM6. CTATD ) can be provided to the second node N2 (in Figure 5 The middle mark is ).

[0068] In addition, the PTAT current source 155 can supply a temperature-proportional current (IT) from the supply voltage VDD to the second node N2. PTAT ), inversely proportional to the adjusted third temperature current (K2I) CTATD ) to combine (in Figure 5 The middle mark is Temperature proportional current (I) PTAT ) and the adjusted third temperature inverse current (K2I) CTATD The sum of these can provide the reference current Iref. The reference current Iref can be represented by the following equation 10.

[0069] (Equation 10)

[0070] As shown in Equation 10 above, the first and second order terms of temperature "T" can be removed from the calculation of the reference current Iref. Therefore, the stability of the reference current Iref with respect to temperature can be improved. The reference current Iref can be output as a reference voltage Vref, represented by, for example, the third resistor R3 (in... Figure 5 The middle mark is ). will understand, in Figure 5In this document, the numbers do not indicate any absolute order of the exemplary operations shown, and the order may change as appropriate.

[0071] The reference voltage Vref based on the reference current Iref can be represented by the following equation 11.

[0072] (Equation 11)

[0073] As shown in Equation 11 above, it can be achieved through, for example... Figure 5 The reference voltage generation circuit 100a provides a reference voltage Vref with the first and second order terms of temperature "T" removed.

[0074] Figure 6 This is a flowchart illustrating a reference voltage generation method according to an embodiment of the present disclosure. (See reference...) Figure 6 Reference voltage generation circuit (e.g., Figure 5 The reference voltage generation circuit 100a) can be used, for example, in the CTAT generator circuit (e.g., Figure 5 The CTAT generator circuit 130a uses two BJTs (e.g., Figure 5 BJTs Q3 and Q4) are used to generate a third temperature inverse current (I) with the "Tln(T)" value removed. CTATD The reference voltage generation circuit can be based on a third temperature inverse current (I). CTATD This generates a reference voltage Vref with high temperature stability.

[0075] In operation S110, the PTAT generator circuit (e.g., Figure 5 The PTAT generator circuit 110a can be adjusted based on the applied resistor (e.g., as shown in the figure). Figure 5 The differential voltage (ΔVBE=VBE1-VBE2) of the first resistor R1 generates a temperature-proportional current (I). PTAT The differential voltage (ΔVBE=VBE1-VBE2) can correspond to, for example, the first BJT (e.g., Figure 5 The base-emitter voltage VBE1 of the first BJTQ1 and the second BJT (e.g., Figure 5 The difference between the base-emitter voltage VBE2 of the second BJT (Q2). The base-emitter voltage VBE1 of the first BJT can have an inverse temperature proportional current (CTAT) characteristic that decreases with increasing temperature. Furthermore, the temperature proportional current (I) has a direct temperature proportional current (PTAT) characteristic. PTAT The voltage can flow through the first resistor due to the differential voltage.

[0076] In operation S120, the CTAT generator circuit (e.g., Figure 5The CTAT generator circuit 130a can mirror the temperature-proportional current (I) generated by the PTAT generator circuit. PTAT ), to generate the first temperature inverse current (I CTATX ) and the second temperature inverse current (I CTATY This can be achieved by sending a third BJT (e.g., Figure 5 The third BJT Q3) applies a temperature-proportional current (I) PTAT To generate the first temperature inverse current (I) CTATX This can be achieved by sending a fourth BJT (e.g., Figure 5 The fourth BJT Q4) supplies the intermediate reference current (I REFM To generate a second temperature inverse current (I) CTATY For example, by using a temperature-proportional current (I0) PTAT Temperature positive bit and first temperature inverse current (I) CTATX By combining the temperature inverse characteristics of , an intermediate reference current (I) relative to temperature flatness can be obtained. REFM However, the first temperature inverse current (I) CTATX Each of the second and third temperature-inverse currents may also include a logarithmic error term “Tln(T)”.

[0077] In operation S130, the temperature coefficient compensation circuit (e.g., Figure 5 The temperature coefficient compensation current (150A) can be achieved by adjusting the first temperature inverse current (K1I). CTATX The third temperature-inverse current (I) is generated by combining the second temperature-inverse current with the first-order term having only a constant term and a temperature term. CTATD This process is described with reference to Equation 9 above and elsewhere in this document.

[0078] In operation S140, the temperature coefficient compensation circuit can compensate for the temperature by using a temperature-proportional current (IT). PTAT ) and the adjusted third temperature inverse current (K2I) CTATD These are combined to generate the reference current Iref. The adjusted third temperature inverse current (K2I) can then be calculated. CTATD ) and temperature proportional current (I PTAT The sum of these is used as the reference current Iref (e.g., [I PTAT + K2I CTATD = I PTAT +K2(K1I CTATX -I CTATY )]).

[0079] In operation S150, the temperature coefficient compensation circuit can generate a reference voltage Vref based on the reference current Iref, which is the first-order and second-order terms of temperature "T" removed.

[0080] As described above, the reference voltage generation circuit (e.g., Figure 5 The reference voltage generation circuit 100a can be used, for example, by using two BJTs (e.g., Figure 5 Q3 and Q4 are used to generate the first-order and second-order terms of the temperature "T" removed, which are used to generate the reference voltage Vref.

[0081] Figure 7 This is a graph illustrating an exemplary reference voltage, the curvature of which is compensated by a reference voltage generation circuit consistent with embodiments of this disclosure. Reference Figure 7 Reference voltage generation circuit (e.g., Figure 5 The reference voltage generator 100a) can provide a reference voltage Vref with the first-order and second-order terms of temperature "T" removed.

[0082] exist Figure 7 In the figure, curve C2 shows the reference voltage Vref with the first and second-order terms of temperature "T" removed (e.g., a reference voltage Vref without a first-order temperature coefficient or a second-order coefficient of temperature). According to curve C2, the reference voltage Vref can be flattened to be almost parallel to the temperature axis. Furthermore, it can be seen that the range of fluctuation of the reference voltage Vref based on temperature changes is relatively smaller compared to curve C1 (corresponding to...). Figure 4 The temperature coefficient of the reference voltage Vref is significantly reduced compared to the curves in curve C1, where the second-order curve for temperature "T" is larger. Although there may be a small amount of temperature coefficient terms associated with the third (or higher) order in curve C2, the overall fluctuation of the reference voltage Vref is significantly reduced, and this slight reduction does not significantly affect temperature stability. In fact, it has been found that the temperature coefficient of the reference voltage Vref in curve C2 is more than 10 times lower than that in curve C1.

[0083] As mentioned above, this can be achieved by adding two BJTs (e.g., Figure 5 The reference voltage Vref, with the "Tln(T)" value removed, is generated using Q3 and Q4. Therefore, according to this disclosure, a reference voltage generation circuit that provides a reference voltage Vref with high temperature stability at low cost can be implemented.

[0084] Figure 8 This illustrates a reference voltage generation circuit (e.g., Figure 1 A circuit diagram of another embodiment of the reference voltage generation circuit. See also... Figure 8The reference voltage generation circuit 100c includes a PTAT generator circuit 110c, a CTAT generator circuit 130c, and a temperature coefficient compensation circuit 150c. In this embodiment, the CTAT generator circuit 130c further includes stabilization circuits 142 and 144.

[0085] The PTAT generator circuit 110c may include PMOS transistors PM11, PM12, PM13, and PM14, operational amplifier 113, first resistor R1, and BJTs Q1 and Q2 to generate a temperature-proportional current (IT) that increases with temperature. PT The source of each of the shared-gate PMOS transistors PM11 and PM12 can be connected to the power supply voltage VDD. Similarly, the source of the shared-gate PMOS transistors PM13 and PM14 can be connected to the drain of PMOS transistors PM11 and PM12. Operational amplifier 113 can have two output terminals connected to the shared gate of PMOS transistors PM11 and PM12, and to the shared gate of PMOS transistors PM13 and PM14. The drain of PMOS transistor PM13 can be connected to the negative input terminal (-) of operational amplifier 113, while the drain of PMOS transistor PM14 can be connected to the positive input terminal (+) of operational amplifier 113.

[0086] The collector of the diode-connected first BJT Q1 can be connected to the drain of the PMOS transistor PM13. The emitter of the diode-connected first BJT Q1 can be connected to ground (GND). The emitter of the diode-connected second BJT Q2 can also be connected to ground (GND). A first resistor R1 can be connected between the drain of the PMOS transistor PM14 and the collector of the second BJT Q2. Figure 8 In this context, the second BJT Q2 can be a number of (xN) parallel-connected diode-connected BJTs.

[0087] The base-emitter voltage VBE1 of the first BJT Q1 can be input to the negative input terminal (-) of operational amplifier 113. Furthermore, the base-emitter voltage VBE1 of the first BJT Q1 can be fed back to the positive input terminal (+) of operational amplifier 113 via feedback. Therefore, the first resistor R1 may withstand the differential voltage (ΔVBE=VBE1-VBE2) between the base-emitter voltage VBE1 of the first BJT Q1 and the base-emitter voltage VBE2 of the second BJT Q2. The base-emitter voltage VBE1 of the first BJT Q1 may have an inverse temperature characteristic that decreases with increasing temperature. Furthermore, a temperature-proportional current (IT) with a direct temperature characteristic... PTThe voltage can flow through the first resistor R1 via the differential voltage ΔVBE. For example, the basic operation of the PTAT generator circuit 110c can be based on the temperature inverse CTAT characteristic generated by using the base-emitter voltage VBE1 of the first BJT Q1.

[0088] CTAT generator circuit 130c can mirror the temperature-proportional current (I) generated by PTAT generator circuit 110c. PT To generate the first temperature inverse current (I) CTX ) and the second temperature inverse current (I CTY Therefore, the CTAT generator circuit 130c may include a method for generating a first temperature inverse current (I0). CTX The first CTAT generator circuit 132c and the circuit for generating the second temperature inverse current (I) CTY The second CTAT generator circuit 134c.

[0089] The first CTAT generator circuit 132c may include a PTAT current source 133b, a third BJT Q3, PMOS transistors PM15, PM16, PM17, PM18, and PM19, a second resistor R2, and a stabilizing circuit 142. The PTAT current source 133b can use a temperature-proportional current (IT) generated from the PTAT generator circuit 110c. PT ). The PTAT current source 133b supplies a temperature-proportional current (I). PT ) can be mirrored by the temperature-proportional current (I) generated by the PTAT generator circuit 110c. PT This is achieved through temperature-proportional current (I). PT The current (Ie) can be supplied to the collector of the third BJT Q3. The emitter of the third BJT Q3 can be connected to ground and to the node located between the drain of the PMOS transistor PM17 and the second resistor R2. Therefore, the temperature-proportional current (Ie) is... PT The base-emitter voltage VBE3 of the third BJT Q3 through which the current flows can be applied to the second resistor R2. As a result, the first temperature-inverse current (I0) CTX The collector voltage of the third BJT Q3 can be supplied to the gate of the PMOS transistor PM19. PMOS transistors PM15, PM16, PM17, and PM18 can form a first temperature-inverse current (Ic) flowing in the second resistor R2. CTX The current mirror circuit of the first temperature inverse current (I). CTXThe current can flow in the channel of the PMOS transistor PM19. In some embodiments, a stabilizing circuit 142 can be connected between the gate of the PMOS transistor PM19 and ground to, for example, stabilize the gate voltage of the PMOS transistor PM19. In the stabilizing circuit 142, capacitor C1 and third resistor R3 are connected in series.

[0090] The second CTAT generator circuit 134c may include a PTAT current source 135b, a regulating CTAT current source 135c, a fourth BJT Q4, PMOS transistors PM20, PM21, PM22, PM23, and PM24, a second resistor R2, and a stabilizing circuit 144. The PTAT current source 135b can use a temperature-proportional current (IT) generated from the PTAT generator circuit 110c. PT Temperature proportional current (I) PT The current can be supplied to the collector of the fourth BJT Q4. Adjusting the CTAT current source 135c can adjust the first temperature-inverse current (IT) generated from the first CTAT generator circuit 132c. CTX (For example, multiply it by a factor "K3"), and a regulated current can be provided to the collector of the fourth BJT Q4. The emitter of the fourth BJT Q4 can be connected to ground and to a node located between the drain of the PMOS transistor PM22 and the second resistor R2. Therefore, the intermediate reference current (e.g., I) PT +K3×I CTX It can flow through the fourth BJT Q4.

[0091] In addition, the intermediate reference current (e.g., I) PT +K3×I CTX The base-emitter voltage VBE4 flowing through the fourth BJT Q4 can be applied to the second resistor R2. Therefore, the second temperature inverse current (I) CTY A second temperature-inverse current (Ig) can flow through the second resistor R2. The collector voltage of the fourth BJT Q4 can be supplied to the gate of the PMOS transistor PM24. PMOS transistors PM20, PM21, PM22, and PM23 may include a second temperature-inverse current (Ig) for flowing through the second resistor R2. CTY The current mirror circuit of ). Therefore, the second temperature inverse current (I) CTY A current (I) can flow in the channel of the PMOS transistor PM24. Furthermore, a stabilizing circuit 144, including a capacitor C1 connected in series and a third resistor R3, can be connected between the gate of the PMOS transistor PM24 and ground to, for example, stabilize the gate voltage of the PMOS transistor PM24. A second temperature-inverse current (I) including a value of "Tln(T)" as a logarithmic error is also included. CTYThe current can flow in the second resistor R2 through the base-emitter voltage VBE4. However, the second temperature-inverse current (I) CTY The magnitude of the "Tln(T)" included in the equation can differ from that of the first temperature inverse current (I). CTX The magnitude of the "Tln(T)" value in ) is determined by adjusting the first temperature inverse current (I). CTX ) and the second temperature inverse current (I CTY The size ratio of the coefficients can eliminate logarithmic errors (e.g., second-order coefficients "Tln(T)").

[0092] In some embodiments, the temperature coefficient compensation circuit 150c can use a temperature-proportional current (IT) generated from the PTAT generator circuit 110c. PT ) and the temperature inverse current (I) generated from the CTAT generator circuit 130c CTX I CTY A reference current Iref without the "Tln(T)" term is generated. The temperature coefficient compensation circuit 150c can generate a curvature-compensated reference voltage Vref from the reference current Iref after removing the logarithmic error term. For this purpose, the temperature coefficient compensation circuit 150c may include a PTAT current source 152, a first CTAT current source 154, a second CTAT current source 156, and a fourth resistor R4.

[0093] PTAT current source 152 can generate, in a mirror manner, the temperature-proportional current (I) generated from PTAT generator circuit 110c. PT The PTAT current source 152 can generate a temperature-proportional current (IT). PT ) and supplies it to output node NO. The first CTAT current source 154 can adjust the first temperature inverse current (I) generated by the first CTAT generator circuit 132c in "K1×K2". CTX ), and supply to output node NO. Therefore, the current "I" with the value of "Tln(T)" removed. PT +K1K2I CTX "It can be supplied to output node NO. The second CTAT current source 156 can generate the second temperature inverse current (I) generated by the second CTAT generator circuit 134c." CTY For example, by multiplying it by a factor K2. Then, the second CTAT current source 156 can adjust the second temperature inverse current (I) by a factor of "K2". CTY The circuit discharges from output node NO to ground. Therefore, the magnitude of the reference current Iref supplied to the fourth resistor R4 can be expressed as "I PT + K1K2I CTX - K2I CTXAs a result, the first and second-order terms of temperature can be removed from the reference current Iref. The reference voltage Vref can be supplied to the output node NO based on the reference current Iref supplied to the fourth resistor R4.

[0094] Based on the aforementioned reference voltage generation circuit 100c, temperature-inverse currents (I) with different values ​​of "Tln(T)" can be generated by using a current mirror circuit and two BJTs (e.g., Q3 and Q4). CTX I CTY It can be achieved through temperature-inverse current (I). CTX I CTY The combination of these parameters is used to generate the reference voltage Vref with the "Tln(T)" value removed.

[0095] Figure 9 This is a block diagram illustrating a system-on-chip (SoC) including a reference voltage generator circuit, consistent with embodiments of this disclosure. Reference Figure 9 The system-on-a-chip 1000 may include a central processing unit (CPU) 1100, a graphics processing unit (GPU) 1150, random access memory (RAM) 1200, an input / output interface 1300, a reference voltage generator circuit 1400, a memory 1500, and a system bus 1600. As an example, the reference voltage generator circuit 1400 may be derived from a reference... Figure 2 , Figure 5 or Figure 8 The circuit structure shown and described is formed.

[0096] CPU 1100 can execute software (e.g., application programs, operating systems, device drivers) to be executed in system-on-chip 1000. CPU 1100 can execute an operating system (OS, not shown) loaded into RAM 1200. CPU 1100 can also execute various application programs that can be driven by an operating system (OS).

[0097] GPU 1150 can perform various graphics operations or parallel processing operations. In other words, GPU 1150 can have an operational architecture that is conducive to parallel processing, such as an operational architecture that repeatedly processes similar operations. GPU 1150 can also have an architecture that can be used for various operations that require high-speed parallel processing and graphics operations. For example, GPU 1150 that performs general-purpose tasks other than graphics processing can be called GPGPU (General Purpose GPU). The use of GPGPU has already shown advantages in fields such as molecular structure analysis, cryptanalysis, weather forecasting, and video coding. Therefore, it will be understood that using GPGPU in the embodiments of this disclosure can bring similar advantages.

[0098] An operating system (OS) or application program can be loaded into RAM 1200. When the system-on-chip 1000 starts up (e.g., boots), the OS image (not shown) stored in memory 1500 can be loaded into RAM 1200 based on the boot sequence. The operating system (OS) can support various input / output operations of the system-on-chip 1000. Similarly, user-selected applications or applications providing basic services can be loaded into RAM 1200. RAM 1200 can be volatile memory such as SRAM (Static Random Access Memory) or DRAM (Dynamic Random Access Memory), or non-volatile memory such as PRAM, MRAM, ReRAM, FRAM, or NOR flash memory.

[0099] The input / output interface 1300 can control user input and output from user interface devices. For example, the input / output interface 1300 can be equipped with a keyboard or monitor configured to receive commands or data from the user. Furthermore, the input / output interface 1300 can display the progress, processing results, and other information of the learning or processing operations of the on-chip system 1000.

[0100] As referenced above Figure 2 and Figure 8 The reference voltage generator circuit 1400 can generate a reference voltage Vref without a "Tln(T)" value by, for example, adding two BJTs Q3 and Q4. Therefore, according to this disclosure, a reference voltage Vref with high temperature stability can be provided to the system-on-chip 1000 at low cost.

[0101] Memory 1500 can be provided as a storage medium for System-on-Chip 1000. Memory 1500 can store applications, operating system (OS) images, and various other data. Memory 1500 can also be provided as a memory card (e.g., MMC, eMMC, SD, MicroSD, etc.) or a hard disk drive (HDD). Memory 1500 may include, for example, NAND flash memory with a large storage capacity. Alternatively, memory 1500 may include next-generation non-volatile memory such as PRAM, MRAM, ReRAM, FRAM, or NOR flash memory.

[0102] System bus 1600 can provide networking within system-on-chip 1000. Through system bus 1600, CPU 1100, GPU 1150, RAM 1200, I / O interface 1300, reference voltage generator circuitry 1400, and memory 1500 can be connected and communicate with each other or exchange data. However, it will be understood that the configuration of system bus 1600 is not limited to the above description and may, for example, include media devices for efficient management.

[0103] As described above, the system-on-chip 1000 may include a reference voltage generator circuit 1400 that generates a reference voltage Vref with the "Tln(T)" value removed by, for example, adding two BJTs. Therefore, based on these features, the system-on-chip 1000 of this disclosure can achieve high reliability, for example, by using a reference voltage Vref with high temperature stability.

[0104] The above are specific embodiments for implementing this disclosure. In addition to the embodiments described above, this disclosure also includes various design variations and alternative embodiments not specifically described. Furthermore, this disclosure includes techniques that can be modified and varied using the specifically disclosed embodiments. Therefore, the scope of this disclosure should not be limited to the above embodiments, but should be defined by the claims of this disclosure and their equivalents, as well as the appended claims.

Claims

1. A reference voltage generation circuit for a semiconductor device, the reference voltage generation circuit comprising: A first current generator circuit is configured to generate a temperature-proportional current that increases proportionally to temperature. A second current generator circuit is operatively coupled to the first current generator circuit and configured to generate a temperature-inverse current that decreases as the temperature increases. as well as A temperature coefficient compensation circuit, operatively coupled to the first current generator circuit and the second current generator circuit, wherein the temperature coefficient compensation circuit is configured to: Adjust the temperature proportional current or the temperature inverse current to change the second-order temperature coefficient associated with the temperature proportional current or the temperature inverse current. as well as The adjusted temperature-proportional current and the temperature-inverse current are combined to generate a reference voltage that does not have the second-order temperature coefficient, which is associated with the nonlinear variation of the reference voltage.

2. The reference voltage generation circuit according to claim 1, wherein, The second current generator circuit includes: The first temperature-inverse current generator circuit is configured as follows: Supply the temperature-proportional current to the first bipolar junction transistor; and A first temperature-inverse current is generated using the base-emitter voltage of the first bipolar junction transistor; and A second temperature-inverse current generator circuit, operatively coupled to the first temperature-inverse current generator circuit, and configured to: An intermediate reference current is generated by combining the temperature-proportional current and the first temperature-inverse current; and The intermediate reference current is applied to the second bipolar junction transistor to generate a second temperature inverse current.

3. The reference voltage generation circuit according to claim 2, wherein, The first temperature-inverse current generator circuit includes: A first temperature-proportional current source, configured to mirror and supply the temperature-proportional current; The first bipolar junction transistor is operatively coupled to the first temperature-proportional current source and includes a base, a collector coupled to the first temperature-proportional current source, and an emitter connected to ground, wherein the first bipolar junction transistor is configured to transmit the temperature-proportional current to ground. A diode-connected first PMOS transistor, operatively coupled to a first temperature-proportional current source and a first bipolar junction transistor, and configured to supply a power supply voltage to the base of the first bipolar junction transistor; and A first resistor is connected between the base of the first bipolar junction transistor and ground, and is configured to generate the first temperature-inverse current based on the base-emitter voltage of the first bipolar junction transistor.

4. The reference voltage generation circuit according to claim 3, wherein, The second temperature-inverse current generator circuit includes: A temperature-invariant current source, configured to mirror and supply the intermediate reference current; The second bipolar junction transistor is operatively coupled to the temperature-invariant current source and includes a base, a collector connected to the temperature-invariant current source, and an emitter connected to ground, wherein the second bipolar junction transistor is configured to transfer the intermediate reference current to ground. A diode-connected second PMOS transistor, operatively coupled to the temperature-invariant current source and the second bipolar junction transistor, and configured to supply the power supply voltage to the base of the second bipolar junction transistor; and A second resistor is connected between the base of the second bipolar junction transistor and ground, and is configured to generate the second temperature-inverse current based on the base-emitter voltage of the second bipolar junction transistor.

5. The reference voltage generation circuit according to claim 2, wherein, The temperature coefficient compensation circuit includes: First node and second node; A first temperature-inverse current source, operatively coupled to the first node, and configured to mirror the second temperature-inverse current and supply the second temperature-inverse current to the first node; A second temperature-inverse current source, operatively coupled to the first node and configured to supply a regulated first temperature-inverse current and discharge the regulated first temperature-inverse current from the first node to ground; A first PMOS transistor, operatively coupled to the first node, is configured to supply a third inverse temperature current corresponding to the difference between the second inverse temperature current and the regulated first inverse temperature current. A second PMOS transistor is operatively coupled to the first PMOS transistor and the second node, and is configured to mirror a regulated third temperature-inverse current and supply a regulated third temperature-inverse current to the second node. A temperature-proportional current source, operatively coupled to the second node and configured to mirror the temperature-proportional current and supply it to the second node; and An output resistor is connected between the second node and ground and is configured to generate the reference voltage from a reference current corresponding to the sum of the adjusted third temperature-inverse current and the temperature-proportional current.

6. The reference voltage generation circuit according to claim 5, wherein, The second PMOS transistor includes K PMOS transistors connected in parallel and is configured to adjust the third temperature-inverse current flowing in the first PMOS transistor by a factor of K.

7. The reference voltage generation circuit according to claim 5, wherein, The second-order temperature coefficient is removed from the reference voltage based on the difference between the second temperature inverse current and the adjusted first temperature inverse current.

8. The reference voltage generation circuit according to claim 5, wherein, Based on the sum of the adjusted third temperature-inverse current and the temperature-proportional current, the first-order temperature coefficient or the second-order temperature coefficient is removed from the generated reference voltage.

9. A method for generating a reference voltage for a semiconductor device, the method comprising: Temperature-proportional current is generated using the base-emitter voltage of a bipolar junction transistor; Based on the temperature proportional current, a first temperature inverse current with a first second-order temperature coefficient and a second temperature inverse current with a second second-order temperature coefficient are generated, wherein the first second-order temperature coefficient and the second second-order temperature coefficient have different values. Adjust at least one of the first temperature inverse current or the second temperature inverse current; A third temperature inverse current is generated by combining the adjusted first temperature inverse current and the second temperature inverse current. Adjusting the third temperature inverse current; and A reference current is generated by combining the temperature-proportional current and the adjusted third temperature-inverse current.

10. The method according to claim 9, wherein, The first temperature-inverse current and the second temperature-inverse current are generated by supplying the temperature-proportional current to different bipolar junction transistors, wherein each bipolar junction transistor generates a corresponding base-emitter voltage.

11. The method according to claim 10, wherein, The first temperature inverse current or the second temperature inverse current is further adjusted so that the first second-order temperature coefficient and the second second-order temperature coefficient have the same value.

12. The method according to claim 11, wherein, The temperature-proportional current or the third temperature-inverse current is further adjusted so that the first-order temperature coefficient associated with the temperature-proportional current and the first-order temperature coefficient associated with the third temperature-inverse current have the same value.

13. The method according to claim 9, wherein, The second temperature-inverse current is generated using an intermediate reference current, wherein the intermediate reference current is generated by combining the temperature-proportional current and the first temperature-inverse current.

14. A reference voltage generation circuit for a semiconductor device, the reference voltage generation circuit comprising: A temperature-proportional current generator circuit, comprising a first bipolar junction transistor and a second bipolar junction transistor, the temperature-proportional current generator circuit being configured to use the first bipolar junction transistor and the second bipolar junction transistor to generate a temperature-proportional current that increases proportionally to temperature. A temperature-inverse current generator circuit, operably coupled to the temperature-proportional current generator circuit and including a third bipolar junction transistor and a fourth bipolar junction transistor, the temperature-inverse current generator circuit being configured as follows: The temperature-proportional current is supplied to the third bipolar junction transistor to generate a first temperature-inverse current that decreases as the temperature increases; An intermediate reference current is generated by combining the temperature-proportional current and the first temperature-inverse current. as well as A second temperature-inverse current is generated by applying the intermediate reference current to the fourth bipolar junction transistor; as well as A temperature coefficient compensation circuit, operatively coupled to the temperature proportional current generator circuit and the temperature inverse current generator circuit, and configured to: Adjusting at least one of the first temperature inverse current or the second temperature inverse current to change the second-order temperature coefficient; as well as The adjusted first temperature-inverse current and the second temperature-inverse current are combined to generate a reference voltage that does not have the second-order temperature coefficient, which is associated with the nonlinear variation of the reference voltage.

15. The reference voltage generation circuit according to claim 14, wherein, The temperature-inverse current generator circuit includes: A first temperature-inverse current generator circuit is configured to supply the temperature-proportional current to the third bipolar junction transistor and to generate the first temperature-inverse current using the base-emitter voltage of the third bipolar junction transistor; and A second temperature-inverse current generator circuit, operatively coupled to the first temperature-inverse current generator circuit, and configured to: The intermediate reference current is generated by combining the temperature-proportional current and the first temperature-inverse current; and The second temperature-inverse current is generated by applying the intermediate reference current to the fourth bipolar junction transistor.

16. The reference voltage generation circuit according to claim 15, wherein, The first temperature-inverse current generator circuit includes: A first temperature-proportional current source, configured to mirror and supply the temperature-proportional current; The third bipolar junction transistor is operatively coupled to the first temperature-proportional current source and includes a base, a collector connected to the first temperature-proportional current source to receive the temperature-proportional current, and an emitter connected to ground. At least one first PMOS transistor, the at least one first PMOS transistor being operatively coupled to the third bipolar junction transistor and configured to supply a power supply voltage to the base of the third bipolar junction transistor; A first resistor is connected between the base of the third bipolar junction transistor and ground, wherein the first temperature-inverse current is generated based on the base-emitter voltage of the third bipolar junction transistor; At least one second PMOS transistor, the at least one second PMOS transistor being operatively coupled to the third bipolar junction transistor and configured to mirror the first temperature-inverse current; A third PMOS transistor, the third PMOS transistor being connected between the drain of the at least one second PMOS transistor and ground, and having a gate connected to the collector of the third bipolar junction transistor; and A first stabilizing circuit is connected between the gate of the third PMOS transistor and ground.

17. The reference voltage generation circuit according to claim 16, wherein, The second temperature-inverse current generator circuit includes: A second temperature-proportional current source is configured to mirror the temperature-proportional current and supply the temperature-proportional current to the first node; A first temperature-inverse current source is configured to mirror and regulate the first temperature-inverse current, and supplies the regulated first temperature-inverse current to the first node. The fourth bipolar junction transistor, operatively coupled to the first temperature-inverse current source, includes a base, a collector connected to the first node, and an emitter connected to ground, and is configured to receive the regulated first temperature-inverse current and the temperature-proportional current. At least one fifth PMOS transistor, the at least one fifth PMOS transistor being operatively connected to the fourth bipolar junction transistor and configured to supply a power supply voltage to the base of the fourth bipolar junction transistor; A second resistor is connected between the base of the fourth bipolar junction transistor and ground, and the second resistor is configured to generate the second temperature inverse current based on the base-emitter voltage of the fourth bipolar junction transistor. At least one sixth PMOS transistor, the at least one sixth PMOS transistor being operatively coupled to the at least one fifth PMOS transistor and configured to mirror the second temperature inverse current; A seventh PMOS transistor, the seventh PMOS transistor being connected between the drain of the at least one sixth PMOS transistor and ground, and having a gate connected to the collector of the fourth bipolar junction transistor; and A second stabilizing circuit is connected between the gate of the seventh PMOS transistor and ground.

18. The reference voltage generation circuit according to claim 17, wherein, Each of the first stabilizing circuit and the second stabilizing circuit includes a capacitor and a third resistor connected in series.

19. The reference voltage generation circuit according to claim 17, wherein, The temperature coefficient compensation circuit includes: A third temperature-proportional current source is configured to supply the temperature-proportional current to the output node; A second temperature-inverse current source is operatively coupled to the output node and configured to mirror and modulate the first temperature-inverse current, and supply the modulated first temperature-inverse current to the output node. A third temperature-inverse current source, operatively coupled to the output node and configured to mirror and modulate the second temperature-inverse current, and discharge the modulated second temperature-inverse current from the output node to ground; and An output resistor is connected between the output node and ground.

20. The reference voltage generation circuit according to claim 19, wherein: A reference current flows through the output resistor, the reference current corresponding to the sum of the temperature-proportional current and the adjusted first temperature-inverse current minus the adjusted second temperature-inverse current, and The first temperature inverse current and the second temperature inverse current are adjusted to remove the second-order temperature coefficient from the reference current.

Images