Dc pulse supply and substrate processing apparatus including the same

Abstract

The present invention relates to a DC pulse supply and a substrate processing apparatus including the same. The substrate processing apparatus of the present invention has a lower electrode located inside an electrostatic chuck and a edge electrode located inside an insulating ring, which are respectively connected to a first output terminal and a second output terminal of the DC pulse supply, and the DC pulse supply controls the voltage applied to the two electrodes by forming a potential difference between the two electrodes and applying a voltage.

Description

Technical Field

[0001] The present invention relates to a substrate processing apparatus for processing semiconductor substrates, and more specifically to a structure for supplying power to the electrodes of the substrate processing apparatus. Background Technology

[0002] Semiconductor (or display) manufacturing processes are processes used to fabricate semiconductor devices on a substrate (e.g., a wafer), including, for example, exposure, evaporation, etching, ion implantation, and cleaning. Plasma processing is performed by placing a substrate below in a plasma processing space and applying RF (Radio Frequency) signals via electrodes located above and below, along with a supply of fluid for plasma processing.

[0003] On the other hand, the substrate processing apparatus can control the plasma distribution formed in the plasma processing space by using a lower electrode provided inside the electrostatic chuck of the substrate support assembly. Furthermore, the substrate processing apparatus can control the plasma distribution formed at the edge of the plasma processing space by using an edge electrode provided at the edge of the electrostatic chuck in the substrate support assembly. In other words, the substrate processing apparatus can adjust the degree of processing on each region of the substrate by adjusting the voltage applied to the lower electrode and the voltage applied to the edge electrode.

[0004] On the other hand, existing substrate processing devices propose methods for adjusting the voltage applied to the lower electrode and edge electrodes by incorporating one or more DC pulse generators. Specifically, existing technologies propose methods for individually adjusting the voltage applied to the electrodes by using individual voltage control circuits connected to the output of the DC pulse generator. However, these technologies require individual design considerations for the maximum voltage applied to each electrode, thus increasing circuit complexity. Furthermore, by individually controlling the voltage of each electrode, if the voltages applied to the individual electrodes are mismatched, a potential difference exceeding the allowable range can occur, leading to arcing. Summary of the Invention

[0005] The present invention aims to solve the problems of the prior art as described above, specifically the problems arising from the use of multiple voltage control circuits at a single output terminal of a DC pulse generator.

[0006] Alternatively, it aims to address problems arising from the use of multiple DC pulse generators, each with a single voltage control circuit.

[0007] In particular, it can solve the problem of designing circuits using multiple circuit elements that operate at high voltages in order to individually control the voltage applied to multiple electrodes.

[0008] In addition, it can solve the problem of arcing caused by the potential difference exceeding the allowable range due to the mismatch of voltages applied individually to multiple electrodes.

[0009] The purpose of this invention is not limited to the foregoing content, and other purposes and advantages of this invention not mentioned can be understood through the following description.

[0010] In this invention, the substrate processing apparatus for plasma processing of a substrate may include: an electrostatic chuck for supporting and fixing the substrate; a lower electrode located inside the electrostatic chuck; an edge ring surrounding the edge of the electrostatic chuck; an insulating ring disposed below the edge ring; an edge electrode located inside the insulating ring; and a DC pulse supply for applying a first voltage V1 to the lower electrode and applying a second voltage V2 to the edge electrode, the second voltage V2 having a potential difference ΔV relative to the first voltage and being subordinate to the first voltage.

[0011] According to the power supply structure and substrate processing apparatus including the present invention, multiple output terminals of a DC pulse generator can be formed and connected to the lower electrode and the edge electrode respectively, thereby adjusting the voltage applied to each electrode.

[0012] In particular, a DC pulse generator can apply a voltage to the edge electrode by increasing the voltage applied to the lower electrode by a certain increment, thereby applying a voltage between the two electrodes while keeping the potential difference within the allowable range.

[0013] That is, by connecting the various electrodes to multiple output terminals formed in a DC pulse supply, the occurrence of electric arcing between electrodes can be prevented without a separate matching process.

[0014] Furthermore, by connecting the low-voltage power amplifiers in a stacked manner, the structure of the circuit connected to the electrodes can be simplified.

[0015] The effects of the present invention are not limited to those mentioned above, and another effect not mentioned can be clearly understood by those skilled in the art to which this invention pertains from the following description. Attached Figure Description

[0016] Figure 1 The structure of the substrate processing apparatus according to the present invention is briefly shown.

[0017] Figure 2 It is magnification Figure 1 Part A of the substrate processing apparatus shown.

[0018] Figure 3 This is a structural diagram illustrating a simplified structure of the lower power supply of the present invention.

[0019] Figure 4aAn embodiment of a power amplifier according to the present invention is shown.

[0020] Figure 4b Another embodiment of the power amplifier according to the present invention is shown.

[0021] (Explanation of reference numerals in the attached diagram)

[0022] 1: Substrate processing device

[0023] 10: Cavity

[0024] 100: Substrate support assembly

[0025] 101: Electrostatic Chuck

[0026] 111: Lower electrode

[0027] 137: Edge Electrode

[0028] 300: Downward power supply

[0029] 330: First output terminal

[0030] 335: Second Output Terminal Detailed Implementation

[0031] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those skilled in the art to which this invention pertains can readily implement it. However, the present invention can be implemented in various different ways and is not limited to the embodiments described herein.

[0032] To clearly illustrate the invention, irrelevant parts have been omitted, and the same or similar components are marked with the same reference numerals throughout the specification.

[0033] Furthermore, in multiple embodiments, the same reference numerals are used to describe only representative embodiments of the constituent elements having the same structure, while in other embodiments only structures different from the representative embodiments are described.

[0034] Throughout the specification, when a part is described as being "connected (or combined)" with other parts, this includes not only "direct connection (or combination)" but also "indirect connection (or combination)" through other components. Furthermore, when a part is described as "including" a constituent element, unless specifically stated otherwise, it implies that other constituent elements may also be included, rather than excluding them.

[0035] Unless otherwise defined, all terms used herein, including technical or scientific terms, shall have the same meaning as commonly understood by one of ordinary knowledge in the art to which this invention pertains. Terms such as those defined in commonly used dictionaries shall be interpreted as having a meaning consistent with the meaning in the context of the relevant art, and shall not be ideally or excessively interpreted as having a formal meaning unless expressly defined in this application.

[0036] The following describes the power supply structure and substrate processing apparatus according to the present invention. The substrate processing apparatus is equipment for performing process treatments on substrates, particularly plasma treatment (e.g., dry etching). When a substrate is placed into the substrate processing apparatus, the supplied processing gas becomes a plasma state through an electromagnetic field and reacts with a specific material of the substrate. The substrate undergoing plasma treatment is discharged to the outside of the processing space for a certain period of time, and subsequent processing continues. At this time, the substrate processing apparatus can control the distribution of plasma through a lower electrode located below the substrate and an edge electrode located at the edge.

[0037] Figure 1 A substrate processing apparatus according to the present invention is shown. Figure 2 It is magnification Figure 1 Part A of the substrate processing apparatus shown.

[0038] Reference Figure 1 The substrate processing apparatus 1 includes a cavity 10 for forming a plasma processing space PZ of the substrate W and a substrate support assembly 100 for placing and supporting the substrate W. Additionally, the substrate processing apparatus 1 may include a power supply 300 that supplies power to the substrate support assembly 100 for generating plasma in the processing space PZ. Furthermore, the substrate processing apparatus 1 may include an opening and closing door (not shown) for separating and sealing the internal and external spaces of the cavity 10, and an outlet (not shown) for discharging byproducts and gases generated during plasma processing to the outside.

[0039] The cavity 10 forms a plasma processing space PZ for processing the substrate W. Components for plasma processing of the substrate W can be disposed inside the cavity 10. An upper electrode 141 and a gas supply component can be disposed above the cavity 10. The upper electrode 141 can be a nozzle for distributing and supplying processing gas into the space within the cavity 10. Alternatively, a gas supply source 143 can supply processing gas to the upper electrode 141, and the processing gas is supplied into the cavity 10 through the upper electrode 141.

[0040] A substrate support assembly 100 is provided at the lower part of the cavity 10. A lower electrode 111 can be provided inside the substrate support assembly 100 to generate an electrostatic field. Furthermore, the substrate support assembly 100 can apply an electrostatic force to the substrate W for support and fixation. Additionally, the substrate support assembly 100 can form an electric field for generating plasma within the plasma processing space PZ.

[0041] The substrate support assembly 100 includes an electrostatic chuck 101 that supports the substrate W using electrostatic force and a ring member 130 surrounding the electrostatic chuck 101.

[0042] The electrostatic chuck 101 includes a ceramic carrier 110 on which a substrate W for plasma processing is placed and a heater (not shown) is built inside, and a base plate 120 supporting the lower part of the ceramic carrier 110 and forming a cooling flow path (not shown) for the flow of fluid for cooling inside.

[0043] The ceramic carrier 110 is a structure that supports the substrate W from below, and includes a lower electrode 111 inside. As an example, the lower electrode 111 may also be embedded inside the ceramic carrier 110. The ceramic carrier 110 may be made of a ceramic material including quartz. Additionally, the ceramic carrier 110 includes a clamping electrode 113 for fixing the substrate W. As an example, the clamping electrode 113 is connected to a clamping DC power supply 115 to apply DC power. In particular, the clamping electrode 113 can apply DC power to form an electrostatic field on the substrate W, thereby fixing the substrate W by electrostatic force.

[0044] The substrate 120 is provided in the shape of a disk made of a metallic material including aluminum (Al). A cooling flow path can be formed in the lower region of the substrate 120. The cooling flow path can supply a refrigerant such as helium to regulate the temperature of the electrostatic chuck 101. A focusing ring 131 can be provided at the upper end of the substrate 120 around the edge portion of the substrate W, thereby controlling the plasma density distribution at the edge portion.

[0045] The substrate 120 can be connected to the RF power supply 117 to apply radio frequency power. An RF matching device 119 can be provided between the RF power supply 117 and the substrate 120 for impedance matching purposes. Alternatively, the RF power supply 117 can generate a relatively high frequency RF power to control the plasma density, while the lower power supply 300 can generate a relatively low frequency DC power to control the plasma ion energy and the ion incident angle toward the substrate W.

[0046] A coating composed of aluminum oxide (Al2O3) can be formed on the outer surface of the substrate 120. The coating prevents the metal (e.g., Al) substrate 120 from being exposed to the external environment, especially from plasma. In addition, an bonding layer is formed between the ceramic carrier 110 and the substrate 120 to bond the ceramic carrier 110 and the substrate 120 together.

[0047] Reference magnification Figure 1 A's Figure 2 The ring component 130 includes a focusing ring 131, an insulating ring 133 disposed below the focusing ring 131, and an edge electrode 137 located inside the insulating ring 133.

[0048] As an example, a focusing ring 131 is disposed at the edge region of the ceramic carrier disk 110. The focusing ring 131 expands the electric field forming region so that the substrate W is located at the center of the plasma forming region. In this way, plasma can be uniformly formed across the entire area of ​​the substrate W, thereby uniformly etching each region of the substrate W.

[0049] An insulating ring 133 is located below a focusing ring 131. An edge electrode 137 is disposed inside the insulating ring 133. As an example, the edge electrode 137 may be embedded inside the insulating ring 133. Furthermore, the edge electrode 137 may be electrically connected to a power supply 300.

[0050] Refer again Figure 1 The lower power supply 300 applies power to the lower electrode 111 disposed on the substrate support assembly 100. Such a lower power supply 300 can be a DC pulse supply for controlling the characteristics of the plasma. The lower power supply 300 can, for example, provide regulated ion bombardment energy.

[0051] On the other hand, the lower power supply 300 can be connected to both the lower electrode 111 and the edge electrode 137 to apply voltages. As an example, as the lower power supply 300, a DC pulse supply can be connected to the lower electrode 111 to apply a first voltage V1, and connected to the edge electrode 137 with a potential difference ΔV relative to the first voltage V1 to apply a second voltage V2 subordinate to the first voltage V1. In this case, the first voltage V1 can be a signal pulse-modulated between a high level and a low level at a frequency of several kHz to several hundred kHz, with a level difference (potential difference) of V1. Alternatively, the second voltage V2 can also be a signal pulse-modulated between a high level and a low level at a frequency of several kHz to several hundred kHz, with a level difference (potential difference) of V2.

[0052] More specifically, the lower power supply 300 includes a plurality of output terminals respectively connected to the lower electrode 111 and the edge electrode 137. As an example, the plurality of output terminals may include a first output terminal 330 connected to the lower electrode 111 and a second output terminal 335 connected to the edge electrode 137. The lower power supply 300 can apply voltage to the first output terminal 330 and the second output terminal 335 to transmit DC pulse signals to the lower electrode 111 and the edge electrode 137. Furthermore, the lower power supply 300 can independently adjust the voltage applied to the first output terminal 330 and the second output terminal 335.

[0053] More specifically, the lower power supply 300 can adjust the voltage applied to the lower electrode 111 and the edge electrode 137 by adjusting the potential difference between the voltages applied to the first output terminal 330 and the second output terminal 335. In particular, the lower power supply 300 can apply a voltage that is boosted or reduced by a certain increment from the voltage supplied to the first output terminal 330 to the second output terminal 335. That is, the lower power supply 300 can adjust the voltage applied to the second output terminal 335 by adjusting the potential difference between the first output terminal 330 and the second output terminal 335.

[0054] Furthermore, the lower power supply 300 can supply DC pulses with the same phase or a certain phase difference to the first output terminal 330 and the second output terminal 335. Therefore, the lower power supply 300 can be easily adjusted to keep the difference between the voltage applied to the lower electrode 111 and the voltage applied to the edge electrode 137 within the maximum permissible range. In particular, the lower power supply 300 can supply asynchronous pulses between the lower electrode 111 and the edge electrode 137, thereby preventing an instantaneous rise in the potential difference between the two electrodes and the occurrence of an electric arc.

[0055] Furthermore, the lower power supply 300 can adjust the voltage supplied to the first output terminal 330 and the second output terminal 335 to control the plasma distribution formed by the lower electrode 111 and the edge electrode 137. That is, the lower power supply 300 can adjust the applied voltage to adjust the plasma distribution from the center to the edge of the plasma processing space PZ.

[0056] The upper electrode 141 generates plasma from the processing gas supplied to the cavity 10. The upper electrode 141 can generate plasma using a capacitively coupled plasma method. The upper electrode 141 can be grounded. Additionally, although not shown, the substrate processing apparatus 1 may include an upper RF power supply, to which the upper electrode 141 is connected. The upper RF power supply can supply power to the upper electrode 141 to generate an electromagnetic field. Alternatively, the upper electrode 141 can also be connected to an RF power supply 117 to generate an electromagnetic field.

[0057] The gas supply source 143 supplies the etching gas used when processing the substrate W as the processing gas. As a gas supply unit, the upper electrode 141 can be positioned at the upper part of the cavity 10 opposite to the substrate support assembly 100. The gas supply unit can have multiple gas injection holes for injecting gas into the cavity 10. The gas supply unit can be provided with a diameter larger than that of the substrate support assembly 100. The gas supply unit can be a nozzle including multiple gas injection holes. Alternatively, the gas supply unit can be a structure having one or more gas supply nozzles.

[0058] On the other hand, the present invention as Figure 1 As shown, the plasma generation method employs capacitively coupled plasma, but it is not limited to this. That is, as a method for generating plasma, inductively coupled plasma or microwave-based plasma generation methods can also be used.

[0059] Figure 3 This is a circuit diagram illustrating a simplified structure of the lower power supply of the present invention. Figure 4a It is shown Figure 3 A structural diagram of one embodiment of the circuit structure of a power amplifier. Figure 4b It is shown Figure 3 A structural diagram of another embodiment of the circuit structure of the power amplifier. (Refer to...) Figure 3 Take a closer look at the specific structure of the power supply 300.

[0060] The lower power supply 300 includes a DC power supply section 310 that generates DC power by including multiple DC power supplies, a power amplification section 320 that includes multiple power amplifiers PA (Power Amplifier), and a first output terminal 330 and a second output terminal 335 that are respectively connected to the lower electrode 111 and the edge electrode 137.

[0061] The DC power supply unit 310 includes a first DC power supply 311 connected to the power amplifier unit 320 and outputting voltage through a first output terminal 330 and a second output terminal 335, and a second DC power supply 315 connected to the power amplifier unit 320 and outputting voltage through a second output terminal 335. For example, the first DC power supply 311 can output a first DC voltage VDC1 to the first power amplifier unit 321. Conversely, the second DC power supply 315 can output a second DC voltage VDC2 to the second power amplifier unit 325. Furthermore, the first DC voltage VDC1 and the second DC voltage VDC2 can be amplified by the power amplifier unit 320 into a first voltage V1 and a potential difference ΔV, respectively.

[0062] The power amplifier section 320 includes a first power amplifier section 321 and a second power amplifier section 325, each containing a plurality of power amplifiers PA. The first power amplifier section 321 is connected between a first DC power supply 311 and a first output terminal 330. In particular, the first power amplifier section 321 can amplify a first DC voltage VDC1, which is supplied as an output from the first DC power supply 311, and supply it to the first output terminal 330. At this time, the first output terminal 330 can be formed at the output terminal of the first power amplifier section 321, and the first voltage V1 is applied through the first DC power supply 311 and the first power amplifier section 321.

[0063] The second power amplifier 325 is connected between the second DC power supply 315 and the second output terminal 335. The second power amplifier 325 can amplify the second DC voltage VDC2, which is the output from the second DC power supply 315, and supply it to the second output terminal 335. At this time, the second output terminal 335 can be formed at the output terminal of the second power amplifier 325, and the second voltage V2 is applied through the second DC power supply 315 and the second power amplifier 325.

[0064] On the other hand, one output terminal of the first power amplifier 321 is connected to the second power amplifier 325. Therefore, the second output terminal 335 can receive a voltage that is boosted or reduced by a certain increment compared to the voltage applied to the first output terminal 330.

[0065] As an example, the first DC power supply 311 can adjust the magnitude of the voltage applied to the first output terminal 330 and the second output terminal 335. In particular, the first DC power supply 311 can adjust the magnitude of the voltage applied to the lower electrode 111 and the edge electrode 137 connected to the first output terminal 330 and the second output terminal 335.

[0066] Furthermore, the second DC power supply 315 can adjust the magnitude of the voltage applied to the second output terminal 335. In particular, the second DC power supply 315 can adjust the potential difference between the first output terminal 330 and the second output terminal 335. That is, the lower power supply 300 can output a first voltage V1 through the first output terminal 330 and a second voltage V2 through the second output terminal 335. In particular, the second voltage V2 output to the edge electrode 137 through the second output terminal 335 is a voltage subordinate to the first voltage V1 output to the lower electrode 111 through the first output terminal 330 and is a voltage that boosts or deflates the potential difference ΔV from the first voltage V1.

[0067] Reference Figure 4a as well as Figure 4b ,against Figure 3 The structure of the power amplifier PA will be examined in slightly more detail.

[0068] As an example, the power amplifier PA of each of the first power amplifier section 321 and the second power amplifier section 325 includes an energy storage element 340, a switching circuit 342, and a pulse converter 344.

[0069] As an example, the energy storage element 340 can be connected adjacent to the first DC power supply 311 or the second DC power supply 315. Further, the energy storage element 340 can be connected in parallel with a capacitor of the first DC power supply 311 or the second DC power supply 315. The energy storage element 340 can be connected to the first DC power supply 311 or the second DC power supply 315 for charging.

[0070] As an example, the power amplifier PA may include a switching circuit 342 that generates a DC pulse signal using the power charged in the energy storage element 340. The switching circuit 342 includes multiple transistors. As an example, the transistors in the switching circuit 342 may include MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). The switching circuit 342 can control the transistors to transmit a DC pulse signal to the pulse converter 344 using the power stored in the energy storage element 340 and the voltage applied from the DC power supply unit 310. In this case, the transmitted DC pulse signal may be a bipolar DC pulse signal. Alternatively, the DC pulse signal is not limited to a bipolar DC pulse signal; a unipolar DC pulse signal may also be used as needed.

[0071] The switching circuit 342 can be an H-bridge circuit composed of four switching elements. Each switching element in the H-bridge circuit includes a transistor and a diode connected across the transistor (source and drain in the case of a MOSFET). The transistor acts as a switch, and the diode prevents reverse current from occurring. A switching signal is generated by turning two transistors M1 and M3 opposite to each other on / off together, and conversely, turning two transistors M2 and M4 opposite to each other on / off together in opposite directions.

[0072] As an example, one side of the pulse converter 344 is connected to the rear end of the switching circuit 342, and the other side is connected to ground and either the first output terminal 330 or the second output terminal 335. Further, the pulse converter 344 may include a transformer to amplify the DC pulse signal generated from the switching circuit 342 and transmit it to the connected output terminal.

[0073] As an example, the first output terminal 330 can be connected to a node formed at the rear end of the first power amplifier section 321. More specifically, in the first power amplifier section 321, a power amplifier PA can be formed as a node on the other side of the pulse converter 344 and connected to the first output terminal.

[0074] As an example, the second output terminal 335 can be connected to a node formed at the rear end of the second power amplifier section 325. More specifically, in the second power amplifier section 325, a power amplifier PA can form a node on the other side of the pulse converter 344 and be connected to the second output terminal.

[0075] On the other hand, the transformer turns ratio can be selected as an appropriate value in order to output the required first voltage V1 and second voltage V2 from the first DC voltage VDC1 and the second DC voltage VDC2.

[0076] On the other hand, the power amplification section 320 can apply high voltage to the first output terminal 330 and the second output terminal 335 by cascading or connecting multiple power amplifiers PA in series. More specifically, the multiple power amplifiers PA can be connected in parallel with the same DC generator on one side, including the energy storage element 340 and the switching circuit 342, and the other side of the power amplifiers PA can be connected in series to apply high voltage to the output terminal. That is, by connecting the pulse converter 344 of each power amplifier PA in series with the pulse converter 344 of other power amplifiers, the signal amplified to a high voltage can be transmitted to the first output terminal 330 or the second output terminal 335.

[0077] As an example, the first power amplifier section 321 may include multiple first power amplifiers PA1, which are power amplifiers PA connected to the first DC power supply 311. Furthermore, the first power amplifiers PA1 may include N units connected in a stacked manner or in series. In particular, the N first power amplifiers PA1 can amplify the first DC voltage VDC1 output from the first DC power supply 311 and output a first voltage V1 as a high voltage through the first output terminal 330. Furthermore, the first voltage V1 can be applied to the lower electrode 111 connected to the first output terminal 330.

[0078] As an example, the second power amplifier section 325 may include multiple second power amplifiers PA2, which are power amplifiers PA connected to the second DC power supply 315. Further, the second power amplifiers PA2 may include M units connected in a stacked manner or in series. In particular, the M second power amplifiers PA2 can amplify the potential difference ΔV from the second DC voltage VDC2 output from the second DC power supply 315. Further, the second power amplifiers PA2 can output a second voltage V2 through the second output terminal 335, which is a voltage that boosts or reduces the potential difference ΔV from the first voltage V1. Even further, the edge electrode 137 connected to the second output terminal 335 can apply the second voltage V2.

[0079] As an example, the first power amplifier PA1 and the second power amplifier PA2 may include transformers with a turns ratio of 1. When the number of the first power amplifier PA1 and the second power amplifier PA2 are N and M respectively, the first voltage V1 output through the first output terminal 330 and the second voltage V2 output through the second output terminal 335 can be calculated from the following mathematical formulas 1 and 2 respectively using the first DC voltage VDC1 and the second DC voltage VDC2.

[0080] [Mathematical Expression 1]

[0081] V1=N*VDC1

[0082] [Mathematical Expression 2]

[0083] V2 = V1 + M * VDC2

[0084] On the other hand, the turns ratio of the transformers used in the first power amplifier PA1 and the second power amplifier PA2 is not limited to 1, and can be changed and applied as needed. Furthermore, the turns ratio of the transformer used in the first power amplifier PA1 and the turns ratio of the transformer used in the second power amplifier PA2 can be applied differently to each other as needed.

[0085] The second output terminal 335 can be supplied with a second voltage V2, which is boosted by a certain voltage increment (i.e., potential difference ΔV) from the first voltage V1 applied to the first output terminal 330 through the second DC power supply 315. Furthermore, the edge electrode 137 connected to the second output terminal 335 can also be supplied with the second voltage V2.

[0086] On the other hand, the second DC power supply 315 can adjust the potential difference applied to the first output terminal 330 and the second output terminal 335. More specifically, the output of the Nth power amplifier in the first power amplifier PA1 is applied as a first voltage V1 through the first output terminal 330 to the lower electrode 111, and simultaneously supplied to the primary power amplifier in the second power amplifier PA2. Therefore, the first voltage V1 and the second voltage V2 can be synchronized with each other. Further, the second voltage V2 is generated based on the first voltage V1 as the output of the Nth power amplifier in the first power amplifier PA1, therefore the second voltage V2 is subordinate to the first voltage V1. Even further, the outputs of the first output terminal 330 and the second output terminal 335 are phase-synchronized, so the phases of the outputs of the first output terminal 330 and the second output terminal 335 can always have the same or a certain phase difference. Therefore, the output potential difference between the first output terminal 330 and the second output terminal 335 is always the potential difference ΔV of the voltage increment from the first voltage V1 to the second voltage V2. That is, in the substrate processing apparatus 1, the lower electrode 111 connected to the first output terminal 330 and the edge electrode 137 connected to the second output terminal 335 can form a certain potential difference between them to prevent arcing between the two electrodes.

[0087] On the other hand, the first power amplifier PA1 and the second power amplifier PA2 can be connected in series with multiple power amplifiers PA, which may lead to the damage of the entire circuit due to the failure of a single or partial power amplifier. Therefore, the first power amplifier PA1 and the second power amplifier PA2 of the present invention may also include a protection circuit to prevent damage to the circuit connected to the damaged power amplifier when at least one of the first power amplifier PA1 and the second power amplifier PA2 is damaged. That is, the first power amplifier PA1 and the second power amplifier PA2 may include, for example, Figure 4b The protection circuit shown includes a separation circuit 346, a discharge circuit 348, and a bypass circuit 350.

[0088] The disconnect circuit 346 can be connected to the front end of the energy storage element 340 to disconnect the power amplifier PA from the DC power supply section 310. As an example, the disconnect circuit 346 may include a transistor connected in series with the front end of the power amplifier PA. More specifically, it can be disconnected when the power amplifier PA is short-circuited or open, so that the energy storage element 340 does not charge when a voltage is applied to the power amplifier PA.

[0089] The discharge circuit 348 can discharge the power supplied to the energy storage element 340 that is charged by the DC power supply section 310. As an example, the discharge circuit 348 can be connected in parallel with the rear end of the energy storage element 340. Further, the discharge circuit 348 may include a transistor and a resistor connected in series with the transistor. As an example, the resistor in the discharge circuit 348 can discharge the power charged to the energy storage element 340.

[0090] When any of the multiple power amplifiers (PAs) is damaged, the bypass circuit 350 allows the signal from the normal power amplifier (PA) to bypass the damaged power amplifier (PA) and be transmitted to the first output terminal 330 or the second output terminal 335. Alternatively, the bypass circuit 350 can maintain the normal power amplifier (PA) connected to ground. As an example, the bypass circuit 350 may include a switch connected in parallel with the downstream end of the pulse converter 344. The switch of the bypass circuit 350 can normally remain open and close when the power amplifier circuit is damaged and turned on. In particular, when the pulse converter 344 of the power amplifier is damaged and turned on, the bypass circuit 350 can maintain the connection of each output terminal to ground without passing through the pulse converter 344 of the damaged power amplifiers above and below. The bypass circuit 350 is a half-bridge circuit. A half-bridge circuit includes two transistors connected in series in opposite directions, diodes connected in parallel with each transistor, and a switch connected in parallel. In normal operating mode, the switch is open, and the two transistors alternately turn on / off. In bypass mode, the switch is short-circuited, preventing current from flowing to the transistor.

[0091] As an example, the bypass circuit 350 may include multiple n-type MOSFETs (NMOS) and other transistors. Specifically, the n-MOS at the front end may be connected to the drain at the top and the source at the bottom, while the n-MOS at the rear end may be connected to the source at the top and the drain at the bottom. That is, when the bypass circuit 350 is switched off, the series-connected n-MOS transistors can prevent reverse current from flowing through the bypass circuit 350 into the DC pulse supply circuit, thus protecting the overall circuit.

[0092] Refer again Figure 3 In the lower power supply 300, the output terminal of the first power amplifier 321 is connected to the second power amplifier 325, thus synchronizing the phases of the DC pulse signals supplied to the first output terminal 330 and the second output terminal 335. Furthermore, the DC pulse signals supplied to the two output terminals have a potential difference ΔV corresponding to a voltage increment. In particular, the voltage difference between the lower electrode 111 and the edge electrode 137, respectively connected to the first output terminal 330 and the second output terminal 335, can be controlled to be a potential difference ΔV. That is, by applying a synchronization signal to the lower electrode 111 and the edge electrode 137, the potential difference between the two electrodes can be prevented from exceeding the limit range where an arcing phenomenon occurs.

[0093] On the other hand, in the substrate processing apparatus 1 of the present invention, the lower power supply 300 is shown to have two output terminals, but more output terminals can be formed as needed. Furthermore, the lower power supply 300 is shown to have two DC generators, but their number is not limited; more DC generators can be provided as needed to control the voltage applied to the electrodes.

[0094] This embodiment and the accompanying drawings are merely illustrative of a portion of the technical concept included in this invention. It is obvious that variations and specific embodiments that can be readily derived by those skilled in the art within the scope of the technical concept included in the specification and drawings of this invention are all included within the scope of the claims of this invention.

[0095] Therefore, the concept of the present invention should not be limited to the illustrated embodiments, not only to the appended claims, but also to any equivalent or modified versions thereof.

Claims

1. A substrate processing apparatus for processing a substrate by plasma, wherein, The substrate processing apparatus includes: An electrostatic chuck supports and secures the substrate. The lower electrode is located inside the electrostatic chuck; An edge ring surrounds the edge of the electrostatic chuck; An insulating ring is disposed below the edge ring; Edge electrodes, located inside the insulating ring; and A DC pulse supply applies a first voltage to the lower electrode and a second voltage to the edge electrode, the second voltage having a potential difference relative to the first voltage and being subordinate to the first voltage.

2. The substrate processing apparatus according to claim 1, wherein, The DC pulse supply includes: The DC power supply section includes a first DC power supply that outputs a first DC voltage and a second DC power supply that outputs a second DC voltage; and The power amplifier section is electrically connected to the DC power supply section and has a first output terminal connected to the lower electrode and a second output terminal connected to the edge electrode.

3. The substrate processing apparatus according to claim 2, wherein, The power amplification section includes: A first power amplifier section is connected to the first DC power supply and outputs a first voltage amplified from the first DC voltage to the first output terminal; and The second power amplifier section is connected to the second DC power supply and the output terminal of the first power amplifier section, and outputs the second voltage to the second output terminal, which is a voltage that boosts the potential difference of the first voltage. The second power amplifier amplifies the second DC voltage and outputs a voltage corresponding to the potential difference.

4. The substrate processing apparatus according to claim 3, wherein, The first output terminal is formed at the output terminal of the first power amplifier section.

5. The substrate processing apparatus according to claim 3, wherein, The second output terminal is formed at the output terminal of the second power amplifier section.

6. The substrate processing apparatus according to claim 3, wherein, The first power amplification section includes a plurality of first power amplifiers connected to the first DC power supply. The second power amplification section includes a plurality of second power amplifiers connected to the second DC power supply. The first power amplifiers are connected in series with each other. The second power amplifiers are connected in series with each other. The output terminal of one of the first power amplifiers is connected to the second power amplifier section.

7. The substrate processing apparatus according to claim 6, wherein, The first power amplifier and the second power amplifier include: The energy storage element is charged via the DC power supply unit; A switching circuit, connected to the rear end of the energy storage element, generates pulses; and A pulse converter amplifies the pulses generated in the switching circuit.

8. The substrate processing apparatus according to claim 7, wherein, The front ends of each of the energy storage elements of the first power amplifier are connected in parallel with the first DC power supply. The pulse converters of the first power amplifier are connected in series with each other. The first output terminal is formed in one of the output terminals of the pulse converters connected in series.

9. The substrate processing apparatus according to claim 8, wherein, The front ends of each of the energy storage elements in the second power amplifier are connected in parallel with the first DC power supply. The pulse converters of the second power amplifier are connected in series with each other. The second output terminal is formed in one of the output terminals of the pulse converters connected in series. The last end of the pulse converter is connected to the first output terminal.

10. The substrate processing apparatus according to claim 9, wherein, The first power amplifier and the second power amplifier further include: A protection circuit that prevents damage to circuitry connected to the damaged power amplifier when at least one power amplifier is damaged.

11. The substrate processing apparatus according to claim 10, wherein, The protection circuit includes: A disconnect circuit separates the energy storage element of the damaged power amplifier from either the first DC power supply or the second DC power supply.

12. The substrate processing apparatus according to claim 10, wherein, The protection circuit includes: A discharge circuit discharges the power stored in the energy storage element of the damaged power amplifier.

13. The substrate processing apparatus according to claim 12, wherein, The discharge circuit includes: A transistor, connected in parallel with the energy storage element; and A resistor is connected in series with the transistor.

14. The substrate processing apparatus according to claim 10, wherein, The protection circuit includes: A bypass circuit is connected in parallel with the pulse converter of the damaged power amplifier.

15. The substrate processing apparatus according to claim 14, wherein, The bypass circuit includes a switch and one or more MOSFETs to prevent reverse current from flowing into the circuitry of the DC pulse supply.

16. A DC pulse supply for a substrate processing apparatus for plasma processing of a substrate, the DC pulse supply comprising: The DC power supply section includes a first DC power supply that outputs a first DC voltage and a second DC power supply that outputs a second DC voltage. as well as The power amplifier section is electrically connected to the DC power supply section and has a first output terminal and a second output terminal. The power amplifier applies a first voltage to the first output terminal and a second voltage to the second output terminal, wherein the second voltage has a potential difference relative to the first voltage and is subordinate to the first voltage.

17. The DC pulse supply according to claim 16, wherein, The power amplification section includes: A first power amplifier section is connected to the first DC power supply and outputs the first voltage, amplified from the first DC voltage, to the first output terminal; and The second power amplifier section is connected to the second DC power supply and the output terminal of the first power amplifier section, and outputs the second voltage to the second output terminal, which is a voltage that boosts the potential difference of the first voltage. The second power amplifier amplifies the second DC voltage and outputs a voltage corresponding to the potential difference.

18. The DC pulse supply according to claim 17, wherein, The first power amplification section includes a plurality of first power amplifiers connected to the first DC power supply. The second power amplification section includes a plurality of second power amplifiers connected to the second DC power supply. The first power amplifiers are connected in series with each other. The second power amplifiers are connected in series with each other. The output terminal of one of the first power amplifiers is connected to the second power amplifier section.

19. The DC pulse supply according to claim 18, wherein, The first power amplifier and the second power amplifier include: The energy storage element is charged via the DC power supply unit; A switching circuit, connected to the rear end of the energy storage element, generates pulses; and A pulse converter amplifies the pulses generated in the switching circuit.

20. The DC pulse supply according to claim 19, wherein, The front ends of each of the energy storage elements of the first power amplifier are connected in parallel with the first DC power supply. The pulse converters of the first power amplifier are connected in series with each other. The first output terminal is formed in one of the output terminals of the pulse converters connected in series. The front ends of each of the energy storage elements in the second power amplifier are connected in parallel with the first DC power supply. The pulse converters of the second power amplifier are connected in series with each other. The second output terminal is formed in one of the output terminals of the pulse converters connected in series. The last end of the pulse converter is connected to the first output terminal.

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