Deviation compensation methods and related products for semiconductor measurement equipment

Abstract

This invention provides a deviation compensation method for semiconductor metrology equipment and related products. The deviation compensation method for semiconductor metrology equipment includes acquiring the wafer coordinates of preset patterns for multiple dies on a wafer under test, with the wafer under test arranged on a platform of the metrology equipment; sequentially moving the platform based on the wafer coordinates of the preset patterns of the multiple dies, and controlling the scanning electron microscope (SEM) of the metrology equipment to capture images of the wafer under test after each movement, thereby obtaining multiple SEM images of the wafer under test; determining the relative position of the preset patterns in each SEM image; determining the positional deviation of the preset patterns between the multiple SEM images; and performing motion compensation on the platform based on the wafer coordinates of the preset patterns of the multiple dies and the positional deviation of the preset patterns between the multiple SEM images. This method achieves accurate calibration of the platform's motion accuracy at a lower cost, improving the platform's motion accuracy.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a method for offset compensation of semiconductor measurement equipment, a computer-readable storage medium, a computer program product, and a computer device. Background Technology

[0002] Currently, the motion accuracy calibration of the stage in semiconductor measurement equipment mainly adopts laser interferometer calibration scheme and mechanical calibration plate calibration scheme.

[0003] The laser interferometer calibration scheme uses a laser interferometer as its core. The laser emitter is fixed to the equipment base, and the measuring head is mounted on a support platform. Using the laser wavelength as a reference, the translational error of the support platform in the X and Y axes is detected. During calibration, multiple calibration points are preset, and the support platform is controlled to move sequentially to the target position. The interferometer's detection data is recorded, and an error compensation table is generated using a linear fitting algorithm for subsequent motion correction. The mechanical calibration plate scheme uses a quartz calibration plate with high-precision grid markings on its surface. The calibration plate is fixed to the support platform, and images of the calibration plate are captured by the measurement system's image acquisition device to obtain the coordinates of the marked points. By controlling the support platform to move at preset step sizes, the theoretical displacement of the marked points is compared with the actual displacement of the marked points in the calibration plate image to calculate the translational and rotational errors. This scheme requires manual adjustment of the calibration plate's level and center alignment.

[0004] However, laser interferometer calibration requires setting up multiple laser interferometers, which is costly and complex to operate. Mechanical calibration plate calibration, on the other hand, is difficult to align precisely with the calibration plate and is prone to introducing human error. Summary of the Invention

[0005] One object of the present invention is to provide a deviation compensation method for semiconductor measurement equipment, a computer-readable storage medium, a computer program product, and a computer device, so as to reduce the cost of the motion accuracy calibration process of semiconductor measurement equipment and improve the motion accuracy calibration accuracy.

[0006] Specifically, according to one aspect of the present invention, the present invention provides a deviation compensation method for a semiconductor measurement device, comprising: The wafer coordinates of each preset pattern of multiple dies on the wafer under test are obtained, and the wafer under test is arranged on the carrier platform of the measurement equipment. Based on the wafer coordinates of the preset pattern of the multiple dies, the carrier stage is moved sequentially, and after each movement, the scanning electron microscope of the measurement device is controlled to set the field of view to take pictures of the wafer under test, thereby obtaining multiple SEM images of the wafer under test. The relative position of the preset graphic is determined in each SEM image; Determine the positional deviation of the preset graphic among the multiple SEM images; Motion compensation is performed on the carrier stage based on the wafer coordinates of the preset pattern of the plurality of dies and the positional deviation of the preset pattern between the plurality of SEM images.

[0007] Optionally, determining the positional deviation of the preset graphic among the plurality of SEM images includes: A reference die is identified from the plurality of dies; Determine the positional deviation of the preset pattern between the SEM image of the reference die and other SEM images.

[0008] Optionally, the wafer coordinates based on the preset pattern of the multiple dies are used to sequentially move the support stage, and after each movement, the scanning electron microscope of the measurement device is controlled to set the field of view to capture images of the wafer under test, thereby obtaining multiple SEM images of the wafer under test, including: A reference die is identified from the plurality of dies; The stage is moved based on the wafer coordinates of the preset pattern of the reference die, and the SEM image of the wafer under test is captured by the scanning electron microscope with the set field of view, which is used as the reference image. Based on the wafer coordinates of the preset pattern of the other dies besides the reference die, the stage is moved sequentially, and after each movement, the SEM image of the wafer under test is captured by the scanning electron microscope with the set field of view.

[0009] Optionally, moving the support stage based on the wafer coordinates of the preset pattern of the reference die includes: Map the wafer coordinates of the preset pattern of the reference die to the coordinate system of the support stage to obtain the initial support stage coordinates; Move the support platform to the initial support platform coordinates; Adjust the position of the support stage so that the preset pattern of the reference die is at the center of the set field of view of the scanning electron microscope, and use the current coordinates of the support stage as the coordinates of the reference support stage; The step of sequentially moving the support stage based on the wafer coordinates of the preset pattern of the other dies besides the reference die includes: Based on the reference bearing platform coordinates and the wafer coordinates of the preset pattern of each die, the bearing platform coordinates of the preset pattern of each die other than the reference die are obtained. The support platform is moved sequentially to the support platform coordinates of the preset pattern of each of the cores except the reference core.

[0010] Optionally, the step of performing motion compensation on the support stage based on the wafer coordinates of the preset pattern of the plurality of dies and the positional deviation of the preset pattern between the plurality of SEM images includes: Based on the reference bearing platform coordinates, the bearing platform coordinates of the preset pattern of each die other than the reference die, and the positional deviation of the preset pattern between the reference image and other SEM images, the bearing platform coordinates of the preset pattern of each die other than the reference die are compensated for. The movement of the support platform is controlled based on the coordinates of the support platform after deviation compensation.

[0011] Optionally, the set field of view is smaller than each of the tubes and larger than twice the linear dimension of the preset pattern.

[0012] Optionally, determining the relative position of the preset graphic in each SEM image includes: A network model based on a deep learning algorithm is obtained. The network model is trained to perform image recognition of the preset shape on the input SEM image and output the relative position of the preset shape in the input SEM image. Each of the SEM images is input into the network model to obtain the relative position of the preset graphic in each SEM image.

[0013] According to another aspect of the present invention, a computer-readable storage medium is also provided, on which a computer program is stored, wherein the computer program, when executed by a processor, implements the steps of the deviation compensation method of any of the above-described semiconductor measurement devices.

[0014] According to another aspect of the present invention, a computer program product is also provided, comprising a computer program that, when executed by a processor, implements the steps of the deviation compensation method for any of the above-described semiconductor measurement devices.

[0015] According to another aspect of the present invention, a computer device is also provided, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the deviation compensation method of any of the above-described semiconductor measurement devices.

[0016] The deviation compensation method of the semiconductor measurement equipment of the present invention determines a preset pattern among multiple dies of the wafer under test and obtains the wafer coordinates of the preset pattern. Then, based on the wafer coordinates of the preset pattern of each die, the stage is moved, and a SEM image is captured using a scanning electron microscope (SEM) after each movement. By analyzing the positional deviation data of the relative positions of the preset pattern among multiple SEM images, the nonlinear motion deviation of the stage at the corresponding position is obtained. By using the positional deviation data to compensate for the stage movement in real time, the motion accuracy of the stage is improved, allowing the SEM to operate within a smaller field of view, thereby improving the measurement accuracy of the SEM. Furthermore, compared with laser interferometer calibration schemes and mechanical calibration plate calibration schemes, this method does not require expensive calibration equipment, has a simple operation procedure, and does not introduce human error.

[0017] The above and other objects, advantages and features of the present invention will become more apparent to those skilled in the art from the following detailed description of specific embodiments of the invention in conjunction with the accompanying drawings. Attached Figure Description

[0018] The following sections will describe some specific embodiments of the invention in a detailed manner by way of example and not limitation, with reference to the accompanying drawings. The same reference numerals in the drawings denote the same or similar parts or portions. Those skilled in the art should understand that these drawings are not necessarily drawn to scale. In the drawings: Figure 1 This is a schematic flowchart of a deviation compensation method for a semiconductor measurement device according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure for obtaining a preset pattern of a die of a wafer under test using a deviation compensation method according to an embodiment of the present invention; Figure 3 This is a schematic flowchart illustrating the process of obtaining SEM images of each die using a deviation compensation method according to an embodiment of the present invention. Figure 4 This is a schematic flowchart of a deviation compensation method based on a wafer coordinate moving stage according to an embodiment of the present invention; Figure 5 This is a schematic flowchart illustrating the process of obtaining the relative position of a preset graphic in each SEM image using a deviation compensation method according to an embodiment of the present invention. Figure 6 This is a schematic diagram of the relative positions of preset graphics in an SEM image obtained using a network model according to an embodiment of the deviation compensation method of the present invention. Figure 7 This is a schematic flowchart illustrating the determination of the positional deviation of a preset graphic between SEM images using a deviation compensation method according to an embodiment of the present invention. Figure 8This is a schematic diagram of a deviation compensation method according to an embodiment of the present invention, obtained by overlaying an SEM image of a reference die and an SEM image of a die other than the reference die. Figure 9 This is a schematic flowchart illustrating the deviation compensation method for a bearing platform according to an embodiment of the present invention. Figure 10 This is a schematic diagram of a computer program product according to an embodiment of the present invention; Figure 11 This is a schematic diagram of a computer-readable storage medium according to an embodiment of the present invention; and Figure 12 This is a schematic diagram of a computer device according to an embodiment of the present invention. Detailed Implementation

[0019] In the semiconductor integrated circuit manufacturing process, after core processes such as etching and exposure, wafers need to be inspected using metrology equipment (such as scanning electron microscopes, SEM) to verify whether the process meets the standards, and thus determine the chip's performance and yield. As semiconductor manufacturing processes advance to 7nm, 5nm, and even 3nm nodes, critical dimensions have shrunk to the nanometer scale. To obtain clear images of these critical dimensions, metrology equipment needs to compress the field of view (also known as the imaging field of view) to tens of micrometers or even smaller.

[0020] As a core component of metrology equipment, the stage of a wafer directly determines whether critical dimensions can accurately enter the field of view of the metrology system. If there are deviations in the stage's movement (such as translational, rotational, or scaling errors), even if the theoretical accuracy of the drive module meets the standards, the critical dimensions may still deviate from the field of view after actual movement, leading to measurement failure or distorted results. Therefore, accurately calibrating the movement accuracy of the stage in metrology equipment, enabling the stage to move precisely to the target position, is one of the core technological directions in the current research and development of semiconductor metrology equipment.

[0021] Currently, the main methods used to calibrate the motion accuracy of the platform are laser interferometer calibration scheme or mechanical calibration plate calibration scheme.

[0022] The laser interferometer calibration scheme uses a laser interferometer as its core. The laser emitter is fixed to the equipment base, and the measuring head is mounted on a platform. Using the laser wavelength (e.g., 633nm) as a reference, the translational error of the platform in the X and Y axes is detected. For rotational errors (such as yaw, pitch, and roll), an angle interferometer is required, and the error values ​​are calculated using multiple laser optical paths. During the calibration process, multiple calibration points need to be preset. The platform is controlled to move sequentially to the target position, and the interferometer's detection data is recorded. Then, an error compensation table is generated using a linear fitting algorithm for subsequent motion correction.

[0023] However, in laser interferometer calibration schemes, the laser interferometer equipment is relatively expensive and has stringent environmental requirements, typically requiring constant temperature, humidity, and vibration-free environments. Semiconductor factory measurement workshops often struggle to maintain these conditions long-term, making calibration results susceptible to temperature drift and airflow interference. Furthermore, the calibration process requires setting up multiple optical paths, making it complex and often taking 4-6 hours per calibration session, severely impacting the utilization rate of the measurement equipment. Additionally, laser interferometers can only detect linear errors; they cannot accurately capture nonlinear errors in the movement of the stage, such as localized deviations caused by lead screw backlash and guide rail friction. Therefore, the actual motion accuracy of the stage after calibration still exhibits nonlinear errors.

[0024] The mechanical calibration plate calibration scheme uses a quartz calibration plate with high-precision grid markings (such as cross marks with a spacing of 1 mm and an accuracy of ±0.1 μm) engraved on its surface. The calibration plate is fixed on a support platform, and images of the calibration plate are captured by the image acquisition device of the measurement system to obtain the coordinates of the marked points. By controlling the support platform to move in preset steps (e.g., 100 μm), the theoretical displacement of the marked points is compared with the actual displacement of the marked points in the calibration plate image to calculate the translational and rotational errors. This scheme requires manual adjustment of the calibration plate's levelness and center alignment.

[0025] However, in mechanical calibration board calibration schemes, the grid marks on the calibration board are easily contaminated by dust and chemical reagents during wafer measurement, leading to positioning deviations of the marks during image recognition. Manually adjusting the levelness and center alignment of the calibration board can introduce human error (e.g., levelness deviation ±0.01°), thus amplifying the calibration error caused by the stage rotation. Furthermore, this scheme can only detect errors in the stage within a preset step size, failing to cover the full range of motion of the stage during measurement. It cannot compensate for errors at non-preset positions, and in small field-of-view measurement scenarios (e.g., 20μm imaging field of view), critical dimensions may still deviate from the field of view.

[0026] The purpose of the deviation compensation method for semiconductor measurement equipment in this embodiment is to reduce the cost of the motion accuracy calibration process of semiconductor measurement equipment and improve the motion accuracy calibration accuracy.

[0027] Figure 1 This is a schematic flowchart of a deviation compensation method for a semiconductor measurement device according to an embodiment of the present invention. The method generally includes: S100: Obtain the wafer coordinates of the preset patterns of multiple dies on the wafer under test. The wafer under test is arranged on the carrier platform of the measurement equipment. S200: Based on the wafer coordinates of multiple dies in a preset pattern, the carrier stage is moved sequentially, and after each movement, the scanning electron microscope of the measurement equipment is controlled to set the field of view to take pictures of the wafer under test, thereby obtaining multiple SEM images of the wafer under test. S300, determines the relative position of a preset graphic in each SEM image; S400, determine the positional deviation of a preset graphic between multiple SEM images; The S500 performs motion compensation on the stage based on the wafer coordinates of preset patterns of multiple dies and the positional deviation of preset patterns between multiple SEM images.

[0028] The wafer under test can be a sample wafer, and the wafer coordinates of the preset patterns of each die in the sample wafer have been measured using calibrated measuring equipment to confirm that the wafer coordinates of each preset pattern are within the set range. The wafer under test can also be one of multiple wafers actually manufactured in a batch.

[0029] The wafer under test can be a wafer that has undergone etching. Multiple dies are arranged in an array on the wafer, and scribe lines can be arranged between each die. The feature patterns of integrated circuits are etched inside each die. The multiple dies can be arranged in an array with equal or unequal spacing. The multiple dies can be the same die or different dies.

[0030] The preset pattern can be a pattern with a low repetition rate and large spacing between them within the die. For example, the preset pattern is one that satisfies the condition that when the scanning electron microscope is positioned at any location on the die, at most one preset pattern, either partially or entirely, appears within the set field of view of the scanning electron microscope. Preferably, the preset pattern is a unique pattern within the die, such as a crosshair alignment mark.

[0031] When multiple dies include different dies, the preset patterns of the different dies can be the same or different patterns. Preferably, in order to facilitate the rapid determination of the relative position of the preset pattern of each die in its SEM image in subsequent steps (e.g., S300), all dies can use the same preset pattern.

[0032] For example, the wafer under test can be a 12-inch wafer with a thickness of 775μm. Multiple identical dies are arranged in an array at equal intervals on the wafer under test. The die size can be 16mm*8mm, and the relative positions and dimensions of the preset patterns in all dies are identical. Please refer to [link to relevant documentation]. Figure 2 , Figure 2 This is a schematic diagram of a preset pattern for one die of a wafer under test. Multiple identical dies 502 are arranged in a spaced array on the wafer 501 under test, and each die 502 contains a preset pattern 503.

[0033] In this embodiment, the wafer coordinates of the preset pattern of each die can be obtained based on the design layout of the wafer under test, or the wafer coordinates of the preset pattern of each die can be obtained after measuring the wafer under test with a calibrated measurement device.

[0034] Next, the stage is moved sequentially based on the wafer coordinates of the preset pattern of each die. After each movement, the scanning electron microscope of the measurement equipment is controlled to set the field of view and take pictures of the wafer under test, thereby obtaining multiple SEM images of the wafer under test. Those skilled in the art can reasonably set the moving order of the stage as needed. For example, each die can be numbered according to its position on the wafer under test, and then the stage can be moved sequentially according to the numbering order.

[0035] Those skilled in the art can reasonably set the movement range of the carrier stage each time as needed. For example, the wafer coordinates of the preset patterns of each die can be mapped to the coordinate system of the carrier stage, and the movement of the carrier stage can be controlled using each mapped coordinate as the stopping target. For example, the spacing between the preset patterns of adjacent dies can be calculated based on the wafer coordinates of the preset patterns of each die, and then the movement of the carrier stage can be controlled using each spacing as the movement target.

[0036] In this embodiment, after each stage movement, the scanning electron microscope (SEM) can use the same set field of view to image the wafer under test. Those skilled in the art can reasonably set the size of the SEM's set field of view as needed, so that after each stage movement, the preset pattern of the corresponding die can appear within the SEM's imaging field of view, and only one preset pattern appears within the imaging field of view. Of course, the SEM can also use different set fields of view to image the wafer under test, but when processing the SEM images subsequently, it is necessary to scale each SEM image using the corresponding scaling factor so that each SEM image is at the same field of view or resolution.

[0037] Next, the relative position of the preset graphic is determined in each SEM image under a scanning electron microscope. For example, a predefined visual image algorithm can be used to identify the preset graphic in each SEM image, and then the coordinates of the preset graphic in the SEM image (e.g., the coordinates of the center of the preset graphic) can be determined. The predefined visual image algorithm can be an image template matching algorithm, a deep learning-based algorithm, etc.

[0038] Next, the positional deviation of the preset patterns between multiple SEM images is determined. Taking the wafer under test with multiple identical dies arranged in an equally spaced array, and all dies having the same relative position and size of the preset patterns, as an example, assuming that the stage can be accurately positioned each time, the relative position of the preset patterns in each SEM image should be consistent. For example, the center of the preset pattern should be at the center coordinate of the SEM image.

[0039] When there is a positioning deviation in the stage, the relative positions of the preset patterns between multiple SEM images may deviate. Based on the relative positions of the preset patterns in each SEM image obtained in the previous step, the positional deviation of the preset patterns between multiple SEM images can be easily and quantitatively calculated. The positional deviation data of the preset patterns between two SEM images can include the deviation direction and deviation distance, which can be represented using a deviation vector. The deviation direction and deviation distance quantitatively reflect the motion deviation of the stage at the corresponding wafer coordinates or stage coordinates. Since multiple dies are arrayed on the wafer under test, the resulting multiple sets of positional deviation data can quantitatively reflect the nonlinear motion deviation of the stage at each die.

[0040] After obtaining the positional deviation data of preset patterns between multiple SEM images, the positional deviation data can be used to perform motion compensation on the stage. During motion compensation, the wafer coordinates and positional deviation data of preset patterns between adjacent dies can be used; alternatively, a reference die can be determined among multiple dies, and the wafer coordinates and positional deviation data of preset patterns between each die and the reference die can be used for motion compensation. For example, a deviation compensation table is created based on the wafer coordinates of preset patterns between adjacent dies and the corresponding positional deviations of the preset patterns. When the stage moves again based on the wafer coordinate position information, the deviation compensation table data is used for compensation. Specifically, when the deviation compensation table records the current target position of the stage, the error data of the current target position is directly used. When the deviation compensation table does not record the current target position of the stage, the deviation compensation tables corresponding to several wafer coordinate positions adjacent to the current target position can be selected for interpolation, and the interpolation result is used to compensate for the current target position.

[0041] Of course, after creating the deviation compensation table, the deviation compensation table can be fitted into a deviation compensation function based on the interpolation algorithm, and then the operation compensation of the bearing platform can be performed based on the deviation compensation function.

[0042] The deviation compensation method of the semiconductor measurement equipment in this embodiment determines a preset pattern among multiple dies of the wafer under test and obtains the wafer coordinates of the preset pattern. Then, the stage is moved based on the wafer coordinates of the preset pattern of each die, and a SEM image is captured using a scanning electron microscope (SEM) after each movement. By analyzing the positional deviation data of the relative positions of the preset pattern between multiple SEM images, the nonlinear motion deviation of the stage at the corresponding position is obtained. By using the positional deviation data to compensate for the stage movement in real time, the motion accuracy of the stage is improved, allowing the SEM to operate within a smaller field of view, thereby improving the measurement accuracy of the SEM. Furthermore, compared to laser interferometer calibration schemes and mechanical calibration plate calibration schemes, this method does not require expensive calibration equipment, has a simple operation procedure, and does not introduce human error.

[0043] In practical applications, the motion accuracy of the stage is significantly improved after calibration using the method described in this embodiment. Specifically, before calibration, the offset of the preset pattern relative to the center of the field of view within the set field of view is typically <±0.5µm; after calibration, this offset is further reduced to <±0.1µm. This allows the scanning electron microscope (SEM) to operate within a smaller field of view, greatly improving its accuracy and expanding its application scenarios.

[0044] In some embodiments of the deviation compensation method for the semiconductor measurement device of the present invention, such as Figure 3 As shown, the wafer stage is moved sequentially based on the preset patterns of multiple dies, and after each movement, the scanning electron microscope of the metrology equipment is controlled to set the field of view and take pictures of the wafer under test, thereby obtaining multiple SEM images of the wafer under test, including: S211, identify the reference die among multiple dies; S213, a wafer coordinate moving stage based on a preset pattern of a reference die, and acquires a SEM image of the wafer under test taken by a scanning electron microscope with a set field of view, as a reference image. S215, based on the wafer coordinates of the preset pattern of other dies besides the reference die, moves the stage sequentially, and acquires a SEM image of the wafer under test by a scanning electron microscope after each movement to set the field of view.

[0045] In this embodiment, a reference die can be determined based on the position of each die. For example, the die located at the center of the wafer under test can be determined as the reference die. The center of the wafer under test is usually near the center of the stage, and the nonlinear motion error of the stage at this position is usually small.

[0046] In this embodiment, the carrier stage is moved based on the wafer coordinates of the preset pattern of the reference die, and after obtaining the reference image using a scanning electron microscope, the current carrier stage coordinates can be read. Thus, the wafer coordinate system can be aligned to the carrier stage coordinate system using the wafer coordinates of the preset pattern of the reference die and the current carrier stage coordinates as alignment references. In this way, the wafer coordinates of the preset patterns of all dies can be mapped to the carrier stage coordinate system to obtain the corresponding carrier stage coordinates.

[0047] Next, the carrier platforms can be moved sequentially based on the mapped coordinates of each carrier platform to obtain SEM images of all dies except the reference die. Compared to schemes that control the movement of the carrier platforms based on the distance between adjacent dies, this embodiment controls the movement of the carrier platforms based on the carrier platform coordinates corresponding to each die, making the operation more convenient and faster.

[0048] In some embodiments of the deviation compensation method for the semiconductor measurement device of the present invention, such as Figure 4 As shown, a wafer coordinate moving stage based on a preset pattern of a reference die includes: S231, map the wafer coordinates of the preset pattern of the reference die to the coordinate system of the support stage to obtain the initial support stage coordinates; S233, Move the platform to the initial platform coordinates; S235, adjust the position of the stage so that the preset pattern of the reference die is at the center of the set field of view of the scanning electron microscope, and use the current coordinates of the stage as the coordinates of the reference stage.

[0049] Based on the wafer coordinates of preset patterns for dies other than the reference die, the stage is moved sequentially, including: S237, Based on the reference support stage coordinates and the wafer coordinates of the preset pattern of each die, obtain the support stage coordinates of the preset pattern of each die except the reference die. S239, move the support platform sequentially to the support platform coordinates of the preset pattern of each core except the reference core.

[0050] In this embodiment, the coordinates of the stage when the preset pattern of the reference die is at the center of the SEM's set field of view are used as the reference stage coordinates. By mapping the wafer coordinates of the preset patterns of all dies to the stage coordinate system, the ideal stage coordinates when the preset patterns of all dies are at the center of the SEM's set field of view are obtained. When subsequently moving the stage based on these stage coordinates to acquire SEM images of each die, the preset patterns of each die are more likely to be within the SEM's imaging field of view, reducing the likelihood of calibration failure due to the preset patterns not appearing in the SEM image. Furthermore, because the field of view is less likely to be lost, this embodiment also allows the SEM to acquire SEM images with a smaller set field of view, thereby improving the resolution of the SEM images and ultimately improving calibration accuracy.

[0051] In some embodiments of the deviation compensation method of the semiconductor measurement device of the present invention, the field of view is set to be smaller than each die and larger than twice the linear dimension of a preset pattern.

[0052] A smaller field of view results in a higher resolution SEM image and greater accuracy in calibrating the stage's motion. However, when the field of view is too small, moving the stage based on its coordinates to acquire SEM images of each die can easily lead to the preset pattern not appearing in the imaging field of view, or only a portion of the preset pattern appearing, causing calibration failure. Setting the field of view to be greater than twice the dimensions of the preset pattern allows for the acquisition of higher-resolution SEM images without losing the field of view, thereby improving the accuracy of stage motion calibration.

[0053] In some embodiments of the deviation compensation method for the semiconductor measurement device of the present invention, such as Figure 5 As shown, the relative position of the preset graphic is determined in each SEM image, including: S311, Obtain a network model based on a deep learning algorithm. The network model is trained to perform image recognition of a preset pattern on the input SEM image and output the relative position of the preset pattern in the input SEM image. S313, input each SEM image into the network model to obtain the relative position of the preset graphic in each SEM image.

[0054] In this embodiment, the network model may include an algorithm selection model and an execution module.

[0055] The algorithm selection model extracts feature information from SEM images and template images created using preset graphics. Based on the extracted feature information, it determines the target algorithm combination with the highest matching accuracy for image template matching from multiple candidate image processing algorithm combinations. Each candidate image processing algorithm combination may include at least one image preprocessing algorithm and at least one image template matching algorithm. The candidate image preprocessing algorithms may include several major categories such as smoothing filtering algorithms, morphological operation algorithms, brightness / contrast adjustment algorithms, affine transformation algorithms, and gradient calculation algorithms. Each major category may further include several specific image preprocessing algorithms. The candidate image template matching algorithms may include point feature matching algorithms, edge feature matching algorithms, region feature matching algorithms, SIFT (Scale-invariant feature transform) algorithms, SURF (Speeded Up Robust Features) algorithms, ORB (Oriented FAST and Rotated BRIEF) algorithms, cross-correlation-based image template matching methods, and squared difference-based image template matching methods.

[0056] For example, the algorithm selection model consists of a multi-label classification neural network model and an algorithm combination indexing algorithm. The multi-label classification neural network model is trained to extract feature information from template images and SEM images made using preset graphics, and generates prediction probabilities for multiple image processing algorithm combinations based on the acquired feature information. The prediction probabilities reflect the matching accuracy of the image processing algorithm combinations when performing image template matching on the template images and SEM images. The multi-label classification neural network model uses an artificial neural network as the main body of the model; for example, a deep convolutional neural network, such as ResNet, EfficientNet, or CSPNet, can be used as the backbone for feature extraction.

[0057] The algorithm combination indexing algorithm is used to determine the one with the highest probability among multiple predicted probabilities output by a multi-label classification neural network model, and use it as the target algorithm combination.

[0058] The execution module is used to perform image template matching on the SEM image and the template image based on the determined target algorithm combination, and obtain the position coordinates of the preset graphic in the SEM image.

[0059] Please see Figure 6 , Figure 6This is a schematic diagram illustrating the use of a network model to obtain the relative positions of preset graphics in a SEM image. Specifically, a template image 402 made using preset graphics and a SEM image 401 are first input into an algorithm selection model 410. The algorithm selection model 410 can be constructed based on multi-label classification algorithms, convolutional neural network algorithms, or generative adversarial network algorithms, and includes an input layer, multiple fully connected layers, and an output layer.

[0060] The algorithm selection model 410 can acquire feature information of the input image and determine the target algorithm combination 420 from multiple candidate image processing algorithm combinations. The target algorithm combination 420 may include multiple image preprocessing algorithms 421 (5 vertical dashed boxes are shown at 421, each vertical dashed box represents a candidate image preprocessing algorithm of one category, each circle inside the vertical dashed box represents a specific algorithm of a candidate image preprocessing algorithm, and the circles at the beginning and end of the arrow line represent the specific algorithms determined in the target algorithm combination 420) and an image template matching algorithm 422 (1 vertical dashed box is shown at 422, representing a candidate image template matching algorithm, each circle inside the vertical dashed box represents a specific algorithm of a candidate image template matching algorithm, and the circle at the end of the arrow line represents the specific algorithm determined in the target algorithm combination 420).

[0061] After obtaining the target algorithm combination 420, the execution module uses the target algorithm combination 420 to perform image template matching on the template image 402 made with preset graphics and the SEM image 401, obtains the matching result 430, and outputs the matching coordinates.

[0062] A network model based on deep learning algorithms performs image recognition of preset graphics in each SEM image and outputs the relative position of the preset graphics in the SEM image. The processing does not require human intervention, eliminating repetitive manual operations and greatly improving the accuracy and efficiency of obtaining the relative position of preset graphics in SEM images.

[0063] In some embodiments of the deviation compensation method for the semiconductor measurement device of the present invention, such as Figure 7 As shown, determining the positional deviation of a preset graphic between multiple SEM images includes: S411 identifies the reference die among multiple dies; S413, determine the positional deviation of the preset pattern between the SEM image of the reference die and other SEM images.

[0064] In this embodiment, the SEM images of each die except the reference die are compared with the SEM image of the reference die, and the positional deviation of the preset pattern between the two is calculated, thereby obtaining the nonlinear motion deviation of the carrier stage at the wafer coordinates of the preset pattern of each die except the reference die.

[0065] Please see Figure 8 , Figure 8 This is a schematic diagram showing the result of overlaying the SEM image of a reference die and the SEM image of another die. The green cross represents a preset pattern in the SEM image of the reference die, and the yellow cross represents a preset pattern in the SEM image of another die; there is a significant positional discrepancy between the two.

[0066] Based on the positional deviation of the preset pattern between the SEM image of the reference die and other SEM images, the deviation compensation amount of the stage at the wafer coordinates of the preset pattern of each die other than the reference die can be easily calculated, thereby accurately calibrating the motion deviation of the stage.

[0067] In some embodiments of the deviation compensation method for the semiconductor measurement device of the present invention, such as Figure 9 As shown, motion compensation is performed on the stage based on the wafer coordinates of preset patterns of multiple dies and the positional deviation of preset patterns between multiple SEM images, including: S511, based on the reference bearing platform coordinates, the bearing platform coordinates of the preset graphics of each die other than the reference die, and the positional deviation of the preset graphics between the reference image and other SEM images, the bearing platform coordinates of the preset graphics of each die other than the reference die are compensated for. S513 controls the movement of the bearing platform based on the bearing platform coordinates after deviation compensation.

[0068] In this embodiment, a deviation compensation table can be created based on the reference stage coordinates, the stage coordinates of preset patterns for each die (excluding the reference die), and the positional deviations of preset patterns between the reference image and other SEM images. Then, the stage coordinates are compensated for the deviations according to the table. In other words, when mapping the wafer coordinate system to the stage coordinate system, the mapping is first performed linearly, and then the stage coordinates corresponding to the wafer coordinates of the preset patterns for each die are corrected based on the deviation compensation table, thereby improving the stage movement accuracy.

[0069] The flowchart provided in this embodiment is not intended to indicate that the operations of the method will be performed in any particular order, or that all operations of the method are included in every case. Furthermore, the method may include additional operations. Within the scope of the technical concept provided by the method in this embodiment, additional variations can be made to the above method.

[0070] It should be understood that in some embodiments, the components may be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods may be implemented using software or firmware stored in memory and executed by a suitable instruction execution system.

[0071] This invention also provides a computer program product 10, a computer-readable storage medium 20, and a computer device 30. Figure 10 This is a schematic diagram of a computer program product 10 according to an embodiment of the present invention. Figure 11 This is a schematic diagram of a computer-readable storage medium 20 according to an embodiment of the present invention. Figure 12 This is a schematic diagram of a computer device 30 according to an embodiment of the present invention. The computer program product 10 includes a computer program 11, which, when executed by the processor 32, implements the steps of the deviation compensation method for any of the above-described semiconductor measurement devices. A computer-readable storage medium 20 stores the computer program 11 thereon, which, when executed by the processor 32, implements the steps of the deviation compensation method for any of the above-described semiconductor measurement devices. The computer device 30 may include a memory 31, a processor 32, and the computer program 11 stored in the memory 31 and running on the processor 32.

[0072] The computer program 11 used to perform the operations of this invention may be assembly instructions, Instruction Set Architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, integrated circuit configuration data, or source code or object code written in any combination of one or more programming languages ​​and procedural programming languages. The computer program 11 may execute entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the latter case, the remote computer may be connected to the user's computer via any type of network, including a Local Area Network (LAN) or Wide Area Network (WAN), or may be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, to perform aspects of this invention, electronic circuits, including, for example, programmable logic circuits, Field-Programmable Gate Arrays (FPGAs), or Programmable Logic Arrays (PLAs), may execute computer-readable program instructions to personalize the electronic circuits by utilizing state information from computer-readable program instructions.

[0073] For the purposes of this embodiment, computer program product 10 is a related product that includes computer program 11.

[0074] For the purposes of this embodiment, the computer-readable storage medium 20 is a tangible device capable of holding and storing a computer program 11. It can be any device capable of containing, storing, communicating, propagating, or transmitting the computer program 11 for use by or in conjunction with an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable storage medium 20 include: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), portable optical disc read-only memory (CD-ROM), digital versatile disc (DVD), memory stick, floppy disk, mechanical encoding device, and any suitable combination thereof.

[0075] Computer device 30 can be, for example, a server, desktop computer, laptop computer, tablet computer, or smartphone. In some examples, computer device 30 can be a cloud computing node. Computer device 30 can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., that perform specific tasks or implement specific abstract data types. Computer device 30 can be implemented in a distributed cloud computing environment where tasks are performed by remote processing devices linked through a communication network. In a distributed cloud computing environment, program modules can reside on local or remote computing system storage media, including storage devices.

[0076] Computer device 30 may include a processor 32 adapted to execute stored instructions and a memory 31 that provides temporary storage space for the operation of said instructions during operation. The processor 32 may be a single-core processor, a multi-core processor, a computing cluster, or any other configuration. The memory 31 may include random access memory (RAM), read-only memory, flash memory, or any other suitable storage system.

[0077] Computer device 30 may also include a network adapter / interface and an input / output (I / O) interface. The I / O interface allows external devices that can be connected to the computer device to input and output data. The network adapter / interface provides communication between the computer device and a network, typically represented as a communication network.

[0078] Therefore, those skilled in the art should recognize that although numerous exemplary embodiments of the present invention have been shown and described in detail herein, many other variations or modifications conforming to the principles of the present invention can be directly determined or derived from the disclosure of the present invention without departing from the spirit and scope of the invention. Thus, the scope of the present invention should be understood and construed as covering all such other variations or modifications.

Claims

1. A method for compensating for deviations in a semiconductor measurement device, characterized in that, include: The wafer coordinates of each preset pattern of multiple dies on the wafer under test are obtained, and the wafer under test is arranged on the carrier platform of the measurement equipment. Based on the wafer coordinates of the preset pattern of the multiple dies, the carrier stage is moved sequentially, and after each movement, the scanning electron microscope of the measurement device is controlled to set the field of view to take pictures of the wafer under test, thereby obtaining multiple SEM images of the wafer under test. The relative position of the preset graphic is determined in each SEM image; Determine the positional deviation of the preset graphic among the multiple SEM images; Motion compensation is performed on the carrier stage based on the wafer coordinates of the preset pattern of the plurality of dies and the positional deviation of the preset pattern between the plurality of SEM images.

2. The deviation compensation method according to claim 1, characterized in that, Determining the positional deviation of the preset graphic among the plurality of SEM images includes: A reference die is identified from the plurality of dies; Determine the positional deviation of the preset pattern between the SEM image of the reference die and other SEM images.

3. The deviation compensation method according to claim 1, characterized in that, The wafer coordinates based on the preset pattern of the multiple dies are used to sequentially move the support stage, and after each movement, the scanning electron microscope of the measurement device is controlled to set the field of view to capture images of the wafer under test, thereby obtaining multiple SEM images of the wafer under test, including: A reference die is identified from the plurality of dies; The stage is moved based on the wafer coordinates of the preset pattern of the reference die, and the SEM image of the wafer under test is captured by the scanning electron microscope with the set field of view, which is used as the reference image. Based on the wafer coordinates of the preset pattern of the other dies besides the reference die, the stage is moved sequentially, and after each movement, the SEM image of the wafer under test is captured by the scanning electron microscope with the set field of view.

4. The deviation compensation method according to claim 3, characterized in that, Moving the carrier stage based on the wafer coordinates of the preset pattern of the reference die includes: Map the wafer coordinates of the preset pattern of the reference die to the coordinate system of the support stage to obtain the initial support stage coordinates; Move the support platform to the initial support platform coordinates; Adjust the position of the support stage so that the preset pattern of the reference die is at the center of the set field of view of the scanning electron microscope, and use the current coordinates of the support stage as the coordinates of the reference support stage; The step of sequentially moving the support stage based on the wafer coordinates of the preset pattern of the other dies besides the reference die includes: Based on the reference bearing platform coordinates and the wafer coordinates of the preset pattern of each die, the bearing platform coordinates of the preset pattern of each die other than the reference die are obtained. The support platform is moved sequentially to the support platform coordinates of the preset pattern of each of the cores except the reference core.

5. The deviation compensation method according to claim 4, characterized in that, The step of performing motion compensation on the carrier stage based on the wafer coordinates of the preset pattern of the plurality of dies and the positional deviation of the preset pattern between the plurality of SEM images includes: Based on the reference bearing platform coordinates, the bearing platform coordinates of the preset pattern of each die other than the reference die, and the positional deviation of the preset pattern between the reference image and other SEM images, the bearing platform coordinates of the preset pattern of each die other than the reference die are compensated for. The movement of the support platform is controlled based on the coordinates of the support platform after deviation compensation.

6. The deviation compensation method according to claim 4, characterized in that, The set field of view is smaller than each of the tubes and larger than twice the dimension of the preset pattern.

7. The deviation compensation method according to claim 1, characterized in that, Determining the relative position of the preset graphic in each SEM image includes: A network model based on a deep learning algorithm is obtained. The network model is trained to perform image recognition of the preset shape on the input SEM image and output the relative position of the preset shape in the input SEM image. Each of the SEM images is input into the network model to obtain the relative position of the preset graphic in each SEM image.

8. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by a processor, implements the steps of the deviation compensation method for the semiconductor measurement device as described in any one of claims 1 to 7.

9. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the deviation compensation method for the semiconductor measurement device as described in any one of claims 1 to 7.

10. A computer device, characterized in that, The device includes a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the deviation compensation method for the semiconductor measurement device according to any one of claims 1 to 7.

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