Electromigration reliability non-uniform discrete equivalent circuit modeling method and system

Abstract

The application provides an electromigration reliability non-uniform discrete equivalent circuit modeling method and system, adopts an equivalent circuit-based method to analyze electromigration stress evolution of a general complex interconnection structure, fully considers a thermal field effect in a model, realizes stress analysis equivalent circuit modeling under multi-physical field coupling, and solves the problem of waste of computing resources in processing large-span interconnection structures by using a traditional uniform discrete method, avoids unnecessary transient simulation on an immortal interconnection tree, reduces the computing load of full-chip-level analysis, and realizes efficient and high-precision transient analysis of electromigration reliability of a large-scale interconnection network under multi-physical field coupling effects.

Description

Technical Field

[0001] This invention relates to the fields of semiconductor devices and electronic design automation algorithms, specifically to a method and system for modeling non-uniform discrete equivalent circuits for electromigration reliability. More particularly, it relates to a method for modeling non-uniform discrete equivalent circuits for electromigration reliability under multi-physics coupling effects. Background Technology

[0002] With the continuous evolution of integrated circuit process nodes, the reliability of integrated circuits has become one of the core challenges restricting the development of chip technology. In particular, critical fields such as automotive, aerospace, and medical have raised the requirements for safety and reliability to unprecedented levels—these fields require integrated circuits to maintain long-term reliability under harsh operating conditions, with defect rates measured in parts per billion (DPPB), and possessing high functional safety that meets specific industry standards. In complex nanoscale VLSI technology, short-term reliability has become an unacceptable defect. The fundamental contradiction currently facing chip reliability design lies in the conflict between the continuously increasing current density driven by performance demands and the electromigration (EM) resistance of interconnect structures under physical limits. Therefore, at advanced process nodes, rapid and comprehensive EM assessment is becoming increasingly urgent and necessary. Currently, in engineering practice, electromigration reliability assessment still widely relies on Black's empirical model to estimate the mean time to failure of conductors and the Blech threshold criterion to determine whether electromigration failure will occur, in order to achieve rapid screening and approval of large-scale interconnect structures.

[0003] Compared to empirical models, physical mechanism-based modeling, represented by the Partial Differential Equation (PDE) of stress evolution proposed by Korhonen, can more directly describe the spatiotemporal evolution of stress in confined metallic structures. Compared to simple empirical formulas, the stress evolution equation presents computational challenges for numerical solutions. To address and accelerate the solution of the stress evolution equation, academia and industry have developed several representative methods: numerical methods using the finite element method and finite difference method; analytical and semi-analytical methods that mathematically process the stress evolution equation to derive closed or approximate solutions; and data-driven methods that utilize machine learning techniques to learn the mapping relationships of physical fields from data or directly approximate the solutions of the PDE.

[0004] In existing research, analytical methods, while computationally efficient, struggle to handle complex interconnect topologies and boundary conditions. Deep learning-based methods, while promising, rely heavily on large amounts of high-quality training data and lack physical interpretability. In contrast, numerical methods (such as the finite difference method and the finite element method) offer higher versatility and accuracy, but at a higher computational cost. Furthermore, current modeling efforts primarily focus on basic electromigration stress evolution modeling, failing to adequately consider the impact of complex multi-physics coupling effects (such as thermo-mechanical-electrical coupling) on ​​electromigration behavior. There is also a lack of comprehensive analysis and acceleration methods for electromigration effects in complex, full-chip-level power supply networks. Therefore, modeling electromigration effects under mechanical-thermal-electrical multi-field coupling based on equivalent circuits remains a research direction urgently requiring in-depth exploration.

[0005] Patent application CN119990031A discloses a method and apparatus for constructing a circuit model of the electro-thermal migration effect of interconnects. Based on the Korhonen governing equations and boundary conditions, it transforms the electro-thermal migration effect into changes in circuit parameters, captures the significant influence of temperature and temperature gradients on atomic migration, derives an equivalent circuit model of interconnects under the electro-thermal migration effect, uses an improved node analysis method to determine the circuit matrix equation corresponding to the equivalent circuit model, and performs dimensionality reduction on the circuit matrix equation to obtain the electro-thermal migration effect circuit model of interconnects. This effectively compresses the system dimension, thereby effectively reducing computational complexity and significantly improving solution efficiency. It enables rapid analysis of stress evolution in complex multi-branch interconnects, while dynamically simulating the evolution of void length, balancing accuracy and efficiency requirements. However, this patent cannot completely solve the existing technical problems, nor can it meet the needs of this invention. Summary of the Invention

[0006] To address the shortcomings of existing technologies, the purpose of this invention is to provide a method and system for modeling non-uniform discrete equivalent circuits with electromigration reliability.

[0007] The electromigration reliability non-uniform discrete equivalent circuit modeling method provided by the present invention includes:

[0008] Step S1: Construct a quasi-one-dimensional model of the metal conductors in the power supply network interconnection structure. The quasi-one-dimensional model includes an interconnection tree composed of metal segments, where each metal segment is a uniform, straight metal wire carrying the same current. The metal segment on the interconnection tree is denoted as 's', and the characteristic scale of the metal segment satisfies... ,in , and Let b be the length, width, and height of the metal wire, respectively. Nodes are constructed at the ends of the metal segments and where multiple metal segments intersect, denoted as 'b'. All metal segments in the interconnect tree are denoted as a set. All nodes are denoted as a set. p and q are the number of metal segments and nodes, respectively;

[0009] Step S2: Based on the quasi-one-dimensional model, the interconnect tree is discretized in a non-uniform space to generate a discrete point set, which includes inter-segment discrete points corresponding to the node and intra-segment discrete points inserted inside the metal segment.

[0010] Step S3: Based on the partial differential equation of electromigration stress evolution and its equivalent circuit model, construct a non-uniform discrete equivalent circuit corresponding to the discrete point set. The equivalent circuit includes a capacitor element for simulating stress storage, a resistor element for simulating stress diffusion, and a controlled source element for simulating electromigration and thermal migration driving forces.

[0011] Step S4: Using an improved nodal analysis method, a differential-algebraic system for describing stress evolution is established based on the equivalent circuit. The form of the differential-algebraic system is as follows: ,in, This represents the derivative of stress with respect to time. It is a vector composed of the stresses at all points in the discrete point set, C is the capacitance matrix, G is the conductance matrix, and B is the input mapping matrix. It is the input vector;

[0012] Step S5: Solve the differential algebraic system to obtain the stress values ​​at each discrete point for electromigration reliability assessment.

[0013] Preferably, in step S3, the one-dimensional form of the stress evolution partial differential equation is:

[0014]

[0015] Atomic flux in the equivalent circuit The one-dimensional form is:

[0016]

[0017] in, This represents the electromigration stress in the conductor; Indicates time; Represents spatial coordinates; Represents current density; electromigration drive coefficient Stress diffusivity , It is Boltzmann's constant. It is the elementary charge. Pre-exponential factors, It is the bulk modulus. It is the volume of atoms. It is resistivity. It is activation energy. It is the effective charge number. Represents the temperature field. This represents the atomic diffusion coefficient.

[0018] Preferably, in step S4, the conductivity matrix G is obtained through the conductivity matrix and conductance matrix Build, For a single conductor segment If The corresponding discrete point numbers are arranged in ascending order. Indicates wire The stress at the r-th discrete point in the matrix is ​​then the conductivity matrix. for:

[0019]

[0020] in, It is a wire sub-segments on The corresponding equivalent resistance, It is a wire The above is composed of nodes and The defined sub-segment;

[0021] The conductivity matrix for:

[0022]

[0023] in, Discrete points The equivalent transconductance of the voltage-controlled current source at that location.

[0024] Preferably, in step S4, for interconnection trees with complex branches, the stress vector is rearranged as follows: ,in It is the stress at discrete points between segments. These are the stresses at discrete points within a segment, arranged in ascending order of segment number; the conductance matrix G is rearranged as follows:

[0025]

[0026] in, It is the conductance submatrix of discrete points between segments, and is a diagonal matrix; It is a submatrix of conductance at discrete points within a segment, with a block diagonal matrix structure, each sub-block... They are all tri-diagonal arrays, corresponding to the wires. Conductance matrix of discrete points within the interior; It is the coupling matrix between discrete points between segments and discrete points within segments.

[0027] Preferably, in step S4, the length of the input vector is The number of ports, referred to as the port number, is a vector composed of the physical currents on all conductor segments in the interconnection tree segment set S; the input mapping matrix B is a... A sparse matrix used to represent segment currents Mapped to node excitation sources in the equivalent circuit;

[0028] The input mapping matrix B is decomposed into the EM driving input matrix. and EM / TM coupled input matrix , The EM driving input matrix The form is:

[0029]

[0030] in, It is an incidence matrix, with each column having two non-zero elements, located at the intersection of the linear axis and the horizontal axis. At the row position of discrete points between two connected segments, if the discrete points It is a wire The starting point, then If discrete points It is a wire The endpoint, then ,in , It is a matrix middle , The element at that location, It is the electromigration driving coefficient. It is a scaling factor. It is the input vector.

[0031] The electromigration reliability non-uniform discrete equivalent circuit modeling system provided by the present invention includes:

[0032] Module M1: Constructs a quasi-one-dimensional model of the metal conductors in the power supply network interconnection structure. This quasi-one-dimensional model includes an interconnection tree composed of metal segments, where each metal segment is a uniform, straight metal wire carrying the same current. The metal segments on the interconnection tree are denoted as 's', and their characteristic dimensions satisfy... ,in , and Let b be the length, width, and height of the metal wire, respectively. Nodes are constructed at the ends of the metal segments and where multiple metal segments intersect, denoted as 'b'. All metal segments in the interconnect tree are denoted as a set. All nodes are denoted as a set. p and q are the number of metal segments and nodes, respectively;

[0033] Module M2: Based on the quasi-one-dimensional model, the interconnect tree is discretized in a non-uniform space to generate a discrete point set, which includes inter-segment discrete points corresponding to the node and intra-segment discrete points inserted inside the metal segment;

[0034] Module M3: Based on the partial differential equation of electromigration stress evolution and its equivalent circuit model, construct a non-uniform discrete equivalent circuit corresponding to the discrete point set. The equivalent circuit includes a capacitor element for simulating stress storage, a resistor element for simulating stress diffusion, and a controlled source element for simulating electromigration and thermal migration driving forces.

[0035] Module M4: Using an improved nodal analysis method, a differential-algebraic system describing stress evolution is established based on the equivalent circuit. The form of the differential-algebraic system is as follows: ,in, This represents the derivative of stress with respect to time. It is a vector composed of the stresses at all points in the discrete point set, C is the capacitance matrix, G is the conductance matrix, and B is the input mapping matrix. It is the input vector;

[0036] Module M5: Solve the differential algebraic system to obtain the stress values ​​at each discrete point for electromigration reliability assessment.

[0037] Preferably, in module M3, the one-dimensional form of the stress evolution partial differential equation is:

[0038]

[0039] Atomic flux in the equivalent circuit The one-dimensional form is:

[0040]

[0041] in, This represents the electromigration stress in the conductor; Indicates time; Represents spatial coordinates; Represents current density; electromigration drive coefficient Stress diffusivity , It is Boltzmann's constant. It is the elementary charge. Pre-exponential factors, It is the bulk modulus. It is the volume of atoms. It is resistivity. It is activation energy. It is the effective charge number. Represents the temperature field. This represents the atomic diffusion coefficient.

[0042] Preferably, in module M4, the conductivity matrix G is connected through the conductivity matrix... and conductance matrix Build, For a single conductor segment If The corresponding discrete point numbers are arranged in ascending order. Indicates wire The stress at the r-th discrete point in the matrix is ​​then the conductivity matrix. for:

[0043]

[0044] in, It is a wire sub-segments on The corresponding equivalent resistance, It is a wire The above is composed of nodes and The defined sub-segment;

[0045] The conductivity matrix for:

[0046]

[0047] in, Discrete points The equivalent transconductance of the voltage-controlled current source at that location.

[0048] Preferably, in module M4, for interconnection trees with complex branches, the stress vector is rearranged as follows: ,in It is the stress at discrete points between segments. These are the stresses at discrete points within a segment, arranged in ascending order of segment number; the conductance matrix G is rearranged as follows:

[0049]

[0050] in, It is the conductance submatrix of discrete points between segments, and is a diagonal matrix; It is a submatrix of conductance at discrete points within a segment, with a block diagonal matrix structure, each sub-block... They are all tri-diagonal arrays, corresponding to the wires. Conductance matrix of discrete points within the interior; It is the coupling matrix between discrete points between segments and discrete points within segments.

[0051] Preferably, in module M4, the length of the input vector is The number of ports, referred to as the port number, is a vector composed of the physical currents on all conductor segments in the interconnection tree segment set S; the input mapping matrix B is a... A sparse matrix used to represent segment currents Mapped to nodal excitation sources in the equivalent circuit;

[0052] The input mapping matrix B is decomposed into the EM driving input matrix. and EM / TM coupled input matrix , The EM driving input matrix The form is:

[0053]

[0054] in, It is an incidence matrix, with each column having two non-zero elements, located at the intersection of the linear axis and the horizontal axis. At the row position of discrete points between two connected segments, if the discrete points It is a wire The starting point, then If discrete points It is a wire The endpoint, then ,in , It is a matrix middle , The element at that location, It is the electromigration driving coefficient. It is a scaling factor. It is the input vector.

[0055] Compared with the prior art, the present invention has the following beneficial effects:

[0056] (1) In view of the technical problem that existing electromigration reliability analysis methods are difficult to balance accuracy and efficiency when dealing with complex interconnect structures, this invention adopts the equivalent circuit-based method to perform electromigration stress evolution analysis on general complex interconnect structures. By using the adaptive mesh method of non-uniform spatial discretization, the problem of wasted computing resources in traditional uniform discretization methods when dealing with large-span interconnect structures is overcome. While ensuring the accuracy of stress prediction, the discrete degrees of freedom are effectively reduced, and efficient and high-precision transient analysis of large-scale interconnect networks under multi-physics coupling effects is achieved.

[0057] (2) In view of the technical defects of existing electromigration modeling work that do not fully consider the influence of the thermo-mechanical-electric multi-physics coupling effect, this invention introduces the influence of temperature gradient on electromigration driving coefficient and stress diffusion rate in the equivalent circuit model. By constructing an input mapping matrix that includes EM driving component and EM / TM coupling component, and considering the conductance matrix under non-isothermal conditions, the invention achieves accurate characterization of stress evolution process under thermo-mechanical field effect and improves the accuracy of electromigration stress prediction under multi-physics coupling conditions.

[0058] (3) To address the technical challenge of excessive computational load in the analysis of electromigration effects in complex power supply networks at the chip level, this invention proposes a steady-state / quasi-steady-state screening mechanism. By solving the differential algebraic system corresponding to the equivalent circuit, the immortality of each node in the interconnect tree can be quickly determined. Nodes determined to be immortal do not need to undergo subsequent transient simulation, which effectively reduces the overall scale of subsequent simulations and avoids unnecessary long-term transient simulations for the entire interconnect tree, thereby significantly improving the simulation speed of electromigration reliability analysis at the chip level.

[0059] (4) The steady-state / quasi-steady-state screening method of the present invention is fully compatible with electromigration reliability analysis under the thermo-mechanical-electric multi-physics coupling effect. It can accurately identify immortal nodes when considering the temperature field distribution, and ensure the reliability of the screening results under multi-physics coupling conditions. It provides an efficient means to accelerate the electromigration approval of integrated circuits under complex working conditions.

[0060] (5) The applicability of the present invention is not limited by the size and topology of the interconnection network. It can handle interconnection trees with complex branch structures and has good versatility for interconnection structures of different sizes and levels. It plays an important auxiliary and acceleration role in the electromigration reliability verification in the integrated circuit approval stage and can effectively support the reliability design process of large-scale chips under advanced process nodes. Attached Figure Description

[0061] Other features, objects, and advantages of the present invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0062] Figure 1 This is a schematic diagram of a two-dimensional power supply network interconnection tree.

[0063] Figure 2 This is a schematic diagram of the interconnection tree topology of a two-dimensional power supply network.

[0064] Figure 3 The relative error of the simulation method for the equivalent circuit of electromigration stress at Cu5 layer interconnect tree nodes. Detailed Implementation

[0065] The present invention will now be described in detail with reference to specific embodiments. These embodiments will help those skilled in the art to further understand the present invention, but do not limit the invention in any way. It should be noted that those skilled in the art can make several changes and improvements without departing from the concept of the present invention. These all fall within the protection scope of the present invention.

[0066] Example 1

[0067] The interconnect electromigration equivalent circuit modeling method proposed in this invention analyzes constrained conductors where the metal conductor is embedded in an insulating medium, and its sidewalls and bottom are tightly covered by a barrier layer, forming a restricted conductive path. During the void growth stage of the metal conductor, the stress evolution at all points inside the conductor is described by a one-dimensional stress evolution equation:

[0068]

[0069] in, This represents the electromigration stress in the conductor; Indicates time; Represents spatial coordinates; Indicates current density;

[0070] Electromigration driving coefficient Stress diffusivity Similarly, atomic flux in one-dimensional form It can be written as:

[0071]

[0072] in, It is Boltzmann's constant. It is the elementary charge. Pre-exponential factors, It is the bulk modulus. It is the volume of atoms. It is resistivity. It is activation energy. It is the effective charge number. Represents the temperature field. This represents the atomic diffusion coefficient.

[0073] Interconnect tree is a complete unit for electromigration reliability analysis. A complete and independent interconnect tree is like... Figure 2 As shown. A straight, uniform metal line carrying the same current is called a metal segment, or simply a segment, denoted by s. All segments in an interconnect tree are denoted by s. If in the power network interconnect, Its characteristic scale satisfies Therefore, a single segment of a metal conductor can be considered a one-dimensional line. The end of a single straight metal conductor and the point where multiple straight metal conductors intersect are collectively called a node, denoted as . All nodes in an interconnected tree are denoted as A node can be considered a zero-dimensional point, where several one-dimensional lines intersect or terminate. Therefore, the power supply network is modeled as a quasi-one-dimensional model. Figure 2 Showcased by Figure 1 The quasi-one-dimensional model formed by abstraction. Among them, Indicates the length of the metal wire; Indicates the width of the metal wire; Indicates the height of the metal conductor; This represents the p-th segment in the interconnected tree s; This represents the q-th node in the interconnected tree.

[0074] For the EM equivalent circuit proposed in this invention, in the void nucleation stage and without pre-voids, the following differential algebraic system can be established using the modified nodal analysis (MNA) method:

[0075]

[0076] in, , which represents the derivative of stress with respect to time.

[0077] The equivalent circuit system described above can quickly screen steady-state / quasi-steady-state nodes, thereby reducing the overall scale of subsequent simulations. This equivalent system has the following characteristics:

[0078] Stress vector : is a discrete point set If the vector is composed of the stresses at all points, then the length of the vector is Unlike the universal circuit node analysis method, The auxiliary current variable is not included. This is because the voltage sources in the EM equivalent circuit are all short-circuited 0V voltage sources, reflecting the equivalence between discrete points and nodes within a segment. Therefore, it is not necessary to introduce an auxiliary current variable, where Representing discrete points The stress value at that point, Represents a node The stress value at that location.

[0079] Capacitor Matrix In the EM equivalent circuit, there are no coupling capacitors between nodes, so it is easy to know from the MNA that... It is a diagonal array. , For the first The capacitance to ground corresponding to the discrete points in the row.

[0080] Conductivity matrix We denote the matrix obtained by filling all equivalent resistances based on the MNA method as follows: The matrix obtained by filling all equivalent voltage-controlled current sources is: Then there is For a single conductor segment If The corresponding discrete point numbers are arranged in ascending order. Indicates wire If the stress is at the r-th discrete point, then a typical conductance matrix is ​​as follows:

[0081] Under non-isothermal conditions, according to the rules for resistor filling:

[0082]

[0083] in, It is a wire sub-segments on The corresponding equivalent resistance, It is a wire The above is composed of nodes and The defined sub-segment; It is a symmetric positive semi-definite matrix, and for a connected interconnected tree... Irreducible matrix.

[0084] Under non-isothermal conditions, according to the MNA filling rules of the voltage-controlled current source:

[0085]

[0086] in, Discrete points The equivalent transconductance of the voltage-controlled current source at that location.

[0087] In engineering, for interconnects with complex branches (degree greater than 2) It is no longer in a tridiagonal form. At this point, we rearrange the stress vector as follows: ,in It refers to the stress at discrete points (nodes) between segments. These are the stresses at discrete points within a segment, and the stresses at these discrete points are arranged in ascending order of segment number. In this case, It can be rearranged as:

[0088]

[0089] in It is the conductance submatrix of discrete points between segments. Since the discrete points between segments are not directly connected, therefore It is a diagonal array; It is a submatrix of conductance at discrete points within a segment, with a block diagonal matrix structure, each sub-block They are all tri-diagonal matrices, each corresponding to a segment. Conductance matrix of discrete points within the interior; It is the coupling matrix between discrete points between segments and discrete points within segments, describing the connection relationship between a node and its connected sub-segments.

[0090] Input vector : Defined as a vector consisting of the physical currents on all conductor segments in the interconnected tree segment set S, with a length of . This is called the number of ports. It should be noted that here... It does not directly correspond to the injected current of a single node in the equivalent circuit, but rather serves as a control variable of the system, determining the strength of various controlled sources (VCCS, CCCS) in the equivalent circuit.

[0091] Input mapping matrix It is a A sparse matrix, where each column corresponds to a segment real current Each row corresponds to a discrete point It describes the actual segment current. This is a mapping to nodal excitation sources in the equivalent circuit state space. Based on the physical mechanisms of electromigration and thermal migration, It can be decomposed into EM driving components and EM / TM coupling components, that is :

[0092] EM-driven input matrix This describes the cumulative effect of atomic flux caused by electron wind at the boundaries of the wire segments. This excitation only acts on discrete points (nodes) between segments, and its form is as follows:

[0093]

[0094] in, It is an incidence matrix, with each column containing only two non-zero elements, located at the intersection of the two columns. At the row positions of discrete points between two connected segments, specifically, if discrete points It is a section The starting point, then If discrete points It is a section The endpoint, then Specifically, if defined ,but This corresponds precisely to the algebraic sum of the segment currents at each node in the equivalent circuit, i.e., the net injected current, where... It is a matrix middle The element at that location, It is the electromigration driving coefficient. It is a dimensionless quantity scaling factor, It is the input vector.

[0095] EM / TM Coupled Input Matrix Based on the coupling circuit of electromigration and thermal migration, this excitation is distributed, acting on all discrete points within a segment. For discrete points between segments, Filling rules and The same applies; for discrete points within a segment, only one non-zero element appears in each row.

[0096] Figure 3 The prediction results of the equivalent circuit of electromigration stress at Cu5 layer interconnect tree nodes under the influence of thermo-electric coupling are compared with COMSOL simulation data. It can be seen that the non-uniform discrete equivalent circuit method has high accuracy.

[0097] Taking a t-shaped tree as an example, Table 1 lists the errors (AE: absolute error; RE: relative error) of the immortal node screening method under the thermo-mechanical-electric coupling effect of the present invention. It can be seen that the method proposed in this invention has high accuracy in node immortality screening.

[0098] Table 1. Quasi-steady-state estimation errors of t-shaped interconnected tree nodes at different times under non-isothermal conditions.

[0099]

[0100] Example 2

[0101] The present invention also provides a modeling system for non-uniform discrete equivalent circuits for electromigration reliability, comprising:

[0102] Module M1: Constructs a quasi-one-dimensional model of the metal conductors in the power supply network interconnection structure. This quasi-one-dimensional model includes an interconnection tree composed of metal segments, where each metal segment is a uniform, straight metal wire carrying the same current. The metal segments on the interconnection tree are denoted as 's', and their characteristic dimensions satisfy... ,in , and Let b be the length, width, and height of the metal wire, respectively. Nodes are constructed at the ends of the metal segments and where multiple metal segments intersect, denoted as 'b'. All metal segments in the interconnect tree are denoted as a set. All nodes are denoted as a set. p and q are the number of metal segments and nodes, respectively;

[0103] Module M2: Based on the quasi-one-dimensional model, the interconnect tree is discretized in a non-uniform space to generate a discrete point set, which includes inter-segment discrete points corresponding to the node and intra-segment discrete points inserted inside the metal segment;

[0104] Module M3: Based on the partial differential equation of electromigration stress evolution and its equivalent circuit model, construct a non-uniform discrete equivalent circuit corresponding to the discrete point set. The equivalent circuit includes a capacitor element for simulating stress storage, a resistor element for simulating stress diffusion, and a controlled source element for simulating electromigration and thermal migration driving forces.

[0105] Module M4: Using an improved nodal analysis method, a differential-algebraic system describing stress evolution is established based on the equivalent circuit. The form of the differential-algebraic system is as follows: ,in, This represents the derivative of stress with respect to time. It is a vector composed of the stresses at all points in the discrete point set, C is the capacitance matrix, G is the conductance matrix, and B is the input mapping matrix. It is the input vector;

[0106] Module M5: Solve the differential algebraic system to obtain the stress values ​​at each discrete point for electromigration reliability assessment.

[0107] In module M3, the one-dimensional form of the stress evolution partial differential equation is:

[0108]

[0109] Atomic flux in the equivalent circuit The one-dimensional form is:

[0110]

[0111] in, This represents the electromigration stress in the conductor; Indicates time; Represents spatial coordinates; Represents current density; electromigration drive coefficient Stress diffusivity , It is Boltzmann's constant. It is the elementary charge. Pre-exponential factors, It is the bulk modulus. It is the volume of atoms. It is resistivity. It is activation energy. It is the effective charge number. Represents the temperature field. This represents the atomic diffusion coefficient.

[0112] In module M4, the conductivity matrix G is obtained through the conductivity matrix. and conductance matrix Build, For a single conductor segment If The corresponding discrete point numbers are arranged in ascending order. Indicates wire The stress at the r-th discrete point in the matrix is ​​then the conductivity matrix. for:

[0113]

[0114] in, It is a wire sub-segments on The corresponding equivalent resistance, It is a wire The above is composed of nodes and The defined sub-segment;

[0115] The conductivity matrix for:

[0116]

[0117] in, Discrete points The equivalent transconductance of the voltage-controlled current source at that location.

[0118] In module M4, for interconnected trees with complex branches, the stress vector is rearranged as follows: ,in It is the stress at discrete points between segments. These are the stresses at discrete points within a segment, arranged in ascending order of segment number; the conductance matrix G is rearranged as follows:

[0119]

[0120] in, It is the conductance submatrix of discrete points between segments, and is a diagonal matrix; It is a submatrix of conductivity at discrete points within a segment, with a block diagonal matrix structure, each sub-block They are all tri-diagonal arrays, corresponding to the wires. Conductance matrix of discrete points within the interior; It is the coupling matrix between discrete points between segments and discrete points within segments.

[0121] In module M4, the length of the input vector is The number of ports, referred to as the port number, is a vector composed of the physical currents on all conductor segments in the interconnection tree segment set S; the input mapping matrix B is a... A sparse matrix used to represent segment currents Mapped to node excitation sources in the equivalent circuit;

[0122] The input mapping matrix B is decomposed into the EM driving input matrix. and EM / TM coupled input matrix , The EM driving input matrix The form is:

[0123]

[0124] in, It is an incidence matrix, with each column having two non-zero elements, located at the intersection of the linear axis and the horizontal axis. At the row position of discrete points between two connected segments, if the discrete points It is a wire The starting point, then If discrete points It is a wire The endpoint, then ,in , It is a matrix middle , The element at that location, It is the electromigration driving coefficient. It is a scaling factor. It is the input vector.

[0125] Those skilled in the art will understand that, in addition to implementing the system, apparatus, and their modules provided by this invention in purely computer-readable program code, the same program can be implemented in the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers by logically programming the method steps. Therefore, the system, apparatus, and their modules provided by this invention can be considered a hardware component, and the modules included therein for implementing various programs can also be considered structures within the hardware component; alternatively, modules for implementing various functions can be considered both software programs implementing the method and structures within the hardware component.

[0126] Specific embodiments of the present invention have been described above. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art can make various changes or modifications within the scope of the claims, which do not affect the essence of the present invention. Unless otherwise specified, the embodiments and features described in this application can be arbitrarily combined with each other.

Claims

1. A method for modeling non-uniform discrete equivalent circuits for electromigration reliability, characterized in that, include: Step S1: Construct a quasi-one-dimensional model of the metal conductors in the power supply network interconnection structure. The quasi-one-dimensional model includes an interconnection tree composed of metal segments, where each metal segment is a uniform, straight metal wire carrying the same current. The metal segment on the interconnection tree is denoted as 's', and the characteristic scale of the metal segment satisfies... ,in , and Let b be the length, width, and height of the metal wire, respectively. Nodes are constructed at the ends of the metal segments and where multiple metal segments intersect, denoted as 'b'. All metal segments in the interconnect tree are denoted as a set. All nodes are denoted as a set. p and q are the number of metal segments and nodes, respectively; Step S2: Based on the quasi-one-dimensional model, the interconnect tree is discretized in a non-uniform space to generate a discrete point set, which includes inter-segment discrete points corresponding to the node and intra-segment discrete points inserted inside the metal segment. Step S3: Based on the partial differential equation of electromigration stress evolution and its equivalent circuit model, construct a non-uniform discrete equivalent circuit corresponding to the discrete point set. The equivalent circuit includes a capacitor element for simulating stress storage, a resistor element for simulating stress diffusion, and a controlled source element for simulating electromigration and thermal migration driving forces. Step S4: Using an improved nodal analysis method, a differential-algebraic system for describing stress evolution is established based on the equivalent circuit. The form of the differential-algebraic system is as follows: ,in, This represents the derivative of stress with respect to time. It is a vector composed of the stresses at all points in the discrete point set, C is the capacitance matrix, G is the conductance matrix, and B is the input mapping matrix. It is the input vector; Step S5: Solve the differential algebraic system to obtain the stress values ​​at each discrete point for electromigration reliability assessment.

2. The electromigration reliability non-uniform discrete equivalent circuit modeling method according to claim 1, characterized in that, In step S3, the one-dimensional form of the stress evolution partial differential equation is: Atomic flux in the equivalent circuit The one-dimensional form is: in, This represents the electromigration stress in the conductor; Indicates time; Represents spatial coordinates; Represents current density; electromigration drive coefficient Stress diffusivity , It is Boltzmann's constant. It is the elementary charge. Pre-exponential factors, It is the bulk modulus. It is atomic volume. It is resistivity. It is activation energy. It is the effective charge number. Represents the temperature field. This represents the atomic diffusion coefficient.

3. The electromigration reliability non-uniform discrete equivalent circuit modeling method according to claim 2, characterized in that, In step S4, the conductivity matrix G is passed through the conductivity matrix and conductance matrix Build, For a single conductor segment If The corresponding discrete point numbers are arranged in ascending order. Indicates wire The stress at the r-th discrete point in the matrix is ​​then the conductivity matrix. for: in, It is a wire sub-segments on The corresponding equivalent resistance, It is a wire The above is composed of nodes and The defined sub-segment; The conductivity matrix for: in, Discrete points The equivalent transconductance of the voltage-controlled current source at that location.

4. The electromigration reliability non-uniform discrete equivalent circuit modeling method according to claim 3, characterized in that, In step S4, for an interconnected tree with complex branches, the rearranged stress vector is: ,in It is the stress at discrete points between segments. These are the stresses at discrete points within a segment, arranged in ascending order of segment number; the conductance matrix G is rearranged as follows: in, It is the conductance submatrix of discrete points between segments, and is a diagonal matrix; It is a submatrix of conductivity at discrete points within a segment, with a block diagonal matrix structure, each sub-block They are all tri-diagonal arrays, corresponding to the wires. Conductance matrix of discrete points within the interior; It is the coupling matrix between discrete points between segments and discrete points within segments.

5. The electromigration reliability non-uniform discrete equivalent circuit modeling method according to claim 4, characterized in that, In step S4, the length of the input vector is , called the port number, is a vector consisting of the physical currents on all wire segments in the interconnection tree segment set S; The input mapping matrix B is a A sparse matrix used to represent segment currents Mapped to nodal excitation sources in the equivalent circuit; The input mapping matrix B is decomposed into the EM driving input matrix. and EM / TM coupled input matrix , The EM driving input matrix The form is: in, It is an incidence matrix, with each column having two non-zero elements, located at the intersection of the linear axis and the horizontal axis. At the row position of discrete points between two connected segments, if the discrete points It is a wire The starting point, then If discrete points It is a wire The endpoint, then ,in , It is a matrix middle , The element at that location, It is the electromigration driving coefficient. It is a scaling factor. It is the input vector.

6. A modeling system for non-uniform discrete equivalent circuits with electromigration reliability, characterized in that, include: Module M1: Constructs a quasi-one-dimensional model of the metal conductors in the power supply network interconnection structure. This quasi-one-dimensional model includes an interconnection tree composed of metal segments, where each metal segment is a uniform, straight metal wire carrying the same current. The metal segments on the interconnection tree are denoted as 's', and their characteristic dimensions satisfy... ,in , and Let b be the length, width, and height of the metal wire, respectively. Nodes are constructed at the ends of the metal segments and where multiple metal segments intersect, denoted as 'b'. All metal segments in the interconnect tree are denoted as a set. All nodes are denoted as a set. p and q are the number of metal segments and nodes, respectively; Module M2: Based on the quasi-one-dimensional model, the interconnect tree is discretized in a non-uniform space to generate a discrete point set, which includes inter-segment discrete points corresponding to the node and intra-segment discrete points inserted inside the metal segment; Module M3: Based on the partial differential equation of electromigration stress evolution and its equivalent circuit model, construct a non-uniform discrete equivalent circuit corresponding to the discrete point set. The equivalent circuit includes a capacitor element for simulating stress storage, a resistor element for simulating stress diffusion, and a controlled source element for simulating electromigration and thermal migration driving forces. Module M4: Using an improved nodal analysis method, a differential-algebraic system describing stress evolution is established based on the equivalent circuit. The form of the differential-algebraic system is as follows: ,in, This represents the derivative of stress with respect to time. It is a vector composed of the stresses at all points in the discrete point set, C is the capacitance matrix, G is the conductance matrix, and B is the input mapping matrix. It is the input vector; Module M5: Solve the differential algebraic system to obtain the stress values ​​at each discrete point for electromigration reliability assessment.

7. The electromigration reliability non-uniform discrete equivalent circuit modeling system according to claim 6, characterized in that, In module M3, the one-dimensional form of the stress evolution partial differential equation is: Atomic flux in the equivalent circuit The one-dimensional form is: in, This represents the electromigration stress in the conductor; Indicates time; Represents spatial coordinates; Represents current density; electromigration drive coefficient Stress diffusivity , It is Boltzmann's constant. It is the elementary charge. Pre-exponential factors, It is the bulk modulus. It is atomic volume. It is resistivity. It is activation energy. It is the effective charge number. Represents the temperature field. This represents the atomic diffusion coefficient.

8. The electromigration reliability non-uniform discrete equivalent circuit modeling system according to claim 7, characterized in that, In module M4, the conductivity matrix G is obtained through the conductivity matrix. and conductance matrix Build, For a single conductor segment If The corresponding discrete point numbers are arranged in ascending order. Indicates wire The stress at the r-th discrete point in the matrix is ​​then the conductivity matrix. for: in, It is a wire sub-segments on The corresponding equivalent resistance, It is a wire The above is composed of nodes and The defined sub-segment; The conductivity matrix for: in, Discrete points The equivalent transconductance of the voltage-controlled current source at that location.

9. The electromigration reliability non-uniform discrete equivalent circuit modeling system according to claim 8, characterized in that, In module M4, for interconnected trees with complex branches, the rearranged stress vector is: ,in It is the stress at discrete points between segments. These are the stresses at discrete points within a segment, arranged in ascending order of segment number; the conductance matrix G is rearranged as follows: in, It is the conductance submatrix of discrete points between segments, and is a diagonal matrix; It is a submatrix of conductivity at discrete points within a segment, with a block diagonal matrix structure, each sub-block They are all tri-diagonal arrays, corresponding to the wires. Conductance matrix of discrete points within the interior; It is the coupling matrix between discrete points between segments and discrete points within segments.

10. The electromigration reliability non-uniform discrete equivalent circuit modeling system according to claim 9, characterized in that, In module M4, the length of the input vector is , called the port number, is a vector consisting of the physical currents on all wire segments in the interconnection tree segment set S; The input mapping matrix B is a A sparse matrix used to represent segment currents Mapped to nodal excitation sources in the equivalent circuit; The input mapping matrix B is decomposed into the EM driving input matrix. and EM / TM coupled input matrix , The EM driving input matrix The form is: in, It is an incidence matrix, with each column having two non-zero elements, located at the intersection of the linear axis and the horizontal axis. At the row position of discrete points between two connected segments, if the discrete points It is a wire The starting point, then If discrete points It is a wire The endpoint, then ,in , It is a matrix middle , The element at that location, It is the electromigration driving coefficient. It is a scaling factor. It is the input vector.

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