RF front-end ASDIV switching systems and electronic devices

Abstract

This invention relates to the field of wireless communication technology and discloses a radio frequency front-end ASDIV switching system and electronic device, including a physical antenna group comprising a first antenna and a second antenna; a power amplifier front-end module including a first port and a second port, the first port being directly connected to the first antenna and the second port being directly connected to the second antenna; a transceiver having a main receiver and a diversity receiver; and a switching circuit internally within the power amplifier front-end module. The switching circuit is configured to form four signal paths between the first port, the second port, and the main receiver and diversity receiver, including: a first path from the first port to the main receiver, a second path from the first port to the diversity receiver, a third path from the second port to the main receiver, and a fourth path from the second port to the diversity receiver. By dynamically reconstructing the signal paths through the internal switching circuit to replace an external switch, hardware simplification, performance improvement, and cost reduction are achieved.

Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and in particular to an ASDIV switching system and electronic device for a radio frequency front end. Background Technology

[0002] Antenna-Switching Diversity (ASDIV) is a technique used to improve the performance of wireless communications. Its core principle lies in dynamically switching between multiple antennas, always selecting the antenna with the best signal quality for communication. This effectively suppresses signal attenuation, multipath interference, and other problems, ultimately improving the stability of wireless connections and data transmission rates.

[0003] In existing implementations, performing ASDIV switching relies on an additional full-duplex switch (SW1), increasing system complexity and material costs. This additional switch and its control circuitry not only occupy valuable board space, which is particularly disadvantageous for highly integrated and space-constrained automotive modules, but also directly increases hardware costs. Furthermore, the RF performance of the switch itself introduces signal loss, easily leading to impedance matching issues, thus degrading overall receiver sensitivity. This partially offsets the performance gains provided by ASDIV technology itself, increasing control complexity and reliability risks. Summary of the Invention

[0004] The purpose of this invention is to provide a radio frequency front-end ASDIV switching system and electronic device to solve the technical problems in related technologies where, in order to realize antenna switching diversity (ASDIV) function, it is necessary to rely on an external switch to switch the connection between the antenna and the radio frequency front-end, which leads to increased system complexity, increased hardware cost, increased signal insertion loss and reduced overall reliability.

[0005] To address the aforementioned technical problems, a first aspect of the present invention provides a radio frequency front-end ASDIV switching system, comprising: a physical antenna group including a first antenna and a second antenna; a power amplifier front-end module including a first port and a second port, the first port being directly connected to the first antenna and the second port being directly connected to the second antenna; and a transceiver having a main receiver and a diversity receiver; wherein the power amplifier front-end module integrates a switching circuit; the switching circuit is configured to form four signal paths between the first port, the second port, and the main receiver and diversity receiver; the four signal paths include: a first signal path from the first port to the main receiver... The circuit includes a first path, a second path from the first port to the diversity receiver, a third path from the second port to the main receiver, and a fourth path from the second port to the diversity receiver. The switching circuit has at least two operating states: in a first operating state, the switching circuit activates the first path and the fourth path to route the signal corresponding to the first antenna to the main receiver and the signal corresponding to the second antenna to the diversity receiver; in a second operating state, the switching circuit activates the second path and the third path to route the signal corresponding to the first antenna to the diversity receiver and the signal corresponding to the second antenna to the main receiver.

[0006] According to some embodiments of this application, a second aspect of this application also provides an electronic device, including: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the functions of the radio frequency front-end ASDIV switching system as described in any one aspect of the first application.

[0007] The technical solution provided in this application has at least the following advantages: This application discloses a radio frequency front-end ASDIV switching system, including a physical antenna array, a power amplifier front-end module, and a transceiver. A switching circuit is integrated within the power amplifier front-end module, enabling the establishment of four independent, selectable connection paths between the antenna port and the transceiver receiver. By switching the state of the switching circuit using internal control signals, direct switching between the primary and secondary antennas in master and diversity roles can be achieved without any external switching switches. This invention simplifies the hardware structure, reduces insertion loss and cost, and improves the reliability and integration of the ASDIV function in the vehicle-mounted wireless communication module. Attached Figure Description

[0008] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0009] Figure 1 This is a schematic diagram of the radio frequency front-end architecture for implementing ASDIV functionality using an external duplex switch, based on existing technologies. Figure 2 This is an enlarged schematic diagram of the front-end module of a power amplifier that uses an external duplex switch to implement the ASDIV function in the existing technology; Figure 3 This is a schematic diagram of an ASDIV switching system architecture for the radio frequency front end according to an embodiment of the present invention; Figure 4 This is an enlarged schematic diagram of the front-end module of a power amplifier according to an embodiment of the present invention; Figure 5 This is a schematic diagram of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0010] In existing implementations, the wireless transceiver typically employs an RF front-end architecture consisting of an external duplex switch (SW1) and a power amplifier module with an integrated filter (PAMIF). A typical circuit connection diagram is shown below. Figure 1 As shown. In the initial state, physical antenna ANT1 acts as the main antenna, connected to the external port ANT1 of PAMIF via the full-duplex switch SW1. Internally, PAMIF uses its integrated antenna switching module (ASM) to connect the ANT1 port to the main receiver channel RX1, thus connecting to the main receiver of the transceiver. Simultaneously, physical antenna ANT2 acts as the diversity antenna, also connected to the external port ANT2 of PAMIF via the full-duplex switch SW1. Internally, PAMIF uses the ASM to connect this port to the diversity receiver channel RX2, ultimately connecting to the diversity receiver of the transceiver. A schematic diagram of the internal structure of the PAMIF module can be found in [reference needed]. Figure 2 .

[0011] When ASDIV switching functions need to be performed, such as switching physical antenna ANT2 to the main antenna and physical antenna ANT1 to the diversity antenna, the existing implementation process is as follows: In the initial configuration, physical antenna ANT1 is connected to the ANT1 port of PAMIF through a full-duplex switch SW1 and is connected to the main receiving channel RX1 through the internal ASM of PAMIF; physical antenna ANT2 is connected to the ANT2 port of PAMIF through SW1 and is connected to the diversity receiving channel RX2 through the ASM.

[0012] During the switching process, the connection between the physical antenna and the PAMIF port is changed by controlling the path state of the duplex switch SW1. This reconnects physical antenna ANT1 to the ANT2 port of the PAMIF, while physical antenna ANT2 is connected to the ANT1 port of the PAMIF. Throughout this process, the connection between the internal ASM and the receive channels (RX1, RX2) of the PAMIF remains unchanged, thus enabling the switching of the main / diversity roles: physical antenna ANT2 connected to RX1 via the ANT1 port of the PAMIF as the main antenna, and physical antenna ANT1 connected to RX2 via the ANT2 port of the PAMIF as the diversity antenna.

[0013] However, the above-mentioned implementation method relying on an external duplex switch SW1 has significant technical drawbacks: First, this solution increases the complexity and material cost of the system. The external switch and its associated control circuit not only increase hardware costs but also occupy valuable circuit board space, which is particularly prominent in space-constrained automotive modules. Second, the external switch introduces additional insertion loss and impedance matching issues, thereby degrading the system's receiving sensitivity and partially offsetting the performance gains brought by ASDIV. Finally, adding a switch also increases control complexity and the risk of system failure, and the additional components and signal links reduce overall reliability.

[0014] Based on this, this application provides a radio frequency front-end ASDIV switching system, including: a physical antenna group, including a first antenna and a second antenna; a power amplifier front-end module, including a first port and a second port, the first port being directly connected to the first antenna and the second port being directly connected to the second antenna; a transceiver, having a main receiver and a diversity receiver; wherein, the power amplifier front-end module integrates a switching circuit; the switching circuit is configured to form four signal paths between the first port, the second port and the main receiver and the diversity receiver; the four signal paths include: a first path from the first port to the main receiver, the... The circuit comprises a second path from the first port to the diversity receiver, a third path from the second port to the main receiver, and a fourth path from the second port to the diversity receiver; the switching circuit has at least two operating states: in a first operating state, the switching circuit activates the first path and the fourth path to route the signal corresponding to the first antenna to the main receiver and the signal corresponding to the second antenna to the diversity receiver; in a second operating state, the switching circuit activates the second path and the third path to route the signal corresponding to the first antenna to the diversity receiver and the signal corresponding to the second antenna to the main receiver.

[0015] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the various embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details are provided in the embodiments of the present invention to facilitate a better understanding of this application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments. The division of the following embodiments is for ease of description and should not constitute any limitation on the specific implementation of the present invention. The various embodiments can be combined and referenced with each other without contradiction.

[0016] like Figure 3 As shown in one embodiment of this application, the radio frequency front-end ASDIV switching system includes a physical antenna group, which includes a first antenna and a second antenna. During actual communication, the first antenna and the second antenna can be dynamically configured as a main antenna or a diversity antenna according to system instructions. The main antenna is used to establish and maintain the main communication link, while the diversity antenna provides diversity gain by receiving signals from different spatial paths. Their collaborative operation aims to overcome multipath fading and shadowing effects in the wireless channel, thereby significantly improving the stability of the communication link and data throughput.

[0017] In this embodiment, the radio frequency front-end ASDIV switching system further includes a power amplifier front-end module (PAMIF), which includes a first port (ANT1) and a second port (ANT2). The first port ANT1 is directly connected to the first antenna, and the second port ANT2 is directly connected to the second antenna, thereby establishing a fixed radio frequency link between the physical antenna group and the power amplifier front-end module PAMIF without the intervention of an external switch.

[0018] In this embodiment, the radio frequency front-end ASDIV switching system also includes a transceiver with a main receiver and a diversity receiver, which are used to process radio frequency signals from the main antenna and the diversity antenna respectively, and to complete antenna switching diversity processing based on the signal path configured by the switching circuit.

[0019] The power amplifier front-end module integrates a switching circuit, which is configured to dynamically reconstruct the signal path between the first port ANT1, the second port ANT2 and the transceiver's receiving channel. This circuit is the core programmable unit for realizing antenna switching diversity function.

[0020] Specifically, the switching circuit is as follows: Figure 4 As shown, the switching circuit is configured to form four signal paths between the first port, the second port, and the main receiver and diversity receiver. These four signal paths include: a first path from the first port to the main receiver, a second path from the first port to the diversity receiver, a third path from the second port to the main receiver, and a fourth path from the second port to the diversity receiver. The key difference between this embodiment and existing technologies lies in the fact that the switching circuit dynamically reconstructs the signal paths within the power amplifier front-end module, replacing the reliance on an external full-duplex switch to switch the physical connection of the antenna. Specifically, existing technologies require an external switch SW1 to change the physical correspondence between the antenna and the PAMIF port, while in this embodiment, the connection between the antenna and the PAMIF port remains fixed. The switching of antenna roles is entirely achieved by the internal switching circuit selectively activating different combinations of the four predefined signal paths: for example, activating the first and fourth paths to make the first antenna the main receiver and the second antenna the diversity receiver; or activating the second and third paths to interchange their roles. This change eliminates the need for external switches and the associated insertion losses, layout occupancy, increased costs, and reliability risks, while maintaining the same ASDIV functionality.

[0021] In this embodiment, the switching circuit has at least two operating states, such as a first operating state and a second operating state, to achieve dynamic switching of the antenna role.

[0022] In the first operating state, the switching circuit turns on the first path and the fourth path to route the signal corresponding to the first antenna to the main receiver and the signal corresponding to the second antenna to the diversity receiver.

[0023] In this embodiment, the first operating state corresponds to the system's initial or default main diversity configuration. In this state, the radio frequency signal input from the first antenna enters the power amplifier front-end module via the first port, is guided to the first path by the switching circuit, and is ultimately sent to the main receiver of the transceiver for processing. Simultaneously, the radio frequency signal input from the second antenna enters the module via the second port, is guided to the fourth path by the switching circuit, and is ultimately sent to the diversity receiver. This configuration fully utilizes the first antenna as the main communication link, while leveraging the spatial diversity gain provided by the second antenna to combat signal fading, thereby achieving stable and reliable data reception under typical channel conditions.

[0024] In the second operating state, the switching circuit turns on the second path and the third path to route the signal corresponding to the first antenna to the diversity receiver and the signal corresponding to the second antenna to the main receiver.

[0025] In this embodiment, the second operating state corresponds to an ASDIV handover operation triggered by a change in channel conditions (e.g., detection of a decrease in the signal quality of the first antenna). In this state, the radio frequency signal input from the first antenna enters the power amplifier front-end module via the first port, is switched to the second path by the switching circuit, and is directed to the diversity receiver. Simultaneously, the radio frequency signal input from the second antenna enters the module via the second port, is switched to the third path, and is directed to the main receiver. This dynamic reconfiguration enables real-time switching of the main and diversity antenna roles, elevating the second antenna with superior signal quality to the main communication link. This continuously optimizes reception performance without interrupting service, enhancing the system's communication robustness in dynamic mobile environments.

[0026] Based on the core concepts disclosed in the embodiments of this application, the technical solution can be naturally extended to systems containing more antennas. For example, in a system containing a physical antenna group with N antennas and a power amplifier front-end module with N corresponding ports, by integrating a switching circuit with corresponding path configuration capabilities inside, it is possible to dynamically select the optimal antenna or a subset as the main set among the N antennas, while configuring the remaining antennas as diversity. This extends the ASDIV mechanism of no external switching and internal dynamic reconfiguration described in this application to multi-antenna scenarios, further improving diversity gain and system reliability.

[0027] This application embodiment integrates the antenna switching function into the front-end module of the power amplifier and utilizes its switching circuit to dynamically reconstruct the signal path, achieving ASDIV switching without the need for an external switch. This design eliminates the insertion loss and impedance mismatch problems caused by external switches, improving receiver sensitivity and RF performance; at the same time, it simplifies the hardware structure, saves layout space and material costs, and significantly improves system integration and reliability, making it particularly suitable for vehicle communication scenarios with stringent requirements for space, cost, and reliability.

[0028] In one embodiment of this application, the switching circuit includes a multi-throw radio frequency switch or a switch matrix.

[0029] In this embodiment, the multi-throw RF switch, through its multiple independently controllable throwing ports, can flexibly switch the first port and the second port to different receiving channels; while the switch matrix, through its arrayed layout of cross-point switches, provides a higher degree of freedom and scalability for path configuration. Both implementation methods can be reasonably selected based on the internal space and performance requirements of the power amplifier front-end module, and can reliably support the establishment of the four signal paths and the rapid switching between the two operating states.

[0030] In one embodiment of this application, the switching circuit is manufactured using CMOS, GaAs, or SiGeBiCMOS processes.

[0031] In this embodiment, the manufacturing process of the switching circuit includes, but is not limited to, CMOS, GaAs, or SiGe BiCMOS processes. Specifically, CMOS processes offer advantages such as high integration, low power consumption, and compatibility with mainstream digital processes, making them suitable for large-scale integration scenarios where cost and power consumption are sensitive. GaAs processes provide excellent RF switching performance, including lower insertion loss, higher isolation, and stronger power handling capabilities, making them suitable for communication frequency bands with extremely high RF performance requirements. SiGe BiCMOS processes achieve a good balance between RF performance and digital integration capabilities, possessing good linearity, noise performance, and feasibility for on-chip integration with complex control circuits. Based on the comprehensive requirements of the system in terms of performance, cost, and integration, those skilled in the art can select suitable process solutions to implement high-performance, highly reliable internal switching circuits in the power amplifier front-end module.

[0032] In embodiments of this application, the system further includes a control unit, which communicates with the power amplifier front-end module via a Mobile Industry Processor Interface RF Front-End Specification Bus (MIPI RFFE) interface to configure the operating state of the switching circuit.

[0033] In this embodiment, the Mobile Industry Processor Interface RF Front-End Specification Bus (MIM) is a standardized digital control interface specifically designed for RF front-end components of mobile devices. This interface, through a simple two-wire serial bus, supports efficient configuration and control of multiple slave RF devices by the host, enabling flexible adjustment of the operating status and parameters of modules such as power amplifiers, low-noise amplifiers, switches, and filters. Employing a standardized command set and frame structure, it features high reliability, low power consumption, and excellent anti-interference capabilities, significantly simplifying the design complexity of RF systems and achieving unified, programmable management of complex multi-band RF front-ends. It has become the mainstream RF control solution in modern cellular communication modules.

[0034] In practical implementation, the control unit can be integrated into the baseband processor or a standalone microcontroller. Internally, it runs an antenna switching algorithm and continuously monitors signal quality parameters from the master and diversity receivers, such as received signal strength indication, signal-to-noise ratio, or bit error rate. When the algorithm determines that an antenna role needs to be switched, the control unit generates a corresponding RFFE write command. This command is transmitted via a serial bus at a clock frequency of up to 52MHz to a specified slave address within the power amplifier front-end module.

[0035] The RFFE interface controller within the power amplifier front-end module receives and parses the command, extracting the target register address and configuration data. The configuration data is written into a control register directly associated with the switching circuit. Changes in the register value immediately drive the gate or control voltage of the internal analog switch matrix or multi-throw switch, thereby physically changing the conduction relationship between the first port, the second port, and the receiving channel within microseconds, achieving the switching of the operating state.

[0036] The entire control loop supports programmable switching thresholds, hysteresis times, and strategies, enabling optimal antenna selection while ensuring link stability. Furthermore, the standard RFFE bus-based design allows the system to work collaboratively with other RFFE-compatible RF front-end components, forming a unified and controllable RF subsystem. This significantly enhances the system's modularity, maintainability, and adaptability in multi-band, multi-mode scenarios.

[0037] In one embodiment of this application, the MIPI RFFE is compatible with the MIPI 3.0 for RX standard and the MIPI 2.1 for TX standard, and supports signal transmission at a clock frequency of 52 MHz.

[0038] In this embodiment, the MIPI RFFE interface is compatible with the MIPI RFFE 3.0 for RX and MIPI RFFE 2.1 for TX standards released by the MIPI Alliance, enabling reliable communication in the receive and transmit links according to the corresponding protocol specifications. This interface supports a bus clock frequency of up to 52 MHz, enabling high-speed, low-latency configuration data transmission and ensuring real-time, precise control of the switching circuit's operating state. This high-bandwidth characteristic is particularly suitable for dynamic switching scenarios such as ASDIV, which require rapid response to channel changes, while its backward compatibility design ensures seamless integration with the existing RF front-end ecosystem.

[0039] In one embodiment of this application, the power amplifier front-end module is provided with a control register connected to the bus, and the control unit selects the conduction path of the switching circuit by writing configuration values ​​to the control register.

[0040] The control register is a core component that serves as a crucial bridge between digital control and RF hardware. In this system, the switching circuit, as an analog RF component, requires precise digital signal control for its conduction state. Directly driving it with discrete levels would not only result in complex interfaces and poor interference immunity but also make it difficult to achieve flexible multi-state management and dynamic configuration. The control register converts digital control commands into stable control signals that the switching circuit can recognize, thereby establishing a reliable and deterministic mapping between software programmability and RF hardware operation.

[0041] In this embodiment, the control register is a set of specific storage units integrated into the digital interface unit of the power amplifier front-end module. Each register corresponds to a unique address and can store configuration data of a specific bit length. The contents of the data bits are directly mapped to the control logic of the internal switching circuit: for example, some data bits are used to select the communication conduction path, while the remaining bits can be used to configure bias conditions or switching timing parameters. Functionally, the control register is a switching unit whose state can be set through hardware programmability. The value stored in it takes effect immediately after being written and continuously controls the state of the relevant circuit until the value is updated by the next write operation.

[0042] Specifically, each configuration value corresponds to a path combination state of the switching circuit. For example, writing a specific value can enable the switching circuit to simultaneously conduct the first and fourth paths, corresponding to the first operating state; writing another value can enable the second and third paths simultaneously, corresponding to the second operating state. This register-mapping-based control mechanism abstracts the complex RF switching logic into a simple data write operation, which not only achieves high-speed and accurate configuration of internal paths, but also greatly simplifies the design and maintenance of system software, and improves the reliability and repeatability of the entire ASDIV switching process.

[0043] In embodiments of this application, the control register includes a subset of registers for managing the transmit function and the antenna switching function. The configurable state of the subset of registers is associated with the signal path selection state of the switching circuit. By configuring the subset of registers, one or more paths to be activated can be selected from the four signal paths.

[0044] In this embodiment, the control register includes a subset of registers specifically for managing the transmit link and antenna switching functions. The configurable state of each bit or field within this register subset forms a direct and deterministic mapping relationship with the selection state of a specific signal path in the switching circuit. By writing corresponding configuration data to this register subset, the control system can precisely select one or more physical paths that need to be simultaneously activated from the four preset signal paths. For example, configuring specific register values ​​can enable the switching matrix to connect only the first and fourth paths, or switch to a combination of the second and third paths, or achieve single-path activation or other customized path combinations as needed. This register-programmed path selection mechanism provides highly flexible and real-time reconfigurable hardware support for antenna switching diversity strategies.

[0045] In one embodiment of this application, the system further includes a baseband processor configured to execute a closed-loop control process for antenna switching diversity, specifically including the following steps: First, the baseband processor continuously monitors and compares the signal quality metrics from the main receiver and the diversity receiver respectively. When it detects that the current main antenna signal quality is lower than a preset threshold and the diversity antenna signal is more advantageous, it generates an ASDIV switching command.

[0046] Subsequently, the baseband processor determines the target register configuration value corresponding to the switching instruction based on the pre-stored instruction-configuration mapping relationship. This configuration value uniquely defines the target path combination that the switching circuit needs to establish.

[0047] Finally, the baseband processor sends a write command to the corresponding slave address of the power amplifier front-end module via the MIPI RFFE bus, writing the configuration value into the designated control register. The update of the register value immediately drives the internal switching circuit to change its conduction state, thereby completing a seamless switch of the antenna role within microseconds, ensuring the system remains in optimal reception condition.

[0048] This intelligent control process, integrated into the baseband processor, enables autonomous and adaptive operation of the ASDIV function, significantly improving the connectivity robustness and user experience of mobile terminals in complex channel environments.

[0049] In one embodiment of this application, the baseband processor is configured to determine whether to generate the ASDIV handover instruction based on whether the difference in real-time signal quality metric between the main receiver and the diversity receiver exceeds a preset hysteresis threshold, so as to avoid frequent handovers when channel conditions fluctuate.

[0050] In this embodiment, the baseband processor is configured to introduce hysteresis control logic when executing antenna switching decisions. Specifically, it continuously calculates and compares real-time signal quality metrics from the main receiver and diversity receiver, such as Received Signal Strength Indication (RSSI), Reference Signal Received Quality (RSRQ), or Signal-to-Noise Ratio (SNR), and obtains the quality difference between the two. The system has a preset configurable hysteresis threshold. Only when the quality difference continuously exceeds the hysteresis threshold for a predetermined stabilization time does the baseband processor determine that the current channel conditions have substantially deteriorated and generate the ASDIV switching command. If the difference fluctuates within the threshold range or does not remain stable for a sufficient duration, the current antenna configuration remains unchanged. This hysteresis comparison mechanism effectively suppresses frequent and unnecessary switching actions caused by instantaneous channel fluctuations or measurement noise. Therefore, while ensuring the system always tracks the optimal antenna, it significantly improves link stability and the reliability of switching decisions, and reduces signaling overhead and power consumption caused by frequent switching.

[0051] This application integrates the antenna switching function into the front-end module of the power amplifier and utilizes its programmable switching circuit and standardized MIPI RFFE control interface to achieve dynamic ASDIV switching without an external switch. This solution significantly reduces system complexity, hardware cost, and layout area while maintaining the same antenna diversity gain. It also reduces signal link loss, improves receiver sensitivity, and enhances overall reliability, making it particularly suitable for vehicular wireless communication scenarios with stringent requirements for integration, cost, and performance.

[0052] Another embodiment of this application relates to an electronic device 500, see [link to relevant documentation] Figure 5 It includes: a processor 501, a memory 502, and a computer program, such as a data processing program, stored in the memory 502 and executable on the processor 501. When the processor 501 executes the computer program, it implements the functions described in the various antenna switching system embodiments above.

[0053] For example, the computer program may be divided into one or more modules / units, which are stored in the memory 502 and executed by the processor 501 to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the electronic device.

[0054] The electronic device may be a desktop computer, laptop, handheld computer, or cloud server, etc. The electronic device may include, but is not limited to, a processor 501 and a memory 502. Those skilled in the art will understand that the schematic diagram is merely an example of an electronic device and does not constitute a limitation on the electronic device. It may include more or fewer components than illustrated, or combine certain components, or different components. For example, the electronic device may also include input / output devices, network access devices, buses, etc.

[0055] The processor 501 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor 501 can be any conventional processor. The processor 501 is the control center of the electronic device, connecting various parts of the electronic device through various interfaces and lines.

[0056] The memory 502 can be used to store the computer programs and / or modules. The processor 501 implements various functions of the electronic device by running or executing the computer programs and / or modules stored in the memory 502 and calling the data stored in the memory 502. The memory 502 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory 502 may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital card (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0057] Wherein, if the modules / units integrated in the electronic device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the functions of the systems in the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by the processor 501, it can implement the steps of the various system embodiments described above. Wherein, the computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drive, portable hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc.

[0058] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, article, or apparatus that includes that element.

[0059] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A radio frequency front-end ASDIV switching system, characterized in that, include: The physical antenna array includes the first antenna and the second antenna; The power amplifier front-end module includes a first port and a second port, wherein the first port is directly connected to the first antenna and the second port is directly connected to the second antenna; A transceiver has a main receiver and a diversity receiver; The power amplifier front-end module integrates a switching circuit. The switching circuit is configured to form four signal paths between the first port, the second port and the main receiver and the diversity receiver; the four signal paths include: a first path from the first port to the main receiver, a second path from the first port to the diversity receiver, a third path from the second port to the main receiver, and a fourth path from the second port to the diversity receiver. The switching circuit has at least two operating states: In the first operating state, the switching circuit turns on the first path and the fourth path to route the signal corresponding to the first antenna to the main receiver and the signal corresponding to the second antenna to the diversity receiver. In the second operating state, the switching circuit turns on the second path and the third path to route the signal corresponding to the first antenna to the diversity receiver and the signal corresponding to the second antenna to the main receiver.

2. The radio frequency front-end ASDIV switching system according to claim 1, characterized in that, The switching circuit includes a multi-throw radio frequency switch or a switch matrix.

3. The radio frequency front-end ASDIV switching system according to claim 1 or 2, characterized in that, The switching circuit is manufactured using CMOS, GaAs, or SiGe BiCMOS processes.

4. The radio frequency front-end ASDIV switching system according to claim 1 or 2, characterized in that, The system also includes a control unit, which communicates with the power amplifier front-end module via the Mobile Industry Processor Interface RF Front-End Specification Bus (MIPI RFFE) interface to configure the operating state of the switching circuit.

5. The radio frequency front-end ASDIV switching system according to claim 4, characterized in that, The MIPI RFFE is compatible with both the MIPI 3.0 for RX and MIPI 2.1 for TX standards and supports signal transmission at a clock frequency of 52 MHz.

6. The radio frequency front-end ASDIV switching system according to claim 4, characterized in that, The power amplifier front-end module has a control register connected to the bus. The control unit selects the conduction path of the switching circuit by writing configuration values ​​to the control register.

7. The radio frequency front-end ASDIV switching system according to claim 6, characterized in that, The control register includes a subset of registers for managing the transmit function and the antenna switching function. The configurable state of the subset of registers is associated with the signal path selection state of the switching circuit. By configuring the subset of registers, one or more paths to be activated can be selected from the four signal paths.

8. The radio frequency front-end ASDIV switching system according to claim 6, characterized in that, The system also includes a baseband processor configured to perform the following steps: Generate ASDIV switching instructions based on antenna signal quality detection results; Determine the corresponding register configuration value based on the switching instruction; The MIPI RFFE sends a write command containing the configuration value to the control register, so that the switching circuit switches to the corresponding operating state.

9. The radio frequency front-end ASDIV switching system according to claim 8, characterized in that, The baseband processor is configured to determine whether to generate the ASDIV handover instruction based on whether the difference in real-time signal quality metric between the main receiver and the diversity receiver exceeds a preset hysteresis threshold, so as to avoid frequent handovers when channel conditions fluctuate.

10. An electronic device, comprising at least one processor; and a memory communicatively connected to said at least one processor; wherein, The memory stores instructions executable by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform functions to implement the radio frequency front-end ASDIV switching system as described in any one of claims 1 to 9.

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