Defect detection method, device and computing equipment for semiconductor ingot growth process

Abstract

The disclosure provides a defect detection method and device for a semiconductor crystal bar growth process and a computing device. The method comprises: cutting a wafer sample to be detected from a completed semiconductor crystal bar, wherein the wafer sample to be detected has a rough surface formed by a cutting process and has not undergone polishing treatment; transmitting infrared laser through the wafer sample to be detected, and determining the defect type of the wafer sample to be detected based on the depolarization state of the transmitted light beam; and generating process parameter adjustment instructions for the semiconductor crystal bar growth process according to the defect type. According to the embodiments of the disclosure, the rough and unpolished wafer sample to be detected formed by cutting can be directly used as the detection object to carry out defect detection by means of the depolarization characteristics during infrared laser transmission (which has a lower requirement for the flatness of the sample surface), thereby the detection link is moved forward from the end product stage, the process feedback cycle is greatly shortened, and an efficient, low-cost and accurate evaluation method is provided for fine adjustment of the growth process.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a defect detection method, apparatus and computing device for semiconductor ingot growth process. Background Technology

[0002] In the fabrication of semiconductor single-crystal materials (such as single-crystal silicon), ingot growth is the core step that determines material quality. Influenced by factors such as thermal field distribution, crystal pulling speed, and cooling environment, stress-type defects or vacancy-type point defects are easily generated inside the ingot. These defects directly affect the patterning quality and electrical performance of subsequent chip manufacturing. Therefore, real-time monitoring of the growth process and rapid defect feedback are crucial for ensuring product yield.

[0003] In related technologies, optical inspection equipment such as particle counters are typically used to detect internal defects in wafers. However, such equipment requires extremely high surface cleanliness and flatness of the sample. The sample must undergo a complete process of cutting, grinding, polishing, and multiple chemical cleaning steps to achieve a mirror-polished state before inspection. From the completion of ingot growth to obtaining the final defect evaluation results, a long processing cycle (usually more than ten days) is often required. This makes it impossible to adjust the crystal pulling process in a timely manner based on the inspection results, resulting in wasted costs and reduced product yield. Therefore, there is an urgent need for a defect detection method with a short inspection cycle and the ability to quickly provide feedback on process adjustments. Summary of the Invention

[0004] This disclosure provides a defect detection method, apparatus, and computing device for semiconductor ingot growth process; it can reduce material waste and sample preparation costs in the production process, provide an efficient, low-cost, and accurate evaluation means for fine adjustment of the growth process, and ultimately improve the overall product yield.

[0005] The technical solution disclosed herein is implemented as follows: In a first aspect, this disclosure provides a defect detection method for a semiconductor ingot growth process, comprising: cutting a wafer sample to be inspected from a grown semiconductor ingot, wherein the wafer sample to be inspected has a rough surface formed by a cutting process and has not been polished; using an infrared laser to transmit through the wafer sample to be inspected, determining the defect type of the wafer sample to be inspected based on the depolarization state of the transmitted beam; and generating process parameter adjustment instructions for the semiconductor ingot growth process according to the defect type.

[0006] Secondly, this disclosure provides a defect detection device for a semiconductor ingot growth process, comprising: a cutting module configured to cut a wafer sample to be inspected from a grown semiconductor ingot, wherein the wafer sample to be inspected has a rough surface formed by a cutting process and has not been polished; a detection module configured to use an infrared laser to transmit light through the wafer sample to be inspected, and determine the defect type of the wafer sample to be inspected based on the depolarization state of the transmitted light beam; and an adjustment module configured to generate process parameter adjustment instructions for the semiconductor ingot growth process according to the defect type.

[0007] Thirdly, this disclosure provides a computing device, including a memory and a processor, wherein the memory is used to store executable instructions, and when the processor executes the executable instructions stored in the memory, it implements the steps of the defect detection method for the semiconductor ingot growth process of the first aspect.

[0008] Fourthly, this disclosure provides a computer storage medium storing computer-executable instructions that, when executed by a processor, implement the steps of the defect detection method for the semiconductor ingot growth process of the first aspect.

[0009] Fifthly, this disclosure provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the defect detection method for the semiconductor ingot growth process of the first aspect.

[0010] By utilizing the depolarization characteristics of infrared laser transmission (which have low requirements for sample surface flatness), the rough, unpolished wafer sample formed by cutting is directly used as the inspection object for defect detection. This moves the inspection process forward from the downstream finished product stage, significantly shortening the process feedback cycle. This setup ensures timely intervention and optimization of process parameters during the crystal pulling process, effectively avoiding batch defects and material scrap caused by the continuous growth of multiple crystal rods under incorrect parameters. It reduces material waste and sample preparation costs in the production process, provides an efficient, low-cost, and accurate evaluation method for fine-tuning the growth process, and ultimately improves the overall product yield. Attached Figure Description

[0011] Figure 1 A flowchart illustrating a defect detection method for a semiconductor ingot growth process provided in this embodiment of the disclosure.

[0012] Figure 2 This is a schematic diagram of infrared laser transmission for wafer defect detection provided in an embodiment of this disclosure.

[0013] Figure 3 This is a schematic diagram illustrating the physical principle of wafer defect detection provided in an embodiment of this disclosure.

[0014] Figure 4 This is a schematic diagram of a point defect and a linear defect provided in an embodiment of this disclosure.

[0015] Figure 5 This is a schematic diagram of a uniaxial stress defect provided in an embodiment of this disclosure.

[0016] Figure 6 This is a schematic diagram of a biaxial stress defect provided in an embodiment of this disclosure.

[0017] Figure 7 An infrared depolarization detection version of a COP Ring defect provided in an embodiment of this disclosure.

[0018] Figure 8 This invention discloses an embodiment of a COP Ring defect image obtained by a particle counter.

[0019] Figure 9 This is a logical diagram illustrating the wafer defect detection cycle provided in an embodiment of the present disclosure.

[0020] Figure 10 A comparison diagram of the original process flow and the new process flow provided in the embodiments of this disclosure.

[0021] Figure 11 A comparison chart of process test results between the original process and the new process provided in the embodiments of this disclosure.

[0022] Figure 12 This is a schematic diagram of the composition of a defect detection device for a semiconductor crystal rod growth process provided in an embodiment of this disclosure.

[0023] Figure 13 This is a structural block diagram of a computing device provided in an embodiment of the present disclosure. Detailed Implementation

[0024] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art should fall within the protection scope of this disclosure.

[0025] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure. The singular forms “a,” “the,” and “the” used in this disclosure are also intended to include the plural forms unless the context clearly indicates otherwise.

[0026] Furthermore, in the embodiments of this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0027] To facilitate understanding of the technical solutions of the embodiments of this disclosure, the related technologies of the embodiments of this disclosure are described below. The following related technologies are optional solutions and can be combined with the technical solutions of the embodiments of this disclosure in any way, and they all fall within the protection scope of the embodiments of this disclosure.

[0028] In the field of semiconductor material manufacturing, single-crystal silicon ingot growth is a core process. During the single-crystal silicon ingot pulling process, due to the complex internal stress thermal field environment and the influence of multiple factors such as pulling speed, temperature gradient, and cooling rate, two types of critical defects are easily generated inside the ingot: one is stress-type defects (such as point, line, or axial stress defects), and the other is vacancy-type point defects (such as COP defects). If these defects flow into subsequent chip manufacturing processes, especially COP defects, they can easily lead to serious process problems such as photolithography OVL. Therefore, after the ingot growth is completed, a sample must be cut through a dicing process for defect detection. The lattice quality of the batch is evaluated based on the detection results, and a basis is provided for adjusting the ingot growth process.

[0029] In related technologies, the detection of internal defects in wafers (especially COP defects) typically relies on optical equipment such as particle counters. These devices identify defects based on the scattering characteristics of laser light on the wafer surface. Therefore, the surface quality requirements for the samples are extremely high. Samples cut from the wafer ingot must undergo more than twenty complete processing steps, including cutting, grinding, etching, and polishing, to achieve mirror-level flatness and extremely high cleanliness before they can be tested.

[0030] However, this testing method has significant limitations: First, the testing cycle is extremely long, typically taking more than 15 days from ingot production to obtaining final test feedback. Because semiconductor production is continuous, several or even more ingots with the same lattice parameters have often already completed growth and entered the processing stage by this time. If the test results show process abnormalities, it will result in a large-scale loss and scrap of materials. Second, the multiple polishing processes before testing not only increase the processing cost of a single sample but also further extend the overall production process, failing to meet the demands of modern semiconductor manufacturing for rapid process iteration and real-time monitoring.

[0031] Therefore, this disclosure provides a novel defect detection scheme. This scheme leverages the depolarization characteristic of infrared laser transmission, which places lower demands on the surface flatness of the sample. It directly uses the rough, unpolished wafer sample formed during cutting as the detection target, thereby advancing the detection process from the downstream finished product stage and significantly shortening the process feedback cycle. From a technical perspective, infrared lasers can penetrate silicon materials, and the core of the detection is based on the change in polarization state (i.e., depolarization state) caused by internal stress when the beam penetrates the sample. This characteristic significantly reduces the requirements for the flatness and cleanliness of the sample surface. Therefore, no complex processing is required; the sample, after simple processing following cutting and retaining a certain degree of surface roughness and unpolished, can be used for detection. Simultaneously, advancing the detection process (e.g., to the IE1 sampling stage) shortens the process feedback cycle to less than 2 days, enabling rapid and accurate generation of process adjustment instructions. This significantly reduces detection and sample processing costs and effectively avoids batch material scrapping caused by delayed process feedback.

[0032] See Figure 1 , Figure 1 This is a flowchart illustrating a defect detection method for a semiconductor ingot growth process provided in this embodiment of the disclosure. Specifically, it includes steps S102-S106.

[0033] Step S102: Cut a wafer sample to be tested from the grown semiconductor ingot, wherein the wafer sample to be tested has a rough surface formed by the cutting process and has not been polished.

[0034] Specifically, after a semiconductor crystal rod is grown using the Czochralski (CZ) or magnetic field Czochralski (MCZ) method, and before it enters subsequent processing steps such as grinding, etching, and polishing, a wafer sample to be inspected can be cut from the grown semiconductor crystal rod for pre-processing to detect defects.

[0035] For example, in the wafer manufacturing process, before entering subsequent processing steps such as grinding, etching, and polishing, a sampling evaluation stage (IE1 stage) is usually entered first. In this stage, wafer samples to be tested can be cut from the semiconductor ingot, thereby bringing the wafer defect detection process forward and preventing defective products from flowing into the downstream processing stage.

[0036] The wafer sample to be tested is prepared by cutting the grown semiconductor ingot using a sawing tool (such as a wire saw or band saw), without the need for subsequent grinding, polishing, or multiple chemical cleaning processes. The specific parameters of the sample are: approximately 300 mm in diameter, 800~1200 μm in thickness, and crystal orientation... <100> The surface is a rough surface formed by the cutting process (roughness Ra 0.3~1.0μm), the cleanliness level is Class 1000, and the surface flatness (GBIR / TTV) is 0.3~3μm, which meets the basic requirements of scanning infrared depolarization detection.

[0037] Step S104: Using infrared laser to transmit light through the wafer sample to be inspected, the defect type of the wafer sample to be inspected is determined based on the depolarization state of the transmitted beam.

[0038] Specifically, based on the cut wafer sample to be tested, the unpolished rough surface sample is directly tested by taking advantage of the depolarization characteristics of infrared laser transmission, which have low requirements for the flatness of the sample surface, without additional processing.

[0039] Among them, the depolarization characteristic during infrared laser transmission refers to the fact that, based on the photoelastic effect, when infrared laser penetrates a semiconductor material with internal stress or lattice distortion, the material changes from optical isotropic to anisotropic (i.e., birefringence), causing the incident linearly polarized infrared laser to decompose into two beams of light with orthogonal polarization directions and different propagation speeds. Ultimately, this causes a change in the polarization state of the outgoing light, and this phenomenon of polarization state change is called depolarization characteristic.

[0040] The transmitted beam is a linearly polarized infrared laser with a preset wavelength, such as 1.3 micrometers (this wavelength has good penetration into single-crystal silicon and can avoid signal attenuation caused by light absorption). The laser is incident vertically from below the wafer sample to be tested and penetrates the sample.

[0041] The depolarization state of a transmitted beam refers to the state in which the polarization state changes from linear polarization to elliptic polarization after the linearly polarized infrared laser penetrates the sample. Its core quantitative index is the depolarization intensity (unit: DU, depolarization unit). The larger the absolute value of the depolarization intensity, the more significant the defects or internal stress inside the sample.

[0042] Defect types include stress-type defects and crystal native particle ring (COP ring) defects. During inspection, a precision turntable rotates the sample while a laser probe moves along the sample's radius to achieve full-surface scanning and capture the depolarization intensity of the transmitted beam. Based on the depolarization intensity and parameters such as the sample's thickness and crystal orientation, the magnitude and distribution of stress within the sample are deduced, generating a stress distribution map. Finally, the defect type is determined based on the abnormal signal characteristics in the stress distribution map: if a discrete or continuous first stress anomaly region is identified, it is determined to be a stress-type defect; if a second stress anomaly region is identified as a concentric ring, it is determined to be a crystal native particle ring defect.

[0043] In one example, the wafer sample to be inspected is fixed on a precision turntable, and the infrared laser inspection equipment is activated to emit a 1.3-micron linearly polarized infrared laser. After the laser penetrates the sample vertically, the detector captures the depolarized light intensity signal and generates a stress distribution map, which is used to determine the type of defect in the wafer sample to be inspected.

[0044] Step S106: Generate process parameter adjustment instructions for the semiconductor ingot growth process based on the defect type.

[0045] Specifically, after determining the defect type of the wafer sample to be inspected, the process parameters of the semiconductor ingot growth process can be adjusted accordingly based on the defect type, generating process parameter adjustment instructions.

[0046] Among them, the core parameters corresponding to the process parameter adjustment instructions include crystal pulling speed, solid-liquid interface temperature gradient, crystal rod rotation speed, power distribution of thermal heating elements, and cooling rate.

[0047] By utilizing the depolarization characteristics of infrared laser transmission (which have lower requirements for sample surface flatness), this embodiment directly uses the rough, unpolished wafer sample formed by cutting as the inspection object for defect detection. This moves the inspection process forward from the downstream finished product stage, significantly shortening the process feedback cycle. This setup ensures timely intervention and optimization of process parameters during the crystal pulling process, effectively avoiding batch defects and material scrap caused by the continuous growth of multiple crystal rods under incorrect parameters. It reduces material waste and sample preparation costs in the production process, provides an efficient, low-cost, and accurate evaluation method for fine-tuning the growth process, and ultimately improves the overall product yield.

[0048] In one embodiment of this disclosure, the process of cutting a wafer sample to be tested from a grown semiconductor ingot includes: after the semiconductor ingot has been grown and before processing, the sampling and evaluation stage is completed, and the semiconductor ingot is cut using a sawing tool to obtain the wafer sample to be tested.

[0049] The sampling and evaluation stage (IE1 stage) is an early sampling and inspection step after the semiconductor ingot growth is completed. Its core purpose is to identify defects in advance and provide feedback for process adjustments through preliminary sampling and evaluation of the ingot, preventing defective ingots from entering subsequent processing steps and causing cost waste. Wire saws or band saws can be used for cutting. These tools have high cutting efficiency and can ensure that the surface flatness (GBIR / TTV) of the cut sample is controlled within the range of 0.3~3μm, meeting the basic requirements for sample surface flatness in scanning infrared depolarization detection, without requiring additional flatness correction processing.

[0050] For example, the specific parameters of the wafer sample obtained after dicing are: approximately 300 mm in diameter, 800~1200 μm in thickness, and crystal orientation as follows: <100> The surface is a rough surface formed by sawing (roughness Ra0.3~1.0μm), with a cleanliness level of Class1000. It does not require subsequent processing such as polishing or multiple chemical cleaning and can be used directly for subsequent defect detection.

[0051] By applying this embodiment, the sample is quickly cut using a sawing tool in the IE1 stage, eliminating the need to wait for the crystal rod to complete the entire processing flow, thus realizing the pre-processing of the defect detection stage. At the same time, the selection of the sawing tool and the precise control of the sample parameters not only ensure that the sample meets the detection requirements, but also avoid the time and cost increases caused by additional processing steps, laying the foundation for subsequent rapid detection and process feedback.

[0052] In one embodiment of this disclosure, an infrared laser is used to transmit light through a wafer sample to be inspected. Based on the depolarization state of the transmitted beam, the defect type of the wafer sample to be inspected is determined, including: By using infrared laser to transmit through a wafer sample to be inspected, a stress distribution map inside the wafer sample is generated based on the depolarization state of the transmitted beam. Based on the stress distribution map, the defect type of the wafer sample to be tested is determined.

[0053] In the stress distribution map, different signal intensity regions correspond to different degrees of stress concentration, and abnormal signal regions are stress anomaly zones. The abnormal signal characteristics in the stress distribution map directly correspond to the defect type.

[0054] In one example, the defect types of the wafer sample to be tested mainly include stress-type defects and crystal native particle ring (COP ring) type defects. The abnormal signal characteristics of the two are significantly different in the stress distribution map, and they can be accurately distinguished by the following features: If a discrete or continuous first stress anomaly region is identified from the stress distribution map, it is determined that the wafer sample under test has a stress-type defect. The signal intensity fluctuation of this type of anomaly region is directly related to the accumulation of internal stress. Discrete point anomalies correspond to stress point defects, continuous linear anomalies correspond to stress line defects, continuous anomalies distributed along a single direction correspond to uniaxial stress defects, and superimposed anomalies distributed along two intersecting directions correspond to biaxial stress defects.

[0055] If a second stress anomaly region, exhibiting a concentric ring distribution, is identified from the stress distribution map, and the signal characteristics of this anomaly region conform to the shear stress field variation law (formed by lattice distortion caused by the aggregation of lattice vacancies), then it is determined that the wafer sample under test has a crystal native particle ring (COP Ring) type defect. These ring-shaped anomaly regions have uniform signal intensity and clear boundaries, which are typical characteristics of high-density aggregation of vacancy-type point defects.

[0056] For specific examples, if the generated stress distribution map shows a concentric ring-shaped second stress anomaly zone with clear boundaries and stable signal strength (depolarization intensity of +1.5DU) around the center of the sample, and the radial width of this zone is 10mm, then it can be directly determined that the sample has a COP Ring type defect; if the stress distribution map shows a continuous linear first stress anomaly zone (depolarization intensity of +1.8DU) at the edge of the sample, then it is determined that the sample has a stress line defect.

[0057] By applying this embodiment, the accurate determination of two types of core defects is achieved through the logic of "optical signal capture → stress distribution inference → defect feature matching". This embodiment relies on the optical signal changes caused by stress within the sample, rather than the surface state. Therefore, it can be directly adapted to rough, unpolished samples without additional processing, which not only ensures the accuracy of detection but also lays the technical foundation for the pre-detection process.

[0058] In one embodiment of this disclosure, an infrared laser is used to transmit light through a wafer sample to be inspected. Based on the depolarization state of the transmitted beam, a stress distribution map inside the wafer sample is generated, including: Place the wafer sample to be tested on a precision turntable; A linearly polarized infrared laser of a preset wavelength is emitted from below the wafer sample to be tested, and the linearly polarized infrared laser penetrates the wafer sample vertically. The wafer sample to be inspected is rotated, and the entire surface of the wafer sample is scanned based on linearly polarized infrared laser, and the intensity of the depolarized light of the transmitted beam is captured. A stress distribution map is generated based on the depolarized light intensity and the sample parameters of the wafer sample to be tested.

[0059] Specifically, the wafer sample to be tested is placed stably on a precision turntable, and the edges of the sample are fixed by vacuum adsorption or flexible clamps to prevent the sample from shifting, tilting or breaking during rotation.

[0060] The precision turntable serves to provide stable rotational power, ensuring a center deviation of ≤0.01mm during sample rotation and guaranteeing the uniformity of the scanning path. Its rotational speed is precisely adjustable to accommodate scanning requirements for samples of different diameters. Sample placement requirements include: the center of the sample must be aligned with the rotation center of the precision turntable to ensure laser scanning covers the entire sample surface (from center to edge without omission); the sample surface requires no additional cleaning or flatness correction and can be placed directly in its rough, cut state.

[0061] Specifically, a linearly polarized infrared laser of a preset wavelength is emitted from the laser emitting module below the wafer sample to be tested, and the laser penetrates the wafer sample vertically.

[0062] The characteristics of linearly polarized lasers are: the electric vector vibration direction of the laser remains in a single plane (such as the vertical direction), providing a stable reference for subsequent detection of depolarization state changes. The purpose of perpendicular laser incidence is to ensure that the optical path is consistent at different positions on the sample, avoiding signal deviations caused by oblique incidence.

[0063] In one example, a preset wavelength of 1.3 micrometers was selected. Infrared light at this wavelength has good transmittance to single-crystal silicon (the absorptivity of silicon in the 1.3 μm band is less than 1%), which avoids signal attenuation caused by laser absorption by the sample and ensures that the transmitted beam can carry information about the internal stress of the sample. The laser power was set to 5~10mW, which ensures that the detector captures a clear signal without causing additional stress due to localized heating of the sample caused by excessive power.

[0064] Specifically, a precision turntable is activated to rotate the wafer sample to be tested. At the same time, the laser probe or the sample moves radially to achieve full surface scanning of the wafer sample by linearly polarized infrared laser, and the depolarized light intensity of the transmitted beam is captured in real time by a detector.

[0065] In one example, the scanning parameters are set as follows: the rotation speed of the precision turntable is 30~60 r / min, and the radial movement speed of the laser probe along the sample is 0.5~1 mm / s, ensuring that at least one scanning data point is obtained per square millimeter of the sample surface, achieving coverage without blind spots. The rotation of the turntable achieves circumferential scanning of the sample, while the radial movement achieves full coverage from the center to the edge. The two work together to form a "spiral" scanning path, avoiding scanning blind spots. A dual-channel detector (signal channel SIG, reference channel REF) is used to capture the signal. The signal channel receives the elliptically polarized light after penetrating the sample, while the reference channel receives the original linearly polarized light. By comparing the intensity of the two, errors caused by fluctuations in the laser source itself are eliminated. The intensity of the captured depolarized light is quantified in "depolarization units (DU)," ranging from -2DU to 2DU. The larger the absolute value of the DU value, the more obvious the stress inside the sample.

[0066] Specifically, based on the captured depolarized light intensity data and combined with the sample parameters of the wafer sample to be tested, the stress magnitude and distribution pattern inside the sample are deduced through the signal processing module, and finally an intuitive stress distribution map is generated.

[0067] The sample parameters include: sample thickness (800~1200μm), crystal orientation (…). <100> Surface smoothness (GBIR / TTV 0.3~3μm) and other parameters are used to correct the quantitative calculation of the photoelastic effect, that is, according to the photoelastic effect formula (Ein n1.2=π(d / λ) Δn, where d is the sample thickness, λ is the laser wavelength, and Δn is the refractive index difference caused by stress), can be used to accurately infer the stress magnitude by combining the sample parameters.

[0068] In one example, the signal processing includes: first, denoising the depolarized light intensity data (filtering out interference signals from minor scratches and cutting residues on the sample surface); then, correcting the stress direction according to the sample's crystal orientation (different crystal orientations of single-crystal silicon have different photoelastic coefficients); and finally, mapping the stress magnitude to its location information to generate a two-dimensional stress distribution map. The stress distribution map is presented as follows: stress intensity is represented by a color or grayscale gradient, where red (or dark gray) areas correspond to high stress anomaly areas (such as the first and second stress anomaly areas), and blue (or light gray) areas correspond to normal stress areas. The map also marks the sample's radial position (mm) and circumferential angle (°) to facilitate subsequent defect location.

[0069] See Figure 2 , Figure 2This is a schematic diagram of infrared laser transmission for wafer defect detection provided in an embodiment of this disclosure. The infrared laser transmission device includes: a laser emitter 10 for emitting infrared laser of a preset wavelength; and a polarizer 11 disposed above the laser emitter 10 for converting the infrared laser into linearly polarized infrared laser P. IN A precision turntable (not shown) is used to hold the wafer sample 100 to be tested and to move the sample by rotation (T) and radial movement (R). Linearly polarized infrared laser P... IN After penetrating vertically through the wafer sample 100 to be inspected, the light enters the inspection head, which consists of an objective lens 20, a phase retarder 21, and a dual-channel detector 22. The dual-channel detector 22 captures the depolarized light intensity signals of the vertical component P⊥ and the parallel component P||, respectively. Through the spiral scanning trajectory of the sample in the R coordinate (radial) and T coordinate (angle), the system can acquire stress information of the entire surface of the sample.

[0070] See Figure 3 , Figure 3 This is a schematic diagram illustrating the physical principle of wafer defect detection according to an embodiment of the present disclosure. The laser beam emitted is linearly polarized and enters the sample with an electric vector Ein. Due to the birefringence effect caused by the stress field inside the sample, the refractive indices n1 and n2 of the material in two perpendicular directions are not equal, resulting in a phase shift in the transmitted light. Phase shift The quantification formula is: Where d is the sample thickness, λ is the laser wavelength, and Δ n This represents the refractive index difference caused by stress. The beam of light passing through the sample is converted into elliptically polarized light and output as Eout. Finally, it is demodulated by the detector into P⊥ and P|| signals, thereby realizing the visualization of the internal stress field of the sample.

[0071] This embodiment utilizes a standardized scanning process and precise signal processing to achieve accurate visualization of the internal stress distribution of a rough, unpolished sample. The generated stress distribution map not only clearly shows the location, shape, and intensity of stress anomaly zones but also provides direct data support for subsequent defect type determination (stress-type defects, COP ring defects). Furthermore, it avoids the reliance on sample polishing in traditional testing, significantly improving testing efficiency.

[0072] In one embodiment of this disclosure, the defect type includes stress-type defects; determining the defect type of the wafer sample to be tested based on the stress distribution map includes: determining that the wafer sample to be tested has stress-type defects based on identifying a first stress anomaly region that is discrete or continuously distributed from the stress distribution map.

[0073] Specifically, stress-type defects are internal stress accumulation defects caused by factors such as uneven thermal field distribution, mechanical disturbance, and improper cooling rate during the semiconductor ingot pulling process. They can affect the electrical performance of the chip through lattice distortion, and in severe cases, lead to device failure. They are one of the key defect types affecting the yield of monocrystalline silicon products.

[0074] The identification criteria for the first stress anomaly zone are as follows: the first stress anomaly zone is a region in the stress distribution map that shows a significant signal difference from the normal stress region. Its core criterion is the depolarization intensity (unit: DU). When the absolute value of the depolarization intensity in a certain region exceeds the normal range (usually ±0.5 DU) and exhibits discrete or continuous distribution characteristics, it can be identified as the first stress anomaly zone. The formation of this anomaly zone originates from the material birefringence effect caused by stress, which conforms to the photoelastic effect principle: when stress exists inside a material, the refractive index changes, and depolarization occurs after linearly polarized infrared laser penetrates. The more concentrated the stress, the more significant the depolarization intensity signal.

[0075] In one example, the determination process includes: filtering out regions with abnormal depolarization intensity through a signal processing module; if the abnormal region exhibits discrete or continuous distribution characteristics, it can be determined that the wafer sample to be tested has stress-type defects, without relying on sample polishing or high-cleanliness treatment.

[0076] By applying this embodiment, the visualization analysis of stress distribution maps makes the identification of stress-type defects more intuitive and accurate, laying the foundation for subsequent defect subdivision and process adjustment.

[0077] In one embodiment of this disclosure, stress-type defects include stress point defects, stress line defects, uniaxial stress defects, and biaxial stress defects. Based on identifying discrete or continuously distributed first stress anomaly regions from the stress distribution map, it is determined that the wafer sample to be inspected has stress-type defects, including four determination scenarios.

[0078] The first scenario for determining stress point defects is: if discrete point-like first stress anomaly areas appear in the stress distribution map, then it is determined that the wafer sample to be tested has stress point defects.

[0079] For example, if discrete point-like first stress anomaly regions appear in the stress distribution map, and the diameter of each point-like anomaly region ranges from 2 to 5 mm, and the absolute value of the depolarization intensity is 1 to 1.5 DU, then it is determined that the wafer sample under test has stress point defects. This type of defect is the most common stress-type defect in semiconductor wafers, mostly caused by local thermal disturbances or material impurity accumulation. Its discrete distribution characteristics can be accurately captured by high-resolution signals from infrared laser transmission scanning.

[0080] The second scenario is the determination of stress line defects: if a continuous linear first stress anomaly area appears in the stress distribution map, then it is determined that the wafer sample to be tested has stress line defects.

[0081] For example, if a continuous linear first stress anomaly region appears in the stress distribution map, and the length of the linear anomaly region is ≥5mm, the width is ≤1mm, and the absolute value of the depolarization intensity is 1.5~2DU, then it is determined that the wafer sample under test has a stress line defect. This type of defect is usually caused by mechanical vibration or uneven cooling during the crystal pulling process, and its continuous extension shape presents a clear linear signal trajectory in the stress distribution map.

[0082] See Figure 4 If isolated, bright, or color-abrupt abnormal points appear in the stress distribution diagram (such as abnormal point 111 or abnormal point 112), they are determined to be point defects; if continuous and directional linear trajectories appear (such as abnormal trajectory 121 or abnormal trajectory 122), they are determined to be line defects.

[0083] The third scenario is for determining uniaxial stress defects: if a continuous first stress anomaly zone distributed along a single direction appears in the stress distribution diagram, then it is determined that the wafer sample to be tested has a uniaxial stress defect.

[0084] For example, if a continuous first stress anomaly region appears in the stress distribution map along a single direction (such as radial or tangential), and this anomaly region covers a part or all of the sample and the depolarization intensity is uniformly distributed (fluctuation range ≤ ±0.2DU), then it is determined that the wafer sample under test has a uniaxial stress defect. The main cause of this type of defect is the asymmetric thermal field distribution, which leads to stress concentration along a single direction.

[0085] See Figure 5 In the stress diagram, uniaxial stress defect 210 appears as a wide stress zone extending along a single axis.

[0086] The fourth determination scenario is the determination scenario of biaxial stress defects: if the stress distribution map shows superimposed first stress anomaly areas distributed along two intersecting directions, then it is determined that the wafer sample to be tested has biaxial stress defects.

[0087] For example, if a superimposed first stress anomaly region appears in the stress distribution map along two intersecting directions (such as radial and tangential intersections with an angle of approximately 90°), and the depolarization intensity of the superimposed region is 1.2 to 1.5 times that of the single-direction anomaly region, then it is determined that the wafer sample under test has a biaxial stress defect. This type of defect is mostly caused by fluctuations in crystal pulling speed or instability at the solid-liquid interface, and the superimposed stress signal characteristics can be accurately identified through signal comparison using a dual-channel detector.

[0088] See Figure 6Biaxial stress defect 220 is characterized by stress superposition in two intersecting directions (such as tangential and radial).

[0089] By applying this embodiment, stress-type defects are subdivided into four specific types, and the characteristics of the first stress anomaly zone (morphology, size, depolarization intensity) corresponding to each type are clearly defined, making defect judgment more accurate and detailed. At the same time, the subdivided defect types can be directly correlated with different sources of internal stress, providing a clear basis for subsequent targeted process adjustments and avoiding the blindness of process adjustments caused by general judgments.

[0090] In one embodiment of this disclosure, determining process parameter adjustment instructions for the semiconductor ingot growth process based on the defect type includes: Based on the stress distribution map, characteristic parameters of the first stress anomaly region are extracted; The source of internal stress in the first stress anomaly zone is determined based on characteristic parameters; Based on the source of internal stress, process parameter adjustment instructions are generated for semiconductor ingot growth processes.

[0091] For example, the characteristic parameters of the first stress anomaly region include morphological parameters, location and extent parameters, intensity parameters, and orientation parameters. The morphological parameter refers to the geometric shape of the first stress anomaly region (e.g., point-like, line-like, continuous in a single direction, or superimposed in two directions), corresponding to the specific type of stress-type defect. The location and extent parameters refer to the distribution area of ​​the anomaly region on the sample (central region, edge region, full region), its extension length (linear defects), and the angle of intersection (biaxial stress defects). The intensity parameter refers to the absolute value and fluctuation range of the depolarization intensity of the anomaly region, directly reflecting the magnitude of the internal stress. The orientation parameter refers to the principal direction of stress (single direction for uniaxial stress, two intersecting directions for biaxial stress), determined based on the signal analysis results after crystal orientation correction.

[0092] For example, combining the characteristic parameters with the process logic of Czochralski crystal growth, the correspondence between the source of internal stress and the characteristic parameters includes: if the characteristic parameter is "discrete point-like, depolarization intensity 1~1.5DU, irregular distribution", then the source of internal stress is local thermal disturbance or raw material impurity accumulation; if the characteristic parameter is "continuous line-like, distributed along the edge of the sample, depolarization intensity 1.5~2DU", then the source of internal stress is mechanical vibration or uneven cooling during crystal pulling; if the characteristic parameter is "continuous in one direction, uniform depolarization intensity, covering a large area", then the source of internal stress is asymmetrical thermal field distribution; if the characteristic parameter is "bidirectional superposition, superimposed and enhanced depolarization intensity, with an intersection angle of about 90°", then the source of internal stress is crystal pulling speed fluctuation or instability of the solid-liquid interface.

[0093] In one example, based on the source of internal stress, the generated process parameter adjustment instructions directly target the core control parameters for ingot growth. The specific correspondence includes: For "local thermal disturbance or raw material impurity accumulation": adjust the instructions to optimize the raw material screening criteria, and at the same time fine-tune the local power of the heating elements in the hot zone to reduce local temperature fluctuations; To address "mechanical vibration or uneven cooling": adjust the command to reduce the crystal rod rotation speed (e.g., from 15 r / min to 12 r / min), optimize the airflow distribution of the cooling system, and alleviate uneven cooling; To address "asymmetrical heat field distribution": Adjust the command to correct the power distribution of the heating elements in the heat field (e.g., correct the power deviation from ±5% to ±2%) to ensure uniformity of the heat field; To address "crystal pulling speed fluctuations or unstable solid-liquid interface": adjust the instruction to stabilize the fluctuation range of the crystal pulling speed (e.g., control the fluctuation range ≤ ±0.1 mm / min), optimize the thermal field temperature gradient, and stabilize the solid-liquid interface state.

[0094] By applying this embodiment, a complete logical closed loop of "characteristic parameters → internal stress source → process adjustment command" is established, realizing the precision and targeting of process adjustment. The parameters involved in the adjustment command are all core controllable parameters for crystal ingot growth. No new equipment or processes are required, and it can be directly implemented on the existing production line. Combined with the advantage of pre-defect detection (2-day detection cycle), process adjustment can be completed before the next batch of crystal ingots is pulled, avoiding the scrapping of crystal ingots due to feedback lag in the traditional process, and significantly reducing production costs.

[0095] In one embodiment of this disclosure, the defect type includes crystal native particle ring defects. Determining the defect type of the wafer sample to be inspected based on the stress distribution map includes: Based on the identification of the second stress anomaly region, which is distributed in a concentric ring shape, from the stress distribution map, it is determined that the wafer sample under test has a crystal native particle ring defect. The second stress anomaly region corresponds to the change in the shear stress field inside the wafer sample under test. The shear stress field is formed by lattice distortion caused by the aggregation of lattice vacancies.

[0096] Specifically, the crystal native particle ring (COP ring) defect is a high-density accumulation region of vacancy-type point defects formed during the growth of a single-crystal silicon ingot. It manifests as a ring-shaped micro-void structure and is one of the most intolerable anomalies for wafer fabs and end customers. This defect can lead to photolithography stacking problems during chip manufacturing, severely affecting chip patterning accuracy and ultimately causing device failure, fatally impacting product yield. The essence of the COP ring defect is the oversaturation and accumulation of lattice vacancies. A large accumulation of vacancies induces local lattice distortion, causing the crystal structure in this region to change from optical isotropic to anisotropic, thereby generating a shear stress field. When linearly polarized infrared laser penetrates this region, the shear stress field causes the laser to depolarize, forming a characteristic second stress anomaly region on the stress distribution map. Its signal intensity (depolarization intensity) is uniform and has clear boundaries, which is the core basis for identifying COP ring defects.

[0097] The second stress anomaly zone is distributed in a concentric ring shape in the stress distribution map, coaxial with the center of the sample; the absolute value of the depolarization intensity is usually 1~2DU, with a fluctuation range of ≤±0.1DU, and the signal stability is strong; the width of the ring region along the radial direction of the sample is 5~15mm, and the specific width is positively correlated with the vacancy aggregation density. The denser the vacancy aggregation, the wider the ring width.

[0098] In one example, the determination process for COP Ring defects includes: filtering out abnormal signal regions with concentric ring distribution through a signal processing module; if the depolarization intensity and distribution morphology of this region conform to the characteristics of the second stress anomaly region mentioned above, and the corresponding shear stress field change is consistent with the lattice distortion law caused by lattice vacancy aggregation, then it can be determined that the wafer sample under test has a crystal native particle ring defect. Unlike traditional particle counters, there is no need to perform multiple cleaning and polishing processes on the sample; accurate determination can be completed directly based on the stress signal within the sample.

[0099] See Figure 7 Using the wafer defect detection method provided in this disclosure, concentrically distributed COP Ring defects 300 can be clearly detected on unpolished, rough wafers. For comparison, see [link to relevant documentation]. Figure 8 If a particle counter is used for detection, the sample must be processed to a mirror-polished state to detect COP Ring defect 300. By advancing wafer defect detection, the complex sample refining process is eliminated, enabling more efficient identification of COP problems and timely adjustments to the growth process.

[0100] This embodiment clarifies the core criteria and formation mechanism of crystal native particle ring defects, breaking through the stringent limitations of traditional testing on sample surface cleanliness and polishing status. By utilizing the volume transmission characteristics of infrared laser transmission technology, direct detection of rough, unpolished samples is achieved, ensuring accuracy in judgment and laying a technical foundation for pre-testing, thus avoiding significant losses caused by COP Ring defects flowing into downstream processes due to delayed detection.

[0101] In one embodiment of this disclosure, determining process parameter adjustment instructions for the semiconductor ingot growth process based on the defect type includes: Calculate the radius of the second stress anomaly zone and its width along the radial direction of the wafer sample to be tested; Based on the radius and width, determine the distribution characteristics of vacancy accumulation intensity corresponding to the second stress anomaly zone; Based on the distribution characteristics of vacancy aggregation intensity, process parameter adjustment instructions are generated for semiconductor ingot growth processes.

[0102] Specifically, based on the stress distribution map, the geometric parameters of the second stress anomaly zone, namely the radius position and the radial width, are accurately extracted through the image analysis module built into the device.

[0103] The radius position refers to the distance (in mm) from the center of the concentric annular second stress anomaly zone to the inner edge of the ring, i.e., the radial distribution position of the annular defect on the sample. This parameter is calculated by identifying the starting boundary coordinates of the anomaly signal in the stress distribution map, with a measurement accuracy of ±0.1 mm. The radial width refers to the distance (in mm) from the inner edge to the outer edge of the annular second stress anomaly zone, calculated by the difference between the ending boundary coordinates and the starting boundary coordinates of the anomaly signal. This width is directly related to the vacancy aggregation density; the denser the vacancy aggregation, the larger the radial width, typically ranging from 5 to 15 mm.

[0104] During the calculation process, the diameter of the sample (approximately 300mm) and its crystal orientation must be considered. <100> Parameters such as these are used to correct coordinate deviations, ensuring the accuracy of parameter measurements and providing a reliable data foundation for subsequent vacancy accumulation intensity analysis.

[0105] In one example, based on the calculated radius and radial width, the distribution characteristics of vacancy aggregation intensity corresponding to the second stress anomaly zone can be inferred through a preset quantization model.

[0106] The correspondence includes the relationship between the radius position and the vacancy accumulation region: different radius positions correspond to different solid-liquid interface positions during crystal growth, and the offset of the radius position reflects the fluctuation of the thermal field distribution or crystal pulling speed during growth. For example, a larger radius position (closer to the edge of the sample) usually corresponds to vacancy accumulation on the outer side of the solid-liquid interface; a smaller radius position (closer to the center of the sample) corresponds to vacancy accumulation on the inner side of the solid-liquid interface.

[0107] The relationship between radial width and vacancy density: the larger the radial width, the higher the vacancy density in the region, the more severe the lattice distortion, and the greater the corresponding shear stress field intensity (the more significant the depolarization intensity signal); conversely, the smaller the radial width, the lower the vacancy density and the less severe the lattice distortion.

[0108] The final characteristics include "agglomeration areas (central area / middle area / edge area), agglomeration density level (high / medium / low), and distribution uniformity (uniform / non-uniform)," providing clear targets for process adjustments.

[0109] Specifically, the distribution characteristics of vacancy aggregation intensity are directly related to the crystal pulling speed (V) and thermal field temperature gradient (G) during the crystal rod growth process. The ratio of the two (V / G) is the core indicator for controlling the formation and aggregation of vacancy-type point defects.

[0110] In one example, the corresponding relationship is as follows: if the vacancy aggregation intensity is high, the radial width is large and it is distributed in the middle region of the sample, it indicates that the V / G ratio is too high, resulting in vacancy oversaturation aggregation. The adjustment instruction indicates to reduce the crystal pulling speed (e.g., from 0.8 mm / min to 0.6 mm / min), while appropriately increasing the thermal field temperature gradient to optimize the V / G ratio to below the critical value.

[0111] If the vacancy aggregation intensity is moderate, the radial width is moderate, and it is distributed in the edge area of ​​the sample, it indicates that the temperature gradient distribution of the thermal field is uneven. The adjustment command indicates that the power distribution of the heating element in the thermal field should be corrected so that the temperature gradient is evenly distributed in the radial direction. At the same time, the stability of the crystal pulling speed should be finely adjusted (controlling the fluctuation range ≤ ±0.1 mm / min).

[0112] If the vacancy aggregation intensity is low, the radial width is small, and the distribution is uneven, it indicates that there are local fluctuations in the crystal pulling speed. Adjust the command to optimize the closed-loop control parameters of the crystal pulling speed, reduce speed fluctuations, and maintain the stability of the thermal field temperature gradient.

[0113] The goal of adjusting the instructions is to reduce the generation of lattice vacancies and oversaturation aggregation by optimizing the crystal pulling speed or thermal field temperature gradient, thereby suppressing the formation of COP Ring defects from the source and avoiding abnormal flow to the back end, which would cause cost waste.

[0114] By applying this embodiment, a complete logical closed loop of "geometric parameters → aggregation characteristics → process adjustment" can be established, making the process adjustment corresponding to COP Ring defects more precise and feasible. The crystal pulling speed and thermal temperature gradient involved in the adjustment instructions are core controllable parameters for crystal rod growth. No new equipment or processes are required, and they can be directly applied to existing production lines. Combined with the advantage of pre-detection (2-day detection cycle), process adjustment can be completed before pulling the next batch of crystal rods, avoiding the scrapping of crystal rods due to feedback lag in traditional processes, and significantly reducing production costs.

[0115] See Figure 9 , Figure 9 This is a logical diagram illustrating the wafer defect detection cycle provided in an embodiment of the present disclosure.

[0116] First, step S901 is executed to perform sample testing; if step S902 determines that the product test is passed (OK), then proceed directly to step S906 to execute the release command; if the product test fails (NG), proceed to step S903 to perform anomaly classification: if it is determined to be a process anomaly, proceed to step S904 to generate a process / development plan debugging command, adjust the crystal pulling parameters, and then backtrack production; if it is determined to be a localized intermittent defect in the sample, proceed to step S906 to execute the rework pass logic; if it is determined to be an irreparable serious quality problem, proceed to step S905 to execute the product scrap command, and finally complete the scrapping process in step S907.

[0117] See Figure 10 , Figure 10 This diagram compares the original and new process flows provided in the embodiments of this disclosure. Traditional process flow (left): It includes more than twenty steps, starting from band saw cutting S1001 and IE1 sampling S1002, followed by wire saw cutting S1003, edge grinding / chamfering S1004, IE2 sampling S1005, grinding S1006, chemical etching S1007, double-sided fine grinding S1009, double-sided polishing S1012, and finally finished product inspection S1017. The particle counter defect detection is located at the very end of the process, in step S1020, with a detection cycle of up to 15 days.

[0118] New process flow (right): After band saw cutting S1001' and IE1 sampling S1002', only basic pretreatments are performed, including chamfering S1003', positioning and marking grinding S1004', laser marking S1005', simple chemical etching S1006', and edge defect inspection S1007'. The core improvement lies in significantly advancing the infrared depolarization defect detection to step S1012'. By directly inspecting the unpolished sample with a rough cut surface, the feedback cycle is shortened to less than 2 days.

[0119] See Figure 11 , Figure 11This is a comparison chart of the process test results of the original flow and the new flow provided in the embodiments of this disclosure. The image on the left shows the test results of the original flow, and the image on the right shows the test results of the new flow. The experimental results show that although the samples used in the new flow have not undergone complex refining processes, due to the characteristic of using infrared lasers to penetrate the material and detect internal stress (this characteristic has lower requirements for surface flatness and cleanliness), the stress distribution map and defect judgment conclusions generated by the new flow are highly consistent with those of the original flow.

[0120] This comparative result strongly supports the feasibility of pre-emptive wafer defect detection, proving that it can significantly shorten the feedback cycle while ensuring the accuracy and reliability of the detection results.

[0121] and Figure 1 Corresponding to the method embodiments shown, this disclosure also provides embodiments of a defect detection device for semiconductor ingot growth processes. Figure 12 This is a schematic diagram of the composition of a defect detection device for a semiconductor ingot growth process provided in this disclosure. Figure 12 As shown, the defect detection device 1200 for semiconductor ingot growth process includes: Cutting module 1202: configured to cut a wafer sample to be tested from a grown semiconductor ingot, wherein the wafer sample to be tested has a rough surface formed by the cutting process and has not been polished.

[0122] Detection module 1204: is configured to use infrared laser to transmit through the wafer sample to be inspected, and determine the defect type of the wafer sample to be inspected based on the depolarization state of the transmitted beam.

[0123] Adjustment module 1206: is configured to generate process parameter adjustment instructions for semiconductor ingot growth process based on defect type.

[0124] In one embodiment, the interception module 1202 is further configured to: After the semiconductor crystal rod is grown, it enters the sampling and evaluation stage before processing. The semiconductor crystal rod is cut using a sawing tool to obtain the wafer sample to be tested.

[0125] In one embodiment, the detection module 1204 is further configured to: By using infrared laser to transmit through a wafer sample to be inspected, a stress distribution map inside the wafer sample is generated based on the depolarization state of the transmitted beam. Based on the stress distribution map, the defect type of the wafer sample to be tested is determined.

[0126] In one embodiment, the detection module 1204 is further configured to: Place the wafer sample to be tested on a precision turntable; A linearly polarized infrared laser of a preset wavelength is emitted from below the wafer sample to be tested, and the linearly polarized infrared laser penetrates the wafer sample vertically. The wafer sample to be inspected is rotated, and the entire surface of the wafer sample is scanned based on linearly polarized infrared laser, and the intensity of the depolarized light of the transmitted beam is captured. A stress distribution map is generated based on the depolarized light intensity and the sample parameters of the wafer sample to be tested.

[0127] In one embodiment, the defect type includes stress-type defects; the detection module 1204 is further configured to: Based on the identification of discrete or continuous first stress anomaly regions from the stress distribution map, it is determined that there are stress-type defects in the wafer sample to be tested.

[0128] In one embodiment, stress-type defects include stress point defects, stress line defects, uniaxial stress defects, and biaxial stress defects; the detection module 1204 is further configured to: If discrete point-like first stress anomaly areas appear in the stress distribution diagram, it is determined that there are stress point defects in the wafer sample to be tested. If a continuous linear first stress anomaly zone appears in the stress distribution diagram, it is determined that the wafer sample to be tested has a stress line defect. If a continuous first stress anomaly zone distributed along a single direction appears in the stress distribution diagram, it is determined that the wafer sample to be tested has a uniaxial stress defect. If a superimposed first stress anomaly region distributed along two intersecting directions appears in the stress distribution diagram, it is determined that the wafer sample to be tested has a biaxial stress defect.

[0129] In one embodiment, the adjustment module 1206 is further configured to: Based on the stress distribution map, characteristic parameters of the first stress anomaly region are extracted; The source of internal stress in the first stress anomaly zone is determined based on characteristic parameters; Based on the source of internal stress, process parameter adjustment instructions are generated for semiconductor ingot growth processes.

[0130] In one embodiment, the defect type includes crystal native particle ring defects; the detection module 1204 is further configured to: Based on the identification of the second stress anomaly region, which is distributed in a concentric ring shape, from the stress distribution map, it is determined that the wafer sample under test has a crystal native particle ring defect. The second stress anomaly region corresponds to the change in the shear stress field inside the wafer sample under test. The shear stress field is formed by lattice distortion caused by the aggregation of lattice vacancies.

[0131] In one embodiment, the adjustment module 1206 is further configured to: Calculate the radius of the second stress anomaly zone and its width along the radial direction of the wafer sample to be tested; Based on the radius and width, determine the distribution characteristics of vacancy accumulation intensity corresponding to the second stress anomaly zone; Based on the distribution characteristics of vacancy aggregation intensity, process parameter adjustment instructions are generated for semiconductor ingot growth processes.

[0132] The above is a schematic scheme of a defect detection device for a semiconductor ingot growth process provided in this disclosure. The technical solution of this defect detection device for a semiconductor ingot growth process belongs to the same concept as the technical solution of the defect detection method for a semiconductor ingot growth process described above. For details not described in detail in the technical solution of the defect detection device for a semiconductor ingot growth process, please refer to the description of the technical solution of the defect detection method for a semiconductor ingot growth process described above.

[0133] Please refer to Figure 13 , Figure 13 This is a structural block diagram of a computing device provided in this disclosure. In some examples, the computing device 130 can be at least one of a smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. The computing device 130 has communication functions and can access a wired or wireless network. The computing device 130 can refer to one of multiple terminals, and those skilled in the art will understand that the number of such terminals can be more or less. In some examples, the computing device 130 can receive data based on the accessed wired or wireless network. It is understood that the computing device 130 undertakes the calculation and processing work of the technical solution of this disclosure, and this disclosure does not limit it in this respect.

[0134] like Figure 13 As shown, the computing device in this disclosure may include one or more of the following components: processor 1310 and memory 1320.

[0135] Optionally, the processor 1310 connects various parts within the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 1320, and by calling data stored in the memory 1320. Optionally, the processor 1310 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 1310 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required to be displayed on the touch screen; the NPU is used to implement Artificial Intelligence (AI) functions; and the baseband chip is used to handle wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 1310, but may be implemented using a separate chip.

[0136] The memory 1320 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 1320 may include a non-transitory computer-readable storage medium. The memory 1320 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 1320 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0137] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, Wi-Fi module, power supply, Bluetooth module, etc., which will not be described in detail here.

[0138] This disclosure also provides a computer-readable storage medium storing at least one instruction, which is executed by a processor to implement the defect detection method for the semiconductor ingot growth process described in the above embodiments.

[0139] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform a defect detection method for the semiconductor ingot growth process described in the above embodiments.

[0140] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.

[0141] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.

[0142] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A defect detection method for a semiconductor crystal rod growth process, characterized in that, include: A wafer sample to be tested is cut from a grown semiconductor ingot, wherein the wafer sample to be tested has a rough surface formed by the cutting process and has not been polished. The defect type of the wafer sample to be tested is determined based on the depolarization state of the transmitted beam by using infrared laser transmission. Based on the defect type, process parameter adjustment instructions are generated for the semiconductor ingot growth process.

2. The defect detection method for semiconductor ingot growth process according to claim 1, characterized in that, The process of cutting a wafer sample to be tested from a grown semiconductor ingot includes: After the semiconductor crystal rod is grown, in the sampling and evaluation stage before processing, the semiconductor crystal rod is cut using a sawing tool to obtain the wafer sample to be tested.

3. The defect detection method for semiconductor ingot growth process according to claim 1, characterized in that, The method of using infrared laser light to transmit through the wafer sample to be inspected, and determining the defect type of the wafer sample based on the depolarization state of the transmitted beam, includes: By using infrared laser to transmit through the wafer sample to be tested, a stress distribution map inside the wafer sample to be tested is generated based on the depolarization state of the transmitted beam. Based on the stress distribution map, the defect type of the wafer sample to be tested is determined.

4. The defect detection method for semiconductor ingot growth process according to claim 3, characterized in that, The process of using infrared laser light to transmit through the wafer sample to be inspected, and generating a stress distribution map inside the wafer sample based on the depolarization state of the transmitted beam, includes: The wafer sample to be tested is placed on a precision turntable; A linearly polarized infrared laser of a preset wavelength is emitted from below the wafer sample to be tested, and the linearly polarized infrared laser penetrates the wafer sample to be tested perpendicularly. The wafer sample to be tested is rotated, and the entire surface of the wafer sample is scanned based on the linearly polarized infrared laser, and the depolarized light intensity of the transmitted beam is captured. The stress distribution map is generated based on the depolarized light intensity and the sample parameters of the wafer sample to be tested.

5. The defect detection method for semiconductor ingot growth process according to claim 3, characterized in that, The defect types include stress-type defects; The step of determining the defect type of the wafer sample to be inspected based on the stress distribution map includes: Based on the identification of discrete or continuously distributed first stress anomaly regions from the stress distribution map, it is determined that the wafer sample to be tested has stress-type defects.

6. The defect detection method for semiconductor ingot growth process according to claim 5, characterized in that, The stress-type defects include stress point defects, stress line defects, uniaxial stress defects, and biaxial stress defects; The step of determining that the wafer sample to be tested has stress-type defects based on identifying discrete or continuous first stress anomaly regions from the stress distribution map includes: If discrete point-like first stress anomaly areas appear in the stress distribution map, it is determined that the wafer sample to be tested has the stress point-like defect. If a continuous linear first stress anomaly region appears in the stress distribution diagram, it is determined that the wafer sample to be tested has the stress line defect. If a continuous first stress anomaly region distributed along a single direction appears in the stress distribution diagram, it is determined that the wafer sample to be tested has the uniaxial stress defect. If the stress distribution map shows superimposed first stress anomaly regions distributed along two intersecting directions, then it is determined that the wafer sample to be tested has the biaxial stress defect.

7. The defect detection method for semiconductor ingot growth process according to claim 5, characterized in that, The step of determining the process parameter adjustment instructions for the semiconductor ingot growth process based on the defect type includes: Based on the stress distribution map, the characteristic parameters of the first stress anomaly region are extracted; The source of internal stress in the first stress anomaly zone is determined based on the characteristic parameters. Based on the source of the internal stress, process parameter adjustment instructions are generated for the semiconductor ingot growth process.

8. The defect detection method for semiconductor ingot growth process according to claim 3, characterized in that, The defect types include crystal native particle ring defects; The step of determining the defect type of the wafer sample to be inspected based on the stress distribution map includes: Based on the identification of a second stress anomaly region with a concentric ring distribution from the stress distribution map, it is determined that the wafer sample to be tested has a crystal native particle ring defect. The second stress anomaly region corresponds to the change in the shear stress field inside the wafer sample to be tested, and the shear stress field is formed by lattice distortion caused by the aggregation of lattice vacancies.

9. The defect detection method for semiconductor ingot growth process according to claim 8, characterized in that, The step of determining the process parameter adjustment instructions for the semiconductor ingot growth process based on the defect type includes: Calculate the radius of the second stress anomaly zone and its width along the radial direction of the wafer sample to be tested; Based on the radius and the width, determine the vacancy accumulation intensity distribution characteristics corresponding to the second stress anomaly zone; Based on the vacancy aggregation intensity distribution characteristics, process parameter adjustment instructions are generated for the semiconductor ingot growth process.

10. A defect detection device for a semiconductor crystal rod growth process, characterized in that, include: The cutting module is configured to cut a wafer sample to be tested from a grown semiconductor ingot, wherein the wafer sample to be tested has a rough surface formed by the cutting process and has not been polished. The detection module is configured to use infrared laser to transmit through the wafer sample to be inspected, and determine the defect type of the wafer sample to be inspected based on the depolarization state of the transmitted beam. The adjustment module is configured to generate process parameter adjustment instructions for the semiconductor ingot growth process based on the defect type.

11. A computing device, characterized in that, include: Memory, used to store executable instructions; A processor, when executing executable instructions stored in the memory, implements the defect detection method for the semiconductor ingot growth process as described in any one of claims 1-9.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the defect detection method for the semiconductor ingot growth process as described in any one of claims 1-9.

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