Methods, apparatus, computing devices, storage media, and computer program products for controlling a chip system in a vehicle to perform IST

Abstract

Embodiments of the present application provide a method for controlling a chip system in a vehicle to perform an in-system test, the vehicle comprising an engine, the method comprising: in response to the vehicle receiving a first signal indicating that the engine is transitioning from a running state to a stopped state, the chip system performing a first in-system test and storing a first test result after performing the first in-system test, the first test result comprising identification information indicating whether the first in-system test is performed and first result information representing a test result of the first in-system test; and in response to the vehicle receiving a second signal indicating that the engine is transitioning from the stopped state to the running state, determining whether the chip system performs a second in-system test based on the first test result.

Description

Technical Field

[0001] This application relates to the field of vehicle control technology, and in particular to a method, apparatus, computing device, computer-readable storage medium, and computer program product for controlling a chip system in a vehicle to perform in-system test (IST). Background Technology

[0002] With the development and widespread application of artificial intelligence technology, vehicles such as automobiles are gradually acquiring increasingly advanced intelligent driving capabilities. Correspondingly, the electronic systems in these vehicles typically include system-on-a-chip (SoC). An SoC integrates multiple system components, such as one or more central processing units (CPUs), graphics processing units (GPUs), signal processors (DSPs), as well as memory and various interfaces, enabling complex system functions to be implemented on a single chip. SoCs are commonly used in applications requiring high-performance computing and processing capabilities, such as in-vehicle infotainment systems, advanced driver assistance systems (ADAS), and autonomous driving systems.

[0003] The System-on-a-Chip (SoC) possesses a self-testing function, meaning that the SoC can perform an In-System Test (IST) upon request from external commands. IST is crucial for ensuring the safety, reliability, and performance of vehicle electronic systems. It uses a series of self-test programs built into the SoC to detect and respond to potential hardware failures, thereby ensuring the safe operation of the vehicle. Generally, the SoC's IST function is triggered when the vehicle's engine starts running and when it transitions from running to a stopped state, putting the SoC into IST mode. Executing IST requires a reset and restart of the SoC; that is, the SoC needs to undergo a power-off and power-on process before it can begin executing IST. Furthermore, each execution of IST takes a certain amount of time. Therefore, frequent triggering of the SoC's IST can lead to reduced vehicle startup efficiency, higher energy consumption, and a less than ideal user experience. Summary of the Invention

[0004] This application provides a method for controlling a chip system in a vehicle to perform in-system testing, the vehicle including an engine. The method includes: in response to the vehicle receiving a first signal indicating that the engine transitions from a running state to a stopped state, the chip system performs a first in-system test and stores a first test result after performing the first in-system test, the first test result including identification information indicating whether the first in-system test was performed and first result information characterizing the test result of the first in-system test; and in response to the vehicle receiving a second signal indicating that the engine transitions from a stopped state to a running state, determining whether the chip system performs a second in-system test based on the first test result.

[0005] In some embodiments, determining whether the chip system performs a second in-system test based on the first test result in response to the vehicle receiving a second signal indicating that the engine has changed from a stopped state to a running state includes: the chip system performing a second in-system test in response to the identification information indicating that the first in-system test has not been performed; and determining whether the first in-system test has passed based on the first result information in response to the identification information indicating that the first in-system test has been performed.

[0006] In some embodiments, the method further includes: the chip system entering a normal operation mode in response to a successful test within the second system; and the chip system entering a shutdown mode in response to a failed test within the second system.

[0007] In some embodiments, the step of determining whether the chip system performs a second in-system test based on the first test result in response to the vehicle receiving a second signal indicating that the engine has changed from a stopped state to an operating state further includes: the chip system entering a normal operating mode in response to determining that the first in-system test has passed; and the chip system performing the second in-system test in response to determining that the first in-system test has failed.

[0008] In some embodiments, the step of determining whether the chip system performs a second system-internal test based on the first test result in response to the vehicle receiving a second signal indicating that the engine is transitioning from a stopped state to a running state further includes: determining whether the chip system has performed a second system-internal test after the vehicle receives the second signal during the current driving cycle before the chip system performs the second system-internal test; in response to the chip system having performed the second system-internal test, the chip system enters a shutdown mode; in response to the chip system not having performed the second system-internal test, the chip system performs the second system-internal test.

[0009] In some embodiments, the method further includes: in response to the chip system failing to perform a first in-system test or a second in-system test for an extended period of time, or the vehicle failing to display a normal time after receiving the second signal, the chip system performs a second in-system test.

[0010] In some embodiments, the vehicle further includes a processor communicating with the chip system, the chip system storing the first result information, the processor including a storage unit for storing the identification information and the first result information, wherein the method further includes: in response to the identification information indicating that a test within the first system is executed, the processor obtaining the first result information from the chip system and storing the first result information in the storage unit; in response to the chip system returning the first result information to the processor, changing the value of the identification information.

[0011] In some embodiments, the processor is configured to perform a first reset when the vehicle receives the second signal, wherein the method further includes: in response to the processor performing a second reset different from the first reset, determining, based on the identification information, whether the chip system returns the first result information to the processor; in response to the chip system not returning the first result information to the processor, the processor obtaining the first result information from the chip system; in response to determining, based on the first result information, that the first system-internal test has passed, the chip system entering a normal operating mode; and in response to determining, based on the first result information, that the first system-internal test has failed, the chip system performing a second system-internal test.

[0012] In some embodiments, the method further includes: in response to the chip system returning the first result information to the processor, determining whether the processor has successfully obtained the first result information; in response to the processor successfully obtaining the first result information and determining that the test within the first system has passed based on the first result information, the chip system enters a normal operation mode; in response to determining that the test within the first system has failed based on the first result information, the chip system enters a shutdown mode.

[0013] In some embodiments, the method further includes: in response to the processor failing to acquire the first result information, the chip system performing a second in-system test; in response to the second in-system test passing, the chip system entering a normal operation mode; and in response to the second in-system test failing, the chip system entering a shutdown mode.

[0014] Another embodiment of this application provides an apparatus for controlling a chip system in a vehicle to perform in-system testing. The apparatus includes: an in-system test request module configured to, in response to the vehicle receiving a first signal indicating that the engine has transitioned from a running state to a stopped state, request the chip system to perform a first in-system test and obtain a first test result after performing the first in-system test, the first test result including identification information indicating whether the first in-system test was performed and first result information characterizing the test result of the first in-system test; and an in-system test re-execution determination module configured to, in response to the vehicle receiving a second signal indicating that the engine has transitioned from a stopped state to a running state, determine whether the chip system should perform a second in-system test based on the first test result.

[0015] Another embodiment of this application provides a computing device, including: a memory configured to store computer-executable instructions; and a processor configured to perform the method according to any of the foregoing method embodiments when the computer-executable instructions are executed by the processor.

[0016] In some embodiments, the computing device may include a vehicle domain controller.

[0017] Another embodiment of this application provides a computer program product, including a computer program that, when executed by a processor, implements the method described in any of the foregoing method embodiments.

[0018] Another embodiment of this application provides a computer-readable storage medium having computer-readable instructions stored thereon, which, when executed, implement the method described according to any of the foregoing method embodiments.

[0019] These and other advantages of this application will become clear from the embodiments described below, and will be illustrated with reference to the embodiments described below. Attached Figure Description

[0020] Embodiments of this application will now be described in more detail with reference to the accompanying drawings, wherein:

[0021] Figure 1 The illustration shows some steps involved in a method for controlling a chip system in a vehicle to perform an in-system test (IST) according to an embodiment of this application;

[0022] Figure 2 The illustration shows an example of a car receiving the first and second signals at different points in time.

[0023] Figure 3The illustration shows some steps involved in a method for performing in-system tests on a chip system in a vehicle according to another embodiment of this application;

[0024] Figure 4 The illustration shows some steps involved in a method for controlling a chip system in a vehicle to perform an in-system test (IST) according to another embodiment of this application;

[0025] Figure 5 The diagram illustrates the partial functional modules of the System-on-a-Chip (SoC) and the Microcontroller Unit (MCU), as well as the partial signal transmission between the SoC and the processor.

[0026] Figure 6 The diagram illustrates a schematic flow for performing an IST test within the system;

[0027] Figure 7 This example illustrates the IST execution program of the chip system when the processor experiences multiple resets under different circumstances. Detailed Implementation

[0028] The following description provides specific details of various embodiments of this application to enable those skilled in the art to fully understand and implement the various embodiments of this application. It should be understood that the technical solutions of this application can be implemented without some of these details. In some cases, this application does not show or describe in detail some well-known structures or functions to avoid such unnecessary descriptions obscuring the description of the embodiments of this application. The terminology used in this application should be understood in its broadest and most reasonable manner, even when used in connection with specific embodiments of this application.

[0029] The terminology used in this application should be understood in its broadest and most reasonable manner, even when used in conjunction with specific embodiments of this application. "Chip system" as used herein refers to a chip on which multiple functional modules are integrated, forming a chip system, i.e., a system-on-a-chip (SoC). "In-system test" as used herein refers to the self-test function of the chip system, used to ensure the functionality and performance of the chip system in a real-world operating environment. The terms "first in-system test" and "second in-system test" mentioned herein do not represent different types of in-system tests, but are merely used to distinguish in-system tests required to be performed by the chip system under different times or conditions. The essence of both "first in-system test" and "second in-system test" is the chip system performing its own self-test function. As will be specifically described below, "first in-system test" refers to the in-system test performed by the chip system when the vehicle receives the first signal indicating that its engine is transitioning from a running state to a stopped state; "second in-system test" refers to the in-system test required to be performed by the chip system under other conditions or at other times. The second in-system test can be understood as requiring the chip system to perform the in-system test again under other conditions or at other times.

[0030] This application provides a method for controlling a chip system in a vehicle to perform in-system testing (IST), the vehicle including an engine. For example... Figure 1 As shown, a method for controlling a chip system in a vehicle to perform in-system tests may include the following steps: S101, in response to the vehicle receiving a first signal indicating that the engine transitions from a running state to a stopped state, the chip system performs a first in-system test and stores a first test result after performing the first in-system test, the first test result including identification information indicating whether the first in-system test was performed and first result information characterizing the test result of the first in-system test; and S102, in response to the vehicle receiving a second signal indicating that the engine transitions from a stopped state to a running state, determining whether the chip system performs a second in-system test based on the first test result. It is understood that the vehicles mentioned herein may include various vehicles that travel on land, water, and air, and examples of vehicles include, but are not limited to, vehicles, ships, and airplanes.

[0031] The following uses a car as an example to illustrate a specific embodiment of a method for controlling a chip system in a vehicle to perform in-system tests.

[0032] Vehicles typically include engines, such as the electric motor in an electric car and the engine in a gasoline-powered car. When a car receives a first signal indicating that its engine is transitioning from an operating state to a stopped state, it means that the engine will gradually transition from its previous running state to a stopped state. This first signal can be triggered, for example, by user operation of the car, such as when the user turns off the ignition switch. Similarly, when a car receives a second signal indicating that its engine is transitioning from a stopped state to an operating state, it means that the engine will transition from its previous stopped state to an operating state. This second signal can also be triggered by user operation of the car, such as when the user turns on the ignition switch. Figure 2 The illustration shows an example of a car receiving a first signal Koff and a second signal Kon at different points in time. The time interval between two adjacent second signals Kon can be referred to as a driving cycle.

[0033] In an embodiment of this application, in step S101, when the vehicle receives a first signal Koff indicating that its engine has changed from a running state to a stopped state, the chip system on the vehicle performs a first in-system test. The first test result after performing the first in-system test can be stored in the chip system. The first test result includes identification information indicating whether the first in-system test was actually performed and first result information characterizing the test result of the first in-system test. In step S102, when the vehicle receives a second signal Kon indicating that its engine has changed from a stopped state to a running state, it determines whether the chip system should perform a second in-system test based on the aforementioned first test result; that is, it determines whether the chip system needs to perform the in-system test again. It is understood that if the first test result indicates that the first in-system test has been actually performed and it can be determined based on the first result information that the first in-system test has passed, the chip system may not be required to perform a second in-system test (i.e., the in-system test is not performed again), and instead, the chip system can enter normal operating mode.

[0034] Therefore, unlike conventional technologies, this application does not require the chip system to unconditionally perform in-system tests when the engine of a vehicle (e.g., an automobile) transitions from a stopped state to a running state. Instead, it determines whether the chip system needs to perform in-system tests again based on the results of the first test described above. This avoids unnecessary in-system tests, reduces the number of times the chip system performs in-system tests, improves the vehicle's startup efficiency, and enhances the user experience. Simultaneously, it also avoids energy consumption caused by unnecessary in-system tests.

[0035] According to another embodiment of this application, step S102 above—in response to the vehicle receiving a second signal indicating that the engine has changed from a stopped state to a running state, determining whether the chip system performs a second in-system test based on the first test result—may include the following steps: in response to the identification information indicating that the first in-system test has not been performed, the chip system performs the second in-system test; and in response to the identification information indicating that the first in-system test has been performed, determining whether the first in-system test has passed based on the first result information. Further, the method for controlling the chip system in a vehicle to perform an in-system test (IST) may further include: in response to the second in-system test passing, the chip system enters a normal operating mode; and in response to the second in-system test failing, the chip system enters a shutdown mode. In some embodiments, step S102 above—in response to the vehicle receiving a second signal indicating that the engine has changed from a stopped state to a running state, determining whether the chip system performs a second in-system test based on the first test result—may include the following steps: in response to determining that the first in-system test has passed, the chip system enters a normal operating mode; and in response to determining that the first in-system test has failed, the chip system performs the second in-system test. Furthermore, in some embodiments, step S102—in response to the vehicle receiving a second signal indicating that the engine is transitioning from a stopped state to a running state, determining whether the chip system performs a second system-internal test based on the first test result—may further include: before the chip system performs the second system-internal test, determining whether the chip system has performed the second system-internal test after the vehicle receives the second signal during the current driving cycle; in response to the chip system having performed the second system-internal test, the chip system enters a shutdown mode; in response to the chip system not having performed the second system-internal test, the chip system performs the second system-internal test.

[0036] It can be used with Figure 3 The method for controlling a chip system in a vehicle to perform in-system tests, as provided in the above embodiments, is further explained. For example... Figure 3As shown, step S301 is the same as step S101 described above. In response to the vehicle receiving a first signal indicating that the engine should change from a running state to a stopped state, the chip system performs a first in-system test and stores a first test result after performing the first in-system test. The first test result includes identification information indicating whether the first in-system test was performed and first result information characterizing the test result of the first in-system test. In step S302, it is determined whether the first in-system test was actually performed based on the identification information in the first test result. If it is determined that the first in-system test was not actually performed, step S303 allows the chip system to perform a second in-system test, that is, to perform the in-system test again. In step S304, it is determined whether the second in-system test passed based on the test result. If the second in-system test passed, step S305 allows the chip system to enter a normal operating mode. If the second in-system test failed, step S308 allows the chip system to enter a shutdown mode. In step S302, if it is determined from the identification information in the first test result that the first system-wide test has been actually performed, then in step S306, it is determined whether the first system-wide test has passed. If the first system-wide test passes, then in step S305, the chip system is allowed to enter normal operating mode. If the first system-wide test fails, the chip system can execute the second system-wide test, and correspondingly, in step S304, it can be determined whether the second system-wide test has passed. Figure 3 In the example, before requesting or requiring the chip system to perform a second in-system test, step S307 is included: determining whether the chip system has already performed a second in-system test after the vehicle receives the second signal during the current driving cycle. If it is determined that the chip system has already performed a second in-system test, it indicates that the previously performed second in-system test failed, and the chip system enters a shutdown mode. If the chip system has not yet performed a second in-system test, it performs the second in-system test. This avoids the chip system from meaninglessly repeating in-system tests, while ensuring that the chip system is only put into actual operation when its performance is normal.

[0037] Figure 4 The illustration depicts a method for performing in-system testing (IST) on a chip system in a vehicle, according to another embodiment of this application. For example... Figure 4As shown, in this embodiment, steps S401 and S402 are the same as the aforementioned steps S101 and S102, respectively. The difference lies in that the method for controlling the chip system in a vehicle to perform in-system testing further includes step S403: in response to the chip system failing to perform a first or second in-system test for an extended period of time, or the vehicle failing to display a normal time after receiving the second signal, the chip system performs a second in-system test. That is, if the chip system fails to perform any in-system test for an extended period of time, or if the vehicle fails to display a normal time after receiving the aforementioned second signal Kon indicating that its engine has transitioned from a stopped state to a running state, the chip system performs an in-system test after the vehicle receives the second signal Kon. The aforementioned threshold time is set or changed; for example, the threshold time can be 180 days. This facilitates timely monitoring of chip system performance changes, further ensuring that the chip system is put into actual operation with good performance.

[0038] In some embodiments, the vehicle further includes a processor that communicates with the chip system, the chip system being able to store the aforementioned first result information, and the processor including a storage unit for storing the aforementioned identification information and the first result information. Figure 5 The diagram illustrates the partial functional modules of the System-on-a-Chip (SoC) and the Microcontroller-on-MCU, as well as the partial signal transmission between the SoC and the processor. For example... Figure 5 As shown, the System-on-a-Chip (SoC) includes an In-System Test (IST) client, and the processor MCU includes an IST manager. The IST manager is the administrator of the IST, responsible for coordinating and managing the IST execution process of the SoC. The IST manager allows configuration of the IST through a user interface and supports reading the results of IST execution from the SoC and obtaining the IST status (e.g., whether it was executed). Furthermore, the IST manager provides IST triggering functionality, i.e., determining whether the SoC is in IST execution mode or normal operation mode. In some embodiments, the IST manager also has monitoring functions for IST execution, such as monitoring for timeouts. The IST client is a software component running on the SoC, responsible for communicating with the IST manager to execute the IST. The main functions of the IST client include: providing a communication interface with the IST manager to ensure efficient data and instruction transmission between them; defining communication frame formats and protocols for message passing between the processor MCU and the IST client; storing IST execution results and transmitting these results to the processor MCU; and executing the corresponding IST in response to IST requests from the processor MCU. Figure 5As shown, the communication modules of the System-on-a-Chip (SoC) and the Microcontroller Unit (MCU) can communicate with each other via Ethernet. The MCU includes a storage unit and a user interface. The MCU can send a request to the SoC to execute an In-System Test (IST). After executing the IST, the SoC can return to the MCU an identifier indicating that the IST has been executed and corresponding result information representing the test results within the system. In some embodiments, the method for controlling the SoC to execute in-system tests in a vehicle further includes: in response to the identifier indicating that the first in-system test has been executed, the MCU obtains the first result information from the SoC and stores the first result information in the storage unit of the processor; in response to the SoC returning the first result information to the processor, the MCU changes the value of the identifier.

[0039] Figure 6 The diagram illustrates a schematic flow for performing an IST test within the system. For example... Figure 6 As shown, the IST configuration can be appropriately set before execution. If the vehicle requests IST execution (i.e., the aforementioned second in-system test) after receiving the second signal Kon indicating that its engine is transitioning from a stopped state to a running state, the driving operating system sets the IST execution flag to active and then begins powering on the system-on-chip (SoC). During this process, the IST request signal is set to active, and then the SoC's reset pin is released, allowing the SoC to enter IST execution mode. Simultaneously, the IST manager monitors the IST execution of the SoC. If the IST execution is complete, the SoC sends feedback to the MCU indicating that the in-system test IST was executed, and the identifier on the MCU changes accordingly. After the SoC's IST execution is complete, the processor restarts the SoC, allowing it to enter normal operating mode. In normal operating mode, the MCU can obtain the IST execution results from the SoC via Ethernet and compare them with the expected results to analyze the IST results and determine whether the IST execution was successful or failed. When the car receives the first signal Koff, indicating that its engine is transitioning from running to stopped, the chip system performs a first system-wide test. The process is similar to the one described above, except that the processor first shuts off the chip system's power, and then executes... Figure 6 The process is shown.

[0040] In some embodiments, the processor is configured to reset when the vehicle receives the second signal Kon. In this case, the processor reset occurs when the entire vehicle system transitions from a complete power outage to power restoration. To distinguish this from processor resets occurring in other situations, the reset occurring when the vehicle receives the aforementioned second signal Kon is referred to herein as a first reset. The processor restart in this situation can be termed a cold start. In this document, resets occurring in other situations are referred to herein as second resets, that is, second resets include resets other than those occurring when the vehicle receives the aforementioned second signal Kon. For example, if the engine is running and the processor resets during a partial power outage in the vehicle system, this reset and restart can be termed a warm start. As another example, if the entire vehicle system has not experienced any power outage, but the software system restarts, this reset and restart can be termed a software system restart. In either case, a processor reset will result in a chip system reset. In some embodiments, the method for controlling a chip system in a vehicle to perform an in-system test further includes: in response to a second reset of the processor that is different from a first reset, determining whether the chip system returns the first result information to the processor based on the identification information; in response to the chip system not returning the first result information to the processor, the processor obtaining the first result information from the chip system; in response to determining that the first in-system test has passed based on the first result information, the chip system entering a normal operating mode; and in response to determining that the first in-system test has failed based on the first result information, the chip system performing a second in-system test. As mentioned above, the identification information can be used to determine whether the first in-system test has been performed. In some embodiments, when the chip system returns the first result information to the processor, the value of the identification information is changed. For example, an identification information of "1" means that the chip system has performed the in-system test IST, and after the chip system returns the result information after performing the in-system test IST to the processor, the identification information changes from "1" to "0". Therefore, when the processor experiences a second reset, the identification information can be used to determine whether the processor has obtained the aforementioned first result information from the chip system. Therefore, in this embodiment, when a second reset occurs after the first reset (different from the first reset, since the chip system also resets due to the processor's second reset), the processor does not directly query the chip system to see if the in-system test (IST) has been executed. Instead, if it is determined that the processor has not obtained the first result information from the chip system, the processor obtains the first result information from the chip system and then uses this first result information to determine whether to allow the chip system to execute the second in-system test. This simplifies the chip system's handling of the second reset and allows the processor to obtain the latest results of the chip system's in-system test.

[0041] In some embodiments, the method for controlling a chip system in a vehicle to perform an in-system test further includes: in response to the chip system returning the first result information to the processor, determining whether the processor has successfully obtained the first result information; in response to the processor successfully obtaining the first result information and determining that the first in-system test has passed based on the first result information, the chip system enters a normal operation mode; in response to determining that the first in-system test has failed based on the first result information, the chip system enters a shutdown mode. Further, the method for controlling a chip system in a vehicle to perform an in-system test may also include: in response to the processor failing to obtain the first result information, the chip system performs a second in-system test. Thus, it is possible to determine whether the chip system enters a normal operation mode based on the result of the second in-system test. If the second in-system test passes, the chip system enters a normal operation mode; if the second in-system test fails, the chip system enters a shutdown mode.

[0042] Next, using Figure 7 This example illustrates the IST execution procedure when the processor experiences multiple resets under different circumstances. For example... Figure 7As shown, when the processor MCU is reset, it can determine the condition or type of reset based on the reset reason. Specifically, the processor MCU can determine if the current reset is the aforementioned first reset RE1. In the case of the first reset RE1, the MCU can clear the previously stored IST result information in its memory cells to prepare for storing the IST result information that the processor MCU will obtain from the chip system. If the identification information is valid (i.e., the identification information indicates that the chip system performed a first in-system test when the vehicle received the aforementioned first signal), the processor MCU obtains the IST result information from the chip system SoC, i.e., the aforementioned first result information, and determines whether the first in-system test passed based on the first result information. If the first in-system test passed, the chip system SoC enters normal operation mode. If the first in-system test fails based on the first result information, it is determined whether the processor MCU triggered the second in-system test of the chip system SoC for the first time within the current driving cycle starting from when the vehicle received the aforementioned second signal Kon. If the chip system SoC has already performed the second in-system test (i.e., the chip system has already performed the in-system test IST again) within the current driving cycle, the chip system SoC enters shutdown mode. Otherwise, the chip system can execute a second in-system test, and determine whether the chip system has entered normal operating mode based on the result of the second IST. In the event of a second reset (RE2, e.g., the aforementioned warm boot) or RE2' (e.g., the aforementioned software system restart) on the MCU, since the second reset usually occurs after the first reset, the processor MCU can retrieve the IST result information from its local memory and determine whether the aforementioned identification information is valid. If the identification information is still valid (e.g., the identification information is "1"), this indicates that the chip system has executed the first in-system test, but the processor MCU did not obtain the first result information of the chip system's execution of the first in-system test for some reason. In this case, the IST result information in the processor MCU's local memory cannot be used as a basis for determining whether the chip system's execution of the IST passed. Therefore, the processor MCU retrieves the latest IST result information from the chip system, i.e., the aforementioned first result information, and determines whether the first in-system test passed based on the first result information. If the identification information has been changed to invalid (e.g., the identification information is "0"), this indicates that the chip system SoC has returned the first result information after executing the first in-system test to the processor MCU. Based on this, the processor MCU again determines whether the first result information has been successfully acquired (e.g., whether the acquired first result information is complete, whether the format is correct, etc.). If the processor MCU successfully acquires the first result information, it determines whether the first system internal test has passed based on the first result information, thereby deciding whether the chip system enters normal operating mode.If the processor MCU fails to obtain the first result information (e.g., the obtained first result information is incomplete or incorrectly formatted), the processor MCU requests the chip system SoC to perform a second in-system test, and determines whether the chip system enters normal operation mode or shutdown mode based on the result of the second in-system test. According to this embodiment, even if the processor and chip system reset after the vehicle receives the aforementioned second signal Kon, and then reset again for other reasons, it can still reliably ensure that the success of the chip system's in-system test is determined based on the result information of the first in-system test previously performed by the chip system, avoiding unnecessary multiple in-system tests. The chip system only performs the second in-system test if the result information of the first in-system test obtained by the processor MCU is incorrect or does not meet requirements, thereby satisfying the reliability requirements of the chip system SoC's self-test.

[0043] Another embodiment of this application provides an apparatus for controlling a chip system in a vehicle to perform in-system testing. The apparatus may include: an in-system test (IST) request module configured to, in response to the vehicle receiving a first signal indicating that the engine has transitioned from a running state to a stopped state, request the chip system to perform a first in-system test and obtain a first test result after performing the first in-system test, the first test result including identification information indicating whether the first in-system test was performed and first result information characterizing the test result of the first in-system test; and an in-system test (IST) re-execution determination module configured to, in response to the vehicle receiving a second signal indicating that the engine has transitioned from a stopped state to a running state, determine whether the chip system should perform a second in-system test based on the first test result. The IST request module and the IST re-execution determination module may include software modules implemented in a programmatic manner.

[0044] Another embodiment of this application provides a computing device, including: a memory configured to store computer-executable instructions; and a processor configured to execute, when the computer-executable instructions are executed by the processor, the method described in any of the foregoing embodiments of the method for performing in-system testing according to a chip system in a vehicle. An example of the processor here may be the processor MCU described in the foregoing embodiments, and an example of the computing device may be an electronic control unit (ECU) or part of an ECU in a vehicle. In some embodiments, the computing device may be implemented as a vehicle domain controller (VDC), or the computing device may be implemented including a vehicle domain controller, i.e., the vehicle domain controller is at least a component of the computing device. A vehicle domain controller is an integrated electronic control unit that has emerged with the development of automotive electrification and intelligence, improving the intelligence level of a vehicle by integrating the functions of multiple electronic control units (ECUs). Depending on the function or application area of ​​the vehicle domain controller, it may be implemented as a powertrain domain controller, body domain controller, autonomous driving domain controller, cockpit domain controller, etc.

[0045] The method described above with reference to the flowchart can be implemented as a computer program. For example, embodiments of this application provide a computer program product including a computer program that, when executed by a processor, implements the method described in any of the embodiments of the foregoing method for performing in-system tests according to a chip system in a vehicle.

[0046] Another embodiment of this application provides one or more computer-readable storage media storing computer-readable instructions that, when executed, implement the method described in any of the embodiments of the foregoing method for performing in-system testing according to a chip system in a vehicle.

[0047] The scope of this application is limited only by the appended claims. Although individual features may be included in different claims, they may be advantageously combined, and the order of features in the claims does not imply that the features must operate in any particular order. Furthermore, in the claims, the word "comprising" does not exclude other elements or steps.

Claims

1. A method for controlling a chip system in a vehicle to perform in-system tests, the vehicle including an engine, characterized in that, The method includes: In response to the vehicle receiving a first signal indicating that the engine should transition from an operating state to a stopped state, the chip system performs a first in-system test and stores a first test result after performing the first in-system test. The first test result includes identification information indicating whether the first in-system test was performed and first result information characterizing the test result of the first in-system test. In response to the vehicle receiving a second signal indicating that the engine is transitioning from a stopped state to a running state, a second in-system test is determined based on the first test result.

2. The method according to claim 1, characterized in that, The step of determining whether the chip system performs a second in-system test based on the first test result, in response to the vehicle receiving a second signal indicating that the engine is transitioning from a stopped state to a running state, includes: In response to the identification information indicating that the first in-system test was not performed, the chip system performs a second in-system test; and In response to the identification information indicating that the first system test is performed, the system determines whether the first system test has passed based on the first result information.

3. The method according to claim 2, characterized in that, The method further includes: In response to the successful completion of the test within the second system, the chip system enters normal operating mode; and In response to a test failure within the second system, the chip system enters a shutdown mode.

4. The method according to claim 2, characterized in that, The step of determining whether the chip system performs a second in-system test based on the first test result, in response to the vehicle receiving a second signal indicating that the engine is transitioning from a stopped state to a running state, further includes: In response to the determination that the test within the first system has passed, the chip system enters a normal operating mode; and In response to determining that the first in-system test has failed, the chip system performs the second in-system test.

5. The method according to claim 4, characterized in that, The step of determining whether the chip system performs a second in-system test based on the first test result, in response to the vehicle receiving a second signal indicating that the engine is transitioning from a stopped state to a running state, further includes: Before the chip system performs the second system-in-system test, it is determined whether the chip system has performed the second system-in-system test after the vehicle receives the second signal during the current driving cycle. In response to the chip system having performed a second in-system test, the chip system enters a shutdown mode; In response to the fact that the chip system has not yet performed the second in-system test, the chip system performs the second in-system test.

6. The method according to any one of claims 1-5, wherein the method further comprises: In response to the chip system failing to perform a first system-in-system test or a second system-in-system test for an extended period of time, or the vehicle failing to display a normal time after receiving the second signal, the chip system performs a second system-in-system test.

7. The method according to any one of claims 1-5, wherein the vehicle further comprises a processor communicating with the chip system, the chip system storing the first result information, the processor comprising a storage unit for storing the identification information and the first result information, wherein the method further comprises: In response to the identification information indicating that a test within the first system is executed, the processor obtains the first result information from the chip system and stores the first result information in the storage unit; as well as In response to the chip system returning the first result information to the processor, the value of the identification information is changed.

8. The method of claim 7, wherein the processor is configured to perform a first reset when the vehicle receives the second signal, wherein the method further comprises: In response to a second reset of the processor that is different from the first reset, the chip system determines whether to return the first result information to the processor based on the identification information; In response to the chip system not returning the first result information to the processor, the processor obtains the first result information from the chip system; Upon determining that the test within the first system has passed based on the first result information, the chip system enters normal operating mode; as well as In response to determining that the first system-in-system test failed based on the first result information, the chip system performs the second system-in-system test.

9. The method of claim 8, wherein the method further comprises: In response to the chip system returning the first result information to the processor, it is determined whether the processor has successfully obtained the first result information; In response to the processor successfully acquiring the first result information and determining that the first system test has passed based on the first result information, the chip system enters normal operation mode; In response to determining that the test within the first system has failed based on the first result information, the chip system enters a shutdown mode.

10. The method of claim 9, wherein the method further comprises: In response to the processor failing to acquire the first result information, the chip system executes a second in-system test; Upon successful testing within the second system, the chip system enters normal operating mode. as well as In response to a test failure within the second system, the chip system enters a shutdown mode.

11. An apparatus for controlling a chip system in a vehicle to perform in-system tests, comprising: The system-in-system test request module is configured to, in response to the vehicle receiving a first signal indicating that the engine is transitioning from a running state to a stopped state, request the chip system to perform a first system-in-system test and obtain a first test result after performing the first system-in-system test. The first test result includes identification information indicating whether the first system-in-system test was performed and first result information characterizing the test result of the first system-in-system test. as well as The in-system test re-execution determination module is configured to determine whether the chip system should perform a second in-system test based on the first test result in response to the vehicle receiving a second signal indicating that the engine has transitioned from a stopped state to a running state.

12. A computing device, comprising: Memory, which is configured to store computer-executable instructions; as well as A processor configured to perform the method according to any one of claims 1-10 when the computer-executable instructions are executed by the processor.

13. The computing device according to claim 12, characterized in that, The computing device includes a vehicle domain controller.

14. A computer program product comprising a computer program that, when executed by a processor, implements the method according to any one of claims 1-10.

15. A computer-readable storage medium having stored thereon computer-readable instructions that, when executed, implement the method according to any one of claims 1-10.

Images