A low temperature drift Brokaw type bandgap reference circuit comprising a temperature compensation module

Abstract

The application relates to a low-temperature-drift Brokaw type bandgap reference circuit comprising a temperature compensation module, which comprises a bandgap core module for generating a basic reference voltage; and a temperature compensation module connected with the bandgap core module, for generating a compensation voltage to compensate the basic reference voltage to form a temperature-stable reference voltage; wherein the temperature compensation module is adjusted independently of the bandgap core module. The application provides a temperature compensation module independent of the bandgap reference core module, and the compensation current is not from the core module; and the introduction of the temperature compensation module does not change the DC working point of the bandgap core circuit. The application is applicable to different forms of Brokaw type first-order bandgap reference core circuits and has strong universality.

Description

Technical Field

[0001] This invention relates to the field of bandgap reference circuit technology, and more specifically to a low-temperature drift Brokaw-type bandgap reference circuit that includes a temperature compensation module. Background Technology

[0002] In related technologies, Brokaw-type bandgap reference circuits are widely used in integrated circuits, generating a reference output by using the base-emitter voltage of a bipolar transistor and a voltage component proportional to temperature.

[0003] The base-emitter voltage of a bipolar transistor exhibits a non-linear characteristic with temperature, causing non-linear drift in the reference output over a wide temperature range. Existing temperature compensation schemes for this non-linear temperature characteristic typically need to be embedded in the core circuitry of a Brokaw-type reference, often altering the original clamping amplifier structure of the Brokaw-type reference, increasing design complexity, and introducing additional stability risks.

[0004] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of the present invention, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] This invention provides a low-temperature drift Brokaw-type bandgap reference circuit that includes a temperature compensation module, which can effectively overcome the defects existing in the prior art to a certain extent.

[0006] Other features and advantages of the invention will become apparent from the following detailed description, or may be learned in part by practice of the invention.

[0007] According to a first aspect of the present invention, a low-temperature drift Brokaw-type bandgap reference circuit including a temperature compensation module is provided, comprising: The bandgap core module is used to generate the base reference voltage; The temperature compensation module, connected to the bandgap core module, is used to generate a compensation voltage to compensate the base reference voltage and form a temperature-stable reference voltage. The temperature compensation module is adjusted independently of the bandgap core module.

[0008] In some exemplary embodiments, the bandgap core module includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1, a second transistor Q2, and an amplifier AMP; The first input terminal of amplifier AMP is connected to the second terminal of the first resistor and the collector of the first transistor Q1; the second input terminal of amplifier AMP is connected to the second terminal of the second resistor and the collector of the second transistor Q2; the first terminal of the first resistor R1 and the first terminal of the second resistor R2 are connected to the VDD terminal; The output terminal of the amplifier AMP is connected to the base of the first transistor Q1 and the second transistor Q2 respectively; the emitter of the second transistor Q2 is connected to the first terminal of the third resistor R3; the second terminal of the third resistor R3 is connected to the emitter of the first transistor Q1, the first terminal of the fourth resistor R4, and the temperature compensation module; the second terminal of the fourth resistor R4 is connected to the GND terminal.

[0009] In some exemplary embodiments, the temperature compensation module includes: a first current mirror branch, a nonlinear current generation module, and a second current mirror branch connected in sequence; wherein, The nonlinear current generation module is used to generate a nonlinear compensation current I with a positive temperature coefficient. NL ; The first current mirror branch is used to compensate for the nonlinear current I. NL Perform current replication and output the first compensation current I3; The second current mirror branch is used to compensate for the nonlinear current I. NL Perform current replication and output the first compensation current I4; The first compensation current I3 and the second compensation current I4 can be superimposed at the output node to generate the final compensation current I. comp It is then output to the bandgap core module.

[0010] In some exemplary embodiments, the nonlinear current generation module includes: a first current source I1, a second current source I2, a third transistor Q3, a fourth transistor Q4, and a fifth resistor R5; wherein, The collector of the third transistor Q3 is connected to the first current source I1, the emitter is connected to the ground terminal, and the collector is connected to the base and the first terminal of the fifth resistor R5 through a connecting branch; and the first terminal of the fifth resistor R5 is connected to the connection point M of the first current mirror branch. The collector of the fourth transistor Q4 is connected to the second current source I2, the emitter is connected to the ground terminal, and the collector is connected to the base and the second terminal of the fifth resistor R5 through a connecting branch; and the second terminal of the fifth resistor R5 is connected to the connection point N of the second current mirror branch.

[0011] In some exemplary embodiments, the first current mirror branch includes: a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, and an eighth transistor M8; wherein, The gate of the fifth transistor M5 is connected to the VDD terminal, and the drain is connected to the tail current source mI1; the source of the fifth transistor M5 is connected to the source of the sixth transistor M6. The gate of the sixth transistor M6 is connected to the VDD terminal, and the drain is connected to the drain of the seventh transistor M7; and a connecting branch is provided between the source and drain of the sixth transistor M6. The gate of the seventh transistor M7 is connected to the ground terminal; the source of the seventh transistor M7 is connected to the source of the eighth transistor M8; the drain of the eighth transistor is connected to the first current source I1; and a connection point M is provided between the drain of the eighth transistor and the first current source I1; the gate of the eighth transistor is connected to the ground terminal; and a connecting branch is provided between the source and drain of the eighth transistor M8. The second current mirror branch includes: the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12; among which, The gate of the ninth transistor M9 is connected to the VDD terminal, the source is connected to the source of the tenth transistor M10, and the drain is connected to the drain of the twelfth transistor; and a connecting branch is provided between the source and drain of the ninth transistor M9. The gate of the tenth transistor M10 is connected to the VDD terminal, and the drain is connected to the second current source I2 and the output node; The drain of the eleventh transistor M11 is connected to the second current source I2, the gate is connected to the ground terminal, and the base is connected to the base of the twelfth transistor M12; a connecting branch is provided between the source and drain of the eleventh transistor M11; and a connection point N is provided between the drain of the eleventh transistor M11 and the second current source I2. The gate of the twelfth transistor is connected to the ground terminal.

[0012] In some exemplary embodiments, the base reference voltage is obtained through V having a negative temperature coefficient. BE With V having a positive temperature coefficient T The lnN weighted summation is determined, including:

[0013] Where N represents the emitter area ratio of the first transistor Q1 to the second transistor Q2 in the bandgap core module; V T Represents thermal voltage, thermal voltage V T It is directly proportional to the absolute temperature T.

[0014] In some exemplary embodiments, The base-emitter voltage of the third transistor includes:

[0015] The base-emitter voltage of the fourth transistor includes:

[0016] in, This represents the bandgap voltage of silicon at 0 K. This indicates a parameter that is related to the process but not to temperature. Indicates thermal voltage; Indicates temperature; Indicates reference temperature; Indicates at reference temperature The base-emitter voltage is below; The voltage difference Δ between the base-emitter voltage of the third transistor and the base-emitter voltage of the fourth transistor is based on the voltage difference Δ. V BE,Q3-Q4 The nonlinear compensation current I is determined by the fifth resistor. NL ,include:

[0017] in, .

[0018] In some exemplary embodiments, the circuit further includes: The startup circuit module, connected to the bandgap core module, is used to provide startup current to the bandgap core module.

[0019] The low-temperature drift Brokaw-type bandgap reference circuit with a temperature compensation module provided in the embodiments of the present invention, while maintaining the stability of the Brokaw core structure, introduces a temperature compensation module independent of the bandgap reference core module. This temperature compensation module can independently adjust the compensation intensity and temperature characteristics, ensuring that the compensation current does not originate from the core module, and the introduction of the temperature compensation module does not change the DC operating point of the bandgap core circuit. When the operating point of the bandgap core module shifts, the compensation effect can be stably adjusted; the compensation current is independent of the closed-loop output voltage or bias current of the bandgap core module, reducing the dependence between the compensation module and the bandgap core module, while improving the frequency stability of the system. It can achieve low-temperature drift characteristics over a wide temperature range and improve the accuracy of the reference circuit without significantly increasing system complexity. Furthermore, this solution is applicable to different forms of Brokaw-type first-order bandgap reference core circuits, demonstrating strong versatility. It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit the invention. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0021] Figure 1 This schematic diagram illustrates a cryogenic drift bandgap reference circuit structure based on the Brokaw structure, an exemplary embodiment of the present invention. Figure 2 The diagram illustrates an exemplary embodiment of the present invention: a low-temperature drift bandgap reference circuit based on a Brokaw structure. Detailed Implementation

[0022] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that the invention will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0023] Furthermore, the accompanying drawings are merely illustrative of the invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0024] To address the shortcomings and deficiencies of existing technologies, a low-temperature drift Brokaw-type bandgap reference circuit incorporating a temperature compensation module is provided. (Reference) Figure 1 As shown, it may specifically include: a bandgap core module 101 for generating a base reference voltage; and a temperature compensation module 102 connected to the bandgap core module for generating a compensation voltage so that the compensation voltage compensates the base reference voltage to form a temperature-stable reference voltage; wherein the temperature compensation module is adjusted independently of the bandgap core module.

[0025] For example, it may also include a startup circuit module 103 connected to the bandgap core module for providing startup current to the bandgap core module.

[0026] The following will describe in more detail a low-temperature drift Brokaw-type bandgap reference circuit including a temperature compensation module, with reference to the accompanying drawings and embodiments.

[0027] refer to Figure 2 As shown, the bandgap core module includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1, a second transistor Q2, and an amplifier AMP.

[0028] Specifically, the first input terminal of the amplifier AMP is connected to the second terminal of the first resistor and the collector of the first transistor Q1; the second input terminal of the amplifier AMP is connected to the second terminal of the second resistor and the collector of the second transistor Q2; the first terminal of the first resistor R1 and the first terminal of the second resistor R2 are connected to the VDD terminal.

[0029] The output terminal of the amplifier AMP is connected to the base of the first transistor Q1 and the second transistor Q2 respectively; the emitter of the second transistor Q2 is connected to the first terminal of the third resistor R3; the second terminal of the third resistor R3 is connected to the emitter of the first transistor Q1, the first terminal of the fourth resistor R4, and the temperature compensation module; the second terminal of the fourth resistor R4 is connected to the GND terminal.

[0030] For example, the temperature compensation module includes: a first current mirror branch, a nonlinear current generation module, and a second current mirror branch connected in sequence; wherein, the nonlinear current generation module is used to generate a nonlinear compensation current I with a positive temperature coefficient. NL The first current mirror branch is used to compensate for the nonlinear current I. NL The current is replicated, and the first compensation current I3 is output; the second current mirror branch is used to adjust the nonlinear compensation current I. NL Current replication is performed, and a first compensation current I4 is output; wherein, the first compensation current I3 and the second compensation current I4 can be superimposed at the output node to generate the final compensation current I. comp It is then output to the bandgap core module.

[0031] Specifically, the nonlinear current generation module includes: a first current source I1, a second current source I2, a third transistor Q3, a fourth transistor Q4, and a fifth resistor R5. The collector of the third transistor Q3 is connected to the first current source I1, and its emitter is connected to ground. The collector is connected to the base and the first terminal of the fifth resistor R5 via a connecting branch; the first terminal of the fifth resistor R5 is connected to the connection point M of the first current mirror branch. The collector of the fourth transistor Q4 is connected to the second current source I2, and its emitter is connected to ground. The collector is connected to the base and the second terminal of the fifth resistor R5 via a connecting branch; the second terminal of the fifth resistor R5 is connected to the connection point N of the second current mirror branch.

[0032] The first current mirror branch includes: a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, and an eighth transistor M8. The gate of the fifth transistor M5 is connected to the VDD terminal, and its drain is connected to the tail current source mI1; the source of the fifth transistor M5 is connected to the source of the sixth transistor M6; the gate of the sixth transistor M6 is connected to the VDD terminal, and its drain is connected to the drain of the seventh transistor M7; a connecting branch is provided between the source and drain of the sixth transistor M6; the gate of the seventh transistor M7 is connected to the ground terminal; the source of the seventh transistor M7 is connected to the source of the eighth transistor M8; the drain of the eighth transistor is connected to the first current source I1; a connection point M is provided between the drain of the eighth transistor and the first current source I1; the gate of the eighth transistor is connected to the ground terminal; and a connecting branch is provided between the source and drain of the eighth transistor M8.

[0033] The second current mirror branch includes: a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, and a twelfth transistor M12. Specifically, the gate of the ninth transistor M9 is connected to the VDD terminal, its source is connected to the source of the tenth transistor M10, and its drain is connected to the drain of the twelfth transistor; a connecting branch is provided between the source and drain of the ninth transistor M9. The gate of the tenth transistor M10 is connected to the VDD terminal, and its drain is connected to the second current source I2 and the output node. The drain of the eleventh transistor M11 is connected to the second current source I2, its gate is connected to the ground terminal, and its base is connected to the base of the twelfth transistor M12; a connecting branch is provided between the source and drain of the eleventh transistor M11; and a connection point N is provided between the drain of the eleventh transistor M11 and the second current source I2. The gate of the twelfth transistor is connected to the ground terminal.

[0034] Specifically, such as Figure 2 As shown, the fifth resistor R5 is placed between connection point M and connection point N.

[0035] Specifically, for the temperature compensation module, transistors Q1 to Q4 can be bipolar transistors. The emitters of bipolar transistors Q3 and Q4 are grounded, and their collectors are connected to nodes M and N, respectively. Resistor R5 is connected between the bases of transistors Q3 and Q4. Current source I1 is connected to transistor Q3, providing a positive temperature bias current for transistor Q3, and I2 is connected to transistor Q4, providing a zero temperature coefficient bias current for transistor Q4.

[0036] The actions performed by the temperature compensation module may include: 1) Generate nonlinear current I NL .

[0037] Under the combined action of the positive temperature coefficient current I1 and the zero temperature coefficient current I2, a voltage difference is generated between transistors Q3 and Q4. This voltage difference generates a nonlinear current I across resistor R5. NL The flow originates from node N and flows to node M.

[0038] 2) Forming a combined current.

[0039] Nonlinear current I NL At node M, the combined current I1+I is formed by the superposition of I1 and I1. NL At node N, subtracting I2 forms a combined current I2-I. NL .

[0040] 3) The current mirror is copied and then subtracted from the tail current source.

[0041] The combined current I1+I at node M NL After being replicated m times by the first current mirror branch, the current flows through the corresponding output branch and is subtracted from the positive temperature coefficient tail current source mI1 in that branch to obtain the first compensation current I3 = mI NL The combined current I2-I at node N NL After being replicated via the second current mirror branch, the current flows through the corresponding output branch and is subtracted from the zero-temperature-coefficient tail current source I2 in that branch to obtain the second compensation current I4. I NL .

[0042] 4) Superimposed to form a compensation current.

[0043] The first compensation current I3 and the second compensation current I4 converge at the upper node of resistor R4 in the bandgap core module to form the compensation current I. comp .

[0044] For example, the startup circuit module 103 provides a startup current to the bandgap core module 101 during the initial power-on phase, enabling the bandgap reference circuit to quickly enter a stable operating state and preventing the circuit from reaching the zero-current stable point. Specifically, it may include: a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, a nineteenth transistor M19, a twentieth transistor M20, a twenty-first transistor M21, a twenty-second transistor M22, and a sixth resistor R6. Transistors M13, M14, M15, and M16 are connected in series on one branch. Transistors M17, M18, and M19 are connected in series on another branch.

[0045] The gate of transistor M16 is grounded; the sources of transistors M13, M14, and M15 are connected to the EN terminal. The drain of transistor M13 is connected to the drains of transistors M21 and M22, and the sources of transistors M22 and M17, respectively. The gates of transistors M21, M22, and M17, and the first terminal of resistor R6 are connected to the VDD terminal.

[0046] The gate of transistor M19 is grounded. The second terminal of resistor R6 is connected to the drain of transistor M20; the gate of transistor M20 is connected to the output terminal of AMP and to the Vout terminal; the source of transistor M20 is connected to the drain of transistor M17, and the drain and source of transistor M18, respectively.

[0047] Specifically, the actions performed by the startup circuit module may include: 1) Enable control.

[0048] The enable signal EN is used to control the operating state of the startup circuit. When EN is high, the startup circuit is activated.

[0049] 2) Generate bias current.

[0050] When EN is high, transistors M13~M16 are turned on, generating bias current in the startup circuit.

[0051] 3) Current mirror replication.

[0052] The bias current is replicated through the current mirror structure composed of transistors M22 and M17 and then transmitted to subsequent branches.

[0053] 4) Generate gate bias voltage.

[0054] The replicated current passes through the self-biased structure formed by transistors M18 and M19, generating a bias voltage at the gate of transistor M20.

[0055] 5) Provide starting current.

[0056] Under the action of the gate bias voltage, transistor M20 is turned on, and its source injects startup current into the branch where transistors Q1 and Q2 are located in the bandgap reference core module, so that the bandgap reference circuit begins to establish a working state.

[0057] 6) Automatically shut down the startup branch.

[0058] Once the circuit reaches a stable operating state, the reference output voltage V OUTThe voltage is approximately 1.2 V. By designing the dimensions of transistors M18 and M19, the gate voltage of transistor M20 is made close to this value, thus causing the gate-source voltage VGS of transistor M20 to fall below its threshold voltage, and transistor M20 automatically turns off. With transistor M20 turned off, the startup circuit exits the working state, thereby preventing the startup branch from affecting the normal operation of the bandgap reference core module in steady state.

[0059] The working principle is explained below as an example.

[0060] For the bandgap core module, the base reference voltage of the Brokaw-type bandgap reference is obtained through V, which has a negative temperature coefficient. BE With V having a positive temperature coefficient T The weighted summation of lnN is obtained, and the formula includes:

[0061] Where N represents the emitter area ratio of the first transistor Q1 to the second transistor Q2 in the bandgap core module; V T Represents thermal voltage, thermal voltage V T It is directly proportional to the absolute temperature T; V T =kT / q. Due to the thermal voltage V T It is proportional to the absolute temperature T, therefore V T lnN is the voltage term with a positive temperature coefficient.

[0062] The base-emitter voltage V of a bipolar transistor BE The relationship with temperature T is as follows:

[0063] in, This represents the bandgap voltage of silicon at 0 K. This indicates a parameter that is related to the process but not to temperature. α It is determined by the temperature coefficient of the bias current.

[0064] When the bias current has a positive temperature coefficient α =1; when the bias current is the zero temperature coefficient current. α =0.

[0065] V BE In the expression for temperature, the nonlinear term The presence of this factor causes the reference output voltage to fluctuate significantly with temperature changes.

[0066] For the temperature compensation module, the bias current I1 of transistor Q3 is a positive temperature coefficient current, and the bias current I2 of transistor Q4 is a zero temperature coefficient current. Therefore: The base-emitter voltage of the third transistor includes:

[0067] The base-emitter voltage of the fourth transistor includes:

[0068] in, This represents the bandgap voltage of silicon at 0 K. This indicates a parameter that is related to the process but not to temperature. Indicates thermal voltage; Indicates temperature; Indicates reference temperature; Indicates at reference temperature The base-emitter voltage.

[0069] The emitters of transistors Q3 and Q4 are both grounded, and their bases are connected through resistor R5. Therefore, the voltage across Q3 and Q4 is V0. BE The difference △ V BE,Q3-Q4 This voltage is reflected in resistor R5, where it is converted into a nonlinear compensation current I. NL The formula is expressed as:

[0070]

[0071] For example, the current replication process in the first current mirror branch is as follows: Ignoring the base current of the bipolar transistor, the current flowing from point M to M8 in the first current mirror branch is I. NL +I1, this current is replicated m times by the current mirror structure composed of transistors M5~M8 and then flows through transistor M5. The drain of transistor M5 is connected to a tail current source mI1 with a positive temperature coefficient. The difference between the two currents generates the first compensation current I3=mI. NL .

[0072] For example, the current replication process of the second current mirror branch is as follows: The current flowing from point N to M11 is I2-I NL The current is replicated by a current mirror composed of transistors M9 to M12 and then flows through transistor M10. The drain of transistor M10 is connected to a tail current source I with zero temperature coefficient. 2， After subtracting the two currents, a second compensation current I4 = -I is generated. NL .

[0073] Specifically, the first compensation current I3 and the second compensation current I4 are combined to form the final compensation current I. comp=(m-1)I NL The compensation current flows through resistor R4 in the bandgap core module, generating a compensation voltage V. comp =I comp R4. The compensation voltage is superimposed on the base reference voltage of the bandgap reference to form a temperature-stable reference voltage.

[0074] The positive temperature coefficient currents I1 and mI1 in the temperature compensation module are generated by a positive temperature coefficient current generating circuit. Their generation principle utilizes the base-emitter voltage difference ΔV generated by a bipolar transistor under different current densities. BE This voltage difference is proportional to the absolute temperature T, and is converted into a positive temperature coefficient current I1 through resistive conversion. This is then replicated through a current mirror structure to form mI1. The zero temperature coefficient I2 is generated by a zero temperature coefficient current generation circuit. This utilizes the base-emitter voltage V, which has a negative temperature coefficient. BE With ΔV having a positive temperature coefficient BE The weighted summation forms a zero-temperature coefficient voltage, which is then converted by a resistor to generate a zero-temperature coefficient current I2.

[0075] For example, in the startup circuit module, the enable switch EN controls the operating state of the startup circuit. When EN is high, transistors M13-M16 are turned on and generate bias current. This bias current is replicated through a current mirror composed of M22 and M17. The replicated current flows through the self-biased structure composed of transistors M18 and M19, generating a bias voltage at the gate of transistor M20, causing transistor M20 to turn on. The source of transistor M20 injects startup current into the branch containing transistors Q1 and Q2 in the bandgap core module, thereby enabling the bandgap core circuit to begin establishing its operating state. After the circuit stabilizes, the reference output voltage is approximately 1.2V. By properly designing the dimensions of transistors M18 and M19, the gate voltage of transistor M20 gradually approaches the reference voltage, thus causing the gate-source voltage of transistor M20 to fall below its threshold voltage. When transistor M20 turns off, the startup circuit is also turned off, preventing the startup circuit from affecting the operating state of the bandgap core module during steady-state operation.

[0076] The circuit provided in this embodiment of the invention has the following advantages: (1) The temperature compensation module does not rely on the reference output voltage for detection or feedback, thus avoiding loop stability issues caused by feedback and resulting in better system stability. There is only one connection between the temperature compensation module and the bandgap core module. That is, the compensation current of the temperature compensation module is connected to the upper node of resistor R4 in the bandgap core module.

[0077] (2) The connection between the temperature compensation module and the reference core circuit is minimal, and the DC operating point of the bandgap core is not changed. The bandgap core and temperature compensation can be designed separately. Since there is only one connection between the temperature compensation module and the bandgap core module, the DC operating point of the bandgap core module will not be changed. The current mirror replication ratio in the temperature compensation module, as well as the magnitudes of the positive temperature coefficient current I1 and the zero temperature coefficient current I2, can be adjusted independently.

[0078] (3) The compensation accuracy is not affected by the drift of the core operating point of the bandgap. This is because the compensation current I... comp The generation of the bandgap reference voltage does not depend on the operating point inside the bandgap core circuit, so the compensation accuracy is not affected by the drift of the bandgap core operating point, which is beneficial to improving the temperature stability of the bandgap reference voltage.

[0079] (4) It has good system stability and versatility, and can be easily introduced into other similar bandgap reference structures without destroying the original bandgap core module working mechanism, and does not depend on specific voltage or current nodes. The nonlinear compensation current I can be adjusted by the current mirror ratio. comp Precise control of size enables high-order temperature compensation.

[0080] Furthermore, the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0081] Other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention herein. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the claims.

[0082] It should be understood that the present invention is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A low-temperature drift Brokaw-type bandgap reference circuit including a temperature compensation module, characterized in that, include: The bandgap core module is used to generate the base reference voltage; The temperature compensation module, connected to the bandgap core module, is used to generate a compensation voltage so that the compensation voltage compensates for the base reference voltage, forming a temperature-stable reference voltage; the temperature compensation module is adjusted independently of the bandgap core module.

2. The circuit according to claim 1, characterized in that, The bandgap core module includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1, a second transistor Q2, and an amplifier AMP; The first input terminal of amplifier AMP is connected to the second terminal of the first resistor and the collector of the first transistor Q1; the second input terminal of amplifier AMP is connected to the second terminal of the second resistor and the collector of the second transistor Q2; the first terminal of the first resistor R1 and the first terminal of the second resistor R2 are connected to the VDD terminal; The output terminal of the amplifier AMP is connected to the base of the first transistor Q1 and the second transistor Q2 respectively; the emitter of the second transistor Q2 is connected to the first terminal of the third resistor R3; the second terminal of the third resistor R3 is connected to the emitter of the first transistor Q1, the first terminal of the fourth resistor R4, and the temperature compensation module; the second terminal of the fourth resistor R4 is connected to the GND terminal.

3. The circuit according to claim 1, characterized in that, The temperature compensation module includes: a first current mirror branch, a nonlinear current generation module, and a second current mirror branch connected in sequence; wherein, The nonlinear current generation module is used to generate a nonlinear compensation current I with a positive temperature coefficient. NL ; The first current mirror branch is used to compensate for the nonlinear current I. NL Perform current replication and output the first compensation current I3; The second current mirror branch is used to compensate for the nonlinear current I. NL Perform current replication and output the first compensation current I4; The first compensation current I3 and the second compensation current I4 can be superimposed at the output node to generate the final compensation current I. comp It is then output to the bandgap core module.

4. The circuit according to claim 3, characterized in that, The nonlinear current generation module includes: a first current source I1, a second current source I2, a third transistor Q3, a fourth transistor Q4, and a fifth resistor R5; wherein, The collector of the third transistor Q3 is connected to the first current source I1, the emitter is connected to the ground terminal, and the collector is connected to the base and the first terminal of the fifth resistor R5 through a connecting branch; and the first terminal of the fifth resistor R5 is connected to the connection point M of the first current mirror branch. The collector of the fourth transistor Q4 is connected to the second current source I2, the emitter is connected to the ground terminal, and the collector is connected to the base and the second terminal of the fifth resistor R5 through a connecting branch; and the second terminal of the fifth resistor R5 is connected to the connection point N of the second current mirror branch.

5. The circuit according to claim 4, characterized in that, The first current mirror branch includes: fifth transistor M5, sixth transistor M6, seventh transistor M7, and eighth transistor M8; among which, The gate of the fifth transistor M5 is connected to the VDD terminal, and the drain is connected to the tail current source mI1; the source of the fifth transistor M5 is connected to the source of the sixth transistor M6. The gate of the sixth transistor M6 is connected to the VDD terminal, and the drain is connected to the drain of the seventh transistor M7; and a connecting branch is provided between the source and drain of the sixth transistor M6. The gate of the seventh transistor M7 is connected to the ground terminal; the source of the seventh transistor M7 is connected to the source of the eighth transistor M8; the drain of the eighth transistor is connected to the first current source I1; and a connection point M is provided between the drain of the eighth transistor and the first current source I1; the gate of the eighth transistor is connected to the ground terminal; and a connecting branch is provided between the source and drain of the eighth transistor M8. The second current mirror branch includes: the ninth transistor M9, the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12; among which, The gate of the ninth transistor M9 is connected to the VDD terminal, the source is connected to the source of the tenth transistor M10, and the drain is connected to the drain of the twelfth transistor; and a connecting branch is provided between the source and drain of the ninth transistor M9. The gate of the tenth transistor M10 is connected to the VDD terminal, and the drain is connected to the second current source I2 and the output node; The drain of the eleventh transistor M11 is connected to the second current source I2, the gate is connected to the ground terminal, and the base is connected to the base of the twelfth transistor M12; a connecting branch is provided between the source and drain of the eleventh transistor M11; and a connection point N is provided between the drain of the eleventh transistor M11 and the second current source I2. The gate of the twelfth transistor is connected to the ground terminal.

6. The circuit according to claim 2, characterized in that, The base reference voltage is obtained through V, which has a negative temperature coefficient. BE With V having a positive temperature coefficient T The lnN weighted summation is determined, including: Where N represents the emitter area ratio of the first transistor Q1 to the second transistor Q2 in the bandgap core module; V T Represents thermal voltage, thermal voltage V T It is directly proportional to the absolute temperature T.

7. The circuit according to claim 3, characterized in that, The base-emitter voltage of the third transistor includes: The base-emitter voltage of the fourth transistor includes: in, This represents the bandgap voltage of silicon at 0 K. This indicates a parameter that is related to the process but not to temperature. Indicates thermal voltage; Indicates temperature; Indicates reference temperature; Indicates at reference temperature The base-emitter voltage is below; The voltage difference Δ between the base-emitter voltage of the third transistor and the base-emitter voltage of the fourth transistor is based on the voltage difference Δ. V BE,Q3-Q4 The nonlinear compensation current I is determined by the fifth resistor. NL ,include: in, .

8. The circuit according to claim 1, characterized in that, The circuit also includes: The startup circuit module, connected to the bandgap core module, is used to provide startup current to the bandgap core module.

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