High-sensitivity special-shaped three-dimensional spiral inductor based on silicon adapter plate process

By employing an irregularly shaped three-dimensional spiral inductor structure in the silicon adapter board process, and using silicon vias to connect the upper and lower planar double spiral patches, the problem of large inductance value and high quality factor in low-frequency power amplifiers is solved, achieving increased inductance value and reduced area, thus realizing miniaturized design.

CN122117601APending Publication Date: 2026-05-29UNIV OF ELECTRONICS SCI & TECH OF CHINA
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
UNIV OF ELECTRONICS SCI & TECH OF CHINA
Filing Date
2026-01-21
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Existing technologies struggle to achieve the high inductance and quality factor required for low-frequency power amplifiers within a limited chip area. Traditional on-chip planar double-helix inductors offer limited improvement and may introduce process complexity and cost.

Method used

A non-circular three-dimensional spiral inductor structure based on silicon interposer technology is adopted. The upper and lower planar double spiral patches are interconnected and connected by silicon vias to form a three-dimensional spiral structure, which improves the inductor quality factor and reduces the device size.

Benefits of technology

While maintaining RF performance, the inductance value was increased and the area was reduced, achieving the miniaturization design goal and improving the inductance density.

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Abstract

The application discloses a high-inductance value heterogeneous three-dimensional spiral inductor based on a silicon adapter plate process and belongs to the technical field of radio frequency micro systems. The method integrates multiple planar double spiral patches on the basis of an original three-dimensional integrated inductor, so that the frequency range coverage basically reaches 0-3GHz, and the inductance value can reach 18.5nH. Compared with a traditional three-dimensional integrated inductor design, the method of the application makes the upper and lower layers of the planar double spiral patch staggered and interconnected, reduces the volume of an off-chip spiral inductor used in a traditional power amplifier application while realizing large inductance, and realizes higher inductance inductance value on a single-layer silicon substrate.
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