A broadband multi-stage gysel power divider based on IPD process

Abstract

The application discloses a broadband multi-stage Gysel power divider based on an IPD process, comprising a microstrip structure layer, and first and second dielectric substrates and a ground metal layer; the microstrip structure layer adopts a multi-layer nested structure, each layer of the nested structure is formed by cascading multi-stage Gysel power division units, and is arranged on the upper surface and the interior of the first dielectric substrate, so that an integrated layout based on the IPD process is formed, and a planar spiral structure, an air bridge, a parallel plate capacitor, a thin film resistor and a layered ground unit structure are integrated; the planar spiral structure is equivalent to a specific characteristic impedance transmission line, the air bridge structure solves cross interference and suppresses a parasitic capacitor, the parallel plate capacitor structure calibrates equivalent reactance parameters, the thin film resistor effectively improves port isolation and heat dissipation, and the layered ground unit structure strengthens heat dissipation and ground reliability. The application can realize stable power distribution in a wide frequency band, and is suitable for the integration requirements of high-frequency, high-power and small-sized radio frequency front ends.

Description

Technical Field

[0001] This invention relates to the field of microwave circuit device technology, and in particular to a broadband multi-stage Gysel power divider based on IPD technology. Background Technology

[0002] Power dividers are indispensable passive devices in radio frequency and microwave systems, widely used in phased array antennas, multi-channel transceivers, power combining amplifiers, and modern communication systems. As wireless communication evolves towards higher frequencies, wider bandwidths, and higher integration, systems place higher demands on power dividers for miniaturization, high-density integration, wide bandwidth, and high power tolerance. Traditional power dividers can no longer meet practical application needs, and many technical bottlenecks remain to be addressed.

[0003] Currently, the mainstream power dividers in the industry are mainly divided into Wilkinson type and Gysel type. Among them, Gysel power dividers are particularly suitable for medium and high power scenarios due to their high power capacity, good port matching and isolation performance. For example, Reference 1 (Xia Bin, Cheng Jia-Dong, Xiong Can, Xiao Han, Wu Lin-Sheng, Mao Jun-Fa, "A New Gysel Out-of-Phase Power Divider With Arbitrary Power Dividing Ratio Based on Analysis Method of Equivalence of N-Port Networks", in IEEE Transactions on Microwave Theory and Techniques, vol. 69, no. 2, pp. 1335-1343, Feb. 2021) proposed two power dividers based on PCB printed circuit boards with power distribution ratios of 32 (approximately 15dB) and 1000 (30dB), respectively. Reference 2 (Luo Ming, Tang Xiao-Hong, Lu Di, Zhang Yong-Hong, Liu Yong, Xu Xin, Cao Yu, "Balanced-to-Balanced Gysel Filtering Power Divider With Arbitrary Power Division," in IEEE Access, vol. 8, pp. 36454-36463, 2020) proposes a Gysel power divider with arbitrary power distribution ratios at balanced-to-balanced ports. These works demonstrate the superiority of Gysel structures in high-power scenarios.

[0004] However, the Gysel structure itself has obvious defects: traditional Gysel power dividers have a narrow operating bandwidth, usually only about 30%. Even with multi-level technical optimization, the bandwidth improvement effect is still limited, making it difficult to meet the needs of ultra-wideband RF systems. At the same time, its structural design results in a large size. Traditional solutions can only reduce the size by bending microstrip lines, which is not effective in miniaturization and cannot be adapted to high-density integration scenarios.

[0005] To achieve miniaturized integration, Integrated Passive Devices (IPD) technology, with its advantages of advanced technology, small size, low parasitic parameters, and strong process compatibility, has gradually become the mainstream fabrication process for power dividers, providing an effective way to achieve miniaturization and high performance. Compared with traditional integration processes such as Low Temperature Co-fired Ceramics (LTCC), IPD technology has higher integration density and smaller process errors, enabling the integrated integration of passive components such as resistors, capacitors, and inductors, significantly reducing device size and improving electrical performance stability.

[0006] However, existing Gysel power dividers based on IPD technology have not yet effectively solved core problems such as relatively limited bandwidth, parasitic parameter interference, and insufficient heat dissipation performance: the planar spiral structure, as the core component for impedance regulation, is prone to parasitic capacitance and signal crosstalk at its intersections; unreasonable grounding structure design leads to low heat dissipation efficiency and poor grounding reliability, which restricts the improvement of power capacity; the connection layout between thin film resistors and transmission lines is not optimized enough, making it difficult to balance port isolation and impedance matching performance, which seriously affects the operating stability of the device in a wide frequency band.

[0007] Therefore, in response to the technical pain points of existing Gysel power dividers, such as narrow bandwidth, large size, limited power capacity, parasitic interference, and insufficient heat dissipation in IPD integrated process applications, it is urgent to develop an IPD broadband multi-stage Gysel power divider that combines miniaturization, wide bandwidth, high power capacity, and excellent heat dissipation performance. This is of great significance for promoting the integrated development of high-frequency communication systems. Summary of the Invention

[0008] The purpose of this invention is to provide a broadband multi-stage Gysel power divider based on IPD technology that is small in size, has a large power capacity, and a large operating bandwidth.

[0009] The technical solution to achieve the purpose of this invention is: a broadband multi-stage Gysel power divider based on IPD technology, including a microstrip structure layer, and a first dielectric substrate, a second dielectric substrate and a ground metal layer arranged sequentially from top to bottom;

[0010] The grounding metal layer completely covers the lower surface of the second dielectric substrate. The grounding metal layer and the second dielectric substrate together constitute the support substrate of the device, providing mechanical support for the overall architecture of the power divider on the one hand, and forming an electromagnetic shielding environment through the grounding metal layer on the other hand.

[0011] The microstrip structure layer adopts a multi-layer nested structure and is symmetrical about the center line of the input port. The symmetrical layout ensures the amplitude and phase consistency of each output port. The multi-layer nested structure is set on the upper surface and inside of the first dielectric substrate to form an integrated layout based on IPD process.

[0012] Each nested structure is composed of multiple cascaded Gysel power distribution units. By progressively expanding the operating bandwidth and optimizing impedance matching characteristics, it achieves wideband power distribution and port isolation performance. Each nested structure is equipped with two high-power thin-film resistors, symmetrically arranged on the upper and lower sides of the center line of the input port. Each high-power thin-film resistor is connected to a grounding unit to form a direct grounding heat dissipation path.

[0013] The transmission body of each Gysel power distribution unit is implemented using microstrip lines. The linewidth of each microstrip line is designed according to the target characteristic impedance to ensure continuous impedance matching and low signal loss transmission over a wide bandwidth. Each microstrip line integrates a planar spiral structure, and the geometric dimensions of the planar spiral structure are determined iteratively by the target equivalent reactance value. A double-layer spiral plate structure is set between two adjacent nested structures to form a double-layer spiral-ground capacitor path structure.

[0014] Furthermore, the power divider adopts a three-port architecture including an input port, a first output port, and a second output port. The input port is located at the center of the multi-layer nested structure to achieve symmetrical center excitation and uniform power distribution. The first and second output ports are symmetrically distributed on the outer side of the outermost nested structure with the horizontal central axis as the reference, so that the two outputs have a consistent transmission environment and electrical characteristics. The equivalent electrical length of the physical path from the input port to the first and second output ports is half a wavelength, achieving phase synchronization and impedance matching in a wide frequency band.

[0015] Furthermore, the double-layer spiral plate structure includes an upper spiral plate and a lower spiral plate, which are stacked together. The upper and lower spiral plates are connected to a parallel plate capacitor structure through conductive microstrip lines. The other end of the parallel plate capacitor structure is connected to a grounding unit to achieve grounding.

[0016] Furthermore, the equivalent circuit model of the planar spiral structure adopts a lumped parameter topology design, which is represented as a lumped parameter circuit consisting of two independent inductors and a grounding capacitor. At the same time, the parasitic capacitance under the IPD process and the coupling mutual inductance between the inner and outer rings of the spiral structure due to electromagnetic induction are also taken into account, which together constitute the equivalent circuit topology. This equivalent circuit topology is functionally equivalent to a microstrip transmission line with a set characteristic impedance and a set electrical length. Within the integrated layout space of the IPD process, impedance regulation, phase compensation, and wideband adaptation are achieved.

[0017] Furthermore, the planar spiral structure includes an inner winding, an outer winding, an air bridge, a parallel plate capacitor structure, and a grounding unit;

[0018] The inner and outer windings adopt an integrated structure design with nested winding. The inner and outer windings are wound evenly at a preset interval. An air bridge is set at the intersection of the inner and outer windings for dielectric isolation.

[0019] The inner winding is connected to a parallel plate capacitor structure via metal wiring. The other end of the parallel plate capacitor structure is directly connected to a grounding unit with low impedance to form a grounding path.

[0020] Furthermore, the air bridge is fabricated using IPD multilayer metal wiring technology and is located at the junction of the inner and outer windings of the planar spiral structure. The air bridge adopts a layered bridge surface layout, in which one microstrip line crosses another microstrip line through a metal layer lifting process to form the upper bridge surface of the air bridge, and the other microstrip line is embedded in the first dielectric substrate through an embedded wiring process to form the lower bridge surface of the air bridge, so that the transmission lines of the inner and outer windings each form independent signal transmission paths. Air is used as the dielectric isolation medium between the upper and lower bridge surfaces to block the direct electromagnetic coupling path between the inner and outer windings and suppress signal crosstalk.

[0021] Furthermore, the parallel plate capacitor structure includes an upper plate and a lower plate;

[0022] The parallel plate capacitor structure adopts an IPD-compatible MIM parallel plate capacitor structure. The capacitance value is designed according to the equivalent reactance control requirements of the planar spiral structure to compensate and calibrate the equivalent circuit characteristics of the planar spiral structure. The upper and lower plates are a pair of parallel square metal plates, with the upper plate located on the upper surface of the first dielectric substrate. The lower plate is embedded in the bottom of the first dielectric substrate and has a thickness less than that of the first dielectric substrate, but a larger planar dimension than the upper plate. This is used to suppress the edge effect of the plates and reduce the generation of edge parasitic capacitance. One end of the parallel plate capacitor structure is connected to the inner winding of the planar spiral structure, and the other end is directly connected to the grounding unit through metal wiring to form a complete grounding path, which helps to stabilize the equivalent reactance parameters of the planar spiral structure.

[0023] Furthermore, the grounding unit includes an upper grounding metal plate, a middle grounding metal plate, a lower grounding metal plate, and a grounding metal post arranged from top to bottom;

[0024] The grounding unit adopts an integrated design combining layered metal plates and through-type metal pillars, which is compatible with the first dielectric substrate, the second dielectric substrate, and the grounding metal layer. The upper grounding metal plate is located on the upper surface of the first dielectric substrate. The middle and lower grounding metal plates are embedded in the first dielectric substrate, and the thickness of the middle and lower grounding metal plates is equal to the thickness of the first dielectric substrate. The lower grounding metal plate has the largest planar dimension, followed by the upper grounding metal plate, and the middle grounding metal plate has the smallest planar dimension. The grounding metal pillars penetrate the second dielectric substrate vertically, reliably connecting the lower grounding metal plate and the grounding metal layer.

[0025] Furthermore, the high-power thin-film resistor included in the nested structure is placed at the junction of the transmission line with an equivalent quarter-wavelength electrical length and the transmission line with an equivalent half-wavelength electrical length. One end of the resistor is connected to the microstrip line, and the other end is connected to a grounding unit to form a direct grounding path, which is used to increase the isolation between the output ports and optimize the impedance matching of the output ports.

[0026] Furthermore, the multi-stage Gysel power divider is a three-stage Gysel power divider, with an inner structure of a single-stage Gysel power divider and an outer structure of cascaded two-stage Gysel power dividers.

[0027] The first-stage Gysel power divider comprises, in a clockwise direction, a first quarter-wavelength transmission line placed vertically, a second quarter-wavelength transmission line placed horizontally, a third half-wavelength transmission line placed vertically, a fourth quarter-wavelength transmission line placed horizontally, and a fifth quarter-wavelength transmission line placed vertically, forming a closed loop; a high-power thin-film resistor and a grounding unit connected thereto are provided at the connection between the second and third transmission lines; a high-power thin-film resistor and a grounding unit connected thereto are also provided at the connection between the third and fourth transmission lines.

[0028] The secondary Gysel power divider comprises: a first transmission line and a fifth transmission line shared with the inner structure, placed vertically; a sixth, seventh, eleventh, thirteenth, ninth, and tenth transmission lines, each a quarter wavelength, placed horizontally; an eighth and twelfth transmission lines, each a half wavelength, placed vertically; a high-power thin-film resistor located at the connection point of the eleventh and twelfth transmission lines and a grounding unit connected thereto; and a high-power thin-film resistor located at the connection point of the twelfth and thirteenth transmission lines and a grounding unit connected thereto. The sixth, seventh, eighth, ninth, and tenth transmission lines, connected clockwise, form the first stage of the outer structure and are connected to the input port 1 via the first and fifth transmission lines. The eleventh, twelfth, and thirteenth transmission lines, connected clockwise, form the second stage of the outer structure and are connected to the first stage of the outer structure via the eighth transmission line.

[0029] The first, second, third, fourth, fifth, sixth, seventh, ninth, tenth, eleventh, twelfth and thirteenth transmission lines are each integrated into a planar spiral structure, and the eighth transmission line is integrated into a double-layer spiral plate structure.

[0030] Compared with the prior art, the present invention has the following significant advantages: (1) It adopts a multi-level Gysel and multi-layer nested architecture design, combined with planar spiral structure impedance control, which broadens the return loss bandwidth and isolation bandwidth of the Gysel power divider and provides good amplitude and phase consistency; (2) Based on IPD integrated passive process, the planar spiral structure, capacitor, resistor and ground are integrated into one, which reduces the size of the device; (3) The thin film resistor is directly grounded and the layered grounding unit design has a large heat dissipation area, which enhances the heat dissipation efficiency and increases the power capacity of the power divider. Attached Figure Description

[0031] Figure 1 This is a schematic diagram of the planar structure of a broadband multi-stage Gysel power divider based on IPD technology according to the present invention.

[0032] Figure 2 This is a side view of the present invention.

[0033] Figure 3 This is the planar spiral structure and its equivalent circuit diagram in this invention.

[0034] Figure 4 This is a top view of the connection structure of the transmission line-parallel plate capacitor structure-grounding unit in this invention.

[0035] Figure 5 The image shows the S-parameter performance curves of a broadband multi-stage Gysel power divider based on IPD technology provided in this embodiment of the invention.

[0036] Figure 6 The graph shows the signal phase difference and amplitude difference curves of the two output ports of the broadband multi-stage Gysel power divider based on IPD technology provided in this embodiment of the invention.

[0037] The diagram is labeled as follows: 1. First dielectric substrate; 2. Second dielectric substrate; 3. Grounding metal layer; 4. Planar spiral structure; 5. Air bridge; 6. Parallel plate capacitor structure; 6-1. Upper electrode plate; 6-2. Lower electrode plate; 7. Grounding unit; 7-1. Upper grounding metal plate; 7-2. Middle grounding metal plate; 7-3. Lower grounding metal plate; 7-4. Grounding metal post; 8. Inner winding; 9. Outer winding; 10. Double-layer spiral plate structure; 11. High-power thin-film resistor L1, First transmission line; L2, Second transmission line; L3, Third transmission line; L4, Fourth transmission line; L5, Fifth transmission line; L6, Sixth transmission line; L7, Seventh transmission line; L8, Eighth transmission line; L9, Ninth transmission line; L10, Tenth transmission line; L11, Eleventh transmission line; L12, Twelfth transmission line; L13, Thirteenth transmission line; port1, Input port; port2, First output port; port3, Second output port. Detailed Implementation

[0038] The present invention provides a broadband multi-stage Gysel power divider based on IPD technology, including a microstrip structure layer, and a first dielectric substrate 1, a second dielectric substrate 2 and a ground metal layer 3 arranged sequentially from top to bottom;

[0039] The grounding metal layer 3 completely covers the lower surface of the second dielectric substrate 2. The grounding metal layer 3 and the second dielectric substrate 2 together constitute the support substrate of the device, providing mechanical support for the overall architecture of the power divider on the one hand, and forming an electromagnetic shielding environment through the grounding metal layer 3 on the other hand.

[0040] The microstrip structure layer adopts a multi-layer nested structure and is symmetrical about the center line of the input port. The symmetrical layout ensures the amplitude and phase consistency of each output port. The multi-layer nested structure is set on the upper surface and inside of the first dielectric substrate 1 to form an integrated layout based on IPD process.

[0041] Each nested structure is composed of multiple cascaded Gysel power distribution units. By progressively expanding the operating bandwidth and optimizing impedance matching characteristics, it achieves wideband power distribution and port isolation performance. Each nested structure is equipped with two high-power thin-film resistors 11, which are symmetrically arranged on the upper and lower sides of the center line of the input port. Each high-power thin-film resistor 11 is connected to a grounding unit 7 to form a direct grounding heat dissipation path.

[0042] The transmission body of each Gysel power distribution unit is implemented using microstrip lines. The linewidth of each microstrip line is designed according to the target characteristic impedance to ensure continuous impedance matching and low signal loss transmission over a wide bandwidth. Each microstrip line integrates a planar spiral structure 4, and the geometric dimensions of the planar spiral structure 4 are determined iteratively by the target equivalent reactance value. A double-layer spiral plate structure 10 is set between two adjacent nested structures to form a double-layer spiral-ground capacitor path structure.

[0043] Furthermore, the power divider adopts a three-port architecture including an input port 1, a first output port 2, and a second output port 3. The input port 1 is located at the center of the multi-layer nested structure to achieve symmetrical center excitation and uniform power distribution. The first output port 2 and the second output port 3 are symmetrically distributed on the outer side of the outermost nested structure with the horizontal central axis as the reference, so that the two outputs have a consistent transmission environment and electrical characteristics. The equivalent electrical length of the physical path between the input port 1 and the first output port 2 and the second output port 3 is half a wavelength, achieving phase synchronization and impedance matching in a wide frequency band.

[0044] Furthermore, the double-layer spiral plate structure 10 includes an upper spiral plate and a lower spiral plate, which are stacked together. The upper spiral plate and the lower spiral plate are connected to a parallel plate capacitor structure 6 through conductive microstrip lines. The other end of the parallel plate capacitor structure 6 is connected to a grounding unit 7 to achieve grounding.

[0045] Furthermore, the equivalent circuit model of the planar spiral structure 4 adopts a lumped parameter topology design, which is represented as a lumped parameter circuit consisting of two independent inductors and a grounding capacitor. At the same time, the parasitic capacitance under the IPD process and the coupling mutual inductance between the inner and outer rings of the spiral structure due to electromagnetic induction are also taken into account, which together constitute the equivalent circuit topology. This equivalent circuit topology is functionally equivalent to a microstrip transmission line with a set characteristic impedance and a set electrical length. Within the integrated layout space of the IPD process, impedance regulation, phase compensation and wideband adaptation are achieved.

[0046] Furthermore, the planar spiral structure 4 includes an inner winding 8, an outer winding 9, an air bridge 5, a parallel plate capacitor structure 6, and a grounding unit 7.

[0047] The inner winding 8 and the outer winding 9 adopt an integrated structure design of nested winding. The inner winding 8 and the outer winding 9 are wound evenly at a preset interval. An air bridge 5 is set at the intersection of the inner winding 8 and the outer winding 9 for dielectric isolation treatment.

[0048] The inner winding 8 is connected to the parallel plate capacitor structure 6 through metal wiring. The other end of the parallel plate capacitor structure 6 is directly connected to a grounding unit 7 with low impedance to form a grounding path.

[0049] Furthermore, the air bridge 5 is fabricated using IPD multilayer metal wiring technology and is located at the connection position between the inner winding 8 and the outer winding 9 of the planar spiral structure 4. The air bridge 5 adopts a layered bridge surface layout, in which one microstrip line crosses another microstrip line through a metal layer lifting process to form the upper bridge surface of the air bridge 5, and the other microstrip line is embedded in the first dielectric substrate 1 through an embedded wiring process to form the lower bridge surface of the air bridge 5, so that the transmission lines of the inner winding 8 and the outer winding 9 each form an independent signal transmission path. Air is used as the dielectric isolation medium between the upper bridge surface and the lower bridge surface to block the direct electromagnetic coupling path between the inner winding 8 and the outer winding 9 and suppress signal crosstalk.

[0050] Furthermore, the parallel plate capacitor structure 6 includes an upper plate 6-1 and a lower plate 6-2;

[0051] The parallel plate capacitor structure 6 adopts an IPD-compatible MIM parallel plate capacitor structure. The capacitance value is designed according to the equivalent reactance control requirements of the planar spiral structure 4 to compensate and calibrate the equivalent circuit characteristics of the planar spiral structure 4. The upper plate 6-1 and the lower plate 6-2 are a pair of parallel square metal plates. The upper plate 6-1 is located on the upper surface of the first dielectric substrate 1. The lower plate 6-2 is embedded in the bottom of the first dielectric substrate 1 and its thickness is less than that of the first dielectric substrate 1. Its planar size is larger than that of the upper plate 6-1. It is used to suppress the edge effect of the plate and reduce the generation of edge parasitic capacitance. One end of the parallel plate capacitor structure 6 is connected to the inner winding 8 of the planar spiral structure 4, and the other end is directly connected to the grounding unit 7 through metal wiring to form a complete grounding path, which helps to stabilize the equivalent reactance parameters of the planar spiral structure 4.

[0052] Furthermore, the grounding unit 7 includes an upper grounding metal plate 7-1, a middle grounding metal plate 7-2, a lower grounding metal plate 7-3, and a grounding metal post 7-4 arranged from top to bottom;

[0053] The grounding unit 7 adopts an integrated design combining layered metal plates and through-type metal pillars, and is compatible with the first dielectric substrate 1, the second dielectric substrate 2, and the grounding metal layer 3. The upper grounding metal plate 7-1 is located on the upper surface of the first dielectric substrate 1. The middle grounding metal plate 7-2 and the lower grounding metal plate 7-3 are embedded in the first dielectric substrate 1, and the thickness of the middle grounding metal plate 7-2 and the lower grounding metal plate 7-3 is equal to the thickness of the first dielectric substrate 1. The lower grounding metal plate 7-3 has the largest planar dimension, the upper grounding metal plate 7-1 has the second largest planar dimension, and the middle grounding metal plate 7-2 has the smallest planar dimension. The grounding metal pillar 7-4 penetrates the second dielectric substrate 2 vertically, reliably connecting the lower grounding metal plate 7-3 and the grounding metal layer 3.

[0054] Furthermore, the high-power thin-film resistor 11 included in the nested structure is disposed at the junction of the transmission line with an equivalent quarter wavelength electrical length and the transmission line with an equivalent half wavelength electrical length. One end of the resistor is connected to the microstrip line, and the other end is connected to a grounding unit 7 to form a direct grounding path, which is used to increase the isolation between the output ports and optimize the impedance matching of the output ports.

[0055] Furthermore, the multi-stage Gysel power divider is a three-stage Gysel power divider, with an inner structure of a single-stage Gysel power divider and an outer structure of cascaded two-stage Gysel power dividers.

[0056] The first-stage Gysel power divider comprises, in a clockwise direction, a first quarter-wavelength transmission line L1 placed vertically, a second quarter-wavelength transmission line L2 placed horizontally, a third half-wavelength transmission line L3 placed vertically, a fourth quarter-wavelength transmission line L4 placed horizontally, and a fifth quarter-wavelength transmission line L5 placed vertically, forming a closed loop. A high-power thin-film resistor 11 and a grounding unit 7 connected thereto are provided at the connection between the second transmission line L2 and the third transmission line L3; a high-power thin-film resistor 11 and a grounding unit 7 connected thereto are also provided at the connection between the third transmission line L3 and the fourth transmission line L4.

[0057] The secondary Gysel power divider includes: a first transmission line L1 and a fifth transmission line L5, shared with the inner structure and placed vertically; a sixth transmission line L6, a seventh transmission line L7, an eleventh transmission line L11, a thirteenth transmission line L13, a ninth transmission line L9, and a tenth transmission line L10, placed horizontally; a half-wavelength eighth transmission line L8 and a twelfth transmission line L12, placed vertically; a high-power thin-film resistor 11 located at the connection between the eleventh transmission line L11 and the twelfth transmission line L12 and a grounding unit 7 connected thereto; and a grounding unit 7 located at the... The high-power thin-film resistor 11 at the connection of the twelfth transmission line L12 and the thirteenth transmission line L13, and the grounding unit 7 connected thereto constitute the structure. Among them, the sixth transmission line L6, the seventh transmission line L7, the eighth transmission line L8, the ninth transmission line L9, and the tenth transmission line L10 are connected clockwise to form the first stage of the outer structure, and are connected to the input port port1 through the first transmission line L1 and the fifth transmission line L5. The eleventh transmission line L11, the twelfth transmission line L12, and the thirteenth transmission line L13 are connected clockwise to form the second stage of the outer structure, and are connected to the first stage of the outer structure through the eighth transmission line L8.

[0058] The first transmission line L1, the second transmission line L2, the third transmission line L3, the fourth transmission line L4, the fifth transmission line L5, the sixth transmission line L6, the seventh transmission line L7, the ninth transmission line L9, the tenth transmission line L10, the eleventh transmission line L11, the twelfth transmission line L12, and the thirteenth transmission line L13 each integrate a planar spiral structure 4, and the eighth transmission line L8 integrates a double-layer spiral plate structure 10.

[0059] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0060] Example 1

[0061] like Figure 1 , Figure 2As shown, this embodiment provides a broadband multi-stage Gysel power divider based on IPD technology, including a microstrip structure layer, a first dielectric substrate 1, a second dielectric substrate 2, and a ground metal layer 3.

[0062] The microstrip structure layer, the first dielectric substrate 1, the second dielectric substrate 2, and the ground metal layer 3 are arranged sequentially from top to bottom; the ground metal layer 3 and the second dielectric substrate 2 together constitute the support substrate of the device, which provides reliable mechanical support for the overall architecture of the power divider on the one hand, and forms a continuous, low-impedance electromagnetic shielding environment through the ground metal layer 3 on the other hand.

[0063] The microstrip structure is a multi-layered nested structure, which is symmetrical about the horizontal center line of the power divider. The symmetrical layout ensures the amplitude and phase consistency of each output port, meeting the application requirements of RF and microwave systems for in-phase power division and low amplitude and phase errors. Each nested structure is composed of multiple cascaded Gysel power distribution units. By progressively expanding the operating bandwidth and optimizing impedance matching characteristics, stable power distribution and port isolation performance over a wide bandwidth are achieved. Each nested structure is equipped with two high-power thin-film resistors 11, which are symmetrically arranged on both sides of the horizontal center line of the first dielectric substrate 1. Each high-power thin-film resistor 11 is connected to a grounding unit 7, forming a direct grounding heat dissipation path. A double-layer spiral plate structure 10 is set between every two nested structures to adapt to the application requirements of high-power and ultra-low impedance scenarios.

[0064] The transmission body of the Gysel power distribution unit is implemented using highly consistent microstrip lines. The linewidth of each microstrip line is finely designed according to the target characteristic impedance to ensure continuous impedance matching and low signal loss transmission over a wide bandwidth. Each microstrip line integrates a planar spiral structure 4. The geometric dimensions of the planar spiral structure 4 are precisely determined iteratively by the target equivalent reactance value. This allows for flexible implementation of wideband impedance transformation, phase compensation, and reactance control without significantly increasing the circuit area, thus improving the problems of limited bandwidth and large size of traditional Gysel structures.

[0065] As a specific example, the power divider adopts a three-port architecture including an input port 1, a first output port 2, and a second output port 3. The input port 1 is located at the center of the multi-layer nested structure, achieving symmetrical center excitation and uniform power distribution. The first output port 2 and the second output port 3 are symmetrically distributed on the outer side of the outermost nested structure with the horizontal central axis as the reference, so that the two outputs have a consistent transmission environment and electrical characteristics. The equivalent electrical length of the physical path from the input port 1 to the first output port 2 and the second output port 3 is half a wavelength, achieving precise phase synchronization and impedance matching in a wide frequency band. This ensures that the two output signals have excellent amplitude flatness and phase consistency across the entire frequency band, improving the balance of power distribution, port isolation, and system stability, and is more suitable for the integration requirements of high-power, wideband, and miniaturized RF front-ends.

[0066] As a specific example, the double-layer spiral plate structure 10 includes an upper spiral plate and a lower spiral plate, which are stacked together. The upper and lower spiral plates are connected to a parallel plate capacitor structure 6 through a conductive microstrip line. The other end of the parallel plate capacitor structure 6 is connected to a grounding unit 7 to achieve grounding, forming a double-layer spiral-grounding capacitor path structure, which is suitable for application requirements in high-power and ultra-low impedance scenarios.

[0067] As a specific example, such as Figure 3 As shown, the equivalent circuit model of the planar spiral structure 4 adopts a high-precision lumped parameter topology design, which can be represented as a lumped parameter circuit consisting of two independent inductors and a grounding capacitor. Simultaneously, it takes into account the unavoidable parasitic capacitance under the IPD process and the coupling inductance between the inner and outer rings of the spiral structure due to electromagnetic induction, together forming a complete equivalent circuit topology that balances basic reactance characteristics and high-frequency parasitic effects. This equivalent circuit topology can be precisely equivalent to a microstrip transmission line with specific characteristic impedance and electrical length in its overall function. Compared to traditional microstrip lines, it enhances the design flexibility of the power divider, enabling precise impedance control, phase compensation, and wideband adaptation—achievable with traditional transmission lines—within the compact integration space of IPD devices. This meets the requirements of IPD integrated passive device technology for device miniaturization and high performance.

[0068] As a specific example, such as Figure 3 As shown, the planar spiral structure 4 includes an inner winding 8, an outer winding 9, an air bridge 5, a parallel plate capacitor structure 6, and a grounding unit 7.

[0069] The inner winding 8 and the outer winding 9 adopt an integrated structure design of nested winding. The inner winding 8 and the outer winding 9 are wound evenly at a preset interval to ensure that the inductance and coupling characteristics of the spiral structure are stable and controllable. An air bridge 5 is set at the intersection of the inner winding 8 and the outer winding 9 for dielectric isolation treatment, separating the conductors of the inner winding 8 and the outer winding 9 at the intersection, and avoiding direct electromagnetic coupling and signal crosstalk between the inner winding 8 and the outer winding 9.

[0070] like Figure 4 As shown, the inner winding 8 is connected to the parallel plate capacitor structure 6 through metal wiring. The other end of the parallel plate capacitor structure 6 is directly connected to the grounding unit 7 with low impedance to form a grounding path.

[0071] As a specific example, the air bridge 5 is fabricated using IPD multilayer metal wiring technology and is located at the connection position between the inner winding 8 and the outer winding 9 of the planar spiral structure 4. The air bridge 5 adopts a layered bridge surface layout, in which one microstrip line crosses another microstrip line through a metal layer lifting process to form the upper bridge surface of the air bridge 5, and the other microstrip line is embedded in the first dielectric substrate 1 through an embedded wiring process to form the lower bridge surface of the air bridge 5. This ensures both structural stability and signal transmission stability, and also achieves a certain electromagnetic shielding effect through the substrate, thus solving the problem of electromagnetic shielding in the inner winding of the planar spiral structure 4. The crossing problem between the transmission lines of inner winding 8 and outer winding 9 is addressed by establishing independent signal transmission paths for each. Air is used as the dielectric isolation medium between the upper and lower bridge surfaces. Utilizing the low dielectric constant and excellent insulation properties of air, the direct electromagnetic coupling path between inner winding 8 and outer winding 9 is effectively blocked, suppressing signal crosstalk. The layered design of the air bridge 5 fills the space between the two conductors at the crossing point with both air and substrate material, while slightly increasing the conductor spacing. This doubly suppresses parasitic capacitance at the crossing point, ensuring the accuracy of the equivalent reactance value of the planar spiral structure 4.

[0072] As a specific example, the parallel plate capacitor structure 6 includes an upper plate 6-1 and a lower plate 6-2;

[0073] The parallel plate capacitor structure 6 adopts an IPD-compatible MIM parallel plate capacitor structure. Its capacitance value is designed according to the equivalent reactance control requirements of the planar spiral structure 4, which can achieve fine compensation and calibration of the equivalent circuit characteristics of the planar spiral structure 4. The upper plate 6-1 and the lower plate 6-2 are a pair of parallel square metal plates. The upper plate 6-1 is located on the upper surface of the first dielectric substrate 1. The lower plate 6-2 is embedded in the bottom of the first dielectric substrate 1. Its thickness is less than the thickness of the first dielectric substrate 1, and its planar size is slightly larger than that of the upper plate 6-1. It is used to suppress the edge effect of the plate and reduce the generation of edge parasitic capacitance. One end of the parallel plate capacitor structure 6 is connected to the inner winding 8 of the planar spiral structure 4, and the other end is directly and low-impedance connected to the grounding unit 7 through metal wiring to form a complete grounding path. This is used to suppress high-frequency noise interference, help stabilize the equivalent reactance parameters of the planar spiral structure 4, improve the working stability, phase consistency and impedance matching accuracy of the entire power divider in a wide frequency band, and adapt to the needs of high-frequency radio frequency signal transmission and power distribution.

[0074] As a specific example, the grounding unit 7 includes an upper grounding metal plate 7-1, a middle grounding metal plate 7-2, a lower grounding metal plate 7-3, and a grounding metal post 7-4 arranged from top to bottom;

[0075] The grounding unit 7 adopts an integrated design combining layered metal plates and through-type metal pillars, and is compatible with the first dielectric substrate 1, the second dielectric substrate 2, and the grounding metal layer 3. The upper grounding metal plate 7-1 is located on the upper surface of the first dielectric substrate 1. The middle grounding metal plate 7-2 and the lower grounding metal plate 7-3 are embedded in the first dielectric substrate 1, and the thickness of the middle grounding metal plate 7-2 and the lower grounding metal plate 7-3 is equal to the thickness of the first dielectric substrate 1. The lower grounding metal plate 7-3 has the largest planar dimension, the upper grounding metal plate 7-1 has the second largest planar dimension, and the middle grounding metal plate 7-2 has the smallest planar dimension. The grounding metal pillar 7-4 penetrates the second dielectric substrate 2 vertically, reliably connecting the lower grounding metal plate 7-3 and the grounding metal layer 3. The design of the three-layer grounding metal plate and grounding pillar increases the heat conduction cross-sectional area and improves the heat dissipation efficiency.

[0076] As a specific example, the high-power thin-film resistors 11 included in the nested structure are all set at the junction of the transmission line with an equivalent quarter wavelength electrical length and the transmission line with an equivalent half wavelength electrical length. One end of the resistor is connected to the microstrip line and the other end is connected to the grounding unit 7 to form a direct grounding path. This is used to increase the isolation between the output ports, optimize the impedance matching of the output ports, optimize the heat dissipation performance, and increase the power capacity.

[0077] As a specific example, the power divider adopts a multi-layer nested structure and integrated design, maintaining good power distribution performance over a wide bandwidth, and has the advantages of small size, large power capacity, large operating bandwidth, and good heat dissipation performance.

[0078] Example 2

[0079] This embodiment provides a broadband three-stage Gysel power divider based on IPD technology, including a microstrip structure layer, a first dielectric substrate 1, a second dielectric substrate 2, and a ground metal layer 3;

[0080] The microstrip structure layer, the first dielectric substrate 1, the second dielectric substrate 2, and the ground metal layer 3 are arranged sequentially from top to bottom; both the microstrip line and the ground metal layer 3 are made of gold, and the height of the microstrip line in the microstrip structure layer is 3.3 μm; the first dielectric substrate 1 is made of SiNx, a widely used functional ceramic thin film material with a relative permittivity of 6.2, a dielectric loss tangent of 0.002, a substrate thickness of 0.73 μm, and a cross-sectional dimension of 5.1 mm. 3.5mm; the material of the second dielectric substrate 2 is GaAs, with a relative permittivity of 12.9, a dielectric loss tangent of 0.002, a substrate thickness of 0.1mm, and the same cross-sectional dimensions as the first dielectric substrate 1; the thickness of the ground metal layer 3 is 6μm, and the same cross-sectional dimensions as the first dielectric substrate 1;

[0081] The microstrip structure is a multi-layer nested structure, which is symmetrical about the horizontal center line of the power divider. The symmetrical layout ensures the amplitude and phase consistency of each output port, meeting the application requirements of RF and microwave systems for in-phase power division and low amplitude and phase error. Each nested structure is composed of multiple cascaded Gysel power distribution units. By progressively expanding the operating bandwidth and optimizing impedance matching characteristics, stable power distribution and port isolation performance within a wide bandwidth are achieved. Each nested structure is equipped with two high-power thin-film resistors 11, which are symmetrically arranged on both sides of the horizontal center line of the first dielectric substrate 1. Each high-power thin-film resistor 11 is connected to a grounding unit 7, forming a direct grounding heat dissipation path.

[0082] The inner structure is a single-stage Gysel power divider, comprising a closed loop consisting of a quarter-wavelength first transmission line L1 placed vertically, a quarter-wavelength second transmission line L2 placed horizontally, a half-wavelength third transmission line L3 placed vertically, a quarter-wavelength fourth transmission line L4 placed horizontally, and a quarter-wavelength fifth transmission line L5 placed vertically. A high-power thin-film resistor 11 is located at the connection between the second transmission line L2 and the third transmission line L3, and a grounding unit 7 is connected thereto. The third transmission line L5... The high-power thin-film resistor 11 at the connection point of transmission line 3 and the fourth transmission line L4, and the grounding unit 7 connected thereto; wherein, the first and fifth transmission lines L1 and L5 are symmetrical about the horizontal center line, with a line width of 40μm; L2 and L4 are symmetrical about the horizontal center line, with a line width of 60μm; L3 itself is symmetrical about the horizontal center line, with a line width of 150μm; the high-power thin-film resistor 11 is connected to L3 through a standard 50-ohm characteristic impedance microstrip line with a line width of 95μm; the sheet resistance of the high-power thin-film resistor 11 is 25, the aspect ratio is 2, and it is directly grounded through the grounding unit 7;

[0083] The outer structure is a cascaded two-stage Gysel power divider, comprising: quarter-wavelength first and fifth transmission lines L1 and L5 (shared with the inner structure) placed vertically; quarter-wavelength sixth, seventh, eleventh, thirteenth, ninth, and tenth transmission lines L6, L7, L11, L13, L9, and L10 (placed horizontally); half-wavelength eighth and twelfth transmission lines L8 and L12 (placed vertically); a high-power thin-film resistor 11 located at the connection of the eleventh transmission line L11 and the twelfth transmission line L12 and its connected grounding unit 7; and a high-power thin-film resistor 11 located at the connection of the twelfth transmission line L12 and the thirteenth transmission line L13 and its connected grounding unit 7. L6, L7, L8, L9, and L10, connected clockwise, form the first stage of the outer structure and are connected to the input port port1 via L1 and L5. L11, L12, and L13, connected clockwise, form... The second stage of the outer structure is connected to the first stage of the outer structure via L8. L6 and L10 are symmetrical about the horizontal center line, with a linewidth of 80 μm; L7 and L9 are symmetrical about the horizontal center line, with a linewidth of 7 μm; L7 and L9 have a linewidth of 40 μm; L8 has a linewidth of 110 μm and is connected to a parallel plate capacitor structure 6 via a 36 μm conductive microstrip line. The upper plate 6-1 has dimensions of 100 μm * 100 μm, and the lower plate 6-2... The dimensions are 104μm*104μm, and it is connected to the ground through a grounding unit 7; L11 and L13 are symmetrical about the horizontal center line, with a line width of 100μm; L12 itself is symmetrical about the horizontal center line, with a line width of 35μm; the high-power thin film resistors 11 are all connected to L13 through a standard 50-ohm characteristic impedance microstrip line with a line width of 95μm; the sheet resistance of the high-power thin film resistors 11 is 25, the aspect ratio is 2, and it is directly grounded through the grounding unit 7.

[0084] The transmission body of the Gysel power distribution unit is implemented using highly consistent microstrip lines. The linewidth of each microstrip line is finely designed according to the target characteristic impedance to ensure continuous impedance matching and low signal loss transmission over a wide bandwidth. Each microstrip line integrates a planar spiral structure 4. The geometric dimensions of the planar spiral structure 4 are precisely determined iteratively by the target equivalent reactance value. This allows for flexible implementation of wideband impedance transformation, phase compensation, and reactance control without significantly increasing the circuit area, thus improving the problems of limited bandwidth and large size of traditional Gysel structures.

[0085] As a specific example, the power divider adopts a three-port architecture including an input port (port1), a first output port (port2), and a second output port (port3). The input port (port1) is located at the junction of the first transmission line L1 and the fifth transmission line L5, achieving symmetrical center excitation and uniform power distribution. The first output port (port2) is located at the junction of the sixth transmission line L6 and the seventh transmission line L7, and the second output port (port3) is located at the junction of the ninth transmission line L9 and the tenth transmission line L10. The two output ports are symmetrically distributed on the outer side of the outer nested structure with the horizontal central axis as the reference, so that the two outputs have a consistent transmission environment and electrical characteristics. The equivalent electrical length of the physical path from the input port (port1) to the two output ports is half a wavelength, achieving precise phase synchronization and impedance matching in a wide frequency band. This ensures that the two output signals have excellent amplitude flatness and phase consistency across the entire frequency band, effectively improving the balance of power distribution, port isolation, and system stability. Both the input and output microstrip lines are standard 50-ohm characteristic impedance microstrip lines with a linewidth of 95 μm and a line length of 0.29 mm.

[0086] As a specific example, the eighth transmission line L8 integrates a double-layer spiral plate structure 10 to meet the application requirements of high power and ultra-low impedance scenarios. The double-layer spiral plate structure 10 includes an upper spiral plate and a lower spiral plate, which are stacked and connected to a parallel plate capacitor structure 6 through a conductive microstrip line. The other end of the parallel plate capacitor structure 6 is connected to a grounding unit 7 to achieve grounding, forming a double-layer spiral-grounding capacitor path structure to meet the application requirements of high power and ultra-low impedance scenarios.

[0087] As a specific example, the first, second, third, fourth, fifth, sixth, seventh, ninth, tenth, eleventh, twelfth and thirteenth transmission lines L1, L2, L3, L4, L5, L6, L7, L9, L10, L11, L12 and L13 each integrate a planar spiral structure 4, the line width of which is the same as the line width of the transmission line to which it belongs. Each planar spiral structure 4 is connected to a parallel plate capacitor structure 6, and is grounded by connecting a grounding unit 7. Figure 2 The equivalent circuit of the planar spiral structure 4 is shown. The equivalent circuit model of the planar spiral structure 4 can be represented as a lumped parameter circuit composed of two inductors and a grounding capacitor, and a topology composed of parasitic capacitance and coupling mutual inductance. It is then equivalent to a microstrip transmission line with specific characteristic impedance and electrical length. Figure 3 and Figure 4The connection methods of the transmission lines of the planar spiral structure 4, the parallel plate capacitor structure 6, and the grounding unit 7 are illustrated from both front and top views. However, because the line widths of each transmission line segment are different, the required capacitance value of the planar spiral structure 4 will be different, thus the dimensions of the connected parallel plate capacitor structures 6 are different. For the capacitor structures connected to L1 and L5, the upper plate 6-1 has a size of 22μm*22μm, and the lower plate 6-2 has a size of 26μm*26μm; for the capacitor structures connected to L2 and L4, the upper plate 6-1 has a size of 28μm*28μm, and the lower plate 6-2 has a size of 32μm*32μm; for the capacitor structure connected to L3, the upper plate 6-1 has a size of 42μm*42μm, and the lower plate 6-2 has a size of 46μm*46μm; for the capacitor structures connected to L6 and L10, the upper plate 6-1 has a size of 27.5μm*27μm. The lower electrode 6-2 has a size of 31.5μm*31.5μm; the upper electrode 6-1 of the capacitor structure connected to L7 and L9 has a size of 19μm*19μm, and the lower electrode 6-2 has a size of 23μm*23μm; the upper electrode 6-1 of the capacitor structure connected to L11 and L13 has a size of 38μm*38μm, and the lower electrode 6-2 has a size of 42μm*42μm; the upper electrode 6-1 of the capacitor structure connected to L12 has a size of 150μm*150μm, and the lower electrode 6-2 has a size of 154μm*154μm.

[0088] As a specific example, the planar spiral structure 4 includes an inner winding 8, an outer winding 9, an air bridge 5, a parallel plate capacitor structure 6, and a grounding unit 7;

[0089] The inner winding 8 and the outer winding 9 adopt an integrated structure design of nested winding. The inner winding 8 and the outer winding 9 are wound evenly at a preset interval to ensure that the inductance and coupling characteristics of the spiral structure are stable and controllable. An air bridge 5 is set at the intersection of the inner winding 8 and the outer winding 9 for dielectric isolation treatment, separating the conductors of the inner winding 8 and the outer winding 9 at the intersection, and avoiding direct electromagnetic coupling and signal crosstalk between the inner winding 8 and the outer winding 9.

[0090] The inner winding 8 is connected to the parallel plate capacitor structure 6 through metal wiring. The other end of the parallel plate capacitor structure 6 is directly connected to the grounding unit 7 with low impedance to form a grounding path.

[0091] As a specific example, the air bridge 5 is fabricated using IPD multilayer metal wiring technology and is located at the connection position between the inner winding 8 and the outer winding 9 of the planar spiral structure 4. The air bridge 5 adopts a layered bridge surface layout, in which one microstrip line crosses another microstrip line through a metal layer lifting process to form the upper bridge surface of the air bridge 5, and the other microstrip line is embedded in the first dielectric substrate 1 through an embedded wiring process to form the lower bridge surface of the air bridge 5. This ensures both structural stability and signal transmission stability, and also achieves a certain electromagnetic shielding effect through the substrate, thus solving the problem of electromagnetic shielding in the inner winding of the planar spiral structure 4. The crossing problem between the transmission lines of inner winding 8 and outer winding 9 is addressed by establishing independent signal transmission paths for each. Air is used as the dielectric isolation medium between the upper and lower bridge surfaces. Utilizing the low dielectric constant and excellent insulation properties of air, the direct electromagnetic coupling path between inner winding 8 and outer winding 9 is effectively blocked, suppressing signal crosstalk. The layered design of the air bridge 5 fills the space between the two conductors at the crossing point with both air and substrate material, while slightly increasing the conductor spacing. This doubly suppresses parasitic capacitance at the crossing point, ensuring the accuracy of the equivalent reactance value of the planar spiral structure 4.

[0092] As a specific example, the parallel plate capacitor structure 6 includes an upper plate 6-1 and a lower plate 6-2;

[0093] The parallel plate capacitor structure 6 adopts an IPD-compatible MIM parallel plate capacitor structure. Its capacitance value is designed according to the equivalent reactance control requirements of the planar spiral structure 4, which can achieve fine compensation and calibration of the equivalent circuit characteristics of the planar spiral structure 4. The upper plate 6-1 and the lower plate 6-2 are a pair of parallel square metal plates. The upper plate 6-1 is located on the upper surface of the first dielectric substrate 1. The lower plate 6-2 is embedded in the bottom of the first dielectric substrate 1. Its thickness is less than the thickness of the first dielectric substrate 1, and its planar size is slightly larger than that of the upper plate 6-1. It is used to suppress the edge effect of the plate and reduce the generation of edge parasitic capacitance. One end of the parallel plate capacitor structure 6 is connected to the inner winding 8 of the planar spiral structure 4, and the other end is directly and low-impedance connected to the grounding unit 7 through metal wiring to form a complete grounding path. This is used to suppress high-frequency noise interference, help stabilize the equivalent reactance parameters of the planar spiral structure 4, improve the working stability, phase consistency and impedance matching accuracy of the entire power divider in a wide frequency band, and adapt to the needs of high-frequency radio frequency signal transmission and power distribution.

[0094] As a specific example, the grounding unit 7 includes an upper grounding metal plate 7-1, a middle grounding metal plate 7-2, a lower grounding metal plate 7-3, and a grounding metal post 7-4 arranged from top to bottom;

[0095] The grounding unit 7 adopts an integrated design combining layered metal plates and through-type metal pillars, and is compatible with the first dielectric substrate 1, the second dielectric substrate 2, and the grounding metal layer 3. The upper grounding metal plate 7-1 is located on the upper surface of the first dielectric substrate 1, with dimensions of 100μm*100μm and a thickness of 3.3μm. The middle grounding metal plate 7-2 and the lower grounding metal plate 7-3 are embedded in the first dielectric substrate 1. The middle grounding metal plate 7-2 has dimensions of 96μm*96μm and a thickness of 0.23μm. The lower grounding metal plate 7-3... The dimensions of the grounding metal plate 7-3 are 104μm*104μm, and the thickness is 0.5μm. The lower grounding metal plate 7-3 has the largest planar dimension, followed by the upper grounding metal plate 7-1, and the middle grounding metal plate 7-2 has the smallest planar dimension. The grounding metal post 7-4 has a size of 30μm*30μm and a height of 0.1mm. It vertically penetrates the second dielectric substrate 2 and reliably connects the lower grounding metal plate 7-3 to the grounding metal layer 3. The design of the three-layer grounding metal plate and grounding post increases the heat conduction cross-sectional area and improves the heat dissipation efficiency.

[0096] Figure 5 Simulation results of a broadband three-stage Gysel power divider based on IPD technology are presented. This power divider includes an input port (port1), a first output port (port2), and a second output port (port3), with a center frequency of 10.5 GHz. The return loss at the input port is also shown. It outperforms by 15dB in the wide frequency band of 7.38-13.68GHz, with a relative bandwidth of 60%; insertion loss The return loss remains below 2dB within the 7.96-13.8GHz frequency band; the return loss of the first output port (port2) and the second output port (port3) is... Within the observed frequency band below 13.7 GHz, the isolation is better than 15 dB; (The last part, "isolation," appears to be incomplete and lacks context.) It is better than 10dB across the entire frequency band, and better than 15dB in a wide frequency band above 8.15GHz.

[0097] In an ideal design, the phase difference between the two output ports of the power divider is 0, and the amplitude difference is also 0. Figure 6 The output signals from two output ports, port2 and port3, are shown to have a phase difference between -0.3 degrees and 0.2 degrees, while the amplitude difference is always 0, demonstrating excellent performance.

[0098] In summary, the present invention can realize the integration and miniaturization of power dividers, and has the advantages of small size, wide operating bandwidth, and large power capacity.

[0099] The above are merely preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A broadband multi-stage Gysel power divider based on IPD technology, characterized in that, It includes a microstrip structure layer, and a first dielectric substrate (1), a second dielectric substrate (2), and a ground metal layer (3) arranged sequentially from top to bottom. The grounding metal layer (3) completely covers the lower surface of the second dielectric substrate (2). The grounding metal layer (3) and the second dielectric substrate (2) together constitute the support substrate of the device. On the one hand, it provides mechanical support for the overall architecture of the power divider, and on the other hand, it forms an electromagnetic shielding environment through the grounding metal layer (3). The microstrip structure layer adopts a multi-layer nested structure and is symmetrical about the center line of the input port. The symmetrical layout ensures the amplitude and phase consistency of each output port. The multi-layer nested structure is set on the upper surface and inside of the first dielectric substrate (1) to form an integrated layout based on IPD process. Each nested structure is composed of multiple Gysel power distribution units cascaded together. By progressively expanding the working bandwidth and optimizing impedance matching characteristics, it achieves power distribution and port isolation performance within a wide bandwidth. Each nested structure is equipped with two high-power thin-film resistors (11), which are symmetrically arranged on the upper and lower sides of the center line of the input port. Each high-power thin-film resistor (11) is connected to a grounding unit (7) to form a direct grounding heat dissipation path. The transmission body of each Gysel power distribution unit is implemented using microstrip lines. The linewidth of each microstrip line is designed according to the target characteristic impedance to ensure continuous impedance matching and low signal loss transmission in the broadband. Each microstrip line integrates a planar spiral structure (4), and the geometric dimensions of the planar spiral structure (4) are determined iteratively by the target equivalent reactance value. A double-layer spiral plate structure (10) is set between two adjacent nested structures to form a double-layer spiral-ground capacitor path structure.

2. The broadband multi-stage Gysel power divider based on IPD technology according to claim 1, characterized in that, The power divider adopts a three-port architecture including an input port (port1), a first output port (port2), and a second output port (port3). The input port (port1) is located at the center of the multi-layer nested structure to achieve symmetrical center excitation and uniform power distribution. The first output port (port2) and the second output port (port3) are symmetrically distributed on the outer side of the outermost nested structure with the horizontal center axis of the input port (port1) as the reference, so that the two outputs have a consistent transmission environment and electrical characteristics. The equivalent electrical length of the physical path from the input port (port1) to the first output port (port2) and the second output port (port3) is half a wavelength, achieving phase synchronization and impedance matching in a wide frequency band.

3. The broadband multi-stage Gysel power divider based on IPD technology according to claim 1, characterized in that, The double-layer spiral plate structure (10) includes an upper spiral plate and a lower spiral plate. The upper spiral plate and the lower spiral plate are stacked and connected to one end of a parallel plate capacitor structure (6) through conductive microstrip lines. The other end of the parallel plate capacitor structure (6) is connected to a grounding unit (7) to achieve grounding.

4. The broadband multi-stage Gysel power divider based on IPD technology according to claim 1, characterized in that, The equivalent circuit model of the planar spiral structure (4) adopts a lumped parameter topology design, which is represented as a lumped parameter circuit consisting of two independent inductors and a grounding capacitor. It also incorporates the parasitic capacitance under the IPD process and the coupling inductance between the inner and outer rings of the spiral structure due to electromagnetic induction, thus forming the equivalent circuit topology. This equivalent circuit topology is functionally equivalent to a microstrip transmission line with a set characteristic impedance and a set electrical length. Within the integrated layout space of the IPD process, impedance regulation, phase compensation, and wideband adaptation are achieved.

5. The broadband multi-stage Gysel power divider based on IPD technology according to claim 4, characterized in that, The planar spiral structure (4) includes an inner winding (8), an outer winding (9), an air bridge (5), a parallel plate capacitor structure (6), and a grounding unit (7). The inner winding (8) and the outer winding (9) adopt an integrated structure design of nested winding. The inner winding (8) and the outer winding (9) are wound evenly at a preset interval. An air bridge (5) is set at the intersection of the inner winding (8) and the outer winding (9) for dielectric isolation treatment. The inner winding (8) is connected to one end of the parallel plate capacitor structure (6) through metal wiring. The other end of the parallel plate capacitor structure (6) is directly connected to a grounding unit (7) to form a grounding path.

6. The broadband multi-stage Gysel power divider based on IPD technology according to claim 5, characterized in that, The air bridge (5) is fabricated based on the IPD multilayer metal wiring process and is located at the connection position between the inner winding (8) and the outer winding (9) of the planar spiral structure (4). The air bridge (5) adopts a layered bridge surface layout. One microstrip line crosses another microstrip line through the metal layer lifting process to form the upper bridge surface of the air bridge (5). The other microstrip line is embedded in the first dielectric substrate (1) through the embedded wiring process to form the lower bridge surface of the air bridge (5), so that the transmission lines of the inner winding (8) and the outer winding (9) each form an independent signal transmission path. Air is used as the dielectric isolation medium between the upper bridge surface and the lower bridge surface to block the direct electromagnetic coupling path between the inner winding (8) and the outer winding (9) and suppress signal crosstalk.

7. The broadband multi-stage Gysel power divider based on IPD technology according to claim 6, characterized in that, The parallel plate capacitor structure (6) includes an upper plate (6-1) and a lower plate (6-2). The parallel plate capacitor structure (6) adopts an IPD-compatible MIM parallel plate capacitor structure. The capacitance value is designed according to the equivalent reactance regulation requirements of the planar spiral structure (4) to achieve compensation and calibration of the equivalent circuit characteristics of the planar spiral structure (4). The upper plate (6-1) and the lower plate (6-2) are a pair of parallel square metal plates. The upper plate (6-1) is located on the upper surface of the first dielectric substrate (1). The lower plate (6-2) is embedded in the bottom of the first dielectric substrate (1) and its thickness is less than that of the first dielectric substrate (1). Its planar size is larger than that of the upper plate (6-1) to suppress the edge effect of the plate and reduce the generation of edge parasitic capacitance. One end of the parallel plate capacitor structure (6) is connected to the inner winding (8) of the planar spiral structure (4), and the other end is directly connected to the grounding unit (7) through metal wiring to form a complete grounding path to help stabilize the equivalent reactance parameters of the planar spiral structure (4).

8. The broadband multi-stage Gysel power divider based on IPD technology according to claim 7, characterized in that, The grounding unit (7) includes an upper grounding metal plate (7-1), a middle grounding metal plate (7-2), a lower grounding metal plate (7-3), and a grounding metal post (7-4) arranged from top to bottom. The grounding unit (7) adopts an integrated design combining layered metal plates and through-type metal pillars, which is compatible with the first dielectric substrate (1), the second dielectric substrate (2) and the grounding metal layer (3); the upper grounding metal plate (7-1) is located on the upper surface of the first dielectric substrate (1); The middle grounding metal plate (7-2) and the lower grounding metal plate (7-3) are embedded in the first dielectric substrate (1). The thickness of the middle grounding metal plate (7-2) and the lower grounding metal plate (7-3) is equal to the thickness of the first dielectric substrate (1). The lower grounding metal plate (7-3) has the largest planar dimension, the upper grounding metal plate (7-1) has the second largest planar dimension, and the middle grounding metal plate (7-2) has the smallest planar dimension. The grounding metal post (7-4) penetrates the second dielectric substrate (2) vertically, reliably connecting the lower grounding metal plate (7-3) to the grounding metal layer (3).

9. The broadband multi-stage Gysel power divider based on IPD technology according to claim 8, characterized in that, The high-power thin-film resistor (11) included in the nested structure is set at the junction of the transmission line with an equivalent quarter wavelength electrical length and the transmission line with an equivalent half wavelength electrical length. One end of the resistor is connected to the microstrip line and the other end is connected to a grounding unit (7) to form a direct grounding path, which is used to increase the isolation between the output ports and optimize the impedance matching of the output ports.

10. The broadband multi-stage Gysel power divider based on IPD technology according to claim 9, characterized in that, The multi-stage Gysel power divider is a three-stage Gysel power divider, with an inner structure of a single-stage Gysel power divider and an outer structure of cascaded two-stage Gysel power dividers. The first-stage Gysel power divider comprises, in a clockwise direction, a first quarter-wavelength transmission line (L1) placed vertically, a second quarter-wavelength transmission line (L2) placed horizontally, a third half-wavelength transmission line (L3) placed vertically, a fourth quarter-wavelength transmission line (L4) placed horizontally, and a fifth quarter-wavelength transmission line (L5) placed vertically, forming a closed loop; a high-power thin-film resistor (11) and a grounding unit (7) connected thereto are provided at the connection between the second transmission line (L2) and the third transmission line (L3); a high-power thin-film resistor (11) and a grounding unit (7) connected thereto are provided at the connection between the third transmission line (L3) and the fourth transmission line (L4); The secondary Gysel power divider includes: a first transmission line (L1) and a fifth transmission line (L5) placed vertically and shared with the inner structure; a quarter-wavelength sixth transmission line (L6), a seventh transmission line (L7), an eleventh transmission line (L11), a thirteenth transmission line (L13), a ninth transmission line (L9), and a tenth transmission line (L10) placed horizontally; a half-wavelength eighth transmission line (L8) and a twelfth transmission line (L12) placed vertically; a high-power thin-film resistor (11) located at the connection between the eleventh transmission line (L11) and the twelfth transmission line (L12) and a grounding unit (7) connected thereto; and a high-power thin-film resistor (11) located at the twelfth transmission line (L12). The high-power thin-film resistor (11) at the connection of transmission line (L12) and thirteenth transmission line (L13) and the grounding unit (7) connected thereto constitute the structure; wherein, the sixth transmission line (L6), the seventh transmission line (L7), the eighth transmission line (L8), the ninth transmission line (L9) and the tenth transmission line (L10) are connected clockwise to form the first stage of the outer structure, and are connected to the input port (port1) through the first transmission line (L1) and the fifth transmission line (L5); the eleventh transmission line (L11), the twelfth transmission line (L12) and the thirteenth transmission line (L13) are connected clockwise to form the second stage of the outer structure, and are connected to the first stage of the outer structure through the eighth transmission line (L8); The first transmission line (L1), the second transmission line (L2), the third transmission line (L3), the fourth transmission line (L4), the fifth transmission line (L5), the sixth transmission line (L6), the seventh transmission line (L7), the ninth transmission line (L9), the tenth transmission line (L10), the eleventh transmission line (L11), the twelfth transmission line (L12), and the thirteenth transmission line (L13) each integrate a planar spiral structure (4), and the eighth transmission line (L8) integrates a double-layer spiral plate structure (10).

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