LabVIEW FPGA-based PSM high-voltage power supply control system

By utilizing a layered architecture based on LabVIEW FPGA and the hardware timing characteristics of FPGA modules, high-precision independent parallel control of multiple PSM high-voltage power supplies was achieved, solving the problems of slow response speed and low synchronization accuracy in existing technologies, and improving the real-time response speed and reliability of the system.

CN122118643APending Publication Date: 2026-05-29INST OF ENERGY HEFEI COMPREHENSIVE NAT SCI CENT (ANHUI ENERGY LAB)

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
INST OF ENERGY HEFEI COMPREHENSIVE NAT SCI CENT (ANHUI ENERGY LAB)
Filing Date
2026-02-26
Publication Date
2026-05-29

AI Technical Summary

Technical Problem

Existing technologies struggle to achieve high-precision independent parallel control of multiple PSM high-voltage power supplies, exhibiting slow response speeds, synchronization accuracy at only millisecond levels, and difficulty in adapting to the requirements of independent parallel control of multiple modules.

Method used

A layered architecture based on LabVIEW FPGA is adopted. Through the layered management and control architecture of host computer and local controller, combined with the one-to-one control logic of LabVIEW software and the hardware timing characteristics of FPGA module, high-precision independent parallel control of multiple PSM high voltage power supplies is realized.

Benefits of technology

It achieves high-precision independent parallel control of multiple PSM high-voltage power supplies, improves the real-time response speed of voltage regulation and the reliability of system operation, and flexibly adapts to the differentiated power supply requirements of different loads.

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Abstract

The application provides a PSM high-voltage power supply control system based on LabVIEW FPGA, relates to the technical field of high-voltage power supply control, and solves the technical problem that multiple PSM high-voltage power supplies cannot be independently and in parallel controlled with high precision in the prior art. The system specifically comprises: an upper computer, at least two local controllers connected with the upper computer, and at least one high-voltage power supply debugging device connected with the local controller. The upper computer comprises a first controller. At least two LabVIEW software for one-to-one control of the local controller are stored in the first controller. The local controller comprises a second controller and at least one FPGA module. The second controller is connected with the first controller and controls the FPGA module to generate a hardware timing signal for controlling the high-voltage power supply debugging device. The high-voltage power supply debugging device comprises a PSM module and a power module. The PSM module is used for turning on or off and adjusting an output voltage in response to the hardware timing signal. The power module is used for providing a power signal. The application is used for high-voltage power supply control.
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Description

Technical Field

[0001] This application relates to the field of high-voltage power supply control technology, and in particular to a PSM high-voltage power supply control system based on LabVIEW FPGA. Background Technology

[0002] PSM high-voltage power supplies, which are power supplies that achieve high-voltage output through multiple modules connected in series, have important applications in industrial production, scientific research and experimentation, and other fields. Existing technologies mostly use a single controller for centralized control or ordinary software timing control to regulate its multiple rectifier modules. However, this control method has the drawbacks of slow response speed, synchronization accuracy that can only reach the millisecond level, high fault protection delay, and difficulty in adapting to the requirements of independent parallel control of multiple modules. Therefore, existing technologies have the technical problem of difficulty in achieving high-precision independent parallel control of multiple PSM high-voltage power supplies. Summary of the Invention

[0003] This application provides a PSM high-voltage power supply control system based on LabVIEW FPGA, which solves the technical problem in the prior art that it is difficult to achieve high-precision synchronous control of multiple PSM high-voltage power supplies.

[0004] To achieve the above objectives, this application adopts the following technical solution: A PSM high-voltage power supply control system based on LabVIEW FPGA is provided, comprising: a host computer, at least two local controllers connected to the host computer, and at least one high-voltage power supply debugging device connected to the local controllers; the host computer includes a first controller; the first controller stores at least two control software programs; the number of control software programs is the same as the number of local controllers, used for one-to-one control of the local controllers; the control software is LabVIEW software; the local controller includes a second controller and at least one FPGA module; the second controller is connected to the first controller and is used to control the FPGA module to generate hardware timing signals; the hardware timing signals are used to control the high-voltage power supply debugging device; the high-voltage power supply debugging device includes a PSM module and a power supply module; the PSM module is used to turn on or off in response to the hardware timing signals and adjust the output voltage; the power supply module is used to provide power signals.

[0005] In one possible implementation, the host computer further includes a display module and an interaction module; the display module is used to display the interface of the control software; the interaction module includes a communication device interface and an interaction device interface; the communication device interface is used to connect to an external debugging terminal device; the interaction device interface is used to connect to an interaction device.

[0006] In one possible implementation, the local controller further includes a synchronization module; the synchronization module is connected to at least one FPGA module and is used to send an external clock trigger signal to the FPGA module; the frequency of the external clock trigger signal is not less than 40MHz.

[0007] In one possible implementation, the high-voltage power supply commissioning equipment further includes: a start switch, a current protection module, and a detection feedback module; the start switch is connected to the first controller and is used to acquire the switch status and output switch control commands to control the closing and opening of the power supply module; the current protection module is connected to the power supply module, the first controller, and the load respectively, and is used to detect the power signal output by the power supply module, and control the power supply module to disconnect when an overcurrent occurs in the power signal; the current protection module is also used to receive the control signal from the first controller and adjust the overcurrent protection parameters; the detection feedback module is connected to the load and the first controller respectively, and is used to detect the electrical parameters of the load and feed them back to the first controller.

[0008] In one possible implementation, the high-voltage power supply commissioning equipment also includes a reset module; the reset module is connected to the start switch and the first controller respectively, and is used to restart the power supply module when the power supply module is disconnected.

[0009] In one possible implementation, the power module includes a first power unit or a second power unit, the first power unit and the second power unit having different voltage configurations.

[0010] In one possible implementation, the interface of the display control software includes the voltage and current waveforms of the high-voltage power supply debugging equipment corresponding to each local controller, the module fault status, the power supply operation status, and the communication status between the host computer and the local controller.

[0011] In one possible implementation, the electrical parameters include the load's operating voltage, operating current, and power; the feedback cycle of the detection feedback module does not exceed 200 microseconds.

[0012] In one possible implementation, the reset module is used to respond to a load fault signal or an overcurrent protection signal and restart the power module after a preset delay; the duration of the preset delay can be configured by a host computer.

[0013] In one possible implementation, the rated output voltage of the first power supply unit is 830V, the rated output voltage of the second power supply unit is 720V, and the first power supply unit and the second power supply unit can operate in parallel under the control of the same local controller.

[0014] This application provides a PSM high-voltage power supply control system based on LabVIEW FPGA. It can accurately realize high-precision independent parallel control of multiple PSM high-voltage power supplies through a hierarchical architecture of host computer and local controller and one-to-one control logic, combined with the hardware timing advantages of FPGA module. At the same time, it improves the real-time response speed of voltage regulation and the reliability of system operation, and flexibly adapts to the differentiated power supply requirements of different loads.

[0015] It should be understood that the descriptions of technical features, technical solutions, beneficial effects, or similar language in this application do not imply that all features and advantages can be achieved in any single embodiment. Rather, it is understood that the description of a feature or beneficial effect means that a specific technical feature, technical solution, or beneficial effect is included in at least one embodiment. Therefore, the descriptions of technical features, technical solutions, or beneficial effects in this specification do not necessarily refer to the same embodiment. Furthermore, the technical features, technical solutions, and beneficial effects described in this embodiment can be combined in any suitable manner. Those skilled in the art will understand that embodiments can be implemented without one or more specific technical features, technical solutions, or beneficial effects of a particular embodiment. In other embodiments, additional technical features and beneficial effects may be identified in specific embodiments that do not embody all embodiments. Attached Figure Description

[0016] Figure 1 A system architecture diagram of a PSM high-voltage power supply control system based on LabVIEW FPGA is provided for embodiments of this application; Figure 2 Another system architecture diagram of a PSM high-voltage power supply control system based on LabVIEW FPGA provided in this application embodiment; Figure 3 This is a structural diagram of a high-voltage power supply debugging device provided in an embodiment of this application. Detailed Implementation

[0017] In the description of this application, unless otherwise stated, " / " means "or," for example, A / B can mean A or B. The "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Furthermore, "at least one" means one or more, and "multiple" means two or more. The terms "first," "second," etc., do not limit the quantity or order of execution, and "first," "second," etc., do not necessarily imply differences.

[0018] It should be noted that, in this application, the terms "exemplary" or "for example" are used to indicate that something is being described as an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or design solutions. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0019] The core of this application is to provide a PSM high-voltage power supply control system based on LabVIEW FPGA. Through a hierarchical management and control architecture of host computer and local controller, combined with the one-to-one control logic of LabVIEW software and the hardware timing characteristics of FPGA module, it solves the technical problem that it is difficult to achieve high-precision independent parallel control of multiple PSM high-voltage power supplies in the prior art, and realizes the coordinated and unified scheduling and independent precise adjustment of multiple devices.

[0020] Please refer to Figure 1 , Figure 1 The present invention provides a system architecture diagram of a PSM high-voltage power supply control system based on LabVIEW FPGA, including: a host computer 101, a switch, two local controllers 102 connected to the host computer, and six high-voltage power supply debugging devices 103 connected to the local controllers 102.

[0021] In the embodiments of this application, such as Figure 2 As shown, Figure 2 This is a system architecture diagram of another PSM high-voltage power supply control system based on LabVIEW FPGA. The host computer 101 includes a first controller 201, which stores two control software programs 202, which are LabVIEW software. The local controller 102 includes a second controller 203 and two FPGA modules 204. The high-voltage power supply debugging device 103 includes a PSM module 205 and a power supply module 206. The first controller 201 is connected to the switch to establish a stable communication link. It establishes a one-to-one communication connection with the second controllers 203 of the two local controllers 102, meaning that the two LabVIEW control software programs 202 correspond one-to-one with the two second controllers 203, and are used to issue control commands to their respective second controllers 203 individually. Each second controller 203 of the local controller 102 is connected to its two FPGA modules 204, and is used to receive commands from the first controller 201 and control the FPGA modules 204 to generate hardware timing signals. The FPGA modules 204 are connected to the PSM modules 205 of the corresponding high-voltage power supply debugging equipment 103, and the hardware timing signals are used to trigger the PSM modules 205 to operate. The power supply module 206 is electrically connected to the PSM modules 205 to provide basic power signals. The PSM modules 205 respond to the hardware timing signals to turn on or off, thereby adjusting the voltage output of the power supply modules 205 and achieving precise control of the output voltage of the high-voltage power supply debugging equipment 103.

[0022] It should be noted that the specific quantities of two control software programs, two FPGA modules, and six high-voltage power supply debugging devices are merely illustrative examples and are not the only limitation on the number of system modules. In actual applications, the number of local controllers, FPGA modules, and high-voltage power supply debugging devices can be flexibly increased or decreased according to the high-voltage power supply control requirements, and the number of control software programs is the same as the number of local controllers.

[0023] As an example, the host computer includes a first chassis, a switch, and a first controller. The first chassis is a PXIe-1082 with eight slots (four hybrid slots, two PXIExpress slots, and one PXIExpress system timing slot) with a slot speed of 8GB / s. Each slot in the first chassis can accommodate a PXIExpress module, and four slots can support modules compatible with the standard PXI hybrid bus. The first controller is a PXIe-8861 with integrated CPU, hard disk drive, RAM, Ethernet, video, keyboard / mouse, serial, USB, and other peripheral I / O functions.

[0024] As another example, the local controller includes a second chassis, a second controller, and an FPGA chip. It should be understood that this embodiment does not limit the specific types of the second controller and the first controller. The first controller and the second controller are based on functional division rather than model division. That is to say, the first controller and the second controller can be controllers of the same model.

[0025] Based on the above system, a hierarchical architecture is adopted. The host computer can connect to multiple local controllers. Multiple control software programs are set in the host computer, and each control software corresponds to a local controller. This allows for the overall control of the high-voltage power supply debugging equipment connected to multiple local controllers, improving the synchronization of control. Each local controller performs specific control execution on the connected high-voltage power supply debugging equipment, ensuring the real-time performance and reliability of control.

[0026] In one possible implementation, the host computer also includes a display module and an interaction module; The display module is used to display the real-time interface of the control software, and the interaction module includes a communication device interface and an interaction device interface; the communication device interface is used to connect to external debugging terminal equipment; and the interaction device interface is used to connect to interactive devices.

[0027] In this embodiment, the display module is signal-connected to the first controller 201 of the host computer 101, and can synchronously display the running interface of the corresponding control software 202 in real time. The interface includes the voltage and current waveforms, module fault status, power supply operation status of the high-voltage power supply debugging equipment 103 associated with each local controller, as well as the communication status between the host computer 101 and the local controller 102, realizing the visualization of control data and equipment status. The communication device interface of the interaction module is used to establish a two-way communication link between the host computer 101 and the external debugging terminal device, supporting the external debugging terminal device to send control commands or parameter configuration information to the first controller 201. The interaction device interface is used to connect interactive devices such as mouse and keyboard, allowing operators to directly input commands, adjust parameters and control equipment on the host computer.

[0028] It should be noted that the specific types of communication device interfaces and interactive device interfaces can be flexibly selected according to the actual application scenario, and are not limited to a single form. As long as external device connection and data interaction can be achieved, it is acceptable. Furthermore, the interface layout and display content of the display module can be customized and adjusted through LabVIEW control software to adapt to different control requirements.

[0029] As an example, the interactive device interface uses a USB interface to connect a mouse and keyboard. Parameters such as voltage settings and overcurrent protection thresholds can be input via the keyboard, and operations such as start and stop can be performed via mouse clicks. The communication device interface uses an Ethernet interface to connect a laptop as an external debugging terminal. The laptop sends batch parameter configuration files to the first controller and simultaneously receives device operation logs from the host computer. The display module displays the interface at 1080P resolution, graphically showing the voltage and current data, load fault signals, and load activation signals of the two power supplies in a consistent horizontal axis within a single test cycle. The status signals of each module are displayed using indicator lights. The local controller retains only the latest experimental data, while the host computer stores and manages historical experimental data. Specifically, voltage and current waveforms are presented as real-time curves, module fault status is indicated by red indicator lights, normal status by green indicator lights, and communication status is intuitively displayed using the text "Normal / Abnormal" and corresponding color indicators.

[0030] Based on the above system, the external debugging terminal device can send control commands to the first controller, and the first controller responds to the control commands by sending signals to the corresponding second controller to realize external control. The interactive device can send simulation debugging commands to the first controller, and the first controller responds to the control commands by sending signals to the corresponding second controller to realize simulation debugging. The display module can display the control interface of each control software in real time to ensure data visualization.

[0031] In one possible implementation, the local controller also includes a synchronization module; The synchronization module is connected to at least one FPGA module and is used to send an external clock trigger signal to the FPGA module. The frequency of the external clock trigger signal is not less than 40MHz.

[0032] In this embodiment, the synchronization module of the local controller 102 is signal-connected to the second controller 203 and establishes a stable signal transmission link with at least one FPGA module 204 to which it belongs. After receiving the control command issued by the first controller 201 of the host computer 101, the second controller 203 first sends a clock start signal to the synchronization module. After the synchronization module responds, it outputs an external clock trigger signal with a frequency of not less than 40MHz to the FPGA module 204. This clock trigger signal serves as the reference timing for the FPGA module 204 to generate hardware timing signals. It can ensure that the consistency and synchronization of the feedback adjustment of multiple FPGA boards within the same local controller 102 do not exceed 2.5ns, thereby ensuring that the hardware timing signals sent by each FPGA module 204 to the PSM module 205 of the corresponding high-voltage power supply debugging equipment 103 have no significant timing deviation, and avoid power output voltage fluctuations caused by asynchronous operation of the PSM module 205.

[0033] It should be noted that the core function of the synchronization module is to ensure the timing synchronization of the FPGA modules 204 within the same local controller 102, not to synchronize the FPGA modules between different local controllers 102. It does not affect the independent control logic of the host computer 101 over each local controller 102 through the first controller 201. At the same time, the minimum performance requirement is that the frequency of the external clock trigger signal is "not less than 40MHz". In practical applications, the clock frequency can be increased based on the voltage regulation accuracy requirements of the high-voltage power supply debugging equipment 103. Furthermore, the connection method between the synchronization module and the FPGA module 204 can be adapted to different numbers of FPGA modules.

[0034] As an example, the local controller 102 uses a second chassis based on PXIe-1082. The synchronization module is integrated into the PXIExpress system timing slot of the second chassis and is connected to the two FPGA modules 204 through the high-speed signal channel of the chassis backplane (the backplane slot speed reaches 8GB / s, ensuring that the clock signal transmission delay is less than 1ns). The second controller 203 uses PXIe-8861. After sending the "45MHz clock output" command to the synchronization module, the synchronization module generates a 45MHz differential clock signal and transmits it synchronously to the two FPGA modules 204. According to the actual measurement with an oscilloscope, the rising edge deviation of the hardware timing signal generated by the two FPGA modules 204 based on the clock signal is only 2.1ns. The synchronization accuracy is far better than the millisecond level of the traditional control method. Moreover, the synchronization module will feed back the output status of the clock signal (such as whether it is normal and the current frequency) to the second controller 203 in real time, and then the second controller 203 will upload it to the first controller 201. Finally, the synchronization status is marked on the display module.

[0035] Based on the above system, by sending high-frequency external clock trigger signals to each FPGA module in the local controller through the synchronization module, the synchronization accuracy can be improved to the nanosecond level, which is better than the traditional millisecond level response.

[0036] In one possible implementation, the high-voltage power supply commissioning equipment also includes: a start switch 301, a current protection module 302, and a detection feedback module 303; The start switch 301 is used to acquire the switch status and output switch control commands to control the closing and opening of the power module; the current protection module 302 is used to detect the power signal output by the power module, and control the power module to disconnect when the power signal is overcurrent, and is also used to receive the control signal of the first controller and adjust the overcurrent protection parameters; the detection feedback module 303 is used to detect the electrical parameters of the load and feed them back to the first controller.

[0037] In the embodiments of this application, such as Figure 3As shown, the start switch 301 of the high-voltage power supply debugging equipment 103 is connected to the first controller 201 and the power module 206 of the host computer 101. The start switch 301 can collect its own switch status in real time and feed it back to the first controller 201. At the same time, it can receive the switch control command issued by the first controller 201 and drive the power module 206 to complete the closing or opening action. One end of the current protection module 302 is electrically connected to the output terminal of the power module 206, and the other end is connected to the first controller 201 and the load signal respectively. It can detect the current, voltage and other power signals output by the power module 206 in real time, and can also receive the control signal sent by the first controller 201 to flexibly adjust the overcurrent protection threshold. The detection feedback module 303 is directly connected to the load and establishes a two-way communication link with the first controller 201. It is used to continuously collect the working voltage, working current and power and other electrical parameters of the load, and transmit the collected data to the first controller 201 in real time, providing a basis for the first controller 201 to judge the output status of the power module 206 and adjust the control strategy.

[0038] It should be noted that the core functions of the start switch 301, current protection module 302, and detection feedback module 303 revolve around the safe operation and precise control of the power supply module 206. The three work independently and in coordination with each other, without affecting the core logic of the PSM module 205 responding to the hardware timing signal of the FPGA module 204. The feedback cycle of the detection feedback module 303 strictly adheres to the performance requirement of not exceeding 200 microseconds to ensure that the first controller 201 can obtain the real-time load status. The overcurrent protection parameters of the current protection module 302 can be flexibly configured through the first controller 201 to adapt to the overcurrent tolerance requirements of different loads, and its action of controlling the power supply module 206 to disconnect has a higher priority than other control commands, ensuring system safety.

[0039] As an example, the start switch 301 is an electromagnetic switch, and its switching status is fed back to the first controller 201 through a dry contact signal. After the first controller 201 issues a closing command through LabVIEW control software, the start switch 301 completes the closing action of the power module 206 within 50ms and sends back a closing success signal. The initial overcurrent protection threshold of the current protection module 302 is set to 5A. The operator can adjust the threshold to the range of 3A-10A through the interactive device of the host computer 101. When the output current of the power module 206 is detected to exceed the set threshold for 10μs, the power-off protection is immediately triggered, and an overcurrent alarm signal is sent to the first controller 201 at the same time. The detection feedback module 303 uses a high-precision Hall sensor to collect the load electrical parameters with a measurement error of no more than ±0.5%. It transmits digital signals to the first controller 201 with a feedback cycle of 150 microseconds. After receiving the signals, the first controller 201 displays the real-time data curve through the display module.

[0040] Based on the above system, the start switch 301 can control the closing and opening of the power module 206, and the first controller 201 can control and monitor the status of the start switch to ensure that the power module 206 outputs the correct power signal. The current protection module 302 can detect the output current signal of the power module 206 and determine whether there is an overcurrent. When the output current signal is greater than the overcurrent protection parameter configured by the first controller 201, the current protection module 302 controls the power module 206 to disconnect, thereby protecting the current module 206 and the load and improving the reliability of system operation. The detection feedback module 303 can obtain the electrical parameters of the load and feed them back to the first controller 201. The first controller 201 determines whether the output signal of the power module is abnormal based on the electrical parameters of the load, thereby improving the accuracy of power module control. The collaborative work of these three components with the PSM module 205 and the power module 206 further improves the functional closed loop of the high-voltage power supply commissioning equipment 103. Combined with the hierarchical management and control architecture of the host computer 101 and the local controller 102, it not only meets the independent parallel control requirements of multiple high-voltage power supplies, but also improves the control accuracy and operational safety of the system through multiple protection mechanisms.

[0041] In one possible implementation, the high-voltage power supply commissioning equipment also includes a reset module; In this embodiment, the reset module of the high-voltage power supply debugging equipment 103 establishes signal connections with the start switch 301 and the first controller 201 of the host computer 101. The reset module can receive the preset delay parameters issued by the first controller 201 in real time, and simultaneously monitor the load fault signal and the overcurrent protection signal sent by the current protection module 302. When any fault signal is detected, the reset module will first lock the current operating parameters of the high-voltage power supply debugging equipment 103 (such as the voltage setting value of the power module 206 and the hardware timing signal parameters of the PSM module 205), and then wait for the preset delay before sending a restart command to the start switch 301. The start switch 301 responds to the command and controls the power module 206 to reclose. At the same time, the reset module feeds back the restart progress and result to the first controller 201, which then updates the device status information of the display module synchronously.

[0042] It should be noted that the reset module's restart function is only triggered in the scenario of "power module 206 disconnected" and does not interfere with the voltage regulation logic of the high-voltage power supply debugging equipment 103 during normal operation. Its preset delay time can be flexibly configured through the interaction module of the host computer 101 (range of 10ms-1000ms) to adapt to the fault recovery rhythm of different loads. In addition, the reset module will retain the operating parameters before the fault during the restart process to avoid the time loss caused by reconfiguring parameters after restart, and ensure that the equipment can quickly return to the control state before the fault after restart.

[0043] As an example, the preset delay of the reset module is set to 150ms via the LabVIEW control software of the host computer 101. When the current protection module 302 detects that the output current of the power module 206 (720V second power supply unit) exceeds the 5A overcurrent threshold, sends an overcurrent protection signal and controls the power module 206 to disconnect, the reset module immediately receives the overcurrent protection signal and records the current hardware timing signal duty cycle parameter of the PSM module 205. After waiting for 150ms, the reset module sends a "close and restart" command to the start switch 301. The start switch 301 completes the reclosing of the power module 206 within 30ms. The reset module synchronously transmits a "restart successful" signal to the first controller 201, and the display module marks this status with a green "device running" indicator light.

[0044] Based on the above system, the reset module, in coordination with the start switch 301 and the first controller 201, provides an automatic recovery mechanism for the high-voltage power supply commissioning equipment 103 after a fault, effectively reducing test interruptions or load power supply interruptions caused by the unexpected disconnection of the power module 206. Its configurable delay and parameter memory functions not only adapt to the fault recovery characteristics of different loads but also reduce the cost of manual intervention. Combined with the hierarchical management and control of the host computer 101 and the real-time control of the local controller 102, the system's reliability assurance system is further improved, ensuring that even if a local fault occurs, multiple high-voltage power supply commissioning devices can be quickly recovered when running independently in parallel, significantly improving the overall system's continuous operation capability and fault tolerance.

[0045] In one possible implementation, the power module includes a first power supply unit or a second power supply unit, the first power supply unit and the second power supply unit having different voltage configurations.

[0046] In this embodiment, the power module 206 of the high-voltage power supply debugging equipment 103 can be selectively configured with a first power unit or a second power unit. The core difference between the two lies in the difference in the rated output voltage configuration. Both the first power unit and the second power unit are electrically connected to the PSM module 205 and can be connected to the control link of the same local controller 102. The FPGA module 204 of the local controller 102 outputs targeted hardware timing signals to drive the corresponding power unit and the PSM module 205 to work together. The first controller 201 of the host computer 101 can send differentiated voltage setting instructions to different power units through LabVIEW control software to realize independent control of the output voltage of the first power unit and the second power unit.

[0047] It should be noted that "first power supply unit or second power supply unit" does not limit the power module 206 to only one type. In practical applications, two power supply units can be configured simultaneously within the control range of the same high-voltage power supply debugging equipment 103 or the same local controller 102 to achieve parallel operation, depending on the power supply requirements of the load. The voltage configuration differences between the two can be flexibly adjusted and are not limited to fixed values. The core is to adapt to the voltage requirements of different loads through differentiated configurations. Furthermore, configuration switching does not require changes to the core system architecture; only the control commands need to be updated through the first controller 201.

[0048] As an example, the rated output voltage of the first power supply unit is set to 830V, and the rated output voltage of the second power supply unit is set to 720V. Both are connected to the control range of the same local controller 102 and connected to two different loads respectively. The first controller 201 of the host computer 101 sends dual-channel control commands to the second controller 203 of the local controller 102 through the corresponding LabVIEW control software. The second controller 203 controls the two FPGA modules 204 to generate hardware timing signals with different duty cycles respectively. The PSM module 205 corresponding to the 830V first power supply unit responds to the first hardware timing signal and outputs a high-voltage power supply adapted to load 1. The PSM module 205 corresponding to the 720V second power supply unit responds to the second hardware timing signal and outputs a high-voltage power supply adapted to load 2. The two power supplies are independent and free from interference. The detection feedback module 303 feeds back the electrical parameters of the two loads to the first controller 201 respectively.

[0049] Based on the above system, the power module 206 significantly improves the system's load adaptability through differentiated configuration design of different power units, and can simultaneously meet the power supply requirements of different voltage levels; the parallel control capability of the same local controller 102 for the two power units further enhances the flexible management and control characteristics of multiple output channels. Combined with the hierarchical coordination of the host computer 101 and the high-precision timing of the FPGA module 204, it not only ensures the stability and independence of the output voltage of different power units, but also expands the application scenarios of the system and enhances the system's synchronization and compatibility.

[0050] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0051] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A PSM high-voltage power supply control system based on LabVIEW FPGA, characterized in that, include: A host computer, at least two local controllers connected to the host computer, and at least one high-voltage power supply debugging device connected to the local controller; The host computer includes a first controller; the first controller stores at least two control software programs; the number of control software programs is the same as the number of local controllers, and is used to control the local controllers one-to-one; the control software is LabVIEW software. The local controller includes a second controller and at least one FPGA module; the second controller is connected to the first controller and is used to control the FPGA module to generate hardware timing signals; the hardware timing signals are used to control the high-voltage power supply debugging equipment. The high-voltage power supply debugging equipment includes a PSM module and a power supply module; The PSM module is used to turn on or off in response to the hardware timing signal and to adjust the output voltage; the power supply module is used to provide power signals.

2. The system according to claim 1, characterized in that, The host computer also includes a display module and an interaction module; The display module is used to display the interface of the control software; The interaction module includes a communication device interface and an interaction device interface; the communication device interface is used to connect to an external debugging terminal device; the interaction device interface is used to connect to an interaction device.

3. The system according to claim 1, characterized in that, The local controller further includes a synchronization module; the synchronization module is connected to the at least one FPGA module and is used to send an external clock trigger signal to the FPGA module; the frequency of the external clock trigger signal is not less than 40MHz.

4. The system according to claim 1, characterized in that, The high-voltage power supply debugging equipment also includes: a start switch, a current protection module, and a detection feedback module; The start switch is connected to the first controller and is used to acquire the switch status and output switch control commands to control the closing and opening of the power module; The current protection module is connected to the power module, the first controller, and the load respectively, and is used to detect the power signal output by the power module. When the power signal is overcurrent, the current protection module controls the power module to disconnect. The current protection module is also used to receive the control signal from the first controller and adjust the overcurrent protection parameters. The detection feedback module is connected to the load and the first controller respectively, and is used to detect the electrical parameters of the load and feed them back to the first controller.

5. The system according to claim 4, characterized in that, The high-voltage power supply debugging equipment also includes a reset module; the reset module is connected to the start switch and the first controller respectively, and is used to restart the power module when the power module is disconnected.

6. The system according to claim 4, characterized in that, The power module includes a first power unit or a second power unit, wherein the voltage configurations of the first power unit and the second power unit are different.

7. The system according to claim 2, characterized in that, The interface displaying the control software includes the voltage and current waveforms of the high-voltage power supply debugging equipment corresponding to each local controller, the module fault status, the power supply operation status, and the communication status between the host computer and the local controller.

8. The system according to claim 4, characterized in that, The electrical parameters include the load's operating voltage, operating current, and power; the feedback cycle of the detection feedback module does not exceed 200 microseconds.

9. The system according to claim 5, characterized in that, The reset module is used to respond to load fault signals or overcurrent protection signals and restart the power module after a preset delay; the duration of the preset delay can be configured by the host computer.

10. The system according to claim 6, characterized in that, The rated output voltage of the first power supply unit is 830V, and the rated output voltage of the second power supply unit is 720V. The first power supply unit and the second power supply unit can work in parallel under the control of the same local controller.