FPGA-based DAS signal adaptive demodulation method and system
CN122120092BActive Publication Date: 2026-08-28BEIJING ZHONGTUO XINYUAN TECH CO LTD
Patent Information
- Application Number
- CN202610176294.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-02-06
- Publication Date
- 2026-08-28
- Estimated Expiration
- 2046-02-06
AI Technical Summary
Technical Problem
[0005]本申请提供了一种基于FPGA的DAS信号自适应解调方法及系统,用于解决在复杂环境下DAS信号的解调能力不稳定的技术问题,提高了DAS系统的可靠性
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Abstract
A kind of DAS signal adaptive demodulation method and system based on FPGA, wherein, the method comprises: obtaining the in-phase component signal and quadrature component signal of DAS signal;When the address of write pointer occurs incremental change, the historical in-phase component signal and historical quadrature component signal in the preset history sampling window are read;The instantaneous amplitude energy of each time stamp is calculated, and the instantaneous amplitude energy sequence is obtained;The amplitude energy mean and variance eigenvalue of DAS signal are calculated;Adaptive gain factor is generated;The in-phase component signal and quadrature component signal are compensated and iteratively demodulated by adaptive gain, and the phase output value and demodulation module length value are obtained;The module length deviation amount of demodulation module length value and preset standard module length is calculated, and when the cumulative value is greater than preset locking threshold, the correction coefficient is calculated according to the current amplitude energy mean and module length deviation amount;The storage value of index address is updated based on correction coefficient.The application can improve the reliability of DAS system.
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Citation Information
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