A process for coating the back of a BC battery and patterning

Abstract

The application relates to a BC battery back surface coating process, which comprises the following steps: a first preparation process, the first preparation process is used for preparing N-type polycrystalline silicon, intrinsic amorphous silicon and P-type amorphous silicon; a second preparation process is used for collecting carriers by processing the substrate treated by the first preparation process; and a post-preparation process is used for preparing a transparent conductive layer and a metal electrode by processing the substrate treated by the second preparation process. The P and N regions are prepared on the back surface of the BC battery, the P and N regions are isolated, the respective P and N regions are formed, and the corresponding patterning is realized, so that the collection of different polarity currents is realized; since the BC battery is subjected to the pre-operation of coating and slicing, the subsequent passivation operation is not needed, the laser and patterning operations can be directly carried out, and the preparation efficiency is improved.

Description

Technical Field

[0001] This invention belongs to the field of BC battery technology, specifically relating to a BC battery back coating process and patterning. Background Technology

[0002] BC cells are a type of solar cell technology that integrates all positive and negative metal contacts on the back side, requiring coating treatment on the back side. To improve the cell's transmission efficiency, the entire cell is cut into two half-cells, and the two half-cells are connected in parallel top and bottom through a plate design, so that the output current is restored to the current value of the entire cell, which also requires coating treatment. Therefore, a better coating method is needed to reduce losses during the current collection process. Summary of the Invention

[0003] To address the aforementioned technical problems, this invention provides a BC battery back coating process and patterning, which has the advantage of high collection efficiency.

[0004] To achieve the above objectives, the technical solution of the present invention is as follows: A back-side coating process for a BC battery includes: a first fabrication process, wherein the first fabrication process prepares N-type polycrystalline silicon, intrinsic amorphous silicon, and P-type amorphous silicon; a second fabrication process is performed on the substrate after the first fabrication process, wherein the second fabrication process is used to collect charge carriers; and a post-fabrication process is performed on the substrate after the second fabrication process, wherein the post-fabrication process is used to prepare a transparent conductive layer and a metal electrode.

[0005] As a preferred embodiment of the present invention, the first preparation process includes the following steps: The first preparation process includes the following steps: (1) The first laser is used to pattern the SiO2 + n-Poly-Si layer on the substrate to form N-type polycrystalline silicon; (2) PECVD coating: ia-Si:H+pa-Si:H coating is performed on the substrate, which is intrinsic amorphous silicon and P-type amorphous silicon.

[0006] To achieve the above technical solution, the substrate is patterned using laser and then coated with PECVD to form N-type polycrystalline silicon, intrinsic amorphous silicon, and P-type amorphous silicon, so as to isolate the P and N regions.

[0007] As a preferred embodiment of the present invention, the second preparation process includes: a second laser patterning of ia-Si:H+Pa-Si:H to expose the N region.

[0008] To achieve the above technical solution, the N region is exposed by a second laser, thereby enabling the isolation of the P and N regions.

[0009] As a preferred embodiment of the present invention, the post-processing includes the following: (1) Perform PVD coating and ITO layer coating to form a transparent conductive layer; (2) The third laser is used to insulate the P and N regions and the surrounding area of ​​the substrate; (3) Screen printing is performed on the substrate to print P and N region metal electrodes, and insulating adhesive is printed.

[0010] The above technical solution is achieved by printing metal electrodes to facilitate the subsequent collection of current.

[0011] A patterning process for the back coating of a BC battery involves forming an N-type region pattern on a substrate using a first laser, and then forming a P-type region pattern on the N-type region pattern using PECVD coating.

[0012] As a preferred embodiment of the present invention, the N-type region patterning and the P-type region patterning are subjected to a second laser to form P and N isolated patterns, wherein the P and N isolated patterns expose the N region.

[0013] As a preferred embodiment of the present invention, the formed P and N isolation pattern is patterned by PVD coating and ITO layer coating to form a conductive layer pattern, and the conductive layer pattern is patterned by a third laser to form an insulating region pattern.

[0014] As a preferred embodiment of the present invention, the insulating region is patterned by printing electrodes and printing insulating adhesive to form the final patterned region.

[0015] In summary, the present invention has the following beneficial effects: By preparing P and N regions on the back of the BC battery and then isolating them to form their respective P and N regions and corresponding patterns, the collection of currents of different polarities can be achieved. Since the BC battery has undergone pre-processing such as coating and slicing, there is no need for subsequent passivation operations. It can be directly processed by laser and patterning, which improves the preparation efficiency. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the first preparation process of the present invention.

[0018] Figure 2 This is a schematic diagram of the post-processing flow of the present invention.

[0019] Figure 3-6 This is a graphical representation of the present invention.

[0020] The numbers and letters in the diagram represent the names of the corresponding components: 1. N-type polycrystalline silicon; 2. Intrinsic amorphous silicon; 3. P-type amorphous silicon; 4. Transparent conductive layer; 5. Metal electrode; 6. Substrate. Detailed Implementation

[0021] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention. Example

[0022] like Figures 1 to 2 As shown, a back-side coating process for a BC battery includes: a first fabrication process for preparing N-type polycrystalline silicon 1, intrinsic amorphous silicon 2, and P-type amorphous silicon 3; a second fabrication process for collecting charge carriers on a substrate 6 after the first fabrication process; and a post-fabrication process for processing the substrate 6 after the second fabrication process, which is used to fabricate a transparent conductive layer 4 and a metal electrode 5.

[0023] This example mainly involves the coating treatment on the back of the BC battery, especially the treatment of the BC battery after coating and slicing; after the BC battery is coated and sliced, it is then subjected to the first preparation process, specifically; The first preparation process includes the following steps: (1) The first laser is used to pattern the SiO2 + n-Poly-Si layer on the substrate 6 to form N-type polycrystalline silicon 1; (2) PECVD coating: ia-Si:H+pa-Si:H coating is performed on substrate 6, with intrinsic amorphous silicon 2 and P-type amorphous silicon 3.

[0024] The second fabrication process includes: a second laser, patterning ia-Si:H+Pa-Si:H to expose the N region. In this embodiment, the laser wavelength is 532nm green light, the pulse width is 10ps, the single pulse energy is 300μJ, the repetition frequency is 300kHz, the laser power is 100W, the spot size is >200um, and the heat-affected zone (HAZ) is ≤2μm.

[0025] Specifically, the second laser exposure exposes the P and N regions, enabling the collection of currents of different polarities. At the same time, to avoid interference between currents of different polarities that could affect the collection efficiency of the P and N regions, post-processing is required.

[0026] The post-processing includes the following: (1) Perform PVD coating and ITO layer coating to form a transparent conductive layer 4; (2) The third laser is used to insulate the P and N regions and the surrounding area of ​​the substrate 6; (3) Screen printing is performed on substrate 6 to print P and N region metal electrodes 5, and insulating adhesive is printed.

[0027] like Figures 3 to 6 As shown, a represents LPCVD fabrication: SiO2 + n-Poly-Si layer; b represents the first laser, patterning of the SiO2 + n-Poly-Si layer and PECVD coating, ia-Si:H + pa-Si:H coating; c represents the second laser, patterning of ia-Si:H + pa-Si:H; d represents PVD coating, ITO layer coating; e represents the third laser, pn region insulation + surrounding insulation; f represents screen printing, printing pn region metal electrodes; g represents screen printing, printing insulating adhesive.

[0028] A patterning process for the back coating of a BC battery involves forming an N-type region pattern on a substrate 6 using a first laser, and then forming a P-type region pattern on the N-type region pattern using PECVD coating.

[0029] Since the substrate 6 has been patterned with N-type and P-type regions, the N and P regions cannot be distinguished. A second laser is required to isolate the P and N regions, forming a P-N isolated pattern, which exposes the N region.

[0030] The P and N isolation patterns are patterned by PVD coating and ITO layer coating to form conductive layers, so that the P and N regions can collect currents of different polarities.

[0031] Furthermore, a third laser process is used to pattern the conductive layer to form the insulating region pattern, and then electrodes and insulating adhesive are printed to form the final patterned region.

[0032] By preparing P and N regions on the back of the BC battery and then isolating them to form their respective P and N regions and corresponding patterns, the collection of currents of different polarities can be achieved. Since the BC battery has undergone pre-processing such as coating and slicing, there is no need for subsequent passivation operations. It can be directly processed by laser and patterning, which improves the preparation efficiency.

[0033] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A coating process for the back of a BC battery, characterized in that, include: The first preparation process is used to prepare N-type polycrystalline silicon (1), intrinsic amorphous silicon (2) and P-type amorphous silicon (3); The substrate (6) after the first preparation process is subjected to a second preparation process, which is used to collect charge carriers; as well as, A post-processing process is performed on the substrate (6) after the second preparation process, the post-processing process being used to prepare a transparent conductive layer (4) and a metal electrode (5).

2. The BC battery back coating process according to claim 1, characterized in that, The first preparation process includes the following steps: (1) The first laser is used to pattern the SiO2 + n-Poly-Si layer on the substrate (6) to form N-type polycrystalline silicon (1); (2) PECVD coating: ia-Si:H+pa-Si:H coating is performed on substrate (6), intrinsic amorphous silicon (2) and P-type amorphous silicon (3).

3. The BC battery back coating process according to claim 1, characterized in that, The second fabrication process includes: a second laser patterning of ia-Si:H+Pa-Si:H to expose the N region.

4. The BC battery back coating process according to claim 1, characterized in that, The post-processing technology includes the following: (1) PVD coating and ITO layer coating are performed on the substrate (6) to form a transparent conductive layer (4); (2) The third laser is used to insulate the P and N regions and the surrounding area of ​​the substrate (6); (3) Screen printing is performed on the substrate (6) to print P and N region metal electrodes (5) and to print insulating adhesive.

5. A patterning method for the back coating process of a BC battery according to any one of claims 1-4, characterized in that, An N-type region pattern is formed on the substrate (6) by a first laser, and a P-type region pattern is formed on the N-type region pattern by PECVD deposition.

6. The patterning of a BC battery back coating process according to claim 5, characterized in that, A second laser is applied to the N-type and P-type regions to form P-N isolated patterns, which expose the N region.

7. The patterning of a BC battery back coating process according to claim 6, characterized in that, The P and N isolation patterns are then patterned by PVD coating and ITO layer coating to form a conductive layer pattern, and the conductive layer pattern is then patterned by a third laser to form an insulating region pattern.

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