Display device

Abstract

A display device capable of improving yield is provided. According to an embodiment, the display device includes a lower electrode, a partition wall surrounding the lower electrode, a laminate film disposed above the lower electrode, and a sealing layer formed of an inorganic insulating material, covering the laminate film, and disposed above the partition wall. In a plan view, the sealing layer has a first side extending in a first direction, a second side extending in a second direction orthogonal to the first direction, and a third side extending in a direction different from the first direction and the second direction and connecting the first side and the second side. An angle formed by the first side and the third side is greater than 90 degrees and less than 180 degrees.

Description

Cross-references of related applications

[0001] This application claims priority based on Japanese Patent Application No. 2024-208743, filed on November 29, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] Embodiments of the present invention relate to display devices. Background Technology

[0003] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have been put into practical use. In such display devices, technologies to improve yield are needed. Summary of the Invention

[0004] Generally, according to an embodiment, the display device includes: a lower electrode; a partition surrounding the lower electrode; a laminated film disposed above the lower electrode; and a sealing layer formed of an inorganic insulating material and covering the laminated film, disposed above the partition. When viewed from above, the sealing layer has: a first side extending along a first direction; a second side extending along a second direction orthogonal to the first direction; and a third side extending along a direction different from both the first and second directions and connecting the first side and the second side. The angle between the first side and the third side is greater than 90 degrees and less than 180 degrees.

[0005] According to other embodiments, the display device includes: a first lower electrode, a second lower electrode, and a third lower electrode; a partition wall surrounding the first lower electrode, the second lower electrode, and the third lower electrode; a first laminated film disposed above the first lower electrode; a second laminated film disposed above the second lower electrode; a first sealing layer formed of an inorganic insulating material and covering the first laminated film, and disposed above the partition wall; and a second sealing layer formed of an inorganic insulating material and covering the second laminated film, and disposed above the partition wall. The first sealing layer has a fourth side extending along a first direction when viewed from above, and the second sealing layer has a fifth side extending along a second direction orthogonal to the first direction when viewed from above, and a sixth side extending along a direction different from both the first and second directions and connected to the fifth side. The first and second sealing layers form a region overlapping with the third lower electrode. The angle formed by the fourth side and the sixth side, i.e. the interior angle of the region, is greater than 90 degrees and less than 180 degrees.

[0006] According to another embodiment, the display device includes: a first lower electrode, a second lower electrode, and a third lower electrode; a partition wall surrounding the first lower electrode, the second lower electrode, and the third lower electrode; a first laminated film disposed above the first lower electrode; a second laminated film disposed above the second lower electrode; a first sealing layer formed of an inorganic insulating material and covering the first laminated film, and disposed above the partition wall; and a second sealing layer formed of an inorganic insulating material and covering the second laminated film, and disposed above the partition wall. The first sealing layer has a fourth side extending along a first direction when viewed from above and a seventh side connected to the fourth side, the seventh side extending along a direction different from a second direction orthogonal to the first direction. The first sealing layer and the second sealing layer form a region overlapping with the third lower electrode. The angle formed by the fourth side and the seventh side, i.e., the interior angle of the region, is greater than 90 degrees and less than 180 degrees.

[0007] Based on this configuration, it is possible to provide a display device that can improve the yield rate. Attached Figure Description

[0008] Figure 1 This is a diagram showing an example of the configuration of the display device according to the first embodiment.

[0009] Figure 2 This is a schematic top view showing an example of the layout of subpixels that make up a pixel.

[0010] Figure 3 It is along Figure 2 A schematic cross-sectional view of the display device along line III-III.

[0011] Figure 4 It is along Figure 2 A schematic cross-sectional view of another example of a display device with line III-III in the diagram.

[0012] Figure 5 This is a schematic top view showing an example of the configuration of the partition and sealing layer that can be applied to the first embodiment.

[0013] Figure 6 yes Figure 5 A simplified enlarged view of section VI.

[0014] Figure 7 This is a schematic top view used to illustrate other examples of sealing layers.

[0015] Figure 8 This is a flowchart illustrating an example of a method for manufacturing a display device.

[0016] Figure 9A It is a schematic cross-sectional view showing the manufacturing process of the display device.

[0017] Figure 9B It shows the next step. Figure 9A A rough cross-sectional view of the process.

[0018] Figure 9C It shows the next step. Figure 9B A rough cross-sectional view of the process.

[0019] Figure 9D It shows the next step. Figure 9C A rough cross-sectional view of the process.

[0020] Figure 9E It shows the next step. Figure 9D A rough cross-sectional view of the process.

[0021] Figure 9F It shows the next step. Figure 9E A rough cross-sectional view of the process.

[0022] Figure 9G It shows the next step. Figure 9F A rough cross-sectional view of the process.

[0023] Figure 9H It shows the next step. Figure 9G A rough cross-sectional view of the process.

[0024] Figure 9I It shows the next step. Figure 9H A rough cross-sectional view of the process.

[0025] Figure 9J It shows the next step. Figure 9I A rough cross-sectional view of the process.

[0026] Figure 10A It is a top-down view showing the manufacturing process of the display device.

[0027] Figure 10B It shows the next step. Figure 10A A top-down view of the process.

[0028] Figure 10C It shows the next step. Figure 10B A top-down view of the process.

[0029] Figure 10D It shows the next step. Figure 10C A top-down view of the process.

[0030] Figure 10E It shows the next step. Figure 10D A top-down view of the process.

[0031] Figure 11 yes Figure 10DA simplified enlarged view of part XI in the diagram.

[0032] Figure 12A This is a schematic top view showing the manufacturing process of the display device for the comparative example.

[0033] Figure 12B It shows the next step. Figure 12A A top-down view of the process.

[0034] Figure 12C It shows the next step. Figure 12B A top-down view of the process.

[0035] Figure 13 This is a schematic top view of the display device according to the second embodiment.

[0036] Figure 14 yes Figure 13 A simplified enlarged view of section XIV.

[0037] Figure 15 This is a schematic top view of the display device according to the third embodiment.

[0038] Figure 16 yes Figure 15 A simplified enlarged view of section XVI.

[0039] Figure 17A This is a schematic top view showing the manufacturing process of the display device according to the third embodiment.

[0040] Figure 17B It shows the next step. Figure 17A A top-down view of the process.

[0041] Figure 17C It shows the next step. Figure 17B A top-down view of the process.

[0042] Figure 18 It is along Figure 17C A schematic cross-sectional view of the display device for the XVIII-XVIII lines.

[0043] Figure 19 This is a schematic cross-sectional view showing other examples of the display device according to the fourth embodiment.

[0044] Figure 20 This is a schematic top view of the display device according to the fifth embodiment.

[0045] Figure 21 It is along Figure 20 A schematic cross-sectional view of the display device for the XXI-XXI lines.

[0046] Figure 22 yes Figure 20A simplified enlarged view of section XXII.

[0047] Figure 23 This is a schematic top view of the comparative example display device.

[0048] Figure 24 This is a schematic top view showing a modified example of the display device. Detailed Implementation

[0049] Hereinafter, various embodiments will be described with reference to the accompanying drawings. It should be noted that the disclosure is merely an example, and appropriate modifications that can be readily conceived by those skilled in the art to maintain the spirit of the invention are naturally included within the scope of this invention. Furthermore, to make the description clearer, the drawings sometimes schematically show the width, thickness, shape, etc., of various parts compared to the actual embodiment, but this is merely an example and not a limitation on the interpretation of the invention. Additionally, in this specification and the various drawings, the same reference numerals are sometimes used to denote components that perform the same or similar functions as those previously described with respect to the figures, and repeated detailed descriptions are appropriately omitted. It should be noted that, for ease of understanding, the drawings show mutually orthogonal X-axis, Y-axis, and Z-axis. The direction along the X-axis is referred to as the first direction X, the direction along the Y-axis as the second direction Y, and the direction along the Z-axis as the third direction Z. Viewing various elements parallel to the third direction Z is called a top view.

[0050] The display device in each embodiment is an organic electroluminescent display device that uses organic light-emitting diodes (OLEDs) as display elements, and can be mounted on various electronic devices such as televisions, personal computers, in-vehicle devices, tablet computers, smartphones, mobile phone terminals, and wearable terminals.

[0051] [First Embodiment]

[0052] Figure 1 This diagram illustrates a configuration example of the display device DSP according to this embodiment. The display device DSP includes an insulating substrate 10. The substrate 10 has a display area DA for displaying an image and a peripheral area SA surrounding the display area DA. The substrate 10 may be glass or a flexible resin film.

[0053] In this embodiment, the substrate 10 and the display area DA are circular when viewed from above. However, the shape of the substrate 10 and the display area DA when viewed from above is not limited to a circle, and may also be other shapes such as rectangle, square or ellipse.

[0054] The display area DA has a plurality of pixels PX arranged in a matrix in the first direction X and the second direction Y. Pixel PX includes a plurality of sub-pixels SP displaying different colors. In this embodiment, it is envisioned that pixel PX includes a blue sub-pixel SP1, a green sub-pixel SP2, and a red sub-pixel SP3. Pixel PX may also include sub-pixels SP of other colors such as white, in conjunction with or in place of any of the sub-pixels SP1, SP2, SP3.

[0055] The display device DSP also includes a terminal section T disposed in the peripheral area SA. The terminal section T is connected to a flexible circuit board, for example, for driving the voltage and supply signals of the display device DSP.

[0056] The sub-pixel SP includes a pixel circuit 1 and a display element DE driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements, for example, made of thin-film transistors.

[0057] The display area DA is equipped with multiple scan lines G that supply scan signals to the pixel circuit 1 of each sub-pixel SP, multiple signal lines S that supply image signals to the pixel circuit 1 of each sub-pixel SP, and multiple power lines PL. Figure 1 In the example, the scan line G and the power line PL extend along the first direction X, and the signal line S extends along the second direction Y.

[0058] The gate electrode of pixel switch 2 is connected to scan line G. One of the source and drain electrodes of pixel switch 2 is connected to signal line S, and the other is connected to the gate electrode of driving transistor 3 and capacitor 4. In driving transistor 3, one of the source and drain electrodes is connected to power line PL and capacitor 4, and the other is connected to display element DE.

[0059] It should be noted that the configuration of pixel circuit 1 is not limited to the example shown in the figure. For example, pixel circuit 1 may also have more thin-film transistors and capacitors.

[0060] Figure 2 This is a schematic top view showing an example of the layout of subpixels SP1, SP2, and SP3 that constitute a pixel PX. Figure 2 In the example, sub-pixels SP1 and SP3 are arranged in the second direction Y. Additionally, sub-pixels SP1 and SP3 are arranged side-by-side with sub-pixel SP2 in the first direction X.

[0061] With sub-pixels SP1, SP2, and SP3 arranged in this layout, the display area DA contains columns of sub-pixels SP1 and SP3 alternately arranged in the second direction Y, and multiple columns of sub-pixels SP2 repeatedly arranged in the second direction Y. These columns are arranged alternately in the first direction X. It should be noted that the layout of sub-pixels SP1, SP2, and SP3 is not limited to this. Figure 2 Examples.

[0062] A rib layer 5 (inorganic insulating layer) is configured in the display area DA. The rib layer 5 has pixel openings AP1, AP2, and AP3 in sub-pixels SP1, SP2, and SP3, respectively.

[0063] exist Figure 2 In this example, pixel openings AP1, AP2, and AP3 are all rectangular. The area of ​​pixel opening AP1 is larger than the area of ​​pixel opening AP3. Additionally, the area of ​​pixel opening AP2 is larger than the area of ​​pixel opening AP1. Pixel opening AP2 is a rectangle that is elongated in the second direction Y compared to pixel openings AP1 and AP3. However, the shapes of pixel openings AP1, AP2, and AP3 are not limited to this example.

[0064] Sub-pixel SP1 has a lower electrode LE1 (first lower electrode), an upper electrode UE1, and an organic layer OR1 that overlap with pixel opening AP1. Sub-pixel SP2 has a lower electrode LE2 (second lower electrode), an upper electrode UE2, and an organic layer OR2 that overlap with pixel opening AP2. Sub-pixel SP3 has a lower electrode LE3 (third lower electrode), an upper electrode UE3, and an organic layer OR3 that overlap with pixel opening AP3.

[0065] The portion of the lower electrode LE1, the upper electrode UE1, and the portion of the organic layer OR1 overlapping with the pixel opening AP1 constitutes the display element DE1 of sub-pixel SP1. The portion of the lower electrode LE2, the upper electrode UE2, and the portion of the organic layer OR2 overlapping with the pixel opening AP2 constitutes the display element DE2 of sub-pixel SP2. The portion of the lower electrode LE3, the upper electrode UE3, and the portion of the organic layer OR3 overlapping with the pixel opening AP3 constitutes the display element DE3 of sub-pixel SP3. Display elements DE1, DE2, and DE3 may also include a capping layer described later. Rib layer 5 surrounds each of these display elements DE1, DE2, and DE3.

[0066] A conductive partition 6 is disposed above the rib layer 5. The partition 6 serves as wiring to supply a common voltage to the upward electrodes UE1, UE2, and UE3. The partition 6 overlaps the rib layer 5 in its entirety and has the same planar shape as the rib layer 5. The partition 6 is formed in such a way that it surrounds the lower electrodes LE1, LE2, and LE3.

[0067] Figure 3 It is along Figure 2 A schematic cross-sectional view of the display device DSP along line III-III. A circuit layer 11 is disposed on the substrate 10 described above. The circuit layer 11 includes... Figure 1 The diagram shows various circuits and wiring, including pixel circuit 1, scan line G, signal line S, and power line PL. Circuit layer 11 is covered by organic insulating layer 12. Organic insulating layer 12 functions as a planarization film to flatten the unevenness generated by circuit layer 11.

[0068] Lower electrodes LE1, LE2, and LE3 are disposed on the organic insulating layer 12. Rib layer 5 is disposed on the organic insulating layer 12 and the lower electrodes LE1, LE2, and LE3. The ends of the lower electrodes LE1, LE2, and LE3 are covered by rib layer 5. Figure 3 The cross-section is not shown, but the lower electrodes LE1, LE2, and LE3 are connected to the pixel circuit 1 of the circuit layer 11 through contact holes provided in the organic insulating layer 12.

[0069] The partition 6 includes a conductive lower portion 61 disposed on the rib layer 5 and an upper portion 62 disposed on the lower portion 61. The upper portion 62 has a wider width than the lower portion 61. As a result, both ends of the upper portion 62 protrude beyond the sides of the lower portion 61. Such a shape of the partition 6 is called a cantilever.

[0070] exist Figure 3 In this example, the lower portion 61 has a bottom layer 63 disposed above the rib layer 5 and a shaft layer 64 disposed above the bottom layer 63. For example, the bottom layer 63 is formed to be thinner than the shaft layer 64. Figure 3 In the example, the two ends of the bottom layer 63 protrude from the sides of the shaft layer 64.

[0071] In addition, Figure 3 In this example, the upper part 62 includes a first top layer 65 and a second top layer 66 disposed above the first top layer 65. For example, the width of the second top layer 66 is slightly smaller than the width of the first top layer 65. However, it is not limited to this; the first top layer 65 and the second top layer 66 may also have the same width.

[0072] Organic layer OR1 covers lower electrode LE1 through pixel opening AP1. Upper electrode UE1 covers organic layer OR1 and is opposite to lower electrode LE1. Organic layer OR2 covers lower electrode LE2 through pixel opening AP2. Upper electrode UE2 covers organic layer OR2 and is opposite to lower electrode LE2. Organic layer OR3 covers lower electrode LE3 through pixel opening AP3. Upper electrode UE3 covers organic layer OR3 and is opposite to lower electrode LE3. Upper electrodes UE1, UE2, and UE3 are in contact with the lower part 61 of partition 6.

[0073] Display element DE1 includes a capping layer CP1 covering the upper electrode UE1. Display element DE2 includes a capping layer CP2 covering the upper electrode UE2. Display element DE3 includes a capping layer CP3 covering the upper electrode UE3. Capping layers CP1, CP2, and CP3 respectively serve as optical adjustment layers to improve the light extraction efficiency emitted by organic layers OR1, OR2, and OR3.

[0074] In the following description, the multilayer comprising organic layer OR1, upper electrode UE1, and capping layer CP1 is referred to as laminated film FL1 (first laminated film), the multilayer comprising organic layer OR2, upper electrode UE2, and capping layer CP2 is referred to as laminated film FL2 (second laminated film), and the multilayer comprising organic layer OR3, upper electrode UE3, and capping layer CP3 is referred to as laminated film FL3 (third laminated film). Laminated films FL1, FL2, and FL3 are disposed above lower electrodes LE1, LE2, and LE3. Additionally, rib layer 5 is disposed below partition wall 6 and laminated films FL1, FL2, and FL3.

[0075] Sub-pixels SP1, SP2, and SP3 are respectively provided with sealing layers SE11, SE12, and SE13. In this embodiment, sealing layer SE11 is equivalent to the first sealing layer, sealing layer SE12 is equivalent to the second sealing layer, and sealing layer SE13 is equivalent to the third sealing layer.

[0076] Encapsulation layer SE11 continuously covers display element DE1 (laminated film FL1) and the surrounding partition 6. Encapsulation layer SE12 continuously covers display element DE2 (laminated film FL2) and the surrounding partition 6. Encapsulation layer SE13 continuously covers display element DE3 (laminated film FL3) and the surrounding partition 6.

[0077] Sealing layers SE11, SE12, and SE13 are covered by resin layer RS1. Resin layer RS1 is covered by sealing layer SE2. Sealing layer SE2 is covered by resin layer RS2. Resin layers RS1, RS2, and sealing layer SE2 are continuously disposed throughout the entire display area DA, and a portion of them also extends to the peripheral area SA.

[0078] Polarizing films, touch panels, protective films, or cover glass can also be further disposed on top of the resin layer RS2. Such cover components can also be bonded to the resin layer RS2, for example, using an adhesive layer such as OCA (Optical Clear Adhesive). The electrodes constituting the aforementioned touch panel can also be disposed on the sealing layer SE2.

[0079] exist Figure 3In the example, above the partition 6 between sub-pixels SP1 and SP2, the ends of the sealing layers SE11 and SE12 are joined together (closely attached). Additionally, on the partition 6 between sub-pixels SP1 and SP3, the ends of the sealing layers SE11 and SE13 are joined together (closely attached). Furthermore, although not shown, on the partition 6 between sub-pixels SP2 and SP3, the ends of the sealing layers SE12 and SE13 are joined together (closely attached).

[0080] If we focus on the sealing layer SE12, the sealing layer SE12 has an overlapping portion SE121 located above the partition 6. The overlapping portion SE121 is connected to the end of the sealing layer SE11. The overlapping portion SE121 may also include a protrusion 121a that projects upward. Above the partition 6 between sub-pixels SP1 and SP2, the protrusion 121a is located above the sealing layer SE11.

[0081] Additionally, the overlapping portion SE121 may also include an extension 121b extending toward the gap G1 formed between the sealing layer SE11 and the upper portion 62 of the partition wall 6. This gap is created by the disappearance of the laminated film FL1 during the manufacturing process.

[0082] Alternatively, a laminated film FL2 can be disposed between the partition 6 and the overlapping portion SE121. It should be noted that this laminated film FL2 may also disappear during manufacturing. In this case, a gap is created between the sealing layer SE12 and the partition 6.

[0083] Similarly, if we focus on the sealing layer SE13, the sealing layer SE13 has an overlapping portion SE131 located above the partition 6. The overlapping portion SE131 is connected to the end of the sealing layer SE11. The overlapping portion SE131 may also include an upwardly projecting protrusion 131a. Above the partition 6 between sub-pixels SP1 and SP3, the protrusion 131a is located above the sealing layer SE11.

[0084] Additionally, the overlapping portion SE131 may also include an extension 131b extending toward the gap G1 formed between the sealing layer SE11 and the upper portion 62 of the partition wall 6. This gap is created by the disappearance of the laminated film FL1 during the manufacturing process.

[0085] A laminated film FL3 is disposed between the partition 6 and the overlapping portion SE131. It should be noted that if the laminated film FL3 disappears during the manufacturing process, a gap will be generated between the sealing layer SE13 and the partition 6.

[0086] Figure 4 It is along Figure 2 A schematic cross-sectional view of another example of a DSP display device with line III-III. Figure 4In the middle, the overlapping portions SE121 and SE131 of the sealing layers SE12 and SE13 have shapes similar to... Figure 3 The examples are different.

[0087] If we focus on the sealing layer SE12, the protrusion 121a of the sealing layer SE12 can also overlap with the sealing layer SE11. Figure 4 In the example, the protrusion 121a includes a portion 121c that overlaps with the sealing layer SE11. In the third direction Z, the protrusions 121a of the partition wall 6, the sealing layer SE11, and the sealing layer SE12 are arranged sequentially. The portion 121c may or may not be in contact with the sealing layer SE11.

[0088] Similarly, if we focus on the sealing layer SE13, the protrusion 131a of the sealing layer SE13 can also overlap with the sealing layer SE11. Figure 4 In the example, the protrusion 131a includes a portion 131c that overlaps with the sealing layer SE11. In the third direction Z, the protrusions 131a of the partition wall 6, the sealing layer SE11, and the sealing layer SE13 are arranged sequentially. The portion 131c may or may not be in contact with the sealing layer SE11.

[0089] exist Figure 3 and Figure 4 As not shown in the diagram, if we are concerned with the area above the partition 6 between sub-pixels SP2 and SP3, the overlapping portion SE131 may also include an upwardly projecting protrusion 131a. The protrusion 131a is located above the sealing layer SE12. Additionally, in Figure 4 In the example, above the partition 6 between sub-pixels SP2 and SP3, the protrusions 131a of the partition 6, the sealing layer SE12, and the sealing layer SE13 are arranged sequentially in the third direction Z.

[0090] The organic insulating layer 12 is formed of organic insulating materials such as polyimide. The rib layer 5 and the sealing layers SE11, SE12, SE13, and SE2 are formed of inorganic insulating materials such as silicon nitride (SiNx), silicon oxide (SiOx), or silicon oxynitride (SiON). In one example, the rib layer 5 is formed of silicon oxynitride, and the sealing layers SE11, SE12, SE13, and SE2 are formed of silicon nitride. The resin layers RS1 and RS2 are formed, for example, of resin materials (organic insulating materials) such as epoxy resin or acrylic resin.

[0091] The lower electrodes LE1, LE2, and LE3 have, for example, a reflective layer formed of silver and a pair of conductive oxide layers covering the upper and lower surfaces of the reflective layer, respectively. Each conductive oxide layer can be formed of a transparent conductive oxide, such as ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), or IGZO (Indium Gallium Zinc Oxide).

[0092] The upper electrodes UE1, UE2, and UE3 are formed, for example, of metallic materials such as an alloy of magnesium and silver (MgAg). For example, the lower electrodes LE1, LE2, and LE3 correspond to the anode, and the upper electrodes UE1, UE2, and UE3 correspond to the cathode.

[0093] Organic layers OR1, OR2, and OR3 are composed of multiple thin films including light-emitting layers. In one example, organic layers OR1, OR2, and OR3 have a structure in which a hole injection layer, a hole transport layer, an electron blocking layer, a light-emitting layer, a hole blocking layer, an electron transport layer, and an electron injection layer are sequentially stacked in the third direction Z. However, organic layers OR1, OR2, and OR3 may also have other structures, such as a so-called tandem structure containing multiple light-emitting layers.

[0094] The capping layers CP1, CP2, and CP3 have a stacked structure, for example, consisting of multiple overlapping transparent layers. These transparent layers include layers formed of inorganic materials and layers formed of organic materials. Furthermore, these transparent layers have different refractive indices. For example, the refractive indices of these transparent layers differ from the refractive indices of the upper electrodes UE1, UE2, and UE3, and the refractive indices of the sealing layers SE11, SE12, and SE13. It should be noted that at least one of the capping layers CP1, CP2, and CP3 may be omitted.

[0095] The bottom layer 63 and the axial layer 64 of the partition 6 are formed of metallic materials. For example, molybdenum, titanium, titanium nitride (TiN), molybdenum-tungsten alloy (MoW), or molybdenum-niobium alloy (MoNb) can be used as the metallic material for the bottom layer 63. For example, aluminum, aluminum-neodymium alloy (AlNd), aluminum-yttrium alloy (AlY), or aluminum-silicon alloy (AlSi) can be used as the metallic material for the axial layer 64. It should be noted that the axial layer 64 can also be formed of an insulating material.

[0096] The first top layer 65 of the partition 6 is formed of, for example, a metallic material. The second top layer 66 of the partition 6 is formed of, for example, a conductive oxide. As the metallic material forming the first top layer 65, titanium, titanium nitride, molybdenum, tungsten, a molybdenum-tungsten alloy, or a molybdenum-niobium alloy can be used, for example. As the conductive oxide forming the second top layer 66, ITO or IZO can be used, for example. It should be noted that the upper part 62 can have three or more layers, or it can be formed from a single layer. Furthermore, the upper part 62 may also include a layer formed of an insulating material.

[0097] The partition 6 is supplied with a common voltage. This common voltage is supplied to the upper electrodes UE1, UE2, and UE3, which are in contact with the lower part 61, respectively. The lower electrodes LE1, LE2, and LE3 are supplied with pixel voltages corresponding to the image signals of the signal line S through the pixel circuits 1 of the sub-pixels SP1, SP2, and SP3, respectively.

[0098] Organic layers OR1, OR2, and OR3 emit light in response to the application of voltage. Specifically, if a potential difference is formed between the lower electrode LE1 and the upper electrode UE1, the emitting layer of organic layer OR1 emits blue light. If a potential difference is formed between the lower electrode LE2 and the upper electrode UE2, the emitting layer of organic layer OR2 emits green light. If a potential difference is formed between the lower electrode LE3 and the upper electrode UE3, the emitting layer of organic layer OR3 emits red light.

[0099] As another example, the light-emitting layers of organic layers OR1, OR2, and OR3 can also emit light of the same color (e.g., white). In this case, the display device DSP can also include a color filter that converts the light emitted by the light-emitting layers into light of the colors corresponding to the sub-pixels SP1, SP2, and SP3. Alternatively, the display device DSP can also include a layer containing quantum dots that generate light of the colors corresponding to the sub-pixels SP1, SP2, and SP3 when excited by the light emitted by the light-emitting layers.

[0100] Figure 5 This is a schematic top view showing an example of the configuration of the partition 6 and sealing layers SE11, SE12, and SE13 that can be applied to this embodiment. Figure 5 In the diagram, the sealing layer SE11 is marked with a diagonal line pattern pointing downwards to the right, the sealing layer SE12 is marked with a dot pattern, and the sealing layer SE13 is marked with a diagonal line pattern pointing upwards to the right. Additionally, the adjacent layer 6 is marked with a dot pattern that is sparser than that of the sealing layer SE12.

[0101] like Figure 5As shown, sealing layer SE11 covers sub-pixel SP1, sealing layer SE12 covers sub-pixel SP2, and sealing layer SE13 covers sub-pixel SP3. Sealing layers SE11 and SE13 are formed separately for each sub-pixel SP1 and SP3. Sealing layer SE12 is formed continuously over a range of multiple sub-pixels SP2 arranged, for example, in the second direction Y. It should be noted that sealing layer SE12 can also be formed per sub-pixel SP2. (If using...) Figure 3 As explained, the sealing layers SE11, SE12, and SE13 are not separated from each other.

[0102] When viewed from above, the sealing layers SE11 and SE13 appear, for example, to be polygonal in shape. Figure 5 In the example, the planar shapes of the sealing layers SE11 and SE13 are octagonal. The sealing layer SE12 has a body 12a overlapping with the sub-pixel SP2 and multiple epitaxial portions 12b. The epitaxial portions 12b extend from the body 12a toward the outside of the sub-pixel SP2. Specifically, the multiple epitaxial portions 12b extend along the second direction Y and in the direction opposite to the second direction Y.

[0103] The extension portion 12b is located at the corner formed by the sealing layer SE11 and the sealing layer SE13. It should be noted that the planar shapes of the sealing layers SE11, SE12, and SE13 are not limited to this example.

[0104] Figure 6 yes Figure 5 A simplified enlarged view of section VI. Figure 6 In this study, the focus is mainly on the sealing layer SE13, while other elements such as the sealing layers SE11 and SE12 are omitted.

[0105] When viewed from above, the sealing layer SE13 has two sides L1, two sides L2, two sides L31, and two sides L32. In this embodiment, side L1 corresponds to the first side, side L2 corresponds to the second side, and side L31 corresponds to the third side.

[0106] Edge L1 corresponds to the edge facing the end of sealing layer SE11. Specifically, edge L1 corresponds to the edge that connects to the end of sealing layer SE11. Edges L2, L31, and L32 correspond to the edges facing the end of sealing layer SE12. Specifically, edges L2, L31, and L32 correspond to the edges that connect to the end of sealing layer SE12.

[0107] Edge L1 extends along the first direction, and edge L2 extends along the second direction. Edges L31 and L32 extend in directions different from the first direction X and the second direction Y. For example, edge L31 extends along direction D1, which intersects the first direction X at an acute angle counterclockwise. For example, edge L32 extends along direction D2, which intersects the first direction X at an acute angle clockwise.

[0108] Edges L31 and L32 connect edges L1 and L2. Here, "connection" includes not only direct connections between elements but also connections via other elements. Figure 6 In the example, edges L31 and L32 are directly connected to edges L1 and L2, respectively.

[0109] Furthermore, considering the relationship with adjacent wall 6, edges L1, L2, L31, and L32 overlap with adjacent wall 6. In other words, edges L1, L2, L31, and L32 are positioned above the upper part 62 of adjacent wall 6. Additionally, from another perspective, edges L1, L2, L31, and L32 overlap with the opening of adjacent wall 6.

[0110] Here, regarding the corner CN3 formed by edges L1 and L31, the angle between edges L1 and L31 is defined as angle θ1. If we are concerned with the sealing layer SE13, then angle θ1 corresponds to the interior angle of the sealing layer SE13. Angle θ1 is, for example, an obtuse angle. In other words, angle θ1 is greater than 90 degrees and less than 180 degrees (90 degrees < θ1 < 180 degrees). In one example, angle θ1 is between 120 degrees and 150 degrees (120 degrees < θ1 < 150 degrees). More specifically, angle θ1 is 135 degrees.

[0111] Figure 7 This is a schematic top view used to illustrate other examples of the sealing layer SE13. Figure 7 In the image, the corner CN3 of the sealing layer SE13 is shown in magnification.

[0112] The sealing layer SE13 may also have a curved portion RL1. The curved portion RL1 has an arc shape (circular shape). The curved portion RL1 connects edge L1 to edge L31. In other words, edge L31 of the sealing layer SE13 is connected to edge L1 by means of the curved portion RL1.

[0113] In this case, angle θ1 is equivalent to the angle formed by the extension line L1E of side L1 and the extension line L3E of side L31. That is, angle θ1 includes not only the angle of corner CN3 when side L1 is directly connected to side L31, but also the angle of corner CN3 when the extension line L1E of side L1 is connected to the extension line L3E of side L31.

[0114] It should be noted that, in Figure 6 and Figure 7 In this section, one corner CN3 of the sealing layer SE13 will be described, and the other corners of the sealing layer SE13 will be constructed in the same way.

[0115] Next, an example of a manufacturing method for a display device DSP will be described. Figure 8 This is a flowchart illustrating an example of a manufacturing method for a display device DSP. Figures 9A to 9JThis is a schematic cross-sectional view illustrating the manufacturing process of a display device DSP. Figures 9A to 9J In this section, the focus is primarily on the display area DA, and elements below the organic insulating layer 12 are omitted.

[0116] In the formation of the display device DSP, a circuit layer 11 and an organic insulating layer 12 are first formed on the substrate 10. Figure 8 The next step is as follows (PR1). Figure 9A As shown, lower electrodes LE1, LE2, and LE3 are formed on the organic insulating layer 12. Figure 8 Process PR2).

[0117] Next, as Figure 9B As shown, a rib layer 5 is formed to cover the lower electrodes LE1, LE2, and LE3. Figure 8 (Process PR3). At this time, the rib layer 5 does not have pixel openings AP1, AP2, and AP3. The rib layer 5 can be formed by CVD (Chemical Vapor Deposition).

[0118] After the rib layer 5 is formed, the process for forming the partition wall 6 is carried out. Figure 8 (Process PR4). In process PR4, such as Figure 9C As shown, a first layer BL1 for processing into a bottom layer 63, a second layer BL2 for processing into a shaft layer 64, a third layer BL3 for processing into a first top layer 65, and a fourth layer BL4 for processing into a second top layer 66 are formed sequentially. Furthermore, a photoresist R1 is disposed on the fourth layer BL4. The photoresist R1 is patterned into the shape of a partition 6. The first layer BL1, the second layer BL2, the third layer BL3, and the fourth layer BL4 can be formed, for example, by sputtering.

[0119] Then, using resist R1 as a mask, the first layer BL1, the second layer BL2, the third layer BL3, and the fourth layer BL4 are patterned. In one example, the first layer BL1 is formed of titanium nitride, the second layer BL2 is formed of aluminum, the third layer BL3 is formed of titanium, and the fourth layer BL4 is formed of ITO. In this case, the patterning can include wet etching to remove the portion of the fourth layer BL4 exposed from the resist R1, dry etching to remove the portions of the first layer BL1, the second layer BL2, and the third layer BL3 exposed from the resist R1, and wet etching to reduce the width of the second layer BL2.

[0120] After process PR4, such as Figure 9DAs shown, a partition 6 is formed in the display area DA. After the partition 6 is formed, the resist R1 is removed (stripped off). In the wet etching process that reduces the width of the second layer BL2, the second top layer 66 (the fourth layer BL4) may also be slightly etched. In the case of this etch, the width of the second top layer 66 is smaller than the width of the first top layer 65.

[0121] Next, the process for setting pixel apertures AP1, AP2, and AP3 is carried out. Figure 8 Process PR5). In process PR5, such as Figure 9E As shown, a photoresist R2 is formed covering the partition 6. Furthermore, using the photoresist R2 as a mask, dry etching is performed on the rib layer 5. Thus, as... Figure 9F As shown, pixel openings AP1, AP2, and AP3 are formed in rib layer 5 to expose the lower electrodes LE1, LE2, and LE3. After the above dry etching, the resist R2 is removed (stripped off).

[0122] After process PR5, a process for forming display element DE1 is performed. Figure 8 Process PR6). In the formation of display element DE1, firstly as... Figure 9G The laminated film FL1 and the sealing layer SE11 are shown. Figure 3 As shown, the laminated film FL1 includes an organic layer OR1 that contacts the lower electrode LE1 through a pixel opening AP1, an upper electrode UE1 covering the organic layer OR1, and a capping layer CP1 covering the upper electrode UE1. The organic layer OR1, the upper electrode UE1, and the capping layer CP1 can be formed, for example, by vapor deposition. In addition, the sealing layer SE11 can be formed, for example, by CVD.

[0123] The laminated film FL1 and the sealing layer SE11 are formed not only in the display area DA but also in the peripheral area SA. The laminated film FL1 is cut into multiple parts by overhanging septa 6. The sealing layer SE11 continuously covers each part of the laminated film FL1 and the septa 6.

[0124] Next, the laminated film FL1 and the sealing layer SE11 are patterned. In this patterning, as... Figure 9G As shown, resist R3 is disposed on top of the sealing layer SE11. Resist R3 covers a portion of the sub-pixel SP1 and its surrounding partition 6.

[0125] Then, an etching process is performed using resist R3 as a mask. Thus, as... Figure 9HAs shown, the portions of the laminated film FL1 and the sealing layer SE11 exposed from the resist R3 are removed, forming the display element DE1 in the sub-pixel SP1. This etching process includes wet etching and dry etching sequentially performed on the sealing layer SE11, the capping layer CP1, the upper electrode UE1, and the organic layer OR1. After these etching processes, the resist R3 is removed (stripped off).

[0126] It should be noted that during the wet etching of the laminated film FL1, the laminated film FL1 above the partition wall 6 and below the sealing layer SE11 is also removed. This creates a gap between the sealing layer SE11 above the partition wall 6 and the partition wall 6. The laminated film FL1 constituting the display element DE1 is completely surrounded by the sealing layer SE11 and the partition wall 6, and therefore is not eroded by the aforementioned wet etching.

[0127] Prior to the aforementioned wet etching, a laminated film FL1 is also formed in the gap between the partition wall 6 and the sealing layer SE11. During the aforementioned wet etching, the laminated film FL1 in this gap is removed by the etching solution penetrating from near the end of the sealing layer SE11 to below the sealing layer SE11.

[0128] After process PR6, a process for forming display element DE2 is performed. Figure 8 The process PR7). Display element DE2 can be formed through the same steps as display element DE1. That is, when forming display element DE2, the laminated film FL2 and the encapsulating layer SE12 are formed in the entire display area DA and the peripheral area SA. Figure 3 As shown, the laminated film FL2 includes an organic layer OR2 that is in contact with the lower electrode LE2 through the pixel opening AP2, an upper electrode UE2 covering the organic layer OR2, and a capping layer CP2 covering the upper electrode UE2.

[0129] The organic layer OR2, the upper electrode UE2, and the capping layer CP2 can be formed, for example, by vapor deposition. Additionally, the sealing layer SE12 can be formed, for example, by CVD. The laminated film FL2 is cut into multiple portions by overhanging partitions 6. The sealing layer SE12 continuously covers each cut portion of the laminated film FL2 and the partitions 6. By patterning such a laminated film FL2 and the sealing layer SE12, as... Figure 9I As shown, display element DE2 is formed in sub-pixel SP2.

[0130] Above the partition 6 between sub-pixels SP1 and SP2, the ends of sealing layers SE11 and SE12 are connected to each other. When sealing layer SE12 is formed in connection with sealing layer SE11, sometimes a protrusion 121a is formed in the overlapping portion SE121 of sealing layer SE12 formed in a process after sealing layer SE11. In addition, sometimes an extension 121b is formed in sealing layer SE12 extending toward the gap G1 formed between sealing layer SE11 and the upper portion 62 of partition 6.

[0131] It should be noted that a laminated film FL2 is also formed in the gap between the partition 6 and the sealing layer SE12. During wet etching, the laminated film FL2 in this gap is removed by the etching solution penetrating from near the end of the sealing layer SE12 to below the sealing layer SE12.

[0132] After process PR7, a process for forming display element DE3 is performed. Figure 8 (Process PR8). Display element DE3 can be formed in the same steps as display elements DE1 and DE2.

[0133] That is, in the formation of the display element DE3, the laminated film FL3 and the sealing layer SE13 are formed in the entire display area DA and the surrounding area SA. For example... Figure 3 As shown, the laminated film FL3 includes an organic layer OR3 that is in contact with the lower electrode LE3 through the pixel opening AP3, an upper electrode UE3 covering the organic layer OR3, and a capping layer CP3 covering the upper electrode UE3.

[0134] The organic layer OR3, the upper electrode UE3, and the capping layer CP3 can be formed, for example, by vapor deposition. Additionally, the sealing layer SE13 can be formed, for example, by CVD. The laminated film FL3 is cut into multiple portions by overhanging partitions 6. The sealing layer SE13 continuously covers each cut portion of the laminated film FL3 and the partitions 6. By patterning such a laminated film FL3 and the sealing layer SE13, as... Figure 9J As shown, display element DE3 is formed in sub-pixel SP3.

[0135] The ends of sealing layers SE11 and SE13 are connected above each other on the partition 6 between sub-pixels SP1 and SP3. When sealing layer SE13 is formed in connection with sealing layer SE11, a protrusion 131a is sometimes formed in the overlapping portion SE131 in the sealing layer SE13 formed in a process after sealing layer SE11. In addition, an extension 131b is sometimes formed in sealing layer SE13 extending toward the gap G1 formed between sealing layer SE11 and the upper portion 62 of partition 6.

[0136] like Figure 9JAs shown, a laminated film FL3 is formed in the gap between the partition 6 and the sealing layer SE13. Since the ends of the sealing layers SE11 and SE13 are in contact with each other, the etchant is prevented from penetrating from near the ends of the sealing layer SE13 toward the underside of the sealing layer SE13 during wet etching. As a result, the laminated film FL3 remains in this gap.

[0137] Furthermore, the gap is surrounded not only by the partition wall 6 and the overlapping portion SE131, but also by the extension portion 131b. This further inhibits the penetration of the etching solution into the gap.

[0138] It should be noted that when the sealing layer SE13 is also formed above the partition 6 between sub-pixels SP2 and SP3 in a manner that is in contact with the sealing layer SE12, sometimes in the sealing layer SE13 formed in a process after the sealing layer SE12, a protrusion 131a and an extension 131b are formed in the overlapping part SE131.

[0139] In addition, Figure 9I and Figure 9J In the example shown, it can also be patterned to remove to Figure 4 The portions 121c and 131c shown are the overlapping portions of the sealing layer SE12 and SE11, respectively, and the portions of the sealing layer SE13 and SE13 that overlap with the sealing layer SE11.

[0140] After process PR8, resin layer RS1, sealing layer SE2, and resin layer RS2 are formed sequentially. Figure 8 (Process PR9). The resin layers RS1 and RS2 can be formed, for example, using an inkjet printing method. The sealing layer SE2 can be formed, for example, using CVD.

[0141] In this embodiment, it is envisioned that display elements DE1, DE2, and DE3 are formed sequentially. In this case, display element DE1 corresponds to the display element of the first color, display element DE2 corresponds to the display element of the second color, and display element DE3 corresponds to the display element of the third color.

[0142] Here, pay attention Figure 8 The sealing layers SE11, SE12, and SE13 in processes PR6 to PR8. Figures 10A to 10E This is a schematic top view showing the manufacturing process of the display device DSP.

[0143] exist Figure 8 In process PR6, such as Figure 10A As shown, the sealing layer SE11 is formed throughout the entire display area DA. Figure 8 After process PR6, it forms Figure 10BThe sealing layer SE11 is shown. As described above, the sealing layer SE11 has an octagonal shape.

[0144] exist Figure 8 In process PR7, such as Figure 10C As shown, the sealing layer SE12 is formed throughout the entire display area DA. Figure 8 After process PR7, it is formed Figure 10D The sealing layer SE12 is shown. Multiple epitaxial portions 12b are formed during the patterning process PR7.

[0145] Figure 11 yes Figure 10D A schematic enlarged view of part XI. Sealing layer SE11 has edge L4, and sealing layer SE12 has edges L5, L61, and L62. In this embodiment, edge L4 corresponds to the fourth edge, edge L5 corresponds to the fifth edge, and edge L61 corresponds to the sixth edge.

[0146] Edge L4 extends along the first direction X. Edge L5 extends along the second direction Y. Edges L61 and L62 are part of the extension 12b. Edges L61 and L62 are connected to edge L5. Edges L61 and L62 extend in directions different from the first direction X and the second direction Y.

[0147] Side L61 extends, for example, along a direction D1 that intersects the first direction X at an acute counterclockwise angle. Side L62 extends, for example, along a direction D2 that intersects the first direction X at an acute clockwise angle. Figure 11 In the example, edges L61 and L62 are directly connected to edge L5, but edges L61 and L62 can also be connected to edge L5 via other edges.

[0148] Furthermore, if we consider the relationship with the adjacent 6, then edges L4, L5, L61, and L62 overlap with the adjacent 6. In other words, edges L4, L5, L61, and L62 are positioned above the upper part 62 of the adjacent 6.

[0149] If we focus on the sealing layer SE13, then edge L4 is equivalent to edge L1 of the sealing layer SE13 ( Figure 6 The edge L5 is connected to the edge L2 of the sealing layer SE13 (as shown). Additionally, edge L5 corresponds to edge L2 of the sealing layer SE13 (as shown). Figure 6 The edge L61 that connects to the sealing layer SE13 is equivalent to the edge L31 (shown). Figure 6 The edge L62 that connects to the sealing layer SE13 is equivalent to the edge L32 (shown). Figure 6 The edges that are connected (as shown).

[0150] Here, the angle between edge L4 and edge L61 is defined as angle θ2. Furthermore, the region surrounded by sealing layers SE11 and SE12 is defined as region A3. In other words, sealing layers SE11 and SE12 form region A3. Region A3 corresponds to the region overlapping with sub-pixel SP3 (lower electrode LE3). The planar shape of region A3 is octagonal.

[0151] If we focus on region A3, then angle θ2 is equivalent to an interior angle of region A3. Angle θ2 is, for example, an obtuse angle. In other words, angle θ2 is greater than 90 degrees and less than 180 degrees (90 degrees < θ2 < 180 degrees). In one example, angle θ2 is between 120 degrees and 150 degrees (120 degrees < θ2 < 150 degrees). More specifically, angle θ2 is 135 degrees. In this case, the angle formed by edges L61 and L62 (the interior angle of the sealing layer SE12) is 90 degrees. It should be noted that the other interior angles in region A3 are also formed in the same way as angle θ2.

[0152] exist Figure 8 In process PR8, such as Figure 10E As shown, the sealing layer SE13 is formed throughout the entire display area DA. Figure 8 After the PR8 process, it is formed Figure 5 The sealing layer SE13 is shown.

[0153] According to the above-described embodiment, the yield rate of the display device DSP can be improved.

[0154] Figures 12A to 12C This is a schematic top view illustrating the manufacturing process of a display device according to a comparative example of this embodiment. Figures 12A to 12C In, with Figures 10A to 10E Similarly, attention should be paid to the sealing layers SE11, SE12, and SE13.

[0155] In the comparative examples, such as Figure 12A As shown, an encapsulation layer SE11 is formed to cover the display element DE1 with a laminated film FL1. When viewed from above, the encapsulation layer SE11 has a rectangular shape. Then, a process for forming the display element DE2 is performed. In a comparative example, as... Figure 12B As shown, an encapsulation layer SE12 is formed that covers multiple sub-pixels SP2. Here, if we focus on the corner CN5 formed by the encapsulation layers SE11 and SE12, the corner CN5 is formed into a right angle.

[0156] Then, the process for forming the display element DE3 is performed. In the formation of the display element DE3, such as... Figure 12CAs shown, the laminated film FL3 and the sealing layer SE13 are formed throughout the entire display area DA. Then, a photoresist is applied to process the laminated film FL3 and the sealing layer SE13. During photoresist application, bubbles are easily generated at the locations where it overlaps with the corner CN5.

[0157] Assuming the process for forming display element DE3 is performed while bubbles are present, during the depressurized drying of the resist used to pattern the laminated film FL3 and the sealing layer SE13, the bubbles will burst, and the area A5 that should have been covered by the resist will be exposed. Figure 12C (As shown) This exposure may cause malfunctions in the display area DA.

[0158] In contrast, such as Figure 11 As shown, in the display device DSP of this embodiment, the interior angle (angle θ2) of region A3 formed by the sealing layer SE11 and the sealing layer SE12 is formed as an obtuse angle. Therefore, a sealing layer SE13 with an obtuse angle θ1 (interior angle) is formed.

[0159] Therefore, when applying the resist used to pattern the laminated film FL3 and the sealing layer SE13, air can easily escape from the corner CN5. In other words, during process PR8, it is difficult for air bubbles to form at the corner CN5 (the inner corner of region A3), and the resist can easily flow in.

[0160] As a result, resist cracking can be suppressed in process PR8. In other words, the area A5 that should be covered by the resist is difficult to expose. With this embodiment, it is possible to suppress defects in the display device DSP and improve the yield of the display device DSP.

[0161] Next, other embodiments will be described. It should be noted that in the other embodiments described below, sometimes the same components as those in the first embodiment described above are labeled with the same reference numerals as those in the first embodiment, and their detailed descriptions are omitted or simplified.

[0162] [Second Embodiment]

[0163] Figure 13 This is a schematic top view of the display device DSP of this embodiment. Figure 14 yes Figure 13 A simplified enlarged view of section XIV. Figure 14 In this embodiment, the focus is mainly on the sealing layers SE11 and SE12, while other elements such as the sealing layer SE13 are omitted. In this embodiment, the shapes of the sealing layers SE11 and SE12 are different from those in the first embodiment.

[0164] When viewed from above, the sealing layer SE11 has a rectangular shape. For example... Figure 14As shown, the sealing layer SE11 has an edge L4 extending along the first direction X. The sealing layer SE12 is formed continuously within, for example, a plurality of sub-pixels SP2 arranged in the second direction Y.

[0165] like Figure 14 As shown, the sealing layer SE12 has a plurality of epitaxial portions 12b. The shape of the epitaxial portions 12b in this embodiment is different from the shape of the epitaxial portions 12b in the first embodiment.

[0166] The sealing layer SE12 has edges L5, L61, and L62. The extension portion 12b has an extension portion 12b including edge L61 and an extension portion 12b including edge L62. For example... Figure 14 As shown, the sealing layer SE12 also has a side L63 in the extension portion 12b. Side L63 extends along the first direction X along the side L4 of the sealing layer SE11. Sides L61 and L62 are connected to side L63.

[0167] In this embodiment, angle θ2 is also, for example, an obtuse angle. In other words, angle θ2 is greater than 90 degrees and less than 180 degrees (90 degrees < θ2 < 180 degrees). In one example, angle θ2 is more than 120 degrees and less than 150 degrees (120 degrees < θ2 < 150 degrees). More specifically, angle θ2 is 135 degrees. It should be noted that the sealing layer SE13 in this embodiment has the same shape as the sealing layer SE13 in the first embodiment.

[0168] In this embodiment, the same effect as in the first embodiment can be achieved. In this embodiment, angle θ2 is also formed as an obtuse angle. Therefore, when applying the resist used to pattern the laminated film FL3 and the sealing layer SE13, air can easily escape from the corner CN5. As a result, it is possible to... Figure 8 In process PR8, resist cracking is suppressed. In this embodiment, it is possible to suppress defects in the display device DSP and improve the yield of the display device DSP.

[0169] [Third Embodiment]

[0170] Figure 15 This is a schematic top view of the display device DSP of this embodiment. Figure 16 yes Figure 15 A simplified enlarged view of section XVI. Figure 16 In this embodiment, the focus is mainly on the sealing layers SE11 and SE12, while other elements such as the sealing layer SE13 are omitted. In this embodiment, the shapes of the sealing layers SE11 and SE12 are different from those in the first embodiment.

[0171] like Figure 15As shown, the sealing layer SE12 is continuously formed within the range of a plurality of sub-pixels SP2 arranged in the second direction Y. The sealing layer SE12 in this embodiment does not have elements equivalent to the epitaxial portion 12b in the first embodiment. For example... Figure 16 As shown, the sealing layer SE12 has a pair of edges L5 extending along the second direction.

[0172] like Figure 16 As shown, the sealing layer SE11 has a body 11a overlapping with the sub-pixel SP1 and a plurality of (4) epitaxial portions 11b. The epitaxial portions 11b are formed, for example, by patterning in process PR6. The epitaxial portions 11b extend from the body 11a toward the outside of the sub-pixel SP1. Specifically, the plurality of epitaxial portions 11b extend in the second direction Y and in a direction opposite to the second direction Y.

[0173] Multiple extension portions 11b are disposed above the partition 6. The sealing layer SE11 has two edges L4, two edges L71, and two edges L72. In this embodiment, edge L4 corresponds to the fourth edge, and edge L71 corresponds to the seventh edge.

[0174] Edge L4 is equivalent to edge L1 of the sealing layer SE13 ( Figure 6 The edge L71 that connects to the sealing layer SE13 is equivalent to the edge L31 (shown). Figure 6 The edge L72 that connects to the sealing layer SE13 is equivalent to the edge L32 (shown). Figure 6 (As shown) the connecting edges. The extension portion 11b has an extension portion 11b including edge L71 and an extension portion 11b including edge L72. Edges L71 and L72 extend in directions different from the first direction X and the second direction Y.

[0175] Edge L71 extends, for example, along direction D1, which intersects at an acute angle counterclockwise relative to the first direction X. Edge L72 extends, for example, along direction D2, which intersects at an acute angle clockwise relative to the first direction X. Edges L71 and L72 are directly connected to edge L4, or they can be connected to edge L4 via other edges.

[0176] Furthermore, if we consider the relationship with the adjacent 6, then edges L4, L71, and L72 overlap with the adjacent 6. In other words, edges L4, L71, and L72 are positioned above the upper part 62 of the adjacent 6.

[0177] Here, the angle between edge L4 and edge L71 is defined as angle θ3. If we are concerned with region A3, then angle θ3 is equivalent to the interior angles of region A3. Angle θ3 is, for example, an obtuse angle. In other words, angle θ3 is greater than 90 degrees and less than 180 degrees (90 degrees < θ3 < 180 degrees). In one example, angle θ3 is between 120 degrees and 150 degrees (120 degrees < θ3 < 150 degrees). More specifically, angle θ3 is 135 degrees. It should be noted that the other interior angles in region A3 are also formed in the same way as angle θ3.

[0178] In this embodiment, the same effects as in the first embodiment can be achieved. In this embodiment, angle θ3 is formed as an obtuse angle. Therefore, when applying the resist used to pattern the laminated film FL3 and the sealing layer SE13, air can easily escape from the corner CN5. As a result, it is possible to... Figure 8 In process PR8, resist cracking is suppressed. This embodiment can prevent defects in the display device DSP and improve the yield of the display device DSP.

[0179] [Fourth Implementation]

[0180] Next, the fourth embodiment will be described. In the embodiments described above, it is envisioned that display elements DE1, DE2, and DE3 are formed sequentially. In this embodiment, it is envisioned that display element DE2 is formed first, followed by display elements DE1 and DE3. In this embodiment, display element DE2 corresponds to a display element of the first color, display element DE1 corresponds to a display element of the second color, and display element DE3 corresponds to a display element of the third color. In this case, the aforementioned resist cracking phenomenon may also occur when forming display element DE3.

[0181] Figures 17A to 17C This is a schematic top view illustrating the manufacturing process of the display device DSP according to this embodiment.

[0182] like Figure 17A As shown, an encapsulation layer SE12 is formed in the display area DA. After the display element DE2 is formed, as... Figure 17B An encapsulation layer SE11 is formed as shown. The encapsulation layer SE11 has multiple epitaxial portions 11b. After forming the display element DE1, as shown... Figure 17C The sealing layer SE13 is shown.

[0183] Figure 18 It is along Figure 17C A schematic cross-sectional view of the display device DSP with XVIII-XVIII lines.

[0184] Similarly, in this embodiment, the ends of the sealing layers SE11 and SE12 are connected to each other above the partition 6 between sub-pixels SP1 and SP2. Furthermore, the ends of the sealing layers SE11 and SE13 are connected to each other on the partition 6 between sub-pixels SP1 and SP3. Additionally, although not shown, the ends of the sealing layers SE12 and SE13 are connected to each other on the partition 6 between sub-pixels SP2 and SP3.

[0185] If we focus on the sealing layer SE11, the sealing layer SE111 has an overlapping portion SE111 located above the partition 6. The overlapping portion SE111 may include an upwardly projecting protrusion 111a (the third protrusion). The protrusion 111a is located above the partition 6 between sub-pixels SP1 and SP2, above the sealing layer SE12.

[0186] Additionally, the overlapping portion SE111 may also include an extension 111b extending toward the gap G2 formed between the sealing layer SE12 and the upper portion 62 of the partition wall 6. This gap is created during the manufacturing process due to the disappearance of the laminated film FL1.

[0187] Alternatively, a laminated film FL1 can be disposed between the partition 6 and the overlapping portion SE111. It should be noted that this laminated film FL1 can also disappear during manufacturing. In this case, a gap is created between the sealing layer SE11 and the partition 6.

[0188] Similarly, if we focus on the sealing layer SE13, the sealing layer SE13 has an overlap SE131 located above the partition 6. The overlap SE131 may also include an upwardly projecting protrusion 131a. Above the partition 6 between sub-pixels SP1 and SP3, the protrusion 131a is located above the sealing layer SE11.

[0189] Additionally, the overlapping portion SE131 may also include an extension 131b extending toward the gap formed between the sealing layer SE11 and the upper portion 62 of the partition wall 6. This gap is created during the manufacturing process due to the disappearance of the laminated film FL1.

[0190] A laminated film FL3 is disposed between the partition 6 and the overlapping portion SE131. It should be noted that if the laminated film FL3 disappears during the manufacturing process, a gap will be generated between the sealing layer SE13 and the partition 6.

[0191] Figure 19 This is a schematic cross-sectional view illustrating other examples of the display device DSP of this embodiment. Figure 19 In the middle, the overlapping portions SE111 and SE131 of the sealing layers SE11 and SE13 have shapes similar to... Figure 18 The examples are different.

[0192] If we focus on the sealing layer SE11, the protrusion 111a of the sealing layer SE11 can also overlap with the sealing layer SE12. Figure 19 In the example, the protrusion 111a includes a portion 111c that overlaps with the sealing layer SE12. In the third direction Z, the protrusions 111a of the partition wall 6, the sealing layer SE12, and the sealing layer SE11 are arranged in sequence.

[0193] Similarly, if we focus on the sealing layer SE13, the protrusion 131a of the sealing layer SE13 can also overlap with the sealing layer SE11. Figure 19 In the example, the protrusion 131a includes a portion 131c that overlaps with the sealing layer SE11. In the third direction Z, the protrusions 131a of the partition wall 6, the sealing layer SE11, and the sealing layer SE13 are arranged in sequence.

[0194] Although Figure 18 and Figure 19 Not shown in the diagram, but if focusing on the area above the partition 6 between sub-pixels SP2 and SP3, the overlapping portion SE131 may also include an upwardly projecting protrusion 131a. The protrusion 131a is located above the sealing layer SE12. Additionally, in Figure 19 In the example, above the partition 6 between sub-pixels SP2 and SP3, the protrusions 131a of the partition 6, the sealing layer SE12, and the sealing layer SE13 are arranged sequentially in the third direction Z.

[0195] The same effect as in the third embodiment can be achieved in this embodiment. It should be noted that the order in which the display elements DE1, DE2, and DE3 are formed in this embodiment can also be applied to the first and second embodiments.

[0196] [Fifth Embodiment]

[0197] Figure 20 This is a schematic top view of the display device DSP of this embodiment. Figure 21 It is along Figure 20 A schematic cross-sectional view of the DSP display device with XXI-XXI lines. Figure 22 yes Figure 20 A schematic enlarged view of section XXII. In this embodiment, the arrangement of the sealing layers SE11, SE12, and SE13 differs from that in the embodiments described above.

[0198] Specifically, above the partition 6, the sealing layers SE11, SE12, and SE13 are separated from each other. In other words, the end of the sealing layer SE12 is not connected to the end of the sealing layer SE11, and the end of the sealing layer SE13 is not connected to the ends of the sealing layers SE11 and SE12, respectively.

[0199] The planar shape of the sealing layer SE11 is octagonal. The sealing layer SE12 is formed continuously within a range of multiple sub-pixels SP2 arranged in the second direction Y, for example. The planar shape of the sealing layer SE13 is rectangular.

[0200] exist Figure 21 In the example, the sealing layer SE11 on the partition 6 between sub-pixels SP1 and SP2 is separated from the sealing layer SE12 on the partition 6. In addition, the sealing layer SE11 on the partition 6 between sub-pixels SP1 and SP3 is separated from the sealing layer SE13 on the partition 6.

[0201] For example, gaps are formed between the sealing layers SE11, SE12, SE13 and the upper portion 62 of the partition wall 6. Laminated membranes FL1, FL2, FL3 may also be disposed in at least a portion of these gaps.

[0202] If we are concerned about the sealing layers SE11 and SE12, then as follows Figure 22 As shown, a slit SL1 is formed between sealing layers SE11 and SE12. The slit SL1 extends along the second direction Y. The slit SL1 is located above the partition 6 between sub-pixels SP1 and SP2.

[0203] like Figure 22 As shown, the sealing layer SE11 has two sides L11, two sides L12, two sides L13, and two sides L14. In this embodiment, side L11 corresponds to the first side, side L12 corresponds to the second side, and side L13 corresponds to the third side.

[0204] Edge L11 extends along the first direction X, and edge L12 extends along the second direction Y. Edges L13 and L14 are connected to edges L11 and L12, respectively. Edges L13 and L14 extend in directions different from the first direction X and the second direction Y.

[0205] Here, the angle between edge L11 and edge L13 is defined as angle θ7. If we are concerned with the sealing layer SE11, then angle θ7 is equivalent to the interior angle of the sealing layer SE11. Angle θ7 is, for example, an obtuse angle. In other words, angle θ7 is greater than 90 degrees and less than 180 degrees (90 degrees < θ1 < 180 degrees). In one example, angle θ7 is between 120 degrees and 150 degrees (120 degrees < θ1 < 150 degrees). More specifically, angle θ7 is 135 degrees.

[0206] The slit SL1 has ends SLa and SLb. End SLa is located between edge L14 of sealing layer SE11 and edge L5 of sealing layer SE12, and end SLb is located between edge L13 of sealing layer SE11 and edge L5 of sealing layer SE12.

[0207] The width of the end SLa of slit SL1 increases in the first direction X as it moves toward the second direction Y, and the width of the end SLb increases in the first direction X as it moves toward the direction opposite to the second direction Y.

[0208] The same effects as in the first embodiment can be achieved in this embodiment. Figure 23 This is a schematic top view of the display device DSP of the comparative example of this embodiment. Figure 23 The image shows the state before the display element DE3 was formed.

[0209] In the comparative example, a slit SL2 is formed between the sealing layer SE11 and the sealing layer SE12. The difference between the comparative example and this embodiment is that the planar shape of the sealing layer SE11 is rectangular.

[0210] In this case, the width of the slit SL2 in the first direction X is approximately constant in the second direction Y. Therefore, if the process for forming the display element DE3 is performed, bubbles are easily generated near the opening at the end of the slit SL2.

[0211] If the process for forming the display element DE3 is performed while bubbles are present, the bubbles will burst during the depressurized drying of the resist used to pattern the laminate FL3 and the sealing layer SE13, exposing the area A5 that should have been covered by the resist. This could potentially cause defects in the display area DA.

[0212] In contrast, such as Figure 22 As shown, in the display device DSP of this embodiment, the angle θ7 of the corner of the sealing layer SE11 is formed into an obtuse angle, thereby forming the ends SLa and SLb of the slit SL1.

[0213] Therefore, during the formation of the laminated film FL3 and the sealing layer SE13, air can easily escape from the ends SLa and SLb of the slit SL1. In other words, the resist can easily flow into the slit SL1, making it difficult for bubbles to form.

[0214] As a result, resist cracking can be suppressed, and the area A5 that should be covered by the resist is difficult to expose. With this embodiment, defects in the display device DSP can be suppressed, improving the yield of the display device DSP.

[0215] If the display device DSP is constructed as described above, the yield rate can be improved. In addition, various other suitable effects can be obtained from this embodiment.

[0216] It should be noted that, Figure 11 The shape of region A3 shown is not limited to the examples above. Figure 24 This is a schematic top view showing a modified example of the display device. Figure 24In the example, the corners of region A3 are formed into an arc shape. In other words, the sealing layer SE13 has an arc-shaped curved portion RL2 connecting edge L1 and edge L2. From another perspective, the corners of region A3, which is surrounded by sealing layers SE11 and SE12, are arc-shaped. Even in this case, the same effect as in the embodiments described above can be obtained.

[0217] All display devices that can be appropriately designed and implemented by those skilled in the art based on the display devices described above as embodiments of the present invention, provided they contain the essence of the present invention, are also within the scope of the present invention. Various modifications can be conceived by those skilled in the art within the scope of the present invention, and these modifications should also be considered within the scope of the present invention. For example, any method by those skilled in the art to appropriately add, delete, or design elements, or to add, omit, or change processes or conditions to obtain the above embodiments, as long as they contain the essence of the present invention, is also included within the scope of the present invention.

[0218] Furthermore, any other effects or benefits arising from the methods described in the above embodiments, as can be learned from this specification or as can be reasonably conceived by those skilled in the art, should naturally be considered as benefits of this invention.

Claims

1. A display device, wherein, include: Lower electrode; A partition wall surrounds the lower electrode; A laminated film disposed above the lower electrode; as well as A sealing layer, formed of an inorganic insulating material and covering the laminated film, is disposed above the partition wall. When viewed from above, the sealing layer has: The first side extending along the first direction; The second side extends along a second direction orthogonal to the first direction; and A third side extending in a direction different from the first direction and the second direction, connecting the first side and the second side. The angle between the first side and the third side is greater than 90 degrees and less than 180 degrees.

2. The display device according to claim 1, wherein, The first side, the second side, and the third side overlap with the partition wall.

3. The display device according to claim 2, wherein, The angle is between 120 degrees and 150 degrees.

4. The display device according to claim 2, wherein, The first side is directly connected to the third side.

5. The display device according to claim 2, wherein, The sealing layer also has an arc-shaped curved portion that connects the first side and the third side.

6. The display device according to claim 1, wherein, The planar shape of the sealing layer is octagonal.

7. The display device according to any one of claims 1 to 6, wherein, It also has an inorganic insulating layer disposed below the partition wall and the lower electrode. The partition wall has: The lower portion disposed above the inorganic insulating layer; and An upper part positioned above the lower part and projecting from the side of the lower part. The first side, the second side, and the third side are positioned above the upper part.

8. A display device, wherein, include: Lower electrode 1, lower electrode 2, and lower electrode 3; A partition wall surrounds the first lower electrode, the second lower electrode, and the third lower electrode; The first layer of the film is disposed above the first lower electrode; The second layer of the film is disposed above the second lower electrode; The first sealing layer is formed of inorganic insulating material and covers the first layer of film, and is disposed above the partition wall; as well as The second sealing layer, formed of an inorganic insulating material, covers the second laminated film and is disposed above the partition wall. The first sealing layer has a fourth side that extends along the first direction when viewed from above. The second sealing layer has a fifth side extending along a second direction orthogonal to the first direction when viewed from above, and a sixth side extending along a direction different from both the first and second directions and connected to the fifth side. The first sealing layer and the second sealing layer form a region that overlaps with the third lower electrode. The angle formed by the fourth side and the sixth side, i.e. the interior angle of the region, is greater than 90 degrees and less than 180 degrees.

9. The display device according to claim 8, wherein, The fourth, fifth, and sixth sides overlap with the partition wall.

10. A display device, wherein, include: Lower electrode 1, lower electrode 2, and lower electrode 3; A partition wall surrounds the first lower electrode, the second lower electrode, and the third lower electrode; The first layer of the film is disposed above the first lower electrode; The second layer of the film is disposed above the second lower electrode; The first sealing layer is formed of inorganic insulating material and covers the first layer of film, and is disposed above the partition wall; as well as The second sealing layer, formed of an inorganic insulating material, covers the second laminated film and is disposed above the partition wall. The first sealing layer has a fourth side extending along a first direction when viewed from above, and a seventh side connected to the fourth side, which extends in a direction different from a second direction orthogonal to the first direction. The first sealing layer and the second sealing layer form a region that overlaps with the third lower electrode. The angle formed by the fourth side and the seventh side, i.e. the interior angle of the region, is greater than 90 degrees and less than 180 degrees.

11. The display device according to claim 10, wherein, The fourth and seventh sides overlap with the partition wall.

12. The display device according to claim 8 or 10, wherein, The planar shape of the region is octagonal.

13. The display device according to claim 8 or 10, wherein, The interior angle is between 120 degrees and 150 degrees.

14. The display device according to claim 8, wherein, Also includes: A third layer of film is disposed above the third lower electrode; and The third sealing layer, formed of inorganic insulating material, covers the third laminated film and is disposed above the partition wall. The fourth and sixth sides are connected to the third sealing layer above the partition wall.

15. The display device according to claim 10, wherein, Also includes: The third layer of the film is disposed above the third lower electrode; as well as The third sealing layer, formed of inorganic insulating material, covers the third laminated film and is disposed above the partition wall. The fourth and seventh sides are connected to the third sealing layer above the partition wall.

16. The display device according to claim 14 or 15, wherein, The third sealing layer has a protrusion that overlaps with the partition wall and is located above the first sealing layer.

17. The display device according to claim 16, wherein, The protrusion has a portion that overlaps with the first sealing layer.

18. The display device according to claim 14 or 15, wherein, The third sealing layer also has an extension above the partition wall extending toward the gap formed between the first sealing layer and the partition wall.

19. The display device according to claim 14 or 15, wherein, The third laminated film is disposed above the partition wall between the partition wall and the third sealing layer.

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