Precise control method of poor seed removing mechanism of double-channel intelligent rapid screening machine for sugarcane seeds

Abstract

This invention discloses a precise control method for the inferior variety removal mechanism of a dual-channel intelligent rapid sugarcane seed screening machine, comprising the following steps: Step 1, constructing a dual-channel synchronous detection architecture: using a host computer to run two image processing processes; each image processing process receives sugarcane seed images from the corresponding sugarcane seed conveying channel in real time and determines whether the sugarcane seed is inferior; Step 2, deploying output control modules: configuring output control modules below each sugarcane seed conveying channel to control the corresponding inferior variety removal execution mechanism; Step 3, implementing a removal command issuance mechanism: when inferior variety information is detected, a removal command is sent from the host computer to the corresponding output control module; Step 4, designing a delay circuit: the removal command is transmitted to the inferior variety removal execution mechanism through a delay circuit to remove the inferior variety. This invention's control method adopts a dual-channel parallel processing approach, achieving dual-channel synchronous detection through a dual-process architecture on a single host computer, thus improving overall screening efficiency.

Description

Technical Field

[0001] This invention relates to the field of agricultural intelligent equipment and automated control technology, specifically to a precise control method for the inferior seed removal mechanism of a dual-channel intelligent rapid sugarcane seed screening machine. Background Technology

[0002] Sugarcane is an important sugar crop in my country, and its planting quality directly affects germination rate and yield. Traditional sugarcane planting mostly uses whole stalks or manual cutting, which suffers from low efficiency and inconsistent seed quality. In recent years, mechanized sowing of pre-cut sugarcane seed segments has been gradually promoted, but the requirements for seed segment quality are extremely high: an ideal seed segment should contain two or more healthy sugarcane nodes, and the cut should maintain a reasonable distance between adjacent sugarcane nodes to improve the germination rate. Therefore, the automatic identification and removal of inferior seed segments before sowing has become a crucial step.

[0003] Currently, machine vision-based sugarcane seed screening equipment exists, but it often uses a single host computer for single-channel screening, limiting processing efficiency and failing to fully utilize the multi-core CPU resources of the host computer. Therefore, it is necessary to design a precise control method for the inferior seed removal mechanism of a dual-channel intelligent rapid sugarcane seed screening machine to improve the overall efficiency of intelligent sugarcane seed preparation. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a precise control method for the inferior seed removal mechanism of a dual-channel intelligent rapid sugarcane seed screening machine, thereby overcoming the drawback of low efficiency in intelligent sugarcane seed preparation.

[0005] To achieve the above objectives, the present invention provides a precise control method for the inferior variety removal mechanism of a dual-channel intelligent rapid sugarcane seed screening machine, comprising the following steps:

[0006] Step 1: Construct a dual-channel synchronous detection architecture: A host computer runs two independent but time-synchronized image processing processes; each image processing process corresponds one-to-one with the sugarcane seed conveying channels of the two screening machines; each sugarcane seed conveying channel is equipped with an image module for acquiring sugarcane seed images; each image processing process receives the sugarcane seed images acquired by the corresponding image module in real time, and identifies the sugarcane node positions and cut positions in the sugarcane seed images based on a deep learning model, and calculates the actual distance between the cut and adjacent sugarcane nodes using a pixel-level ranging algorithm, and determines whether the sugarcane seed is a substandard seed according to the preset quality discrimination rules;

[0007] Step 2, Deploy the output control module: Configure one output control module below each sugarcane seed conveying channel to control the operation of the inferior seed removal actuator of the corresponding sugarcane seed conveying channel; both output control modules are connected to the host computer for data transmission.

[0008] Step 3: Implement the rejection instruction issuance mechanism: When the image processing process of any sugarcane seed conveying channel detects inferior seed information, it sends a rejection instruction to the output control module corresponding to the sugarcane seed conveying channel through the host computer.

[0009] Step 4, design the delay circuit: Each output control module is connected to the delay circuit for data transmission. The delay circuit can preset a delay signal, which is used to compensate for the time difference in the transmission of defective products from the detection position to the rejection station. The rejection command is sent to the defective product rejection execution mechanism after being delayed by the delay circuit, and the defective product rejection execution mechanism is controlled to reject the defective products.

[0010] Preferably, in the above technical solution, in step one, the quality judgment rule for inferior varieties is that each sugarcane seed has only one sugarcane node, no sugarcane node, or the distance between the sugarcane seed cut and the adjacent sugarcane node is less than 5mm.

[0011] Preferably, in the above technical solution, in step two, the transmission control module adopts a 16-channel transistor I / O module, and the transistor I / O module supports the Modbus RTU communication protocol; the two transistor I / O modules share the same RS485 bus and connect to the host computer by setting different device station numbers.

[0012] Preferably, in the above technical solution, in step three, each inferior seed rejection actuator includes two rejection cylinders spaced apart along the length of the corresponding sugarcane seed conveying channel; the odd-numbered channels of the transistor IO module are uniformly mapped to one of the rejection cylinders, and the even-numbered channels of the transistor IO module are uniformly mapped to the other rejection cylinder; the 16 output channels of the transistor IO module adopt a polling dispatch mechanism.

[0013] Preferably, in the above technical solution, the removal cylinder is a rodless cylinder with a guide rail.

[0014] Preferably, in the above technical solution, in step four, each delay circuit includes two timers, namely a first-level timer and a second-level timer. The first-level timer is connected to the output terminal of the output control module, the output terminal of the first-level timer is connected to the input terminal of the second-level timer, and the output terminal of the second-level timer is connected to the corresponding defective product elimination execution mechanism.

[0015] Preferably, in the above technical solution, the timer chip model is NE555; the time constant of the RC element of the first-stage timer is pre-calculated based on the uniform running speed of the corresponding sugarcane seed conveying channel and the distance between the image module and the inferior seed rejection actuator, and the desired delay time T can be obtained by adjusting the resistance value of the sliding rheostat R1. The formula for calculating the delay time T is:

[0016] T = 1.1 × R × C (1)

[0017] Where: T—delay time, R—charging resistor, C—charging capacitor.

[0018] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0019] 1. The control method of this invention adopts a dual-channel parallel processing approach, which realizes dual-channel synchronous detection through a dual-process architecture of a host computer, improves the overall screening efficiency, and meets the screening requirements of the intelligent sugarcane seed preparation production line.

[0020] 2. The conveying control module of this invention adopts a 16-channel transistor I / O module, which facilitates the connection of subsequent delay circuits and the control of the defective product rejection mechanism. It has strong anti-interference and high responsiveness, and is suitable for high-speed screening scenarios with a screening accuracy of up to 98%. The transistor I / O module supports the Modbus RTU communication protocol and adopts Modbus RTU bus-based control, which simplifies wiring, reduces system complexity, and ensures communication reliability and real-time performance.

[0021] 3. The present invention has two spaced-apart rejection cylinders in each sugarcane seed conveying channel, and the control algorithm of the rejection cylinders is designed to be alternating rejection, which can achieve efficient and accurate rejection and avoid missed rejection and incorrect rejection.

[0022] 4. The delay circuit of this invention uses a two-stage cascaded NE555 timer circuit to achieve physical layer delay compensation, which is unaffected by operating system scheduling jitter and can meet real-time response triggering. The first-stage timer is configured in monostable trigger mode and generates a precise delay signal to compensate for the transmission delay of defective products from the detection position to the rejection station according to a preset RC time constant. The second-stage timer also operates in monostable mode, receives the output of the first-stage timer as a trigger signal, and generates a drive pulse with fixed width and stable amplitude to drive the defective product rejection execution mechanism. Through the above two-stage delay-trigger mechanism, it is ensured that the rejection action is strictly synchronized in time with the physical position of the defective product arriving at the rejection station. Attached Figure Description

[0023] Figure 1 This is a schematic diagram of the structure of two screening machines according to the present invention.

[0024] Figure 2 This is a flowchart of the dual-channel sugarcane seed quality detection and rejection control communication according to the present invention.

[0025] Figure 3 This is the defective product elimination control flowchart according to the present invention.

[0026] Figure 4 This is a flowchart of the inferior seed elimination control algorithm according to the present invention.

[0027] Figure 5This is a single delay circuit diagram according to the present invention.

[0028] Explanation of key figure labels:

[0029] 1-Screening machine, 2-Inferior seed removal mechanism, 3-Sugarcane seed conveying channel, 4-First-stage timer, 5-Second-stage timer. Detailed Implementation

[0030] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings, but it should be understood that the scope of protection of the present invention is not limited to the specific embodiments.

[0031] Unless otherwise expressly stated, throughout the specification and claims, the term "comprising" or its variations such as "including" or "comprises" shall be understood to include the stated elements or components without excluding other elements or other components.

[0032] like Figures 1 to 5 As shown in the figure, the precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to a specific embodiment of the present invention includes the following steps:

[0033] Step 1: Construct a dual-channel synchronous detection architecture

[0034] Two independent but time-synchronized image processing processes are run on a single host computer. These two processes are designated as the first process and the second process. Each screening machine 1 has a sugarcane seed conveying channel 3 for conveying sugarcane seeds one by one. The image processing processes correspond one-to-one with the sugarcane seed conveying channels 3 of the two screening machines 1. The two sugarcane seed conveying channels 3 are designated as the first channel and the second channel, respectively. The first process corresponds to the first channel, and the second process corresponds to the second channel. An image module for acquiring images of sugarcane seeds is located above each sugarcane seed conveying channel 3. The image module can be an industrial camera, used to acquire images of sugarcane seeds passing through the sugarcane seed conveying channel 3 below it in real time. Each image processing process receives the sugarcane seed images acquired by the corresponding image module in real time, identifies the sugarcane node positions and cut positions in the sugarcane seed images based on the YOLO deep learning model, and calculates the actual distance between the cut and adjacent sugarcane nodes using a pixel-level ranging algorithm. Based on a preset quality discrimination rule, it determines whether the sugarcane seed is a substandard variety. Preferably, the quality discrimination rule for substandard varieties is that each sugarcane seed has only one sugarcane node, no sugarcane nodes, or the distance between the sugarcane seed cut and the adjacent sugarcane node is less than 5 mm.

[0035] The two image processing processes operate independently. Each process initiates a background Modbus RTU communication thread during initialization to ensure the real-time performance and stability of subsequent command issuance. By operating the two processes independently while sharing a system clock synchronization mechanism, consistency in detection timing and high concurrency processing capabilities between the two channels are achieved, significantly improving screening efficiency.

[0036] Step 2: Deploy the output control module

[0037] An output control module is configured below each sugarcane seed conveying channel 3 to control the operation of the inferior seed rejection actuator 2 of the corresponding sugarcane seed conveying channel 3; both output control modules are connected to the host computer for data transmission.

[0038] Preferably, the conveying control module employs a 16-channel transistor I / O module, and the transistor I / O module supports the Modbus RTU communication protocol. Two transistor I / O modules share the same RS485 bus for data connection to the host computer by being configured with different device station numbers. The use of a 16-channel transistor I / O module facilitates the connection of subsequent delay circuits and the control of the defective product rejection actuator 2, providing strong anti-interference capabilities and high responsiveness, making it suitable for high-speed screening scenarios with a screening accuracy of up to 98%. The transistor I / O module supports the Modbus RTU communication protocol, employing Modbus RTU bus-based control, simplifying wiring, reducing system complexity, and ensuring communication reliability and real-time performance.

[0039] Step 3: Implement the removal instruction issuance mechanism

[0040] When the image processing process of any sugarcane seed conveying channel 3 detects inferior seed information and the inferior seed crosses the system's preset warning line, the host computer sends a rejection command to the output control module corresponding to the sugarcane seed conveying channel 3.

[0041] If the sugarcane variety is determined to be inferior, the corresponding Modbus communication task is triggered. The background thread retrieves the task from the task queue and sends a function code to the transistor I / O module of the corresponding sugarcane variety conveying channel 3, activating the inferior variety rejection execution mechanism 2 of the corresponding sugarcane variety conveying channel 3, thereby initiating the rejection action.

[0042] Preferably, each inferior variety removal actuator 2 includes two removal cylinders spaced apart along the length of the corresponding sugarcane seed conveying channel 3. Odd-numbered channels of the transistor I / O module are uniformly mapped to one removal cylinder, and even-numbered channels are uniformly mapped to the other removal cylinder; the 16 output channels of the transistor I / O module employ a polling dispatch mechanism. That is, each sugarcane seed conveying channel 3 uses dual removal cylinders to alternately remove inferior varieties, achieving efficient and accurate removal and avoiding missed or incorrect removal. Each removal cylinder is controlled by a two-position five-way solenoid valve, and the energization and de-energization of the left and right coils of the two-position five-way solenoid valve are controlled by the transistor I / O module. The removal cylinder is controlled to extend or retract at precise moments to complete the lateral removal of inferior sugarcane varieties. Preferably, the removal cylinder is a rodless cylinder with a guide rail.

[0043] To ensure the orderly alternation of the two rejection cylinders in the time domain and to adapt to the concurrent rejection requirements of multiple inferior varieties in high-speed continuous conveying scenarios, the system uses a polling dispatch mechanism of channels 1 to 16 for the transistor I / O module. When the host computer determines that an inferior variety needs to be rejected, it sequentially allocates the next available channel (starting from 1, allocating each channel in turn, and then looping back after reaching 16), ensuring that rejection commands are evenly distributed and avoiding single-point overload.

[0044] On each sugarcane seed conveying channel 3, the rejection cylinder closest to the image module is designated as the first rejection cylinder A, and the other rejection cylinder is designated as the second rejection cylinder B. Based on this polling and dispatching mechanism, the system establishes a set of deterministic channel-mechanism-direction mapping rules. Specifically, all odd-numbered channels (1, 3, 5, 7, 9, 11, 13, 15) of the transistor IO module are uniformly mapped to the first rejection cylinder A. Among them, the channels with a remainder of 1 when the channel number is modulo 4 (i.e., channels 1, 5, 9, and 13) are connected to the left coil of the two-position five-way solenoid valve of the first rejection cylinder A to trigger the forward action of the cylinder and reject inferior seeds; the channels with a remainder of 3 when the channel number is modulo 4 (i.e., channels 3, 7, 11, and 15) are connected to the right coil of the two-position five-way solenoid valve of the first rejection cylinder A to trigger the reverse reset action and reject inferior seeds. All even-numbered channels (2, 4, 6, 8, 10, 12, 14, 16) are uniformly mapped to the second rejection cylinder B. The channels with a remainder of 2 when the channel number is modulo 4 (i.e., channels 2, 6, 10, and 14) are connected to the left coil of the two-position five-way solenoid valve of the second rejection cylinder B, which is used to trigger the forward action of the cylinder to reject inferior products. The channels with a remainder of 0 when the channel number is modulo 4 (i.e., channels 4, 8, 12, and 16) are connected to the right coil, which is used to trigger the reverse reset action to reject inferior products.

[0045] Step 4: Design the delay circuit

[0046] Each output control module is connected to the delay circuit. The delay circuit can preset a delay signal, which is used to compensate for the time difference in the transport of defective products from the detection position to the rejection station. The rejection command is sent to the defective product rejection actuator 2 after being delayed by the delay circuit, and controls the defective product rejection actuator 2 to reject the defective products.

[0047] Preferably, each delay circuit includes two timers, namely a first-stage timer 4 and a second-stage timer 5. The first-stage timer 4 is connected to the output terminal of the output control module, the output terminal of the first-stage timer 4 is connected to the input terminal of the second-stage timer 5, and the output terminal of the second-stage timer 5 is connected to the corresponding inferior product rejection actuator 2.

[0048] More preferably, the timer chip is an NE555. The first-stage timer 4 is configured in monostable trigger mode. The time constant of the RC element of the first-stage timer 4 is pre-calculated based on the uniform running speed of the corresponding sugarcane seed conveying channel 3 and the distance between the image module and the inferior seed rejection actuator 2. The desired delay time T can be obtained by adjusting the resistance value of the sliding rheostat R1. This delay time T is used to compensate for the time required for the inferior seed to move from the image recognition position to the corresponding rejection cylinder position, i.e., to compensate for the time difference in the transport of the inferior seed from the detection position to the rejection station, ensuring that the rejection action is strictly aligned spatially with the target inferior seed. The second-stage timer 5 also operates in monostable mode, receiving the output of the first-stage timer 4 as a trigger signal to generate a drive pulse with a fixed width and stable amplitude. This pulse reliably drives the two-position five-way solenoid valve of the rejection cylinder, thereby accurately triggering the extension or retraction of the rejection cylinder to complete the rejection action of the inferior sugarcane seed. Through the above two-stage delay-trigger mechanism, it is ensured that the rejection action is strictly synchronized in time with the physical position of the inferior seed arriving at the rejection station. The formula for calculating the delay time T is:

[0049] T = 1.1 × R × C (1)

[0050] Where: T—delay time, R—charging resistor, C—charging capacitor.

[0051] Each output channel of the transistor I / O module is connected to a high-precision delay circuit consisting of two cascaded NE555 timers, enabling the entire system to achieve full-link automated control of "sensing-decision-communication-delay-drive-execution", with good scalability and reliability.

[0052] The foregoing description of specific exemplary embodiments of the invention is for illustrative and explanatory purposes. These descriptions are not intended to limit the invention to the precise forms disclosed, and it will be apparent that many changes and variations can be made in accordance with the foregoing teachings. The exemplary embodiments were chosen and described in order to explain the specific principles of the invention and its practical application, thereby enabling those skilled in the art to implement and utilize various different exemplary embodiments of the invention, as well as various different choices and variations. The scope of the invention is intended to be defined by the claims and their equivalents.

Claims

1. A precise control method for the inferior variety removal mechanism of a dual-channel intelligent rapid sugarcane seed screening machine, characterized in that, Includes the following steps: Step 1: Construct a dual-channel synchronous detection architecture: A host computer runs two independent but time-synchronized image processing processes; each image processing process corresponds one-to-one with the sugarcane seed conveying channels of the two screening machines; each sugarcane seed conveying channel is equipped with an image module for acquiring sugarcane seed images; each image processing process receives the sugarcane seed images acquired by the corresponding image module in real time, and identifies the sugarcane node positions and cut positions in the sugarcane seed images based on a deep learning model, and calculates the actual distance between the cut and adjacent sugarcane nodes using a pixel-level ranging algorithm, and determines whether the sugarcane seed is a substandard seed according to the preset quality discrimination rules; Step 2, Deploy the output control module: Configure one output control module below each sugarcane seed conveying channel to control the operation of the inferior seed removal actuator of the corresponding sugarcane seed conveying channel; both output control modules are connected to the host computer for data transmission. Step 3: Implement the rejection instruction issuance mechanism: When the image processing process of any sugarcane seed conveying channel detects inferior seed information, it sends a rejection instruction to the output control module corresponding to the sugarcane seed conveying channel through the host computer. Step 4, design the delay circuit: Each output control module is connected to the delay circuit for data transmission. The delay circuit can preset a delay signal, which is used to compensate for the time difference in the transmission of defective products from the detection position to the rejection station. The rejection command is sent to the defective product rejection execution mechanism after being delayed by the delay circuit, and the defective product rejection execution mechanism is controlled to reject the defective products.

2. The precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to claim 1, characterized in that, In step one, the quality judgment rule for inferior varieties is that each sugarcane seed has only one sugarcane node, no sugarcane node, or the distance between the sugarcane seed cut and the adjacent sugarcane node is less than 5mm.

3. The precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to claim 1, characterized in that, In step two, the conveying control module uses a 16-channel transistor I / O module, and the transistor I / O module supports the Modbus RTU communication protocol; the two transistor I / O modules share the same RS485 bus and connect to the host computer by setting different device station numbers.

4. The precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to claim 3, characterized in that, In step three, each inferior seed rejection actuator includes two rejection cylinders spaced apart along the length of the corresponding sugarcane seed conveying channel; the odd-numbered channels of the transistor IO module are uniformly mapped to one of the rejection cylinders, and the even-numbered channels of the transistor IO module are uniformly mapped to the other rejection cylinder; the 16 output channels of the transistor IO module adopt a polling dispatch mechanism.

5. The precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to claim 4, characterized in that, The cylinder to be eliminated is the rodless cylinder with guide rail.

6. The precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to claim 1, characterized in that, In step four, each delay circuit includes two timers, namely a first-level timer and a second-level timer. The first-level timer is connected to the output terminal of the output control module, the output terminal of the first-level timer is connected to the input terminal of the second-level timer, and the output terminal of the second-level timer is connected to the corresponding defective elimination actuator.

7. The precise control method for the inferior variety removal mechanism of the dual-channel intelligent rapid sugarcane seed screening machine according to claim 5, characterized in that, The timer chip is NE555; the time constant of the RC element of the first-stage timer is pre-calculated based on the uniform running speed of the corresponding sugarcane seed conveying channel and the distance between the image module and the inferior seed rejection actuator. The desired delay time T can be obtained by adjusting the resistance value of the sliding rheostat R1. The formula for calculating the delay time T is: T = 1.1 × R × C (1) Where: T—delay time, R—charging resistor, C—charging capacitor.

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